1 // SPDX-License-Identifier: GPL-2.0
3 * Device Tree Source for the Alt board
5 * Copyright (C) 2014 Renesas Electronics Corporation
9 #include "r8a7794.dtsi"
10 #include <dt-bindings/gpio/gpio.h>
14 compatible = "renesas,alt", "renesas,r8a7794";
28 bootargs = "ignore_loglevel rw root=/dev/nfs ip=on";
29 stdout-path = "serial0:115200n8";
33 device_type = "memory";
34 reg = <0 0x40000000 0 0x40000000>;
37 d3_3v: regulator-d3-3v {
38 compatible = "regulator-fixed";
39 regulator-name = "D3.3V";
40 regulator-min-microvolt = <3300000>;
41 regulator-max-microvolt = <3300000>;
46 vcc_sdhi0: regulator-vcc-sdhi0 {
47 compatible = "regulator-fixed";
49 regulator-name = "SDHI0 Vcc";
50 regulator-min-microvolt = <3300000>;
51 regulator-max-microvolt = <3300000>;
53 gpio = <&gpio2 26 GPIO_ACTIVE_HIGH>;
57 vccq_sdhi0: regulator-vccq-sdhi0 {
58 compatible = "regulator-gpio";
60 regulator-name = "SDHI0 VccQ";
61 regulator-min-microvolt = <1800000>;
62 regulator-max-microvolt = <3300000>;
64 gpios = <&gpio2 29 GPIO_ACTIVE_HIGH>;
66 states = <3300000 1>, <1800000 0>;
69 vcc_sdhi1: regulator-vcc-sdhi1 {
70 compatible = "regulator-fixed";
72 regulator-name = "SDHI1 Vcc";
73 regulator-min-microvolt = <3300000>;
74 regulator-max-microvolt = <3300000>;
76 gpio = <&gpio4 26 GPIO_ACTIVE_HIGH>;
80 vccq_sdhi1: regulator-vccq-sdhi1 {
81 compatible = "regulator-gpio";
83 regulator-name = "SDHI1 VccQ";
84 regulator-min-microvolt = <1800000>;
85 regulator-max-microvolt = <3300000>;
87 gpios = <&gpio4 29 GPIO_ACTIVE_HIGH>;
89 states = <3300000 1>, <1800000 0>;
98 compatible = "adi,adv7123";
101 #address-cells = <1>;
106 adv7123_in: endpoint {
107 remote-endpoint = <&du_out_rgb1>;
112 adv7123_out: endpoint {
113 remote-endpoint = <&vga_in>;
120 compatible = "vga-connector";
124 remote-endpoint = <&adv7123_out>;
130 compatible = "fixed-clock";
132 clock-frequency = <74250000>;
136 compatible = "fixed-clock";
138 clock-frequency = <148500000>;
142 #address-cells = <1>;
144 compatible = "i2c-gpio";
146 scl-gpios = <&gpio4 0 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
147 sda-gpios = <&gpio4 1 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
151 #address-cells = <1>;
153 compatible = "i2c-gpio";
155 scl-gpios = <&gpio4 8 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
156 sda-gpios = <&gpio4 9 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
157 i2c-gpio,delay-us = <5>;
161 * A fallback to GPIO is provided for I2C1.
164 compatible = "i2c-demux-pinctrl";
165 i2c-parent = <&i2c1>, <&gpioi2c1>;
166 i2c-bus-name = "i2c-hdmi";
167 #address-cells = <1>;
171 compatible = "adi,adv7180";
177 remote-endpoint = <&vin0ep>;
183 compatible = "renesas,r1ex24002", "atmel,24c02";
190 * I2C4 is routed to EXIO connector B, pins 73 (SCL) + 74 (SDA).
191 * A fallback to GPIO is provided.
194 compatible = "i2c-demux-pinctrl";
195 i2c-parent = <&i2c4>, <&gpioi2c4>;
196 i2c-bus-name = "i2c-exio4";
197 #address-cells = <1>;
204 pinctrl-0 = <&usb0_pins>;
205 pinctrl-names = "default";
210 pinctrl-0 = <&usb1_pins>;
211 pinctrl-names = "default";
219 pinctrl-0 = <&du_pins>;
220 pinctrl-names = "default";
223 clocks = <&cpg CPG_MOD 724>, <&cpg CPG_MOD 723>,
224 <&x13_clk>, <&x2_clk>;
225 clock-names = "du.0", "du.1", "dclkin.0", "dclkin.1";
230 remote-endpoint = <&adv7123_in>;
237 clock-frequency = <20000000>;
241 pinctrl-0 = <&scif_clk_pins>;
242 pinctrl-names = "default";
245 groups = "du1_rgb666", "du1_sync", "du1_disp", "du1_clk0_out";
250 groups = "scif2_data";
254 scif_clk_pins: scif_clk {
256 function = "scif_clk";
260 groups = "eth_link", "eth_mdio", "eth_rmii";
265 groups = "intc_irq8";
280 groups = "vin0_data8", "vin0_clk";
284 mmcif0_pins: mmcif0 {
285 groups = "mmc_data8", "mmc_ctrl";
290 groups = "sdhi0_data4", "sdhi0_ctrl";
292 power-source = <3300>;
295 sdhi0_pins_uhs: sd0_uhs {
296 groups = "sdhi0_data4", "sdhi0_ctrl";
298 power-source = <1800>;
302 groups = "sdhi1_data4", "sdhi1_ctrl";
304 power-source = <3300>;
307 sdhi1_pins_uhs: sd1_uhs {
308 groups = "sdhi1_data4", "sdhi1_ctrl";
310 power-source = <1800>;
330 groups = "qspi_ctrl", "qspi_data4";
336 pinctrl-0 = <ðer_pins>, <&phy1_pins>;
337 pinctrl-names = "default";
339 phy-handle = <&phy1>;
340 renesas,ether-link-active-low;
343 phy1: ethernet-phy@1 {
345 interrupt-parent = <&irqc0>;
346 interrupts = <8 IRQ_TYPE_LEVEL_LOW>;
347 micrel,led-mode = <1>;
348 reset-gpios = <&gpio1 24 GPIO_ACTIVE_LOW>;
353 pinctrl-0 = <&mmcif0_pins>;
354 pinctrl-names = "default";
356 vmmc-supply = <&d3_3v>;
357 vqmmc-supply = <&d3_3v>;
369 pinctrl-0 = <&sdhi0_pins>;
370 pinctrl-1 = <&sdhi0_pins_uhs>;
371 pinctrl-names = "default", "state_uhs";
373 vmmc-supply = <&vcc_sdhi0>;
374 vqmmc-supply = <&vccq_sdhi0>;
375 cd-gpios = <&gpio6 6 GPIO_ACTIVE_LOW>;
376 wp-gpios = <&gpio6 7 GPIO_ACTIVE_HIGH>;
383 pinctrl-0 = <&sdhi1_pins>;
384 pinctrl-1 = <&sdhi1_pins_uhs>;
385 pinctrl-names = "default", "state_uhs";
387 vmmc-supply = <&vcc_sdhi1>;
388 vqmmc-supply = <&vccq_sdhi1>;
389 cd-gpios = <&gpio6 14 GPIO_ACTIVE_LOW>;
390 wp-gpios = <&gpio6 15 GPIO_ACTIVE_HIGH>;
396 pinctrl-0 = <&i2c1_pins>;
397 pinctrl-names = "i2c-hdmi";
399 clock-frequency = <400000>;
403 pinctrl-0 = <&i2c4_pins>;
404 pinctrl-names = "i2c-exio4";
409 clock-frequency = <100000>;
412 compatible = "dlg,da9063";
414 interrupt-parent = <&gpio3>;
415 interrupts = <31 IRQ_TYPE_LEVEL_LOW>;
416 interrupt-controller;
419 compatible = "dlg,da9063-rtc";
423 compatible = "dlg,da9063-watchdog";
430 pinctrl-0 = <&vin0_pins>;
431 pinctrl-names = "default";
435 remote-endpoint = <&adv7180>;
442 pinctrl-0 = <&scif2_pins>;
443 pinctrl-names = "default";
449 clock-frequency = <14745600>;
453 pinctrl-0 = <&qspi_pins>;
454 pinctrl-names = "default";
459 compatible = "spansion,s25fl512s", "jedec,spi-nor";
461 spi-max-frequency = <30000000>;
462 spi-tx-bus-width = <4>;
463 spi-rx-bus-width = <4>;
469 compatible = "fixed-partitions";
470 #address-cells = <1>;
475 reg = <0x00000000 0x00040000>;
480 reg = <0x00040000 0x00040000>;
485 reg = <0x00080000 0x03f80000>;