1 // SPDX-License-Identifier: GPL-2.0
3 * Device Tree Source for the SK-RZG1E board
5 * Copyright (C) 2016-2017 Cogent Embedded, Inc.
9 #include "r8a7745.dtsi"
10 #include <dt-bindings/gpio/gpio.h>
14 compatible = "renesas,sk-rzg1e", "renesas,r8a7745";
21 bootargs = "ignore_loglevel rw root=/dev/nfs ip=on";
22 stdout-path = "serial0:115200n8";
26 device_type = "memory";
27 reg = <0 0x40000000 0 0x40000000>;
32 clock-frequency = <20000000>;
37 groups = "scif2_data";
42 groups = "eth_link", "eth_mdio", "eth_rmii";
53 pinctrl-0 = <&scif2_pins>;
54 pinctrl-names = "default";
60 pinctrl-0 = <ðer_pins>, <&phy1_pins>;
61 pinctrl-names = "default";
64 renesas,ether-link-active-low;
67 phy1: ethernet-phy@1 {
68 compatible = "ethernet-phy-id0022.1537",
69 "ethernet-phy-ieee802.3-c22";
71 interrupt-parent = <&irqc>;
72 interrupts = <8 IRQ_TYPE_LEVEL_LOW>;
73 micrel,led-mode = <1>;
74 reset-gpios = <&gpio1 24 GPIO_ACTIVE_LOW>;