ARM: dts: r8a7743: Convert to new LVDS DT bindings
[linux-2.6-microblaze.git] / arch / arm / boot / dts / r8a7743.dtsi
1 // SPDX-License-Identifier: GPL-2.0
2 /*
3  * Device Tree Source for the r8a7743 SoC
4  *
5  * Copyright (C) 2016-2017 Cogent Embedded Inc.
6  */
7
8 #include <dt-bindings/interrupt-controller/irq.h>
9 #include <dt-bindings/interrupt-controller/arm-gic.h>
10 #include <dt-bindings/clock/r8a7743-cpg-mssr.h>
11 #include <dt-bindings/power/r8a7743-sysc.h>
12
13 / {
14         compatible = "renesas,r8a7743";
15         #address-cells = <2>;
16         #size-cells = <2>;
17
18         aliases {
19                 i2c0 = &i2c0;
20                 i2c1 = &i2c1;
21                 i2c2 = &i2c2;
22                 i2c3 = &i2c3;
23                 i2c4 = &i2c4;
24                 i2c5 = &i2c5;
25                 i2c6 = &iic0;
26                 i2c7 = &iic1;
27                 i2c8 = &iic3;
28                 spi0 = &qspi;
29                 spi1 = &msiof0;
30                 spi2 = &msiof1;
31                 spi3 = &msiof2;
32                 vin0 = &vin0;
33                 vin1 = &vin1;
34                 vin2 = &vin2;
35         };
36
37         /*
38          * The external audio clocks are configured as 0 Hz fixed frequency
39          * clocks by default.
40          * Boards that provide audio clocks should override them.
41          */
42         audio_clk_a: audio_clk_a {
43                 compatible = "fixed-clock";
44                 #clock-cells = <0>;
45                 clock-frequency = <0>;
46         };
47
48         audio_clk_b: audio_clk_b {
49                 compatible = "fixed-clock";
50                 #clock-cells = <0>;
51                 clock-frequency = <0>;
52         };
53
54         audio_clk_c: audio_clk_c {
55                 compatible = "fixed-clock";
56                 #clock-cells = <0>;
57                 clock-frequency = <0>;
58         };
59
60         /* External CAN clock */
61         can_clk: can {
62                 compatible = "fixed-clock";
63                 #clock-cells = <0>;
64                 /* This value must be overridden by the board. */
65                 clock-frequency = <0>;
66         };
67
68         cpus {
69                 #address-cells = <1>;
70                 #size-cells = <0>;
71                 enable-method = "renesas,apmu";
72
73                 cpu0: cpu@0 {
74                         device_type = "cpu";
75                         compatible = "arm,cortex-a15";
76                         reg = <0>;
77                         clock-frequency = <1500000000>;
78                         clocks = <&cpg CPG_CORE R8A7743_CLK_Z>;
79                         clock-latency = <300000>; /* 300 us */
80                         power-domains = <&sysc R8A7743_PD_CA15_CPU0>;
81                         next-level-cache = <&L2_CA15>;
82
83                         /* kHz - uV - OPPs unknown yet */
84                         operating-points = <1500000 1000000>,
85                                            <1312500 1000000>,
86                                            <1125000 1000000>,
87                                            < 937500 1000000>,
88                                            < 750000 1000000>,
89                                            < 375000 1000000>;
90                 };
91
92                 cpu1: cpu@1 {
93                         device_type = "cpu";
94                         compatible = "arm,cortex-a15";
95                         reg = <1>;
96                         clock-frequency = <1500000000>;
97                         clocks = <&cpg CPG_CORE R8A7743_CLK_Z>;
98                         clock-latency = <300000>; /* 300 us */
99                         power-domains = <&sysc R8A7743_PD_CA15_CPU1>;
100                         next-level-cache = <&L2_CA15>;
101
102                         /* kHz - uV - OPPs unknown yet */
103                         operating-points = <1500000 1000000>,
104                                            <1312500 1000000>,
105                                            <1125000 1000000>,
106                                            < 937500 1000000>,
107                                            < 750000 1000000>,
108                                            < 375000 1000000>;
109                 };
110
111                 L2_CA15: cache-controller-0 {
112                         compatible = "cache";
113                         cache-unified;
114                         cache-level = <2>;
115                         power-domains = <&sysc R8A7743_PD_CA15_SCU>;
116                 };
117         };
118
119         /* External root clock */
120         extal_clk: extal {
121                 compatible = "fixed-clock";
122                 #clock-cells = <0>;
123                 /* This value must be overridden by the board. */
124                 clock-frequency = <0>;
125         };
126
127         /* External PCIe clock - can be overridden by the board */
128         pcie_bus_clk: pcie_bus {
129                 compatible = "fixed-clock";
130                 #clock-cells = <0>;
131                 clock-frequency = <0>;
132         };
133
134         pmu {
135                 compatible = "arm,cortex-a15-pmu";
136                 interrupts-extended = <&gic GIC_SPI 72 IRQ_TYPE_LEVEL_HIGH>,
137                                       <&gic GIC_SPI 73 IRQ_TYPE_LEVEL_HIGH>;
138                 interrupt-affinity = <&cpu0>, <&cpu1>;
139         };
140
141         /* External SCIF clock */
142         scif_clk: scif {
143                 compatible = "fixed-clock";
144                 #clock-cells = <0>;
145                 /* This value must be overridden by the board. */
146                 clock-frequency = <0>;
147         };
148
149         soc {
150                 compatible = "simple-bus";
151                 interrupt-parent = <&gic>;
152
153                 #address-cells = <2>;
154                 #size-cells = <2>;
155                 ranges;
156
157                 gpio0: gpio@e6050000 {
158                         compatible = "renesas,gpio-r8a7743",
159                                      "renesas,rcar-gen2-gpio";
160                         reg = <0 0xe6050000 0 0x50>;
161                         interrupts = <GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH>;
162                         #gpio-cells = <2>;
163                         gpio-controller;
164                         gpio-ranges = <&pfc 0 0 32>;
165                         #interrupt-cells = <2>;
166                         interrupt-controller;
167                         clocks = <&cpg CPG_MOD 912>;
168                         power-domains = <&sysc R8A7743_PD_ALWAYS_ON>;
169                         resets = <&cpg 912>;
170                 };
171
172                 gpio1: gpio@e6051000 {
173                         compatible = "renesas,gpio-r8a7743",
174                                      "renesas,rcar-gen2-gpio";
175                         reg = <0 0xe6051000 0 0x50>;
176                         interrupts = <GIC_SPI 5 IRQ_TYPE_LEVEL_HIGH>;
177                         #gpio-cells = <2>;
178                         gpio-controller;
179                         gpio-ranges = <&pfc 0 32 26>;
180                         #interrupt-cells = <2>;
181                         interrupt-controller;
182                         clocks = <&cpg CPG_MOD 911>;
183                         power-domains = <&sysc R8A7743_PD_ALWAYS_ON>;
184                         resets = <&cpg 911>;
185                 };
186
187                 gpio2: gpio@e6052000 {
188                         compatible = "renesas,gpio-r8a7743",
189                                      "renesas,rcar-gen2-gpio";
190                         reg = <0 0xe6052000 0 0x50>;
191                         interrupts = <GIC_SPI 6 IRQ_TYPE_LEVEL_HIGH>;
192                         #gpio-cells = <2>;
193                         gpio-controller;
194                         gpio-ranges = <&pfc 0 64 32>;
195                         #interrupt-cells = <2>;
196                         interrupt-controller;
197                         clocks = <&cpg CPG_MOD 910>;
198                         power-domains = <&sysc R8A7743_PD_ALWAYS_ON>;
199                         resets = <&cpg 910>;
200                 };
201
202                 gpio3: gpio@e6053000 {
203                         compatible = "renesas,gpio-r8a7743",
204                                      "renesas,rcar-gen2-gpio";
205                         reg = <0 0xe6053000 0 0x50>;
206                         interrupts = <GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>;
207                         #gpio-cells = <2>;
208                         gpio-controller;
209                         gpio-ranges = <&pfc 0 96 32>;
210                         #interrupt-cells = <2>;
211                         interrupt-controller;
212                         clocks = <&cpg CPG_MOD 909>;
213                         power-domains = <&sysc R8A7743_PD_ALWAYS_ON>;
214                         resets = <&cpg 909>;
215                 };
216
217                 gpio4: gpio@e6054000 {
218                         compatible = "renesas,gpio-r8a7743",
219                                      "renesas,rcar-gen2-gpio";
220                         reg = <0 0xe6054000 0 0x50>;
221                         interrupts = <GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH>;
222                         #gpio-cells = <2>;
223                         gpio-controller;
224                         gpio-ranges = <&pfc 0 128 32>;
225                         #interrupt-cells = <2>;
226                         interrupt-controller;
227                         clocks = <&cpg CPG_MOD 908>;
228                         power-domains = <&sysc R8A7743_PD_ALWAYS_ON>;
229                         resets = <&cpg 908>;
230                 };
231
232                 gpio5: gpio@e6055000 {
233                         compatible = "renesas,gpio-r8a7743",
234                                      "renesas,rcar-gen2-gpio";
235                         reg = <0 0xe6055000 0 0x50>;
236                         interrupts = <GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH>;
237                         #gpio-cells = <2>;
238                         gpio-controller;
239                         gpio-ranges = <&pfc 0 160 32>;
240                         #interrupt-cells = <2>;
241                         interrupt-controller;
242                         clocks = <&cpg CPG_MOD 907>;
243                         power-domains = <&sysc R8A7743_PD_ALWAYS_ON>;
244                         resets = <&cpg 907>;
245                 };
246
247                 gpio6: gpio@e6055400 {
248                         compatible = "renesas,gpio-r8a7743",
249                                      "renesas,rcar-gen2-gpio";
250                         reg = <0 0xe6055400 0 0x50>;
251                         interrupts = <GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH>;
252                         #gpio-cells = <2>;
253                         gpio-controller;
254                         gpio-ranges = <&pfc 0 192 32>;
255                         #interrupt-cells = <2>;
256                         interrupt-controller;
257                         clocks = <&cpg CPG_MOD 905>;
258                         power-domains = <&sysc R8A7743_PD_ALWAYS_ON>;
259                         resets = <&cpg 905>;
260                 };
261
262                 gpio7: gpio@e6055800 {
263                         compatible = "renesas,gpio-r8a7743",
264                                      "renesas,rcar-gen2-gpio";
265                         reg = <0 0xe6055800 0 0x50>;
266                         interrupts = <GIC_SPI 11 IRQ_TYPE_LEVEL_HIGH>;
267                         #gpio-cells = <2>;
268                         gpio-controller;
269                         gpio-ranges = <&pfc 0 224 26>;
270                         #interrupt-cells = <2>;
271                         interrupt-controller;
272                         clocks = <&cpg CPG_MOD 904>;
273                         power-domains = <&sysc R8A7743_PD_ALWAYS_ON>;
274                         resets = <&cpg 904>;
275                 };
276
277                 pfc: pin-controller@e6060000 {
278                         compatible = "renesas,pfc-r8a7743";
279                         reg = <0 0xe6060000 0 0x250>;
280                 };
281
282                 tpu: pwm@e60f0000 {
283                         compatible = "renesas,tpu-r8a7743", "renesas,tpu";
284                         reg = <0 0xe60f0000 0 0x148>;
285                         clocks = <&cpg CPG_MOD 304>;
286                         power-domains = <&sysc R8A7743_PD_ALWAYS_ON>;
287                         resets = <&cpg 304>;
288                         #pwm-cells = <3>;
289                         status = "disabled";
290                 };
291
292                 cpg: clock-controller@e6150000 {
293                         compatible = "renesas,r8a7743-cpg-mssr";
294                         reg = <0 0xe6150000 0 0x1000>;
295                         clocks = <&extal_clk>, <&usb_extal_clk>;
296                         clock-names = "extal", "usb_extal";
297                         #clock-cells = <2>;
298                         #power-domain-cells = <0>;
299                         #reset-cells = <1>;
300                 };
301
302                 apmu@e6152000 {
303                         compatible = "renesas,r8a7743-apmu", "renesas,apmu";
304                         reg = <0 0xe6152000 0 0x188>;
305                         cpus = <&cpu0 &cpu1>;
306                 };
307
308                 rst: reset-controller@e6160000 {
309                         compatible = "renesas,r8a7743-rst";
310                         reg = <0 0xe6160000 0 0x100>;
311                 };
312
313                 rwdt: watchdog@e6020000 {
314                         compatible = "renesas,r8a7743-wdt",
315                                      "renesas,rcar-gen2-wdt";
316                         reg = <0 0xe6020000 0 0x0c>;
317                         clocks = <&cpg CPG_MOD 402>;
318                         power-domains = <&sysc R8A7743_PD_ALWAYS_ON>;
319                         resets = <&cpg 402>;
320                         status = "disabled";
321                 };
322
323                 sysc: system-controller@e6180000 {
324                         compatible = "renesas,r8a7743-sysc";
325                         reg = <0 0xe6180000 0 0x200>;
326                         #power-domain-cells = <1>;
327                 };
328
329                 irqc: interrupt-controller@e61c0000 {
330                         compatible = "renesas,irqc-r8a7743", "renesas,irqc";
331                         #interrupt-cells = <2>;
332                         interrupt-controller;
333                         reg = <0 0xe61c0000 0 0x200>;
334                         interrupts = <GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH>,
335                                      <GIC_SPI 1 IRQ_TYPE_LEVEL_HIGH>,
336                                      <GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH>,
337                                      <GIC_SPI 3 IRQ_TYPE_LEVEL_HIGH>,
338                                      <GIC_SPI 12 IRQ_TYPE_LEVEL_HIGH>,
339                                      <GIC_SPI 13 IRQ_TYPE_LEVEL_HIGH>,
340                                      <GIC_SPI 14 IRQ_TYPE_LEVEL_HIGH>,
341                                      <GIC_SPI 15 IRQ_TYPE_LEVEL_HIGH>,
342                                      <GIC_SPI 16 IRQ_TYPE_LEVEL_HIGH>,
343                                      <GIC_SPI 17 IRQ_TYPE_LEVEL_HIGH>;
344                         clocks = <&cpg CPG_MOD 407>;
345                         power-domains = <&sysc R8A7743_PD_ALWAYS_ON>;
346                         resets = <&cpg 407>;
347                 };
348
349                 thermal: thermal@e61f0000 {
350                         compatible = "renesas,thermal-r8a7743",
351                                      "renesas,rcar-gen2-thermal";
352                         reg = <0 0xe61f0000 0 0x10>, <0 0xe61f0100 0 0x38>;
353                         interrupts = <GIC_SPI 69 IRQ_TYPE_LEVEL_HIGH>;
354                         clocks = <&cpg CPG_MOD 522>;
355                         power-domains = <&sysc R8A7743_PD_ALWAYS_ON>;
356                         resets = <&cpg 522>;
357                         #thermal-sensor-cells = <0>;
358                 };
359
360                 ipmmu_sy0: mmu@e6280000 {
361                         compatible = "renesas,ipmmu-r8a7743",
362                                      "renesas,ipmmu-vmsa";
363                         reg = <0 0xe6280000 0 0x1000>;
364                         interrupts = <GIC_SPI 223 IRQ_TYPE_LEVEL_HIGH>,
365                                      <GIC_SPI 224 IRQ_TYPE_LEVEL_HIGH>;
366                         #iommu-cells = <1>;
367                         status = "disabled";
368                 };
369
370                 ipmmu_sy1: mmu@e6290000 {
371                         compatible = "renesas,ipmmu-r8a7743",
372                                      "renesas,ipmmu-vmsa";
373                         reg = <0 0xe6290000 0 0x1000>;
374                         interrupts = <GIC_SPI 225 IRQ_TYPE_LEVEL_HIGH>;
375                         #iommu-cells = <1>;
376                         status = "disabled";
377                 };
378
379                 ipmmu_ds: mmu@e6740000 {
380                         compatible = "renesas,ipmmu-r8a7743",
381                                      "renesas,ipmmu-vmsa";
382                         reg = <0 0xe6740000 0 0x1000>;
383                         interrupts = <GIC_SPI 198 IRQ_TYPE_LEVEL_HIGH>,
384                                      <GIC_SPI 199 IRQ_TYPE_LEVEL_HIGH>;
385                         #iommu-cells = <1>;
386                         status = "disabled";
387                 };
388
389                 ipmmu_mp: mmu@ec680000 {
390                         compatible = "renesas,ipmmu-r8a7743",
391                                      "renesas,ipmmu-vmsa";
392                         reg = <0 0xec680000 0 0x1000>;
393                         interrupts = <GIC_SPI 226 IRQ_TYPE_LEVEL_HIGH>;
394                         #iommu-cells = <1>;
395                         status = "disabled";
396                 };
397
398                 ipmmu_mx: mmu@fe951000 {
399                         compatible = "renesas,ipmmu-r8a7743",
400                                      "renesas,ipmmu-vmsa";
401                         reg = <0 0xfe951000 0 0x1000>;
402                         interrupts = <GIC_SPI 222 IRQ_TYPE_LEVEL_HIGH>,
403                                      <GIC_SPI 221 IRQ_TYPE_LEVEL_HIGH>;
404                         #iommu-cells = <1>;
405                         status = "disabled";
406                 };
407
408                 ipmmu_gp: mmu@e62a0000 {
409                         compatible = "renesas,ipmmu-r8a7743",
410                                      "renesas,ipmmu-vmsa";
411                         reg = <0 0xe62a0000 0 0x1000>;
412                         interrupts = <GIC_SPI 260 IRQ_TYPE_LEVEL_HIGH>,
413                                      <GIC_SPI 261 IRQ_TYPE_LEVEL_HIGH>;
414                         #iommu-cells = <1>;
415                         status = "disabled";
416                 };
417
418                 icram0: sram@e63a0000 {
419                         compatible = "mmio-sram";
420                         reg = <0 0xe63a0000 0 0x12000>;
421                 };
422
423                 icram1: sram@e63c0000 {
424                         compatible = "mmio-sram";
425                         reg = <0 0xe63c0000 0 0x1000>;
426                         #address-cells = <1>;
427                         #size-cells = <1>;
428                         ranges = <0 0 0xe63c0000 0x1000>;
429
430                         smp-sram@0 {
431                                 compatible = "renesas,smp-sram";
432                                 reg = <0 0x100>;
433                         };
434                 };
435
436                 icram2: sram@e6300000 {
437                         compatible = "mmio-sram";
438                         reg = <0 0xe6300000 0 0x40000>;
439                 };
440
441                 /* The memory map in the User's Manual maps the cores to
442                  * bus numbers
443                  */
444                 i2c0: i2c@e6508000 {
445                         #address-cells = <1>;
446                         #size-cells = <0>;
447                         compatible = "renesas,i2c-r8a7743",
448                                      "renesas,rcar-gen2-i2c";
449                         reg = <0 0xe6508000 0 0x40>;
450                         interrupts = <GIC_SPI 287 IRQ_TYPE_LEVEL_HIGH>;
451                         clocks = <&cpg CPG_MOD 931>;
452                         power-domains = <&sysc R8A7743_PD_ALWAYS_ON>;
453                         resets = <&cpg 931>;
454                         i2c-scl-internal-delay-ns = <6>;
455                         status = "disabled";
456                 };
457
458                 i2c1: i2c@e6518000 {
459                         #address-cells = <1>;
460                         #size-cells = <0>;
461                         compatible = "renesas,i2c-r8a7743",
462                                      "renesas,rcar-gen2-i2c";
463                         reg = <0 0xe6518000 0 0x40>;
464                         interrupts = <GIC_SPI 288 IRQ_TYPE_LEVEL_HIGH>;
465                         clocks = <&cpg CPG_MOD 930>;
466                         power-domains = <&sysc R8A7743_PD_ALWAYS_ON>;
467                         resets = <&cpg 930>;
468                         i2c-scl-internal-delay-ns = <6>;
469                         status = "disabled";
470                 };
471
472                 i2c2: i2c@e6530000 {
473                         #address-cells = <1>;
474                         #size-cells = <0>;
475                         compatible = "renesas,i2c-r8a7743",
476                                      "renesas,rcar-gen2-i2c";
477                         reg = <0 0xe6530000 0 0x40>;
478                         interrupts = <GIC_SPI 286 IRQ_TYPE_LEVEL_HIGH>;
479                         clocks = <&cpg CPG_MOD 929>;
480                         power-domains = <&sysc R8A7743_PD_ALWAYS_ON>;
481                         resets = <&cpg 929>;
482                         i2c-scl-internal-delay-ns = <6>;
483                         status = "disabled";
484                 };
485
486                 i2c3: i2c@e6540000 {
487                         #address-cells = <1>;
488                         #size-cells = <0>;
489                         compatible = "renesas,i2c-r8a7743",
490                                      "renesas,rcar-gen2-i2c";
491                         reg = <0 0xe6540000 0 0x40>;
492                         interrupts = <GIC_SPI 290 IRQ_TYPE_LEVEL_HIGH>;
493                         clocks = <&cpg CPG_MOD 928>;
494                         power-domains = <&sysc R8A7743_PD_ALWAYS_ON>;
495                         resets = <&cpg 928>;
496                         i2c-scl-internal-delay-ns = <6>;
497                         status = "disabled";
498                 };
499
500                 i2c4: i2c@e6520000 {
501                         #address-cells = <1>;
502                         #size-cells = <0>;
503                         compatible = "renesas,i2c-r8a7743",
504                                      "renesas,rcar-gen2-i2c";
505                         reg = <0 0xe6520000 0 0x40>;
506                         interrupts = <GIC_SPI 19 IRQ_TYPE_LEVEL_HIGH>;
507                         clocks = <&cpg CPG_MOD 927>;
508                         power-domains = <&sysc R8A7743_PD_ALWAYS_ON>;
509                         resets = <&cpg 927>;
510                         i2c-scl-internal-delay-ns = <6>;
511                         status = "disabled";
512                 };
513
514                 i2c5: i2c@e6528000 {
515                         /* doesn't need pinmux */
516                         #address-cells = <1>;
517                         #size-cells = <0>;
518                         compatible = "renesas,i2c-r8a7743",
519                                      "renesas,rcar-gen2-i2c";
520                         reg = <0 0xe6528000 0 0x40>;
521                         interrupts = <GIC_SPI 20 IRQ_TYPE_LEVEL_HIGH>;
522                         clocks = <&cpg CPG_MOD 925>;
523                         power-domains = <&sysc R8A7743_PD_ALWAYS_ON>;
524                         resets = <&cpg 925>;
525                         i2c-scl-internal-delay-ns = <110>;
526                         status = "disabled";
527                 };
528
529                 iic0: i2c@e6500000 {
530                         #address-cells = <1>;
531                         #size-cells = <0>;
532                         compatible = "renesas,iic-r8a7743",
533                                      "renesas,rcar-gen2-iic",
534                                      "renesas,rmobile-iic";
535                         reg = <0 0xe6500000 0 0x425>;
536                         interrupts = <GIC_SPI 174 IRQ_TYPE_LEVEL_HIGH>;
537                         clocks = <&cpg CPG_MOD 318>;
538                         dmas = <&dmac0 0x61>, <&dmac0 0x62>,
539                                <&dmac1 0x61>, <&dmac1 0x62>;
540                         dma-names = "tx", "rx", "tx", "rx";
541                         power-domains = <&sysc R8A7743_PD_ALWAYS_ON>;
542                         resets = <&cpg 318>;
543                         status = "disabled";
544                 };
545
546                 iic1: i2c@e6510000 {
547                         #address-cells = <1>;
548                         #size-cells = <0>;
549                         compatible = "renesas,iic-r8a7743",
550                                      "renesas,rcar-gen2-iic",
551                                      "renesas,rmobile-iic";
552                         reg = <0 0xe6510000 0 0x425>;
553                         interrupts = <GIC_SPI 175 IRQ_TYPE_LEVEL_HIGH>;
554                         clocks = <&cpg CPG_MOD 323>;
555                         dmas = <&dmac0 0x65>, <&dmac0 0x66>,
556                                <&dmac1 0x65>, <&dmac1 0x66>;
557                         dma-names = "tx", "rx", "tx", "rx";
558                         power-domains = <&sysc R8A7743_PD_ALWAYS_ON>;
559                         resets = <&cpg 323>;
560                         status = "disabled";
561                 };
562
563                 iic3: i2c@e60b0000 {
564                         /* doesn't need pinmux */
565                         #address-cells = <1>;
566                         #size-cells = <0>;
567                         compatible = "renesas,iic-r8a7743",
568                                      "renesas,rcar-gen2-iic",
569                                      "renesas,rmobile-iic";
570                         reg = <0 0xe60b0000 0 0x425>;
571                         interrupts = <GIC_SPI 173 IRQ_TYPE_LEVEL_HIGH>;
572                         clocks = <&cpg CPG_MOD 926>;
573                         dmas = <&dmac0 0x77>, <&dmac0 0x78>,
574                                <&dmac1 0x77>, <&dmac1 0x78>;
575                         dma-names = "tx", "rx", "tx", "rx";
576                         power-domains = <&sysc R8A7743_PD_ALWAYS_ON>;
577                         resets = <&cpg 926>;
578                         status = "disabled";
579                 };
580
581                 hsusb: usb@e6590000 {
582                         compatible = "renesas,usbhs-r8a7743",
583                                      "renesas,rcar-gen2-usbhs";
584                         reg = <0 0xe6590000 0 0x100>;
585                         interrupts = <GIC_SPI 107 IRQ_TYPE_LEVEL_HIGH>;
586                         clocks = <&cpg CPG_MOD 704>;
587                         dmas = <&usb_dmac0 0>, <&usb_dmac0 1>,
588                                <&usb_dmac1 0>, <&usb_dmac1 1>;
589                         dma-names = "ch0", "ch1", "ch2", "ch3";
590                         power-domains = <&sysc R8A7743_PD_ALWAYS_ON>;
591                         resets = <&cpg 704>;
592                         renesas,buswait = <4>;
593                         phys = <&usb0 1>;
594                         phy-names = "usb";
595                         status = "disabled";
596                 };
597
598                 usbphy: usb-phy@e6590100 {
599                         compatible = "renesas,usb-phy-r8a7743",
600                                      "renesas,rcar-gen2-usb-phy";
601                         reg = <0 0xe6590100 0 0x100>;
602                         #address-cells = <1>;
603                         #size-cells = <0>;
604                         clocks = <&cpg CPG_MOD 704>;
605                         clock-names = "usbhs";
606                         power-domains = <&sysc R8A7743_PD_ALWAYS_ON>;
607                         resets = <&cpg 704>;
608                         status = "disabled";
609
610                         usb0: usb-channel@0 {
611                                 reg = <0>;
612                                 #phy-cells = <1>;
613                         };
614                         usb2: usb-channel@2 {
615                                 reg = <2>;
616                                 #phy-cells = <1>;
617                         };
618                 };
619
620                 usb_dmac0: dma-controller@e65a0000 {
621                         compatible = "renesas,r8a7743-usb-dmac",
622                                      "renesas,usb-dmac";
623                         reg = <0 0xe65a0000 0 0x100>;
624                         interrupts = <GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH
625                                       GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH>;
626                         interrupt-names = "ch0", "ch1";
627                         clocks = <&cpg CPG_MOD 330>;
628                         power-domains = <&sysc R8A7743_PD_ALWAYS_ON>;
629                         resets = <&cpg 330>;
630                         #dma-cells = <1>;
631                         dma-channels = <2>;
632                 };
633
634                 usb_dmac1: dma-controller@e65b0000 {
635                         compatible = "renesas,r8a7743-usb-dmac",
636                                      "renesas,usb-dmac";
637                         reg = <0 0xe65b0000 0 0x100>;
638                         interrupts = <GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH
639                                       GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH>;
640                         interrupt-names = "ch0", "ch1";
641                         clocks = <&cpg CPG_MOD 331>;
642                         power-domains = <&sysc R8A7743_PD_ALWAYS_ON>;
643                         resets = <&cpg 331>;
644                         #dma-cells = <1>;
645                         dma-channels = <2>;
646                 };
647
648                 dmac0: dma-controller@e6700000 {
649                         compatible = "renesas,dmac-r8a7743",
650                                      "renesas,rcar-dmac";
651                         reg = <0 0xe6700000 0 0x20000>;
652                         interrupts = <GIC_SPI 197 IRQ_TYPE_LEVEL_HIGH
653                                       GIC_SPI 200 IRQ_TYPE_LEVEL_HIGH
654                                       GIC_SPI 201 IRQ_TYPE_LEVEL_HIGH
655                                       GIC_SPI 202 IRQ_TYPE_LEVEL_HIGH
656                                       GIC_SPI 203 IRQ_TYPE_LEVEL_HIGH
657                                       GIC_SPI 204 IRQ_TYPE_LEVEL_HIGH
658                                       GIC_SPI 205 IRQ_TYPE_LEVEL_HIGH
659                                       GIC_SPI 206 IRQ_TYPE_LEVEL_HIGH
660                                       GIC_SPI 207 IRQ_TYPE_LEVEL_HIGH
661                                       GIC_SPI 208 IRQ_TYPE_LEVEL_HIGH
662                                       GIC_SPI 209 IRQ_TYPE_LEVEL_HIGH
663                                       GIC_SPI 210 IRQ_TYPE_LEVEL_HIGH
664                                       GIC_SPI 211 IRQ_TYPE_LEVEL_HIGH
665                                       GIC_SPI 212 IRQ_TYPE_LEVEL_HIGH
666                                       GIC_SPI 213 IRQ_TYPE_LEVEL_HIGH
667                                       GIC_SPI 214 IRQ_TYPE_LEVEL_HIGH>;
668                         interrupt-names = "error",
669                                           "ch0", "ch1", "ch2", "ch3",
670                                           "ch4", "ch5", "ch6", "ch7",
671                                           "ch8", "ch9", "ch10", "ch11",
672                                           "ch12", "ch13", "ch14";
673                         clocks = <&cpg CPG_MOD 219>;
674                         clock-names = "fck";
675                         power-domains = <&sysc R8A7743_PD_ALWAYS_ON>;
676                         resets = <&cpg 219>;
677                         #dma-cells = <1>;
678                         dma-channels = <15>;
679                 };
680
681                 dmac1: dma-controller@e6720000 {
682                         compatible = "renesas,dmac-r8a7743",
683                                      "renesas,rcar-dmac";
684                         reg = <0 0xe6720000 0 0x20000>;
685                         interrupts = <GIC_SPI 220 IRQ_TYPE_LEVEL_HIGH
686                                       GIC_SPI 216 IRQ_TYPE_LEVEL_HIGH
687                                       GIC_SPI 217 IRQ_TYPE_LEVEL_HIGH
688                                       GIC_SPI 218 IRQ_TYPE_LEVEL_HIGH
689                                       GIC_SPI 219 IRQ_TYPE_LEVEL_HIGH
690                                       GIC_SPI 308 IRQ_TYPE_LEVEL_HIGH
691                                       GIC_SPI 309 IRQ_TYPE_LEVEL_HIGH
692                                       GIC_SPI 310 IRQ_TYPE_LEVEL_HIGH
693                                       GIC_SPI 311 IRQ_TYPE_LEVEL_HIGH
694                                       GIC_SPI 312 IRQ_TYPE_LEVEL_HIGH
695                                       GIC_SPI 313 IRQ_TYPE_LEVEL_HIGH
696                                       GIC_SPI 314 IRQ_TYPE_LEVEL_HIGH
697                                       GIC_SPI 315 IRQ_TYPE_LEVEL_HIGH
698                                       GIC_SPI 316 IRQ_TYPE_LEVEL_HIGH
699                                       GIC_SPI 317 IRQ_TYPE_LEVEL_HIGH
700                                       GIC_SPI 318 IRQ_TYPE_LEVEL_HIGH>;
701                         interrupt-names = "error",
702                                           "ch0", "ch1", "ch2", "ch3",
703                                           "ch4", "ch5", "ch6", "ch7",
704                                           "ch8", "ch9", "ch10", "ch11",
705                                           "ch12", "ch13", "ch14";
706                         clocks = <&cpg CPG_MOD 218>;
707                         clock-names = "fck";
708                         power-domains = <&sysc R8A7743_PD_ALWAYS_ON>;
709                         resets = <&cpg 218>;
710                         #dma-cells = <1>;
711                         dma-channels = <15>;
712                 };
713
714                 avb: ethernet@e6800000 {
715                         compatible = "renesas,etheravb-r8a7743",
716                                      "renesas,etheravb-rcar-gen2";
717                         reg = <0 0xe6800000 0 0x800>, <0 0xee0e8000 0 0x4000>;
718                         interrupts = <GIC_SPI 163 IRQ_TYPE_LEVEL_HIGH>;
719                         clocks = <&cpg CPG_MOD 812>;
720                         power-domains = <&sysc R8A7743_PD_ALWAYS_ON>;
721                         resets = <&cpg 812>;
722                         #address-cells = <1>;
723                         #size-cells = <0>;
724                         status = "disabled";
725                 };
726
727                 qspi: spi@e6b10000 {
728                         compatible = "renesas,qspi-r8a7743", "renesas,qspi";
729                         reg = <0 0xe6b10000 0 0x2c>;
730                         interrupts = <GIC_SPI 184 IRQ_TYPE_LEVEL_HIGH>;
731                         clocks = <&cpg CPG_MOD 917>;
732                         dmas = <&dmac0 0x17>, <&dmac0 0x18>,
733                                <&dmac1 0x17>, <&dmac1 0x18>;
734                         dma-names = "tx", "rx", "tx", "rx";
735                         power-domains = <&sysc R8A7743_PD_ALWAYS_ON>;
736                         num-cs = <1>;
737                         #address-cells = <1>;
738                         #size-cells = <0>;
739                         resets = <&cpg 917>;
740                         status = "disabled";
741                 };
742
743                 scifa0: serial@e6c40000 {
744                         compatible = "renesas,scifa-r8a7743",
745                                      "renesas,rcar-gen2-scifa", "renesas,scifa";
746                         reg = <0 0xe6c40000 0 0x40>;
747                         interrupts = <GIC_SPI 144 IRQ_TYPE_LEVEL_HIGH>;
748                         clocks = <&cpg CPG_MOD 204>;
749                         clock-names = "fck";
750                         dmas = <&dmac0 0x21>, <&dmac0 0x22>,
751                                <&dmac1 0x21>, <&dmac1 0x22>;
752                         dma-names = "tx", "rx", "tx", "rx";
753                         power-domains = <&sysc R8A7743_PD_ALWAYS_ON>;
754                         resets = <&cpg 204>;
755                         status = "disabled";
756                 };
757
758                 scifa1: serial@e6c50000 {
759                         compatible = "renesas,scifa-r8a7743",
760                                      "renesas,rcar-gen2-scifa", "renesas,scifa";
761                         reg = <0 0xe6c50000 0 0x40>;
762                         interrupts = <GIC_SPI 145 IRQ_TYPE_LEVEL_HIGH>;
763                         clocks = <&cpg CPG_MOD 203>;
764                         clock-names = "fck";
765                         dmas = <&dmac0 0x25>, <&dmac0 0x26>,
766                                <&dmac1 0x25>, <&dmac1 0x26>;
767                         dma-names = "tx", "rx", "tx", "rx";
768                         power-domains = <&sysc R8A7743_PD_ALWAYS_ON>;
769                         resets = <&cpg 203>;
770                         status = "disabled";
771                 };
772
773                 scifa2: serial@e6c60000 {
774                         compatible = "renesas,scifa-r8a7743",
775                                      "renesas,rcar-gen2-scifa", "renesas,scifa";
776                         reg = <0 0xe6c60000 0 0x40>;
777                         interrupts = <GIC_SPI 151 IRQ_TYPE_LEVEL_HIGH>;
778                         clocks = <&cpg CPG_MOD 202>;
779                         clock-names = "fck";
780                         dmas = <&dmac0 0x27>, <&dmac0 0x28>,
781                                <&dmac1 0x27>, <&dmac1 0x28>;
782                         dma-names = "tx", "rx", "tx", "rx";
783                         power-domains = <&sysc R8A7743_PD_ALWAYS_ON>;
784                         resets = <&cpg 202>;
785                         status = "disabled";
786                 };
787
788                 scifa3: serial@e6c70000 {
789                         compatible = "renesas,scifa-r8a7743",
790                                      "renesas,rcar-gen2-scifa", "renesas,scifa";
791                         reg = <0 0xe6c70000 0 0x40>;
792                         interrupts = <GIC_SPI 29 IRQ_TYPE_LEVEL_HIGH>;
793                         clocks = <&cpg CPG_MOD 1106>;
794                         clock-names = "fck";
795                         dmas = <&dmac0 0x1b>, <&dmac0 0x1c>,
796                                <&dmac1 0x1b>, <&dmac1 0x1c>;
797                         dma-names = "tx", "rx", "tx", "rx";
798                         power-domains = <&sysc R8A7743_PD_ALWAYS_ON>;
799                         resets = <&cpg 1106>;
800                         status = "disabled";
801                 };
802
803                 scifa4: serial@e6c78000 {
804                         compatible = "renesas,scifa-r8a7743",
805                                      "renesas,rcar-gen2-scifa", "renesas,scifa";
806                         reg = <0 0xe6c78000 0 0x40>;
807                         interrupts = <GIC_SPI 30 IRQ_TYPE_LEVEL_HIGH>;
808                         clocks = <&cpg CPG_MOD 1107>;
809                         clock-names = "fck";
810                         dmas = <&dmac0 0x1f>, <&dmac0 0x20>,
811                                <&dmac1 0x1f>, <&dmac1 0x20>;
812                         dma-names = "tx", "rx", "tx", "rx";
813                         power-domains = <&sysc R8A7743_PD_ALWAYS_ON>;
814                         resets = <&cpg 1107>;
815                         status = "disabled";
816                 };
817
818                 scifa5: serial@e6c80000 {
819                         compatible = "renesas,scifa-r8a7743",
820                                      "renesas,rcar-gen2-scifa", "renesas,scifa";
821                         reg = <0 0xe6c80000 0 0x40>;
822                         interrupts = <GIC_SPI 31 IRQ_TYPE_LEVEL_HIGH>;
823                         clocks = <&cpg CPG_MOD 1108>;
824                         clock-names = "fck";
825                         dmas = <&dmac0 0x23>, <&dmac0 0x24>,
826                                <&dmac1 0x23>, <&dmac1 0x24>;
827                         dma-names = "tx", "rx", "tx", "rx";
828                         power-domains = <&sysc R8A7743_PD_ALWAYS_ON>;
829                         resets = <&cpg 1108>;
830                         status = "disabled";
831                 };
832
833                 scifb0: serial@e6c20000 {
834                         compatible = "renesas,scifb-r8a7743",
835                                      "renesas,rcar-gen2-scifb", "renesas,scifb";
836                         reg = <0 0xe6c20000 0 0x100>;
837                         interrupts = <GIC_SPI 148 IRQ_TYPE_LEVEL_HIGH>;
838                         clocks = <&cpg CPG_MOD 206>;
839                         clock-names = "fck";
840                         dmas = <&dmac0 0x3d>, <&dmac0 0x3e>,
841                                <&dmac1 0x3d>, <&dmac1 0x3e>;
842                         dma-names = "tx", "rx", "tx", "rx";
843                         power-domains = <&sysc R8A7743_PD_ALWAYS_ON>;
844                         resets = <&cpg 206>;
845                         status = "disabled";
846                 };
847
848                 scifb1: serial@e6c30000 {
849                         compatible = "renesas,scifb-r8a7743",
850                                      "renesas,rcar-gen2-scifb", "renesas,scifb";
851                         reg = <0 0xe6c30000 0 0x100>;
852                         interrupts = <GIC_SPI 149 IRQ_TYPE_LEVEL_HIGH>;
853                         clocks = <&cpg CPG_MOD 207>;
854                         clock-names = "fck";
855                         dmas = <&dmac0 0x19>, <&dmac0 0x1a>,
856                                <&dmac1 0x19>, <&dmac1 0x1a>;
857                         dma-names = "tx", "rx", "tx", "rx";
858                         power-domains = <&sysc R8A7743_PD_ALWAYS_ON>;
859                         resets = <&cpg 207>;
860                         status = "disabled";
861                 };
862
863                 scifb2: serial@e6ce0000 {
864                         compatible = "renesas,scifb-r8a7743",
865                                      "renesas,rcar-gen2-scifb", "renesas,scifb";
866                         reg = <0 0xe6ce0000 0 0x100>;
867                         interrupts = <GIC_SPI 150 IRQ_TYPE_LEVEL_HIGH>;
868                         clocks = <&cpg CPG_MOD 216>;
869                         clock-names = "fck";
870                         dmas = <&dmac0 0x1d>, <&dmac0 0x1e>,
871                                <&dmac1 0x1d>, <&dmac1 0x1e>;
872                         dma-names = "tx", "rx", "tx", "rx";
873                         power-domains = <&sysc R8A7743_PD_ALWAYS_ON>;
874                         resets = <&cpg 216>;
875                         status = "disabled";
876                 };
877
878                 scif0: serial@e6e60000 {
879                         compatible = "renesas,scif-r8a7743",
880                                      "renesas,rcar-gen2-scif", "renesas,scif";
881                         reg = <0 0xe6e60000 0 0x40>;
882                         interrupts = <GIC_SPI 152 IRQ_TYPE_LEVEL_HIGH>;
883                         clocks = <&cpg CPG_MOD 721>,
884                                  <&cpg CPG_CORE R8A7743_CLK_ZS>, <&scif_clk>;
885                         clock-names = "fck", "brg_int", "scif_clk";
886                         dmas = <&dmac0 0x29>, <&dmac0 0x2a>,
887                                <&dmac1 0x29>, <&dmac1 0x2a>;
888                         dma-names = "tx", "rx", "tx", "rx";
889                         power-domains = <&sysc R8A7743_PD_ALWAYS_ON>;
890                         resets = <&cpg 721>;
891                         status = "disabled";
892                 };
893
894                 scif1: serial@e6e68000 {
895                         compatible = "renesas,scif-r8a7743",
896                                      "renesas,rcar-gen2-scif", "renesas,scif";
897                         reg = <0 0xe6e68000 0 0x40>;
898                         interrupts = <GIC_SPI 153 IRQ_TYPE_LEVEL_HIGH>;
899                         clocks = <&cpg CPG_MOD 720>,
900                                  <&cpg CPG_CORE R8A7743_CLK_ZS>, <&scif_clk>;
901                         clock-names = "fck", "brg_int", "scif_clk";
902                         dmas = <&dmac0 0x2d>, <&dmac0 0x2e>,
903                                <&dmac1 0x2d>, <&dmac1 0x2e>;
904                         dma-names = "tx", "rx", "tx", "rx";
905                         power-domains = <&sysc R8A7743_PD_ALWAYS_ON>;
906                         resets = <&cpg 720>;
907                         status = "disabled";
908                 };
909
910                 scif2: serial@e6e58000 {
911                         compatible = "renesas,scif-r8a7743",
912                                      "renesas,rcar-gen2-scif", "renesas,scif";
913                         reg = <0 0xe6e58000 0 0x40>;
914                         interrupts = <GIC_SPI 22 IRQ_TYPE_LEVEL_HIGH>;
915                         clocks = <&cpg CPG_MOD 719>,
916                                  <&cpg CPG_CORE R8A7743_CLK_ZS>, <&scif_clk>;
917                         clock-names = "fck", "brg_int", "scif_clk";
918                         dmas = <&dmac0 0x2b>, <&dmac0 0x2c>,
919                                <&dmac1 0x2b>, <&dmac1 0x2c>;
920                         dma-names = "tx", "rx", "tx", "rx";
921                         power-domains = <&sysc R8A7743_PD_ALWAYS_ON>;
922                         resets = <&cpg 719>;
923                         status = "disabled";
924                 };
925
926                 scif3: serial@e6ea8000 {
927                         compatible = "renesas,scif-r8a7743",
928                                      "renesas,rcar-gen2-scif", "renesas,scif";
929                         reg = <0 0xe6ea8000 0 0x40>;
930                         interrupts = <GIC_SPI 23 IRQ_TYPE_LEVEL_HIGH>;
931                         clocks = <&cpg CPG_MOD 718>,
932                                  <&cpg CPG_CORE R8A7743_CLK_ZS>, <&scif_clk>;
933                         clock-names = "fck", "brg_int", "scif_clk";
934                         dmas = <&dmac0 0x2f>, <&dmac0 0x30>,
935                                <&dmac1 0x2f>, <&dmac1 0x30>;
936                         dma-names = "tx", "rx", "tx", "rx";
937                         power-domains = <&sysc R8A7743_PD_ALWAYS_ON>;
938                         resets = <&cpg 718>;
939                         status = "disabled";
940                 };
941
942                 scif4: serial@e6ee0000 {
943                         compatible = "renesas,scif-r8a7743",
944                                      "renesas,rcar-gen2-scif", "renesas,scif";
945                         reg = <0 0xe6ee0000 0 0x40>;
946                         interrupts = <GIC_SPI 24 IRQ_TYPE_LEVEL_HIGH>;
947                         clocks = <&cpg CPG_MOD 715>,
948                                  <&cpg CPG_CORE R8A7743_CLK_ZS>, <&scif_clk>;
949                         clock-names = "fck", "brg_int", "scif_clk";
950                         dmas = <&dmac0 0xfb>, <&dmac0 0xfc>,
951                                <&dmac1 0xfb>, <&dmac1 0xfc>;
952                         dma-names = "tx", "rx", "tx", "rx";
953                         power-domains = <&sysc R8A7743_PD_ALWAYS_ON>;
954                         resets = <&cpg 715>;
955                         status = "disabled";
956                 };
957
958                 scif5: serial@e6ee8000 {
959                         compatible = "renesas,scif-r8a7743",
960                                      "renesas,rcar-gen2-scif", "renesas,scif";
961                         reg = <0 0xe6ee8000 0 0x40>;
962                         interrupts = <GIC_SPI 25 IRQ_TYPE_LEVEL_HIGH>;
963                         clocks = <&cpg CPG_MOD 714>,
964                                  <&cpg CPG_CORE R8A7743_CLK_ZS>, <&scif_clk>;
965                         clock-names = "fck", "brg_int", "scif_clk";
966                         dmas = <&dmac0 0xfd>, <&dmac0 0xfe>,
967                                <&dmac1 0xfd>, <&dmac1 0xfe>;
968                         dma-names = "tx", "rx", "tx", "rx";
969                         power-domains = <&sysc R8A7743_PD_ALWAYS_ON>;
970                         resets = <&cpg 714>;
971                         status = "disabled";
972                 };
973
974                 hscif0: serial@e62c0000 {
975                         compatible = "renesas,hscif-r8a7743",
976                                      "renesas,rcar-gen2-hscif", "renesas,hscif";
977                         reg = <0 0xe62c0000 0 0x60>;
978                         interrupts = <GIC_SPI 154 IRQ_TYPE_LEVEL_HIGH>;
979                         clocks = <&cpg CPG_MOD 717>,
980                                  <&cpg CPG_CORE R8A7743_CLK_ZS>, <&scif_clk>;
981                         clock-names = "fck", "brg_int", "scif_clk";
982                         dmas = <&dmac0 0x39>, <&dmac0 0x3a>,
983                                <&dmac1 0x39>, <&dmac1 0x3a>;
984                         dma-names = "tx", "rx", "tx", "rx";
985                         power-domains = <&sysc R8A7743_PD_ALWAYS_ON>;
986                         resets = <&cpg 717>;
987                         status = "disabled";
988                 };
989
990                 hscif1: serial@e62c8000 {
991                         compatible = "renesas,hscif-r8a7743",
992                                      "renesas,rcar-gen2-hscif", "renesas,hscif";
993                         reg = <0 0xe62c8000 0 0x60>;
994                         interrupts = <GIC_SPI 155 IRQ_TYPE_LEVEL_HIGH>;
995                         clocks = <&cpg CPG_MOD 716>,
996                                  <&cpg CPG_CORE R8A7743_CLK_ZS>, <&scif_clk>;
997                         clock-names = "fck", "brg_int", "scif_clk";
998                         dmas = <&dmac0 0x4d>, <&dmac0 0x4e>,
999                                <&dmac1 0x4d>, <&dmac1 0x4e>;
1000                         dma-names = "tx", "rx", "tx", "rx";
1001                         power-domains = <&sysc R8A7743_PD_ALWAYS_ON>;
1002                         resets = <&cpg 716>;
1003                         status = "disabled";
1004                 };
1005
1006                 hscif2: serial@e62d0000 {
1007                         compatible = "renesas,hscif-r8a7743",
1008                                      "renesas,rcar-gen2-hscif", "renesas,hscif";
1009                         reg = <0 0xe62d0000 0 0x60>;
1010                         interrupts = <GIC_SPI 21 IRQ_TYPE_LEVEL_HIGH>;
1011                         clocks = <&cpg CPG_MOD 713>,
1012                                  <&cpg CPG_CORE R8A7743_CLK_ZS>, <&scif_clk>;
1013                         clock-names = "fck", "brg_int", "scif_clk";
1014                         dmas = <&dmac0 0x3b>, <&dmac0 0x3c>,
1015                                <&dmac1 0x3b>, <&dmac1 0x3c>;
1016                         dma-names = "tx", "rx", "tx", "rx";
1017                         power-domains = <&sysc R8A7743_PD_ALWAYS_ON>;
1018                         resets = <&cpg 713>;
1019                         status = "disabled";
1020                 };
1021
1022                 msiof0: spi@e6e20000 {
1023                         compatible = "renesas,msiof-r8a7743",
1024                                      "renesas,rcar-gen2-msiof";
1025                         reg = <0 0xe6e20000 0 0x0064>;
1026                         interrupts = <GIC_SPI 156 IRQ_TYPE_LEVEL_HIGH>;
1027                         clocks = <&cpg CPG_MOD 000>;
1028                         dmas = <&dmac0 0x51>, <&dmac0 0x52>,
1029                                <&dmac1 0x51>, <&dmac1 0x52>;
1030                         dma-names = "tx", "rx", "tx", "rx";
1031                         power-domains = <&sysc R8A7743_PD_ALWAYS_ON>;
1032                         #address-cells = <1>;
1033                         #size-cells = <0>;
1034                         resets = <&cpg 000>;
1035                         status = "disabled";
1036                 };
1037
1038                 msiof1: spi@e6e10000 {
1039                         compatible = "renesas,msiof-r8a7743",
1040                                      "renesas,rcar-gen2-msiof";
1041                         reg = <0 0xe6e10000 0 0x0064>;
1042                         interrupts = <GIC_SPI 157 IRQ_TYPE_LEVEL_HIGH>;
1043                         clocks = <&cpg CPG_MOD 208>;
1044                         dmas = <&dmac0 0x55>, <&dmac0 0x56>,
1045                                <&dmac1 0x55>, <&dmac1 0x56>;
1046                         dma-names = "tx", "rx", "tx", "rx";
1047                         power-domains = <&sysc R8A7743_PD_ALWAYS_ON>;
1048                         #address-cells = <1>;
1049                         #size-cells = <0>;
1050                         resets = <&cpg 208>;
1051                         status = "disabled";
1052                 };
1053
1054                 msiof2: spi@e6e00000 {
1055                         compatible = "renesas,msiof-r8a7743",
1056                                      "renesas,rcar-gen2-msiof";
1057                         reg = <0 0xe6e00000 0 0x0064>;
1058                         interrupts = <GIC_SPI 158 IRQ_TYPE_LEVEL_HIGH>;
1059                         clocks = <&cpg CPG_MOD 205>;
1060                         dmas = <&dmac0 0x41>, <&dmac0 0x42>,
1061                                <&dmac1 0x41>, <&dmac1 0x42>;
1062                         dma-names = "tx", "rx", "tx", "rx";
1063                         power-domains = <&sysc R8A7743_PD_ALWAYS_ON>;
1064                         #address-cells = <1>;
1065                         #size-cells = <0>;
1066                         resets = <&cpg 205>;
1067                         status = "disabled";
1068                 };
1069
1070                 pwm0: pwm@e6e30000 {
1071                         compatible = "renesas,pwm-r8a7743", "renesas,pwm-rcar";
1072                         reg = <0 0xe6e30000 0 0x8>;
1073                         clocks = <&cpg CPG_MOD 523>;
1074                         power-domains = <&sysc R8A7743_PD_ALWAYS_ON>;
1075                         resets = <&cpg 523>;
1076                         #pwm-cells = <2>;
1077                         status = "disabled";
1078                 };
1079
1080                 pwm1: pwm@e6e31000 {
1081                         compatible = "renesas,pwm-r8a7743", "renesas,pwm-rcar";
1082                         reg = <0 0xe6e31000 0 0x8>;
1083                         clocks = <&cpg CPG_MOD 523>;
1084                         power-domains = <&sysc R8A7743_PD_ALWAYS_ON>;
1085                         resets = <&cpg 523>;
1086                         #pwm-cells = <2>;
1087                         status = "disabled";
1088                 };
1089
1090                 pwm2: pwm@e6e32000 {
1091                         compatible = "renesas,pwm-r8a7743", "renesas,pwm-rcar";
1092                         reg = <0 0xe6e32000 0 0x8>;
1093                         clocks = <&cpg CPG_MOD 523>;
1094                         power-domains = <&sysc R8A7743_PD_ALWAYS_ON>;
1095                         resets = <&cpg 523>;
1096                         #pwm-cells = <2>;
1097                         status = "disabled";
1098                 };
1099
1100                 pwm3: pwm@e6e33000 {
1101                         compatible = "renesas,pwm-r8a7743", "renesas,pwm-rcar";
1102                         reg = <0 0xe6e33000 0 0x8>;
1103                         clocks = <&cpg CPG_MOD 523>;
1104                         power-domains = <&sysc R8A7743_PD_ALWAYS_ON>;
1105                         resets = <&cpg 523>;
1106                         #pwm-cells = <2>;
1107                         status = "disabled";
1108                 };
1109
1110                 pwm4: pwm@e6e34000 {
1111                         compatible = "renesas,pwm-r8a7743", "renesas,pwm-rcar";
1112                         reg = <0 0xe6e34000 0 0x8>;
1113                         clocks = <&cpg CPG_MOD 523>;
1114                         power-domains = <&sysc R8A7743_PD_ALWAYS_ON>;
1115                         resets = <&cpg 523>;
1116                         #pwm-cells = <2>;
1117                         status = "disabled";
1118                 };
1119
1120                 pwm5: pwm@e6e35000 {
1121                         compatible = "renesas,pwm-r8a7743", "renesas,pwm-rcar";
1122                         reg = <0 0xe6e35000 0 0x8>;
1123                         clocks = <&cpg CPG_MOD 523>;
1124                         power-domains = <&sysc R8A7743_PD_ALWAYS_ON>;
1125                         resets = <&cpg 523>;
1126                         #pwm-cells = <2>;
1127                         status = "disabled";
1128                 };
1129
1130                 pwm6: pwm@e6e36000 {
1131                         compatible = "renesas,pwm-r8a7743", "renesas,pwm-rcar";
1132                         reg = <0 0xe6e36000 0 0x8>;
1133                         clocks = <&cpg CPG_MOD 523>;
1134                         power-domains = <&sysc R8A7743_PD_ALWAYS_ON>;
1135                         resets = <&cpg 523>;
1136                         #pwm-cells = <2>;
1137                         status = "disabled";
1138                 };
1139
1140                 can0: can@e6e80000 {
1141                         compatible = "renesas,can-r8a7743",
1142                                      "renesas,rcar-gen2-can";
1143                         reg = <0 0xe6e80000 0 0x1000>;
1144                         interrupts = <GIC_SPI 186 IRQ_TYPE_LEVEL_HIGH>;
1145                         clocks = <&cpg CPG_MOD 916>,
1146                                  <&cpg CPG_CORE R8A7743_CLK_RCAN>,
1147                                  <&can_clk>;
1148                         clock-names = "clkp1", "clkp2", "can_clk";
1149                         power-domains = <&sysc R8A7743_PD_ALWAYS_ON>;
1150                         resets = <&cpg 916>;
1151                         status = "disabled";
1152                 };
1153
1154                 can1: can@e6e88000 {
1155                         compatible = "renesas,can-r8a7743",
1156                                      "renesas,rcar-gen2-can";
1157                         reg = <0 0xe6e88000 0 0x1000>;
1158                         interrupts = <GIC_SPI 187 IRQ_TYPE_LEVEL_HIGH>;
1159                         clocks = <&cpg CPG_MOD 915>,
1160                                  <&cpg CPG_CORE R8A7743_CLK_RCAN>,
1161                                  <&can_clk>;
1162                         clock-names = "clkp1", "clkp2", "can_clk";
1163                         power-domains = <&sysc R8A7743_PD_ALWAYS_ON>;
1164                         resets = <&cpg 915>;
1165                         status = "disabled";
1166                 };
1167
1168                 vin0: video@e6ef0000 {
1169                         compatible = "renesas,vin-r8a7743",
1170                                      "renesas,rcar-gen2-vin";
1171                         reg = <0 0xe6ef0000 0 0x1000>;
1172                         interrupts = <GIC_SPI 188 IRQ_TYPE_LEVEL_HIGH>;
1173                         clocks = <&cpg CPG_MOD 811>;
1174                         power-domains = <&sysc R8A7743_PD_ALWAYS_ON>;
1175                         resets = <&cpg 811>;
1176                         status = "disabled";
1177                 };
1178
1179                 vin1: video@e6ef1000 {
1180                         compatible = "renesas,vin-r8a7743",
1181                                      "renesas,rcar-gen2-vin";
1182                         reg = <0 0xe6ef1000 0 0x1000>;
1183                         interrupts = <GIC_SPI 189 IRQ_TYPE_LEVEL_HIGH>;
1184                         clocks = <&cpg CPG_MOD 810>;
1185                         power-domains = <&sysc R8A7743_PD_ALWAYS_ON>;
1186                         resets = <&cpg 810>;
1187                         status = "disabled";
1188                 };
1189
1190                 vin2: video@e6ef2000 {
1191                         compatible = "renesas,vin-r8a7743",
1192                                      "renesas,rcar-gen2-vin";
1193                         reg = <0 0xe6ef2000 0 0x1000>;
1194                         interrupts = <GIC_SPI 190 IRQ_TYPE_LEVEL_HIGH>;
1195                         clocks = <&cpg CPG_MOD 809>;
1196                         power-domains = <&sysc R8A7743_PD_ALWAYS_ON>;
1197                         resets = <&cpg 809>;
1198                         status = "disabled";
1199                 };
1200
1201                 rcar_sound: sound@ec500000 {
1202                         /*
1203                          * #sound-dai-cells is required
1204                          *
1205                          * Single DAI : #sound-dai-cells = <0>;         <&rcar_sound>;
1206                          * Multi  DAI : #sound-dai-cells = <1>;         <&rcar_sound N>;
1207                          */
1208                         compatible = "renesas,rcar_sound-r8a7743",
1209                                      "renesas,rcar_sound-gen2";
1210                         reg = <0 0xec500000 0 0x1000>, /* SCU */
1211                               <0 0xec5a0000 0 0x100>,  /* ADG */
1212                               <0 0xec540000 0 0x1000>, /* SSIU */
1213                               <0 0xec541000 0 0x280>,  /* SSI */
1214                               <0 0xec740000 0 0x200>;  /* Audio DMAC peri peri*/
1215                         reg-names = "scu", "adg", "ssiu", "ssi", "audmapp";
1216
1217                         clocks = <&cpg CPG_MOD 1005>,
1218                                  <&cpg CPG_MOD 1006>, <&cpg CPG_MOD 1007>,
1219                                  <&cpg CPG_MOD 1008>, <&cpg CPG_MOD 1009>,
1220                                  <&cpg CPG_MOD 1010>, <&cpg CPG_MOD 1011>,
1221                                  <&cpg CPG_MOD 1012>, <&cpg CPG_MOD 1013>,
1222                                  <&cpg CPG_MOD 1014>, <&cpg CPG_MOD 1015>,
1223                                  <&cpg CPG_MOD 1022>, <&cpg CPG_MOD 1023>,
1224                                  <&cpg CPG_MOD 1024>, <&cpg CPG_MOD 1025>,
1225                                  <&cpg CPG_MOD 1026>, <&cpg CPG_MOD 1027>,
1226                                  <&cpg CPG_MOD 1028>, <&cpg CPG_MOD 1029>,
1227                                  <&cpg CPG_MOD 1030>, <&cpg CPG_MOD 1031>,
1228                                  <&cpg CPG_MOD 1021>, <&cpg CPG_MOD 1020>,
1229                                  <&cpg CPG_MOD 1021>, <&cpg CPG_MOD 1020>,
1230                                  <&cpg CPG_MOD 1019>, <&cpg CPG_MOD 1018>,
1231                                  <&audio_clk_a>, <&audio_clk_b>, <&audio_clk_c>,
1232                                  <&cpg CPG_CORE R8A7743_CLK_M2>;
1233                         clock-names = "ssi-all",
1234                                       "ssi.9", "ssi.8", "ssi.7", "ssi.6", "ssi.5",
1235                                       "ssi.4", "ssi.3", "ssi.2", "ssi.1", "ssi.0",
1236                                       "src.9", "src.8", "src.7", "src.6", "src.5",
1237                                       "src.4", "src.3", "src.2", "src.1", "src.0",
1238                                       "ctu.0", "ctu.1",
1239                                       "mix.0", "mix.1",
1240                                       "dvc.0", "dvc.1",
1241                                       "clk_a", "clk_b", "clk_c", "clk_i";
1242                         power-domains = <&sysc R8A7743_PD_ALWAYS_ON>;
1243                         resets = <&cpg 1005>,
1244                                  <&cpg 1006>, <&cpg 1007>, <&cpg 1008>, <&cpg 1009>,
1245                                  <&cpg 1010>, <&cpg 1011>, <&cpg 1012>, <&cpg 1013>,
1246                                  <&cpg 1014>, <&cpg 1015>;
1247                         reset-names = "ssi-all",
1248                                       "ssi.9", "ssi.8", "ssi.7", "ssi.6", "ssi.5",
1249                                       "ssi.4", "ssi.3", "ssi.2", "ssi.1", "ssi.0";
1250                         status = "disabled";
1251
1252                         rcar_sound,dvc {
1253                                 dvc0: dvc-0 {
1254                                         dmas = <&audma1 0xbc>;
1255                                         dma-names = "tx";
1256                                 };
1257                                 dvc1: dvc-1 {
1258                                         dmas = <&audma1 0xbe>;
1259                                         dma-names = "tx";
1260                                 };
1261                         };
1262
1263                         rcar_sound,mix {
1264                                 mix0: mix-0 { };
1265                                 mix1: mix-1 { };
1266                         };
1267
1268                         rcar_sound,ctu {
1269                                 ctu00: ctu-0 { };
1270                                 ctu01: ctu-1 { };
1271                                 ctu02: ctu-2 { };
1272                                 ctu03: ctu-3 { };
1273                                 ctu10: ctu-4 { };
1274                                 ctu11: ctu-5 { };
1275                                 ctu12: ctu-6 { };
1276                                 ctu13: ctu-7 { };
1277                         };
1278
1279                         rcar_sound,src {
1280                                 src0: src-0 {
1281                                         interrupts = <GIC_SPI 352 IRQ_TYPE_LEVEL_HIGH>;
1282                                         dmas = <&audma0 0x85>, <&audma1 0x9a>;
1283                                         dma-names = "rx", "tx";
1284                                 };
1285                                 src1: src-1 {
1286                                         interrupts = <GIC_SPI 353 IRQ_TYPE_LEVEL_HIGH>;
1287                                         dmas = <&audma0 0x87>, <&audma1 0x9c>;
1288                                         dma-names = "rx", "tx";
1289                                 };
1290                                 src2: src-2 {
1291                                         interrupts = <GIC_SPI 354 IRQ_TYPE_LEVEL_HIGH>;
1292                                         dmas = <&audma0 0x89>, <&audma1 0x9e>;
1293                                         dma-names = "rx", "tx";
1294                                 };
1295                                 src3: src-3 {
1296                                         interrupts = <GIC_SPI 355 IRQ_TYPE_LEVEL_HIGH>;
1297                                         dmas = <&audma0 0x8b>, <&audma1 0xa0>;
1298                                         dma-names = "rx", "tx";
1299                                 };
1300                                 src4: src-4 {
1301                                         interrupts = <GIC_SPI 356 IRQ_TYPE_LEVEL_HIGH>;
1302                                         dmas = <&audma0 0x8d>, <&audma1 0xb0>;
1303                                         dma-names = "rx", "tx";
1304                                 };
1305                                 src5: src-5 {
1306                                         interrupts = <GIC_SPI 357 IRQ_TYPE_LEVEL_HIGH>;
1307                                         dmas = <&audma0 0x8f>, <&audma1 0xb2>;
1308                                         dma-names = "rx", "tx";
1309                                 };
1310                                 src6: src-6 {
1311                                         interrupts = <GIC_SPI 358 IRQ_TYPE_LEVEL_HIGH>;
1312                                         dmas = <&audma0 0x91>, <&audma1 0xb4>;
1313                                         dma-names = "rx", "tx";
1314                                 };
1315                                 src7: src-7 {
1316                                         interrupts = <GIC_SPI 359 IRQ_TYPE_LEVEL_HIGH>;
1317                                         dmas = <&audma0 0x93>, <&audma1 0xb6>;
1318                                         dma-names = "rx", "tx";
1319                                 };
1320                                 src8: src-8 {
1321                                         interrupts = <GIC_SPI 360 IRQ_TYPE_LEVEL_HIGH>;
1322                                         dmas = <&audma0 0x95>, <&audma1 0xb8>;
1323                                         dma-names = "rx", "tx";
1324                                 };
1325                                 src9: src-9 {
1326                                         interrupts = <GIC_SPI 361 IRQ_TYPE_LEVEL_HIGH>;
1327                                         dmas = <&audma0 0x97>, <&audma1 0xba>;
1328                                         dma-names = "rx", "tx";
1329                                 };
1330                         };
1331
1332                         rcar_sound,ssi {
1333                                 ssi0: ssi-0 {
1334                                         interrupts = <GIC_SPI 370 IRQ_TYPE_LEVEL_HIGH>;
1335                                         dmas = <&audma0 0x01>, <&audma1 0x02>, <&audma0 0x15>, <&audma1 0x16>;
1336                                         dma-names = "rx", "tx", "rxu", "txu";
1337                                 };
1338                                 ssi1: ssi-1 {
1339                                         interrupts = <GIC_SPI 371 IRQ_TYPE_LEVEL_HIGH>;
1340                                         dmas = <&audma0 0x03>, <&audma1 0x04>, <&audma0 0x49>, <&audma1 0x4a>;
1341                                         dma-names = "rx", "tx", "rxu", "txu";
1342                                 };
1343                                 ssi2: ssi-2 {
1344                                         interrupts = <GIC_SPI 372 IRQ_TYPE_LEVEL_HIGH>;
1345                                         dmas = <&audma0 0x05>, <&audma1 0x06>, <&audma0 0x63>, <&audma1 0x64>;
1346                                         dma-names = "rx", "tx", "rxu", "txu";
1347                                 };
1348                                 ssi3: ssi-3 {
1349                                         interrupts = <GIC_SPI 373 IRQ_TYPE_LEVEL_HIGH>;
1350                                         dmas = <&audma0 0x07>, <&audma1 0x08>, <&audma0 0x6f>, <&audma1 0x70>;
1351                                         dma-names = "rx", "tx", "rxu", "txu";
1352                                 };
1353                                 ssi4: ssi-4 {
1354                                         interrupts = <GIC_SPI 374 IRQ_TYPE_LEVEL_HIGH>;
1355                                         dmas = <&audma0 0x09>, <&audma1 0x0a>, <&audma0 0x71>, <&audma1 0x72>;
1356                                         dma-names = "rx", "tx", "rxu", "txu";
1357                                 };
1358                                 ssi5: ssi-5 {
1359                                         interrupts = <GIC_SPI 375 IRQ_TYPE_LEVEL_HIGH>;
1360                                         dmas = <&audma0 0x0b>, <&audma1 0x0c>, <&audma0 0x73>, <&audma1 0x74>;
1361                                         dma-names = "rx", "tx", "rxu", "txu";
1362                                 };
1363                                 ssi6: ssi-6 {
1364                                         interrupts = <GIC_SPI 376 IRQ_TYPE_LEVEL_HIGH>;
1365                                         dmas = <&audma0 0x0d>, <&audma1 0x0e>, <&audma0 0x75>, <&audma1 0x76>;
1366                                         dma-names = "rx", "tx", "rxu", "txu";
1367                                 };
1368                                 ssi7: ssi-7 {
1369                                         interrupts = <GIC_SPI 377 IRQ_TYPE_LEVEL_HIGH>;
1370                                         dmas = <&audma0 0x0f>, <&audma1 0x10>, <&audma0 0x79>, <&audma1 0x7a>;
1371                                         dma-names = "rx", "tx", "rxu", "txu";
1372                                 };
1373                                 ssi8: ssi-8 {
1374                                         interrupts = <GIC_SPI 378 IRQ_TYPE_LEVEL_HIGH>;
1375                                         dmas = <&audma0 0x11>, <&audma1 0x12>, <&audma0 0x7b>, <&audma1 0x7c>;
1376                                         dma-names = "rx", "tx", "rxu", "txu";
1377                                 };
1378                                 ssi9: ssi-9 {
1379                                         interrupts = <GIC_SPI 379 IRQ_TYPE_LEVEL_HIGH>;
1380                                         dmas = <&audma0 0x13>, <&audma1 0x14>, <&audma0 0x7d>, <&audma1 0x7e>;
1381                                         dma-names = "rx", "tx", "rxu", "txu";
1382                                 };
1383                         };
1384                 };
1385
1386                 audma0: dma-controller@ec700000 {
1387                         compatible = "renesas,dmac-r8a7743",
1388                                      "renesas,rcar-dmac";
1389                         reg = <0 0xec700000 0 0x10000>;
1390                         interrupts = <GIC_SPI 346 IRQ_TYPE_LEVEL_HIGH
1391                                       GIC_SPI 320 IRQ_TYPE_LEVEL_HIGH
1392                                       GIC_SPI 321 IRQ_TYPE_LEVEL_HIGH
1393                                       GIC_SPI 322 IRQ_TYPE_LEVEL_HIGH
1394                                       GIC_SPI 323 IRQ_TYPE_LEVEL_HIGH
1395                                       GIC_SPI 324 IRQ_TYPE_LEVEL_HIGH
1396                                       GIC_SPI 325 IRQ_TYPE_LEVEL_HIGH
1397                                       GIC_SPI 326 IRQ_TYPE_LEVEL_HIGH
1398                                       GIC_SPI 327 IRQ_TYPE_LEVEL_HIGH
1399                                       GIC_SPI 328 IRQ_TYPE_LEVEL_HIGH
1400                                       GIC_SPI 329 IRQ_TYPE_LEVEL_HIGH
1401                                       GIC_SPI 330 IRQ_TYPE_LEVEL_HIGH
1402                                       GIC_SPI 331 IRQ_TYPE_LEVEL_HIGH
1403                                       GIC_SPI 332 IRQ_TYPE_LEVEL_HIGH>;
1404                         interrupt-names = "error",
1405                                           "ch0", "ch1", "ch2", "ch3",
1406                                           "ch4", "ch5", "ch6", "ch7",
1407                                           "ch8", "ch9", "ch10", "ch11",
1408                                           "ch12";
1409                         clocks = <&cpg CPG_MOD 502>;
1410                         clock-names = "fck";
1411                         power-domains = <&sysc R8A7743_PD_ALWAYS_ON>;
1412                         resets = <&cpg 502>;
1413                         #dma-cells = <1>;
1414                         dma-channels = <13>;
1415                 };
1416
1417                 audma1: dma-controller@ec720000 {
1418                         compatible = "renesas,dmac-r8a7743",
1419                                      "renesas,rcar-dmac";
1420                         reg = <0 0xec720000 0 0x10000>;
1421                         interrupts = <GIC_SPI 347 IRQ_TYPE_LEVEL_HIGH
1422                                       GIC_SPI 333 IRQ_TYPE_LEVEL_HIGH
1423                                       GIC_SPI 334 IRQ_TYPE_LEVEL_HIGH
1424                                       GIC_SPI 335 IRQ_TYPE_LEVEL_HIGH
1425                                       GIC_SPI 336 IRQ_TYPE_LEVEL_HIGH
1426                                       GIC_SPI 337 IRQ_TYPE_LEVEL_HIGH
1427                                       GIC_SPI 338 IRQ_TYPE_LEVEL_HIGH
1428                                       GIC_SPI 339 IRQ_TYPE_LEVEL_HIGH
1429                                       GIC_SPI 340 IRQ_TYPE_LEVEL_HIGH
1430                                       GIC_SPI 341 IRQ_TYPE_LEVEL_HIGH
1431                                       GIC_SPI 342 IRQ_TYPE_LEVEL_HIGH
1432                                       GIC_SPI 343 IRQ_TYPE_LEVEL_HIGH
1433                                       GIC_SPI 344 IRQ_TYPE_LEVEL_HIGH
1434                                       GIC_SPI 345 IRQ_TYPE_LEVEL_HIGH>;
1435                         interrupt-names = "error",
1436                                           "ch0", "ch1", "ch2", "ch3",
1437                                           "ch4", "ch5", "ch6", "ch7",
1438                                           "ch8", "ch9", "ch10", "ch11",
1439                                           "ch12";
1440                         clocks = <&cpg CPG_MOD 501>;
1441                         clock-names = "fck";
1442                         power-domains = <&sysc R8A7743_PD_ALWAYS_ON>;
1443                         resets = <&cpg 501>;
1444                         #dma-cells = <1>;
1445                         dma-channels = <13>;
1446                 };
1447
1448                 /*
1449                  * pci1 and xhci share the same phy, therefore only one of them
1450                  * can be active at any one time. If both of them are enabled,
1451                  * a race condition will determine who'll control the phy.
1452                  * A firmware file is needed by the xhci driver in order for
1453                  * USB 3.0 to work properly.
1454                  */
1455                 xhci: usb@ee000000 {
1456                         compatible = "renesas,xhci-r8a7743",
1457                                      "renesas,rcar-gen2-xhci";
1458                         reg = <0 0xee000000 0 0xc00>;
1459                         interrupts = <GIC_SPI 101 IRQ_TYPE_LEVEL_HIGH>;
1460                         clocks = <&cpg CPG_MOD 328>;
1461                         power-domains = <&sysc R8A7743_PD_ALWAYS_ON>;
1462                         resets = <&cpg 328>;
1463                         phys = <&usb2 1>;
1464                         phy-names = "usb";
1465                         status = "disabled";
1466                 };
1467
1468                 pci0: pci@ee090000 {
1469                         compatible = "renesas,pci-r8a7743",
1470                                      "renesas,pci-rcar-gen2";
1471                         device_type = "pci";
1472                         reg = <0 0xee090000 0 0xc00>,
1473                               <0 0xee080000 0 0x1100>;
1474                         interrupts = <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>;
1475                         clocks = <&cpg CPG_MOD 703>;
1476                         power-domains = <&sysc R8A7743_PD_ALWAYS_ON>;
1477                         resets = <&cpg 703>;
1478                         status = "disabled";
1479
1480                         bus-range = <0 0>;
1481                         #address-cells = <3>;
1482                         #size-cells = <2>;
1483                         #interrupt-cells = <1>;
1484                         ranges = <0x02000000 0 0xee080000 0 0xee080000 0 0x00010000>;
1485                         interrupt-map-mask = <0xff00 0 0 0x7>;
1486                         interrupt-map = <0x0000 0 0 1 &gic GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH
1487                                          0x0800 0 0 1 &gic GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH
1488                                          0x1000 0 0 2 &gic GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>;
1489
1490                         usb@1,0 {
1491                                 reg = <0x800 0 0 0 0>;
1492                                 phys = <&usb0 0>;
1493                                 phy-names = "usb";
1494                         };
1495
1496                         usb@2,0 {
1497                                 reg = <0x1000 0 0 0 0>;
1498                                 phys = <&usb0 0>;
1499                                 phy-names = "usb";
1500                         };
1501                 };
1502
1503                 pci1: pci@ee0d0000 {
1504                         compatible = "renesas,pci-r8a7743",
1505                                      "renesas,pci-rcar-gen2";
1506                         device_type = "pci";
1507                         reg = <0 0xee0d0000 0 0xc00>,
1508                               <0 0xee0c0000 0 0x1100>;
1509                         interrupts = <GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH>;
1510                         clocks = <&cpg CPG_MOD 703>;
1511                         power-domains = <&sysc R8A7743_PD_ALWAYS_ON>;
1512                         resets = <&cpg 703>;
1513                         status = "disabled";
1514
1515                         bus-range = <1 1>;
1516                         #address-cells = <3>;
1517                         #size-cells = <2>;
1518                         #interrupt-cells = <1>;
1519                         ranges = <0x02000000 0 0xee0c0000 0 0xee0c0000 0 0x00010000>;
1520                         interrupt-map-mask = <0xff00 0 0 0x7>;
1521                         interrupt-map = <0x0000 0 0 1 &gic GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH
1522                                          0x0800 0 0 1 &gic GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH
1523                                          0x1000 0 0 2 &gic GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH>;
1524
1525                         usb@1,0 {
1526                                 reg = <0x10800 0 0 0 0>;
1527                                 phys = <&usb2 0>;
1528                                 phy-names = "usb";
1529                         };
1530
1531                         usb@2,0 {
1532                                 reg = <0x11000 0 0 0 0>;
1533                                 phys = <&usb2 0>;
1534                                 phy-names = "usb";
1535                         };
1536                 };
1537
1538                 sdhi0: sd@ee100000 {
1539                         compatible = "renesas,sdhi-r8a7743",
1540                                      "renesas,rcar-gen2-sdhi";
1541                         reg = <0 0xee100000 0 0x328>;
1542                         interrupts = <GIC_SPI 165 IRQ_TYPE_LEVEL_HIGH>;
1543                         clocks = <&cpg CPG_MOD 314>;
1544                         dmas = <&dmac0 0xcd>, <&dmac0 0xce>,
1545                                <&dmac1 0xcd>, <&dmac1 0xce>;
1546                         dma-names = "tx", "rx", "tx", "rx";
1547                         max-frequency = <195000000>;
1548                         power-domains = <&sysc R8A7743_PD_ALWAYS_ON>;
1549                         resets = <&cpg 314>;
1550                         status = "disabled";
1551                 };
1552
1553                 sdhi1: sd@ee140000 {
1554                         compatible = "renesas,sdhi-r8a7743",
1555                                      "renesas,rcar-gen2-sdhi";
1556                         reg = <0 0xee140000 0 0x100>;
1557                         interrupts = <GIC_SPI 167 IRQ_TYPE_LEVEL_HIGH>;
1558                         clocks = <&cpg CPG_MOD 312>;
1559                         dmas = <&dmac0 0xc1>, <&dmac0 0xc2>,
1560                                <&dmac1 0xc1>, <&dmac1 0xc2>;
1561                         dma-names = "tx", "rx", "tx", "rx";
1562                         max-frequency = <97500000>;
1563                         power-domains = <&sysc R8A7743_PD_ALWAYS_ON>;
1564                         resets = <&cpg 312>;
1565                         status = "disabled";
1566                 };
1567
1568                 sdhi2: sd@ee160000 {
1569                         compatible = "renesas,sdhi-r8a7743",
1570                                      "renesas,rcar-gen2-sdhi";
1571                         reg = <0 0xee160000 0 0x100>;
1572                         interrupts = <GIC_SPI 168 IRQ_TYPE_LEVEL_HIGH>;
1573                         clocks = <&cpg CPG_MOD 311>;
1574                         dmas = <&dmac0 0xd3>, <&dmac0 0xd4>,
1575                                <&dmac1 0xd3>, <&dmac1 0xd4>;
1576                         dma-names = "tx", "rx", "tx", "rx";
1577                         max-frequency = <97500000>;
1578                         power-domains = <&sysc R8A7743_PD_ALWAYS_ON>;
1579                         resets = <&cpg 311>;
1580                         status = "disabled";
1581                 };
1582
1583                 mmcif0: mmc@ee200000 {
1584                         compatible = "renesas,mmcif-r8a7743",
1585                                      "renesas,sh-mmcif";
1586                         reg = <0 0xee200000 0 0x80>;
1587                         interrupts = <GIC_SPI 169 IRQ_TYPE_LEVEL_HIGH>;
1588                         clocks = <&cpg CPG_MOD 315>;
1589                         dmas = <&dmac0 0xd1>, <&dmac0 0xd2>,
1590                                <&dmac1 0xd1>, <&dmac1 0xd2>;
1591                         dma-names = "tx", "rx", "tx", "rx";
1592                         power-domains = <&sysc R8A7743_PD_ALWAYS_ON>;
1593                         resets = <&cpg 315>;
1594                         reg-io-width = <4>;
1595                         max-frequency = <97500000>;
1596                         status = "disabled";
1597                 };
1598
1599                 ether: ethernet@ee700000 {
1600                         compatible = "renesas,ether-r8a7743",
1601                                      "renesas,rcar-gen2-ether";
1602                         reg = <0 0xee700000 0 0x400>;
1603                         interrupts = <GIC_SPI 162 IRQ_TYPE_LEVEL_HIGH>;
1604                         clocks = <&cpg CPG_MOD 813>;
1605                         power-domains = <&sysc R8A7743_PD_ALWAYS_ON>;
1606                         resets = <&cpg 813>;
1607                         phy-mode = "rmii";
1608                         #address-cells = <1>;
1609                         #size-cells = <0>;
1610                         status = "disabled";
1611                 };
1612
1613                 gic: interrupt-controller@f1001000 {
1614                         compatible = "arm,gic-400";
1615                         #interrupt-cells = <3>;
1616                         #address-cells = <0>;
1617                         interrupt-controller;
1618                         reg = <0 0xf1001000 0 0x1000>, <0 0xf1002000 0 0x2000>,
1619                               <0 0xf1004000 0 0x2000>, <0 0xf1006000 0 0x2000>;
1620                         interrupts = <GIC_PPI 9 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_HIGH)>;
1621                         clocks = <&cpg CPG_MOD 408>;
1622                         clock-names = "clk";
1623                         power-domains = <&sysc R8A7743_PD_ALWAYS_ON>;
1624                         resets = <&cpg 408>;
1625                 };
1626
1627                 pciec: pcie@fe000000 {
1628                         compatible = "renesas,pcie-r8a7743",
1629                                      "renesas,pcie-rcar-gen2";
1630                         reg = <0 0xfe000000 0 0x80000>;
1631                         #address-cells = <3>;
1632                         #size-cells = <2>;
1633                         bus-range = <0x00 0xff>;
1634                         device_type = "pci";
1635                         ranges = <0x01000000 0 0x00000000 0 0xfe100000 0 0x00100000
1636                                   0x02000000 0 0xfe200000 0 0xfe200000 0 0x00200000
1637                                   0x02000000 0 0x30000000 0 0x30000000 0 0x08000000
1638                                   0x42000000 0 0x38000000 0 0x38000000 0 0x08000000>;
1639                         /* Map all possible DDR as inbound ranges */
1640                         dma-ranges = <0x42000000 0 0x40000000 0 0x40000000 0 0x80000000
1641                                       0x43000000 2 0x00000000 2 0x00000000 1 0x00000000>;
1642                         interrupts = <GIC_SPI 116 IRQ_TYPE_LEVEL_HIGH>,
1643                                      <GIC_SPI 117 IRQ_TYPE_LEVEL_HIGH>,
1644                                      <GIC_SPI 118 IRQ_TYPE_LEVEL_HIGH>;
1645                         #interrupt-cells = <1>;
1646                         interrupt-map-mask = <0 0 0 0>;
1647                         interrupt-map = <0 0 0 0 &gic GIC_SPI 116 IRQ_TYPE_LEVEL_HIGH>;
1648                         clocks = <&cpg CPG_MOD 319>, <&pcie_bus_clk>;
1649                         clock-names = "pcie", "pcie_bus";
1650                         power-domains = <&sysc R8A7743_PD_ALWAYS_ON>;
1651                         resets = <&cpg 319>;
1652                         status = "disabled";
1653                 };
1654
1655                 vsp@fe928000 {
1656                         compatible = "renesas,vsp1";
1657                         reg = <0 0xfe928000 0 0x8000>;
1658                         interrupts = <GIC_SPI 267 IRQ_TYPE_LEVEL_HIGH>;
1659                         clocks = <&cpg CPG_MOD 131>;
1660                         power-domains = <&sysc R8A7743_PD_ALWAYS_ON>;
1661                         resets = <&cpg 131>;
1662                 };
1663
1664                 vsp@fe930000 {
1665                         compatible = "renesas,vsp1";
1666                         reg = <0 0xfe930000 0 0x8000>;
1667                         interrupts = <GIC_SPI 246 IRQ_TYPE_LEVEL_HIGH>;
1668                         clocks = <&cpg CPG_MOD 128>;
1669                         power-domains = <&sysc R8A7743_PD_ALWAYS_ON>;
1670                         resets = <&cpg 128>;
1671                 };
1672
1673                 vsp@fe938000 {
1674                         compatible = "renesas,vsp1";
1675                         reg = <0 0xfe938000 0 0x8000>;
1676                         interrupts = <GIC_SPI 247 IRQ_TYPE_LEVEL_HIGH>;
1677                         clocks = <&cpg CPG_MOD 127>;
1678                         power-domains = <&sysc R8A7743_PD_ALWAYS_ON>;
1679                         resets = <&cpg 127>;
1680                 };
1681
1682                 du: display@feb00000 {
1683                         compatible = "renesas,du-r8a7743";
1684                         reg = <0 0xfeb00000 0 0x40000>;
1685                         interrupts = <GIC_SPI 256 IRQ_TYPE_LEVEL_HIGH>,
1686                                      <GIC_SPI 268 IRQ_TYPE_LEVEL_HIGH>;
1687                         clocks = <&cpg CPG_MOD 724>,
1688                                  <&cpg CPG_MOD 723>;
1689                         clock-names = "du.0", "du.1";
1690                         status = "disabled";
1691
1692                         ports {
1693                                 #address-cells = <1>;
1694                                 #size-cells = <0>;
1695
1696                                 port@0 {
1697                                         reg = <0>;
1698                                         du_out_rgb: endpoint {
1699                                         };
1700                                 };
1701                                 port@1 {
1702                                         reg = <1>;
1703                                         du_out_lvds0: endpoint {
1704                                                 remote-endpoint = <&lvds0_in>;
1705                                         };
1706                                 };
1707                         };
1708                 };
1709
1710                 lvds0: lvds@feb90000 {
1711                         compatible = "renesas,r8a7743-lvds";
1712                         reg = <0 0xfeb90000 0 0x1c>;
1713                         clocks = <&cpg CPG_MOD 726>;
1714                         power-domains = <&sysc R8A7743_PD_ALWAYS_ON>;
1715                         resets = <&cpg 726>;
1716                         status = "disabled";
1717
1718                         ports {
1719                                 #address-cells = <1>;
1720                                 #size-cells = <0>;
1721
1722                                 port@0 {
1723                                         reg = <0>;
1724                                         lvds0_in: endpoint {
1725                                                 remote-endpoint = <&du_out_lvds0>;
1726                                         };
1727                                 };
1728                                 port@1 {
1729                                         reg = <1>;
1730                                         lvds0_out: endpoint {
1731                                         };
1732                                 };
1733                         };
1734                 };
1735
1736                 prr: chipid@ff000044 {
1737                         compatible = "renesas,prr";
1738                         reg = <0 0xff000044 0 4>;
1739                 };
1740
1741                 cmt0: timer@ffca0000 {
1742                         compatible = "renesas,r8a7743-cmt0",
1743                                      "renesas,rcar-gen2-cmt0";
1744                         reg = <0 0xffca0000 0 0x1004>;
1745                         interrupts = <GIC_SPI 142 IRQ_TYPE_LEVEL_HIGH>,
1746                                      <GIC_SPI 143 IRQ_TYPE_LEVEL_HIGH>;
1747                         clocks = <&cpg CPG_MOD 124>;
1748                         clock-names = "fck";
1749                         power-domains = <&sysc R8A7743_PD_ALWAYS_ON>;
1750                         resets = <&cpg 124>;
1751                         status = "disabled";
1752                 };
1753
1754                 cmt1: timer@e6130000 {
1755                         compatible = "renesas,r8a7743-cmt1",
1756                                      "renesas,rcar-gen2-cmt1";
1757                         reg = <0 0xe6130000 0 0x1004>;
1758                         interrupts = <GIC_SPI 120 IRQ_TYPE_LEVEL_HIGH>,
1759                                      <GIC_SPI 121 IRQ_TYPE_LEVEL_HIGH>,
1760                                      <GIC_SPI 122 IRQ_TYPE_LEVEL_HIGH>,
1761                                      <GIC_SPI 123 IRQ_TYPE_LEVEL_HIGH>,
1762                                      <GIC_SPI 124 IRQ_TYPE_LEVEL_HIGH>,
1763                                      <GIC_SPI 125 IRQ_TYPE_LEVEL_HIGH>,
1764                                      <GIC_SPI 126 IRQ_TYPE_LEVEL_HIGH>,
1765                                      <GIC_SPI 127 IRQ_TYPE_LEVEL_HIGH>;
1766                         clocks = <&cpg CPG_MOD 329>;
1767                         clock-names = "fck";
1768                         power-domains = <&sysc R8A7743_PD_ALWAYS_ON>;
1769                         resets = <&cpg 329>;
1770                         status = "disabled";
1771                 };
1772         };
1773
1774         thermal-zones {
1775                 cpu_thermal: cpu-thermal {
1776                         polling-delay-passive = <0>;
1777                         polling-delay = <0>;
1778
1779                         thermal-sensors = <&thermal>;
1780
1781                         trips {
1782                                 cpu-crit {
1783                                         temperature = <95000>;
1784                                         hysteresis = <0>;
1785                                         type = "critical";
1786                                 };
1787                         };
1788
1789                         cooling-maps {
1790                         };
1791                 };
1792         };
1793
1794         timer {
1795                 compatible = "arm,armv7-timer";
1796                 interrupts-extended = <&gic GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>,
1797                                       <&gic GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>,
1798                                       <&gic GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>,
1799                                       <&gic GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>;
1800         };
1801
1802         /* External USB clock - can be overridden by the board */
1803         usb_extal_clk: usb_extal {
1804                 compatible = "fixed-clock";
1805                 #clock-cells = <0>;
1806                 clock-frequency = <48000000>;
1807         };
1808 };