arch/arm/boot/dts/r8a7743.dtsi

   1 // SPDX-License-Identifier: GPL-2.0
   2 /*
   3  * Device Tree Source for the r8a7743 SoC
   4  *
   5  * Copyright (C) 2016-2017 Cogent Embedded Inc.
   6  */
   7
   8 #include <dt-bindings/interrupt-controller/irq.h>
   9 #include <dt-bindings/interrupt-controller/arm-gic.h>
  10 #include <dt-bindings/clock/r8a7743-cpg-mssr.h>
  11 #include <dt-bindings/power/r8a7743-sysc.h>
  12
  13 / {
  14         compatible = "renesas,r8a7743";
  15         #address-cells = <2>;
  16         #size-cells = <2>;
  17
  18         /*
  19          * The external audio clocks are configured as 0 Hz fixed frequency
  20          * clocks by default.
  21          * Boards that provide audio clocks should override them.
  22          */
  23         audio_clk_a: audio_clk_a {
  24                 compatible = "fixed-clock";
  25                 #clock-cells = <0>;
  26                 clock-frequency = <0>;
  27         };
  28
  29         audio_clk_b: audio_clk_b {
  30                 compatible = "fixed-clock";
  31                 #clock-cells = <0>;
  32                 clock-frequency = <0>;
  33         };
  34
  35         audio_clk_c: audio_clk_c {
  36                 compatible = "fixed-clock";
  37                 #clock-cells = <0>;
  38                 clock-frequency = <0>;
  39         };
  40
  41         /* External CAN clock */
  42         can_clk: can {
  43                 compatible = "fixed-clock";
  44                 #clock-cells = <0>;
  45                 /* This value must be overridden by the board. */
  46                 clock-frequency = <0>;
  47         };
  48
  49         cpus {
  50                 #address-cells = <1>;
  51                 #size-cells = <0>;
  52                 enable-method = "renesas,apmu";
  53
  54                 cpu0: cpu@0 {
  55                         device_type = "cpu";
  56                         compatible = "arm,cortex-a15";
  57                         reg = <0>;
  58                         clock-frequency = <1500000000>;
  59                         clocks = <&cpg CPG_CORE R8A7743_CLK_Z>;
  60                         clock-latency = <300000>; /* 300 us */
  61                         power-domains = <&sysc R8A7743_PD_CA15_CPU0>;
  62                         next-level-cache = <&L2_CA15>;
  63
  64                         /* kHz - uV - OPPs unknown yet */
  65                         operating-points = <1500000 1000000>,
  66                                            <1312500 1000000>,
  67                                            <1125000 1000000>,
  68                                            < 937500 1000000>,
  69                                            < 750000 1000000>,
  70                                            < 375000 1000000>;
  71                 };
  72
  73                 cpu1: cpu@1 {
  74                         device_type = "cpu";
  75                         compatible = "arm,cortex-a15";
  76                         reg = <1>;
  77                         clock-frequency = <1500000000>;
  78                         clocks = <&cpg CPG_CORE R8A7743_CLK_Z>;
  79                         clock-latency = <300000>; /* 300 us */
  80                         power-domains = <&sysc R8A7743_PD_CA15_CPU1>;
  81                         next-level-cache = <&L2_CA15>;
  82
  83                         /* kHz - uV - OPPs unknown yet */
  84                         operating-points = <1500000 1000000>,
  85                                            <1312500 1000000>,
  86                                            <1125000 1000000>,
  87                                            < 937500 1000000>,
  88                                            < 750000 1000000>,
  89                                            < 375000 1000000>;
  90                 };
  91
  92                 L2_CA15: cache-controller-0 {
  93                         compatible = "cache";
  94                         cache-unified;
  95                         cache-level = <2>;
  96                         power-domains = <&sysc R8A7743_PD_CA15_SCU>;
  97                 };
  98         };
  99
 100         /* External root clock */
 101         extal_clk: extal {
 102                 compatible = "fixed-clock";
 103                 #clock-cells = <0>;
 104                 /* This value must be overridden by the board. */
 105                 clock-frequency = <0>;
 106         };
 107
 108         /* External PCIe clock - can be overridden by the board */
 109         pcie_bus_clk: pcie_bus {
 110                 compatible = "fixed-clock";
 111                 #clock-cells = <0>;
 112                 clock-frequency = <0>;
 113         };
 114
 115         pmu {
 116                 compatible = "arm,cortex-a15-pmu";
 117                 interrupts-extended = <&gic GIC_SPI 72 IRQ_TYPE_LEVEL_HIGH>,
 118                                       <&gic GIC_SPI 73 IRQ_TYPE_LEVEL_HIGH>;
 119                 interrupt-affinity = <&cpu0>, <&cpu1>;
 120         };
 121
 122         /* External SCIF clock */
 123         scif_clk: scif {
 124                 compatible = "fixed-clock";
 125                 #clock-cells = <0>;
 126                 /* This value must be overridden by the board. */
 127                 clock-frequency = <0>;
 128         };
 129
 130         soc {
 131                 compatible = "simple-bus";
 132                 interrupt-parent = <&gic>;
 133
 134                 #address-cells = <2>;
 135                 #size-cells = <2>;
 136                 ranges;
 137
 138                 rwdt: watchdog@e6020000 {
 139                         compatible = "renesas,r8a7743-wdt",
 140                                      "renesas,rcar-gen2-wdt";
 141                         reg = <0 0xe6020000 0 0x0c>;
 142                         clocks = <&cpg CPG_MOD 402>;
 143                         power-domains = <&sysc R8A7743_PD_ALWAYS_ON>;
 144                         resets = <&cpg 402>;
 145                         status = "disabled";
 146                 };
 147
 148                 gpio0: gpio@e6050000 {
 149                         compatible = "renesas,gpio-r8a7743",
 150                                      "renesas,rcar-gen2-gpio";
 151                         reg = <0 0xe6050000 0 0x50>;
 152                         interrupts = <GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH>;
 153                         #gpio-cells = <2>;
 154                         gpio-controller;
 155                         gpio-ranges = <&pfc 0 0 32>;
 156                         #interrupt-cells = <2>;
 157                         interrupt-controller;
 158                         clocks = <&cpg CPG_MOD 912>;
 159                         power-domains = <&sysc R8A7743_PD_ALWAYS_ON>;
 160                         resets = <&cpg 912>;
 161                 };
 162
 163                 gpio1: gpio@e6051000 {
 164                         compatible = "renesas,gpio-r8a7743",
 165                                      "renesas,rcar-gen2-gpio";
 166                         reg = <0 0xe6051000 0 0x50>;
 167                         interrupts = <GIC_SPI 5 IRQ_TYPE_LEVEL_HIGH>;
 168                         #gpio-cells = <2>;
 169                         gpio-controller;
 170                         gpio-ranges = <&pfc 0 32 26>;
 171                         #interrupt-cells = <2>;
 172                         interrupt-controller;
 173                         clocks = <&cpg CPG_MOD 911>;
 174                         power-domains = <&sysc R8A7743_PD_ALWAYS_ON>;
 175                         resets = <&cpg 911>;
 176                 };
 177
 178                 gpio2: gpio@e6052000 {
 179                         compatible = "renesas,gpio-r8a7743",
 180                                      "renesas,rcar-gen2-gpio";
 181                         reg = <0 0xe6052000 0 0x50>;
 182                         interrupts = <GIC_SPI 6 IRQ_TYPE_LEVEL_HIGH>;
 183                         #gpio-cells = <2>;
 184                         gpio-controller;
 185                         gpio-ranges = <&pfc 0 64 32>;
 186                         #interrupt-cells = <2>;
 187                         interrupt-controller;
 188                         clocks = <&cpg CPG_MOD 910>;
 189                         power-domains = <&sysc R8A7743_PD_ALWAYS_ON>;
 190                         resets = <&cpg 910>;
 191                 };
 192
 193                 gpio3: gpio@e6053000 {
 194                         compatible = "renesas,gpio-r8a7743",
 195                                      "renesas,rcar-gen2-gpio";
 196                         reg = <0 0xe6053000 0 0x50>;
 197                         interrupts = <GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>;
 198                         #gpio-cells = <2>;
 199                         gpio-controller;
 200                         gpio-ranges = <&pfc 0 96 32>;
 201                         #interrupt-cells = <2>;
 202                         interrupt-controller;
 203                         clocks = <&cpg CPG_MOD 909>;
 204                         power-domains = <&sysc R8A7743_PD_ALWAYS_ON>;
 205                         resets = <&cpg 909>;
 206                 };
 207
 208                 gpio4: gpio@e6054000 {
 209                         compatible = "renesas,gpio-r8a7743",
 210                                      "renesas,rcar-gen2-gpio";
 211                         reg = <0 0xe6054000 0 0x50>;
 212                         interrupts = <GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH>;
 213                         #gpio-cells = <2>;
 214                         gpio-controller;
 215                         gpio-ranges = <&pfc 0 128 32>;
 216                         #interrupt-cells = <2>;
 217                         interrupt-controller;
 218                         clocks = <&cpg CPG_MOD 908>;
 219                         power-domains = <&sysc R8A7743_PD_ALWAYS_ON>;
 220                         resets = <&cpg 908>;
 221                 };
 222
 223                 gpio5: gpio@e6055000 {
 224                         compatible = "renesas,gpio-r8a7743",
 225                                      "renesas,rcar-gen2-gpio";
 226                         reg = <0 0xe6055000 0 0x50>;
 227                         interrupts = <GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH>;
 228                         #gpio-cells = <2>;
 229                         gpio-controller;
 230                         gpio-ranges = <&pfc 0 160 32>;
 231                         #interrupt-cells = <2>;
 232                         interrupt-controller;
 233                         clocks = <&cpg CPG_MOD 907>;
 234                         power-domains = <&sysc R8A7743_PD_ALWAYS_ON>;
 235                         resets = <&cpg 907>;
 236                 };
 237
 238                 gpio6: gpio@e6055400 {
 239                         compatible = "renesas,gpio-r8a7743",
 240                                      "renesas,rcar-gen2-gpio";
 241                         reg = <0 0xe6055400 0 0x50>;
 242                         interrupts = <GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH>;
 243                         #gpio-cells = <2>;
 244                         gpio-controller;
 245                         gpio-ranges = <&pfc 0 192 32>;
 246                         #interrupt-cells = <2>;
 247                         interrupt-controller;
 248                         clocks = <&cpg CPG_MOD 905>;
 249                         power-domains = <&sysc R8A7743_PD_ALWAYS_ON>;
 250                         resets = <&cpg 905>;
 251                 };
 252
 253                 gpio7: gpio@e6055800 {
 254                         compatible = "renesas,gpio-r8a7743",
 255                                      "renesas,rcar-gen2-gpio";
 256                         reg = <0 0xe6055800 0 0x50>;
 257                         interrupts = <GIC_SPI 11 IRQ_TYPE_LEVEL_HIGH>;
 258                         #gpio-cells = <2>;
 259                         gpio-controller;
 260                         gpio-ranges = <&pfc 0 224 26>;
 261                         #interrupt-cells = <2>;
 262                         interrupt-controller;
 263                         clocks = <&cpg CPG_MOD 904>;
 264                         power-domains = <&sysc R8A7743_PD_ALWAYS_ON>;
 265                         resets = <&cpg 904>;
 266                 };
 267
 268                 pfc: pinctrl@e6060000 {
 269                         compatible = "renesas,pfc-r8a7743";
 270                         reg = <0 0xe6060000 0 0x250>;
 271                 };
 272
 273                 tpu: pwm@e60f0000 {
 274                         compatible = "renesas,tpu-r8a7743", "renesas,tpu";
 275                         reg = <0 0xe60f0000 0 0x148>;
 276                         clocks = <&cpg CPG_MOD 304>;
 277                         power-domains = <&sysc R8A7743_PD_ALWAYS_ON>;
 278                         resets = <&cpg 304>;
 279                         #pwm-cells = <3>;
 280                         status = "disabled";
 281                 };
 282
 283                 cpg: clock-controller@e6150000 {
 284                         compatible = "renesas,r8a7743-cpg-mssr";
 285                         reg = <0 0xe6150000 0 0x1000>;
 286                         clocks = <&extal_clk>, <&usb_extal_clk>;
 287                         clock-names = "extal", "usb_extal";
 288                         #clock-cells = <2>;
 289                         #power-domain-cells = <0>;
 290                         #reset-cells = <1>;
 291                 };
 292
 293                 apmu@e6152000 {
 294                         compatible = "renesas,r8a7743-apmu", "renesas,apmu";
 295                         reg = <0 0xe6152000 0 0x188>;
 296                         cpus = <&cpu0>, <&cpu1>;
 297                 };
 298
 299                 rst: reset-controller@e6160000 {
 300                         compatible = "renesas,r8a7743-rst";
 301                         reg = <0 0xe6160000 0 0x100>;
 302                 };
 303
 304                 sysc: system-controller@e6180000 {
 305                         compatible = "renesas,r8a7743-sysc";
 306                         reg = <0 0xe6180000 0 0x200>;
 307                         #power-domain-cells = <1>;
 308                 };
 309
 310                 irqc: interrupt-controller@e61c0000 {
 311                         compatible = "renesas,irqc-r8a7743", "renesas,irqc";
 312                         #interrupt-cells = <2>;
 313                         interrupt-controller;
 314                         reg = <0 0xe61c0000 0 0x200>;
 315                         interrupts = <GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH>,
 316                                      <GIC_SPI 1 IRQ_TYPE_LEVEL_HIGH>,
 317                                      <GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH>,
 318                                      <GIC_SPI 3 IRQ_TYPE_LEVEL_HIGH>,
 319                                      <GIC_SPI 12 IRQ_TYPE_LEVEL_HIGH>,
 320                                      <GIC_SPI 13 IRQ_TYPE_LEVEL_HIGH>,
 321                                      <GIC_SPI 14 IRQ_TYPE_LEVEL_HIGH>,
 322                                      <GIC_SPI 15 IRQ_TYPE_LEVEL_HIGH>,
 323                                      <GIC_SPI 16 IRQ_TYPE_LEVEL_HIGH>,
 324                                      <GIC_SPI 17 IRQ_TYPE_LEVEL_HIGH>;
 325                         clocks = <&cpg CPG_MOD 407>;
 326                         power-domains = <&sysc R8A7743_PD_ALWAYS_ON>;
 327                         resets = <&cpg 407>;
 328                 };
 329
 330                 thermal: thermal@e61f0000 {
 331                         compatible = "renesas,thermal-r8a7743",
 332                                      "renesas,rcar-gen2-thermal";
 333                         reg = <0 0xe61f0000 0 0x10>, <0 0xe61f0100 0 0x38>;
 334                         interrupts = <GIC_SPI 69 IRQ_TYPE_LEVEL_HIGH>;
 335                         clocks = <&cpg CPG_MOD 522>;
 336                         power-domains = <&sysc R8A7743_PD_ALWAYS_ON>;
 337                         resets = <&cpg 522>;
 338                         #thermal-sensor-cells = <0>;
 339                 };
 340
 341                 ipmmu_sy0: iommu@e6280000 {
 342                         compatible = "renesas,ipmmu-r8a7743",
 343                                      "renesas,ipmmu-vmsa";
 344                         reg = <0 0xe6280000 0 0x1000>;
 345                         interrupts = <GIC_SPI 223 IRQ_TYPE_LEVEL_HIGH>,
 346                                      <GIC_SPI 224 IRQ_TYPE_LEVEL_HIGH>;
 347                         #iommu-cells = <1>;
 348                         status = "disabled";
 349                 };
 350
 351                 ipmmu_sy1: iommu@e6290000 {
 352                         compatible = "renesas,ipmmu-r8a7743",
 353                                      "renesas,ipmmu-vmsa";
 354                         reg = <0 0xe6290000 0 0x1000>;
 355                         interrupts = <GIC_SPI 225 IRQ_TYPE_LEVEL_HIGH>;
 356                         #iommu-cells = <1>;
 357                         status = "disabled";
 358                 };
 359
 360                 ipmmu_ds: iommu@e6740000 {
 361                         compatible = "renesas,ipmmu-r8a7743",
 362                                      "renesas,ipmmu-vmsa";
 363                         reg = <0 0xe6740000 0 0x1000>;
 364                         interrupts = <GIC_SPI 198 IRQ_TYPE_LEVEL_HIGH>,
 365                                      <GIC_SPI 199 IRQ_TYPE_LEVEL_HIGH>;
 366                         #iommu-cells = <1>;
 367                         status = "disabled";
 368                 };
 369
 370                 ipmmu_mp: iommu@ec680000 {
 371                         compatible = "renesas,ipmmu-r8a7743",
 372                                      "renesas,ipmmu-vmsa";
 373                         reg = <0 0xec680000 0 0x1000>;
 374                         interrupts = <GIC_SPI 226 IRQ_TYPE_LEVEL_HIGH>;
 375                         #iommu-cells = <1>;
 376                         status = "disabled";
 377                 };
 378
 379                 ipmmu_mx: iommu@fe951000 {
 380                         compatible = "renesas,ipmmu-r8a7743",
 381                                      "renesas,ipmmu-vmsa";
 382                         reg = <0 0xfe951000 0 0x1000>;
 383                         interrupts = <GIC_SPI 222 IRQ_TYPE_LEVEL_HIGH>,
 384                                      <GIC_SPI 221 IRQ_TYPE_LEVEL_HIGH>;
 385                         #iommu-cells = <1>;
 386                         status = "disabled";
 387                 };
 388
 389                 ipmmu_gp: iommu@e62a0000 {
 390                         compatible = "renesas,ipmmu-r8a7743",
 391                                      "renesas,ipmmu-vmsa";
 392                         reg = <0 0xe62a0000 0 0x1000>;
 393                         interrupts = <GIC_SPI 260 IRQ_TYPE_LEVEL_HIGH>,
 394                                      <GIC_SPI 261 IRQ_TYPE_LEVEL_HIGH>;
 395                         #iommu-cells = <1>;
 396                         status = "disabled";
 397                 };
 398
 399                 icram0: sram@e63a0000 {
 400                         compatible = "mmio-sram";
 401                         reg = <0 0xe63a0000 0 0x12000>;
 402                         #address-cells = <1>;
 403                         #size-cells = <1>;
 404                         ranges = <0 0 0xe63a0000 0x12000>;
 405                 };
 406
 407                 icram1: sram@e63c0000 {
 408                         compatible = "mmio-sram";
 409                         reg = <0 0xe63c0000 0 0x1000>;
 410                         #address-cells = <1>;
 411                         #size-cells = <1>;
 412                         ranges = <0 0 0xe63c0000 0x1000>;
 413
 414                         smp-sram@0 {
 415                                 compatible = "renesas,smp-sram";
 416                                 reg = <0 0x100>;
 417                         };
 418                 };
 419
 420                 icram2: sram@e6300000 {
 421                         compatible = "mmio-sram";
 422                         reg = <0 0xe6300000 0 0x40000>;
 423                         #address-cells = <1>;
 424                         #size-cells = <1>;
 425                         ranges = <0 0 0xe6300000 0x40000>;
 426                 };
 427
 428                 /* The memory map in the User's Manual maps the cores to
 429                  * bus numbers
 430                  */
 431                 i2c0: i2c@e6508000 {
 432                         #address-cells = <1>;
 433                         #size-cells = <0>;
 434                         compatible = "renesas,i2c-r8a7743",
 435                                      "renesas,rcar-gen2-i2c";
 436                         reg = <0 0xe6508000 0 0x40>;
 437                         interrupts = <GIC_SPI 287 IRQ_TYPE_LEVEL_HIGH>;
 438                         clocks = <&cpg CPG_MOD 931>;
 439                         power-domains = <&sysc R8A7743_PD_ALWAYS_ON>;
 440                         resets = <&cpg 931>;
 441                         i2c-scl-internal-delay-ns = <6>;
 442                         status = "disabled";
 443                 };
 444
 445                 i2c1: i2c@e6518000 {
 446                         #address-cells = <1>;
 447                         #size-cells = <0>;
 448                         compatible = "renesas,i2c-r8a7743",
 449                                      "renesas,rcar-gen2-i2c";
 450                         reg = <0 0xe6518000 0 0x40>;
 451                         interrupts = <GIC_SPI 288 IRQ_TYPE_LEVEL_HIGH>;
 452                         clocks = <&cpg CPG_MOD 930>;
 453                         power-domains = <&sysc R8A7743_PD_ALWAYS_ON>;
 454                         resets = <&cpg 930>;
 455                         i2c-scl-internal-delay-ns = <6>;
 456                         status = "disabled";
 457                 };
 458
 459                 i2c2: i2c@e6530000 {
 460                         #address-cells = <1>;
 461                         #size-cells = <0>;
 462                         compatible = "renesas,i2c-r8a7743",
 463                                      "renesas,rcar-gen2-i2c";
 464                         reg = <0 0xe6530000 0 0x40>;
 465                         interrupts = <GIC_SPI 286 IRQ_TYPE_LEVEL_HIGH>;
 466                         clocks = <&cpg CPG_MOD 929>;
 467                         power-domains = <&sysc R8A7743_PD_ALWAYS_ON>;
 468                         resets = <&cpg 929>;
 469                         i2c-scl-internal-delay-ns = <6>;
 470                         status = "disabled";
 471                 };
 472
 473                 i2c3: i2c@e6540000 {
 474                         #address-cells = <1>;
 475                         #size-cells = <0>;
 476                         compatible = "renesas,i2c-r8a7743",
 477                                      "renesas,rcar-gen2-i2c";
 478                         reg = <0 0xe6540000 0 0x40>;
 479                         interrupts = <GIC_SPI 290 IRQ_TYPE_LEVEL_HIGH>;
 480                         clocks = <&cpg CPG_MOD 928>;
 481                         power-domains = <&sysc R8A7743_PD_ALWAYS_ON>;
 482                         resets = <&cpg 928>;
 483                         i2c-scl-internal-delay-ns = <6>;
 484                         status = "disabled";
 485                 };
 486
 487                 i2c4: i2c@e6520000 {
 488                         #address-cells = <1>;
 489                         #size-cells = <0>;
 490                         compatible = "renesas,i2c-r8a7743",
 491                                      "renesas,rcar-gen2-i2c";
 492                         reg = <0 0xe6520000 0 0x40>;
 493                         interrupts = <GIC_SPI 19 IRQ_TYPE_LEVEL_HIGH>;
 494                         clocks = <&cpg CPG_MOD 927>;
 495                         power-domains = <&sysc R8A7743_PD_ALWAYS_ON>;
 496                         resets = <&cpg 927>;
 497                         i2c-scl-internal-delay-ns = <6>;
 498                         status = "disabled";
 499                 };
 500
 501                 i2c5: i2c@e6528000 {
 502                         /* doesn't need pinmux */
 503                         #address-cells = <1>;
 504                         #size-cells = <0>;
 505                         compatible = "renesas,i2c-r8a7743",
 506                                      "renesas,rcar-gen2-i2c";
 507                         reg = <0 0xe6528000 0 0x40>;
 508                         interrupts = <GIC_SPI 20 IRQ_TYPE_LEVEL_HIGH>;
 509                         clocks = <&cpg CPG_MOD 925>;
 510                         power-domains = <&sysc R8A7743_PD_ALWAYS_ON>;
 511                         resets = <&cpg 925>;
 512                         i2c-scl-internal-delay-ns = <110>;
 513                         status = "disabled";
 514                 };
 515
 516                 iic0: i2c@e6500000 {
 517                         #address-cells = <1>;
 518                         #size-cells = <0>;
 519                         compatible = "renesas,iic-r8a7743",
 520                                      "renesas,rcar-gen2-iic",
 521                                      "renesas,rmobile-iic";
 522                         reg = <0 0xe6500000 0 0x425>;
 523                         interrupts = <GIC_SPI 174 IRQ_TYPE_LEVEL_HIGH>;
 524                         clocks = <&cpg CPG_MOD 318>;
 525                         dmas = <&dmac0 0x61>, <&dmac0 0x62>,
 526                                <&dmac1 0x61>, <&dmac1 0x62>;
 527                         dma-names = "tx", "rx", "tx", "rx";
 528                         power-domains = <&sysc R8A7743_PD_ALWAYS_ON>;
 529                         resets = <&cpg 318>;
 530                         status = "disabled";
 531                 };
 532
 533                 iic1: i2c@e6510000 {
 534                         #address-cells = <1>;
 535                         #size-cells = <0>;
 536                         compatible = "renesas,iic-r8a7743",
 537                                      "renesas,rcar-gen2-iic",
 538                                      "renesas,rmobile-iic";
 539                         reg = <0 0xe6510000 0 0x425>;
 540                         interrupts = <GIC_SPI 175 IRQ_TYPE_LEVEL_HIGH>;
 541                         clocks = <&cpg CPG_MOD 323>;
 542                         dmas = <&dmac0 0x65>, <&dmac0 0x66>,
 543                                <&dmac1 0x65>, <&dmac1 0x66>;
 544                         dma-names = "tx", "rx", "tx", "rx";
 545                         power-domains = <&sysc R8A7743_PD_ALWAYS_ON>;
 546                         resets = <&cpg 323>;
 547                         status = "disabled";
 548                 };
 549
 550                 iic3: i2c@e60b0000 {
 551                         /* doesn't need pinmux */
 552                         #address-cells = <1>;
 553                         #size-cells = <0>;
 554                         compatible = "renesas,iic-r8a7743";
 555                         reg = <0 0xe60b0000 0 0x425>;
 556                         interrupts = <GIC_SPI 173 IRQ_TYPE_LEVEL_HIGH>;
 557                         clocks = <&cpg CPG_MOD 926>;
 558                         dmas = <&dmac0 0x77>, <&dmac0 0x78>,
 559                                <&dmac1 0x77>, <&dmac1 0x78>;
 560                         dma-names = "tx", "rx", "tx", "rx";
 561                         power-domains = <&sysc R8A7743_PD_ALWAYS_ON>;
 562                         resets = <&cpg 926>;
 563                         status = "disabled";
 564                 };
 565
 566                 hsusb: usb@e6590000 {
 567                         compatible = "renesas,usbhs-r8a7743",
 568                                      "renesas,rcar-gen2-usbhs";
 569                         reg = <0 0xe6590000 0 0x100>;
 570                         interrupts = <GIC_SPI 107 IRQ_TYPE_LEVEL_HIGH>;
 571                         clocks = <&cpg CPG_MOD 704>;
 572                         dmas = <&usb_dmac0 0>, <&usb_dmac0 1>,
 573                                <&usb_dmac1 0>, <&usb_dmac1 1>;
 574                         dma-names = "ch0", "ch1", "ch2", "ch3";
 575                         power-domains = <&sysc R8A7743_PD_ALWAYS_ON>;
 576                         resets = <&cpg 704>;
 577                         renesas,buswait = <4>;
 578                         phys = <&usb0 1>;
 579                         phy-names = "usb";
 580                         status = "disabled";
 581                 };
 582
 583                 usbphy: usb-phy@e6590100 {
 584                         compatible = "renesas,usb-phy-r8a7743",
 585                                      "renesas,rcar-gen2-usb-phy";
 586                         reg = <0 0xe6590100 0 0x100>;
 587                         #address-cells = <1>;
 588                         #size-cells = <0>;
 589                         clocks = <&cpg CPG_MOD 704>;
 590                         clock-names = "usbhs";
 591                         power-domains = <&sysc R8A7743_PD_ALWAYS_ON>;
 592                         resets = <&cpg 704>;
 593                         status = "disabled";
 594
 595                         usb0: usb-channel@0 {
 596                                 reg = <0>;
 597                                 #phy-cells = <1>;
 598                         };
 599                         usb2: usb-channel@2 {
 600                                 reg = <2>;
 601                                 #phy-cells = <1>;
 602                         };
 603                 };
 604
 605                 usb_dmac0: dma-controller@e65a0000 {
 606                         compatible = "renesas,r8a7743-usb-dmac",
 607                                      "renesas,usb-dmac";
 608                         reg = <0 0xe65a0000 0 0x100>;
 609                         interrupts = <GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH>,
 610                                      <GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH>;
 611                         interrupt-names = "ch0", "ch1";
 612                         clocks = <&cpg CPG_MOD 330>;
 613                         power-domains = <&sysc R8A7743_PD_ALWAYS_ON>;
 614                         resets = <&cpg 330>;
 615                         #dma-cells = <1>;
 616                         dma-channels = <2>;
 617                 };
 618
 619                 usb_dmac1: dma-controller@e65b0000 {
 620                         compatible = "renesas,r8a7743-usb-dmac",
 621                                      "renesas,usb-dmac";
 622                         reg = <0 0xe65b0000 0 0x100>;
 623                         interrupts = <GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH>,
 624                                      <GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH>;
 625                         interrupt-names = "ch0", "ch1";
 626                         clocks = <&cpg CPG_MOD 331>;
 627                         power-domains = <&sysc R8A7743_PD_ALWAYS_ON>;
 628                         resets = <&cpg 331>;
 629                         #dma-cells = <1>;
 630                         dma-channels = <2>;
 631                 };
 632
 633                 dmac0: dma-controller@e6700000 {
 634                         compatible = "renesas,dmac-r8a7743",
 635                                      "renesas,rcar-dmac";
 636                         reg = <0 0xe6700000 0 0x20000>;
 637                         interrupts = <GIC_SPI 197 IRQ_TYPE_LEVEL_HIGH>,
 638                                      <GIC_SPI 200 IRQ_TYPE_LEVEL_HIGH>,
 639                                      <GIC_SPI 201 IRQ_TYPE_LEVEL_HIGH>,
 640                                      <GIC_SPI 202 IRQ_TYPE_LEVEL_HIGH>,
 641                                      <GIC_SPI 203 IRQ_TYPE_LEVEL_HIGH>,
 642                                      <GIC_SPI 204 IRQ_TYPE_LEVEL_HIGH>,
 643                                      <GIC_SPI 205 IRQ_TYPE_LEVEL_HIGH>,
 644                                      <GIC_SPI 206 IRQ_TYPE_LEVEL_HIGH>,
 645                                      <GIC_SPI 207 IRQ_TYPE_LEVEL_HIGH>,
 646                                      <GIC_SPI 208 IRQ_TYPE_LEVEL_HIGH>,
 647                                      <GIC_SPI 209 IRQ_TYPE_LEVEL_HIGH>,
 648                                      <GIC_SPI 210 IRQ_TYPE_LEVEL_HIGH>,
 649                                      <GIC_SPI 211 IRQ_TYPE_LEVEL_HIGH>,
 650                                      <GIC_SPI 212 IRQ_TYPE_LEVEL_HIGH>,
 651                                      <GIC_SPI 213 IRQ_TYPE_LEVEL_HIGH>,
 652                                      <GIC_SPI 214 IRQ_TYPE_LEVEL_HIGH>;
 653                         interrupt-names = "error",
 654                                           "ch0", "ch1", "ch2", "ch3",
 655                                           "ch4", "ch5", "ch6", "ch7",
 656                                           "ch8", "ch9", "ch10", "ch11",
 657                                           "ch12", "ch13", "ch14";
 658                         clocks = <&cpg CPG_MOD 219>;
 659                         clock-names = "fck";
 660                         power-domains = <&sysc R8A7743_PD_ALWAYS_ON>;
 661                         resets = <&cpg 219>;
 662                         #dma-cells = <1>;
 663                         dma-channels = <15>;
 664                 };
 665
 666                 dmac1: dma-controller@e6720000 {
 667                         compatible = "renesas,dmac-r8a7743",
 668                                      "renesas,rcar-dmac";
 669                         reg = <0 0xe6720000 0 0x20000>;
 670                         interrupts = <GIC_SPI 220 IRQ_TYPE_LEVEL_HIGH>,
 671                                      <GIC_SPI 216 IRQ_TYPE_LEVEL_HIGH>,
 672                                      <GIC_SPI 217 IRQ_TYPE_LEVEL_HIGH>,
 673                                      <GIC_SPI 218 IRQ_TYPE_LEVEL_HIGH>,
 674                                      <GIC_SPI 219 IRQ_TYPE_LEVEL_HIGH>,
 675                                      <GIC_SPI 308 IRQ_TYPE_LEVEL_HIGH>,
 676                                      <GIC_SPI 309 IRQ_TYPE_LEVEL_HIGH>,
 677                                      <GIC_SPI 310 IRQ_TYPE_LEVEL_HIGH>,
 678                                      <GIC_SPI 311 IRQ_TYPE_LEVEL_HIGH>,
 679                                      <GIC_SPI 312 IRQ_TYPE_LEVEL_HIGH>,
 680                                      <GIC_SPI 313 IRQ_TYPE_LEVEL_HIGH>,
 681                                      <GIC_SPI 314 IRQ_TYPE_LEVEL_HIGH>,
 682                                      <GIC_SPI 315 IRQ_TYPE_LEVEL_HIGH>,
 683                                      <GIC_SPI 316 IRQ_TYPE_LEVEL_HIGH>,
 684                                      <GIC_SPI 317 IRQ_TYPE_LEVEL_HIGH>,
 685                                      <GIC_SPI 318 IRQ_TYPE_LEVEL_HIGH>;
 686                         interrupt-names = "error",
 687                                           "ch0", "ch1", "ch2", "ch3",
 688                                           "ch4", "ch5", "ch6", "ch7",
 689                                           "ch8", "ch9", "ch10", "ch11",
 690                                           "ch12", "ch13", "ch14";
 691                         clocks = <&cpg CPG_MOD 218>;
 692                         clock-names = "fck";
 693                         power-domains = <&sysc R8A7743_PD_ALWAYS_ON>;
 694                         resets = <&cpg 218>;
 695                         #dma-cells = <1>;
 696                         dma-channels = <15>;
 697                 };
 698
 699                 avb: ethernet@e6800000 {
 700                         compatible = "renesas,etheravb-r8a7743",
 701                                      "renesas,etheravb-rcar-gen2";
 702                         reg = <0 0xe6800000 0 0x800>, <0 0xee0e8000 0 0x4000>;
 703                         interrupts = <GIC_SPI 163 IRQ_TYPE_LEVEL_HIGH>;
 704                         clocks = <&cpg CPG_MOD 812>;
 705                         clock-names = "fck";
 706                         power-domains = <&sysc R8A7743_PD_ALWAYS_ON>;
 707                         resets = <&cpg 812>;
 708                         #address-cells = <1>;
 709                         #size-cells = <0>;
 710                         status = "disabled";
 711                 };
 712
 713                 qspi: spi@e6b10000 {
 714                         compatible = "renesas,qspi-r8a7743", "renesas,qspi";
 715                         reg = <0 0xe6b10000 0 0x2c>;
 716                         interrupts = <GIC_SPI 184 IRQ_TYPE_LEVEL_HIGH>;
 717                         clocks = <&cpg CPG_MOD 917>;
 718                         dmas = <&dmac0 0x17>, <&dmac0 0x18>,
 719                                <&dmac1 0x17>, <&dmac1 0x18>;
 720                         dma-names = "tx", "rx", "tx", "rx";
 721                         power-domains = <&sysc R8A7743_PD_ALWAYS_ON>;
 722                         num-cs = <1>;
 723                         #address-cells = <1>;
 724                         #size-cells = <0>;
 725                         resets = <&cpg 917>;
 726                         status = "disabled";
 727                 };
 728
 729                 scifa0: serial@e6c40000 {
 730                         compatible = "renesas,scifa-r8a7743",
 731                                      "renesas,rcar-gen2-scifa", "renesas,scifa";
 732                         reg = <0 0xe6c40000 0 0x40>;
 733                         interrupts = <GIC_SPI 144 IRQ_TYPE_LEVEL_HIGH>;
 734                         clocks = <&cpg CPG_MOD 204>;
 735                         clock-names = "fck";
 736                         dmas = <&dmac0 0x21>, <&dmac0 0x22>,
 737                                <&dmac1 0x21>, <&dmac1 0x22>;
 738                         dma-names = "tx", "rx", "tx", "rx";
 739                         power-domains = <&sysc R8A7743_PD_ALWAYS_ON>;
 740                         resets = <&cpg 204>;
 741                         status = "disabled";
 742                 };
 743
 744                 scifa1: serial@e6c50000 {
 745                         compatible = "renesas,scifa-r8a7743",
 746                                      "renesas,rcar-gen2-scifa", "renesas,scifa";
 747                         reg = <0 0xe6c50000 0 0x40>;
 748                         interrupts = <GIC_SPI 145 IRQ_TYPE_LEVEL_HIGH>;
 749                         clocks = <&cpg CPG_MOD 203>;
 750                         clock-names = "fck";
 751                         dmas = <&dmac0 0x25>, <&dmac0 0x26>,
 752                                <&dmac1 0x25>, <&dmac1 0x26>;
 753                         dma-names = "tx", "rx", "tx", "rx";
 754                         power-domains = <&sysc R8A7743_PD_ALWAYS_ON>;
 755                         resets = <&cpg 203>;
 756                         status = "disabled";
 757                 };
 758
 759                 scifa2: serial@e6c60000 {
 760                         compatible = "renesas,scifa-r8a7743",
 761                                      "renesas,rcar-gen2-scifa", "renesas,scifa";
 762                         reg = <0 0xe6c60000 0 0x40>;
 763                         interrupts = <GIC_SPI 151 IRQ_TYPE_LEVEL_HIGH>;
 764                         clocks = <&cpg CPG_MOD 202>;
 765                         clock-names = "fck";
 766                         dmas = <&dmac0 0x27>, <&dmac0 0x28>,
 767                                <&dmac1 0x27>, <&dmac1 0x28>;
 768                         dma-names = "tx", "rx", "tx", "rx";
 769                         power-domains = <&sysc R8A7743_PD_ALWAYS_ON>;
 770                         resets = <&cpg 202>;
 771                         status = "disabled";
 772                 };
 773
 774                 scifa3: serial@e6c70000 {
 775                         compatible = "renesas,scifa-r8a7743",
 776                                      "renesas,rcar-gen2-scifa", "renesas,scifa";
 777                         reg = <0 0xe6c70000 0 0x40>;
 778                         interrupts = <GIC_SPI 29 IRQ_TYPE_LEVEL_HIGH>;
 779                         clocks = <&cpg CPG_MOD 1106>;
 780                         clock-names = "fck";
 781                         dmas = <&dmac0 0x1b>, <&dmac0 0x1c>,
 782                                <&dmac1 0x1b>, <&dmac1 0x1c>;
 783                         dma-names = "tx", "rx", "tx", "rx";
 784                         power-domains = <&sysc R8A7743_PD_ALWAYS_ON>;
 785                         resets = <&cpg 1106>;
 786                         status = "disabled";
 787                 };
 788
 789                 scifa4: serial@e6c78000 {
 790                         compatible = "renesas,scifa-r8a7743",
 791                                      "renesas,rcar-gen2-scifa", "renesas,scifa";
 792                         reg = <0 0xe6c78000 0 0x40>;
 793                         interrupts = <GIC_SPI 30 IRQ_TYPE_LEVEL_HIGH>;
 794                         clocks = <&cpg CPG_MOD 1107>;
 795                         clock-names = "fck";
 796                         dmas = <&dmac0 0x1f>, <&dmac0 0x20>,
 797                                <&dmac1 0x1f>, <&dmac1 0x20>;
 798                         dma-names = "tx", "rx", "tx", "rx";
 799                         power-domains = <&sysc R8A7743_PD_ALWAYS_ON>;
 800                         resets = <&cpg 1107>;
 801                         status = "disabled";
 802                 };
 803
 804                 scifa5: serial@e6c80000 {
 805                         compatible = "renesas,scifa-r8a7743",
 806                                      "renesas,rcar-gen2-scifa", "renesas,scifa";
 807                         reg = <0 0xe6c80000 0 0x40>;
 808                         interrupts = <GIC_SPI 31 IRQ_TYPE_LEVEL_HIGH>;
 809                         clocks = <&cpg CPG_MOD 1108>;
 810                         clock-names = "fck";
 811                         dmas = <&dmac0 0x23>, <&dmac0 0x24>,
 812                                <&dmac1 0x23>, <&dmac1 0x24>;
 813                         dma-names = "tx", "rx", "tx", "rx";
 814                         power-domains = <&sysc R8A7743_PD_ALWAYS_ON>;
 815                         resets = <&cpg 1108>;
 816                         status = "disabled";
 817                 };
 818
 819                 scifb0: serial@e6c20000 {
 820                         compatible = "renesas,scifb-r8a7743",
 821                                      "renesas,rcar-gen2-scifb", "renesas,scifb";
 822                         reg = <0 0xe6c20000 0 0x100>;
 823                         interrupts = <GIC_SPI 148 IRQ_TYPE_LEVEL_HIGH>;
 824                         clocks = <&cpg CPG_MOD 206>;
 825                         clock-names = "fck";
 826                         dmas = <&dmac0 0x3d>, <&dmac0 0x3e>,
 827                                <&dmac1 0x3d>, <&dmac1 0x3e>;
 828                         dma-names = "tx", "rx", "tx", "rx";
 829                         power-domains = <&sysc R8A7743_PD_ALWAYS_ON>;
 830                         resets = <&cpg 206>;
 831                         status = "disabled";
 832                 };
 833
 834                 scifb1: serial@e6c30000 {
 835                         compatible = "renesas,scifb-r8a7743",
 836                                      "renesas,rcar-gen2-scifb", "renesas,scifb";
 837                         reg = <0 0xe6c30000 0 0x100>;
 838                         interrupts = <GIC_SPI 149 IRQ_TYPE_LEVEL_HIGH>;
 839                         clocks = <&cpg CPG_MOD 207>;
 840                         clock-names = "fck";
 841                         dmas = <&dmac0 0x19>, <&dmac0 0x1a>,
 842                                <&dmac1 0x19>, <&dmac1 0x1a>;
 843                         dma-names = "tx", "rx", "tx", "rx";
 844                         power-domains = <&sysc R8A7743_PD_ALWAYS_ON>;
 845                         resets = <&cpg 207>;
 846                         status = "disabled";
 847                 };
 848
 849                 scifb2: serial@e6ce0000 {
 850                         compatible = "renesas,scifb-r8a7743",
 851                                      "renesas,rcar-gen2-scifb", "renesas,scifb";
 852                         reg = <0 0xe6ce0000 0 0x100>;
 853                         interrupts = <GIC_SPI 150 IRQ_TYPE_LEVEL_HIGH>;
 854                         clocks = <&cpg CPG_MOD 216>;
 855                         clock-names = "fck";
 856                         dmas = <&dmac0 0x1d>, <&dmac0 0x1e>,
 857                                <&dmac1 0x1d>, <&dmac1 0x1e>;
 858                         dma-names = "tx", "rx", "tx", "rx";
 859                         power-domains = <&sysc R8A7743_PD_ALWAYS_ON>;
 860                         resets = <&cpg 216>;
 861                         status = "disabled";
 862                 };
 863
 864                 scif0: serial@e6e60000 {
 865                         compatible = "renesas,scif-r8a7743",
 866                                      "renesas,rcar-gen2-scif", "renesas,scif";
 867                         reg = <0 0xe6e60000 0 0x40>;
 868                         interrupts = <GIC_SPI 152 IRQ_TYPE_LEVEL_HIGH>;
 869                         clocks = <&cpg CPG_MOD 721>,
 870                                  <&cpg CPG_CORE R8A7743_CLK_ZS>, <&scif_clk>;
 871                         clock-names = "fck", "brg_int", "scif_clk";
 872                         dmas = <&dmac0 0x29>, <&dmac0 0x2a>,
 873                                <&dmac1 0x29>, <&dmac1 0x2a>;
 874                         dma-names = "tx", "rx", "tx", "rx";
 875                         power-domains = <&sysc R8A7743_PD_ALWAYS_ON>;
 876                         resets = <&cpg 721>;
 877                         status = "disabled";
 878                 };
 879
 880                 scif1: serial@e6e68000 {
 881                         compatible = "renesas,scif-r8a7743",
 882                                      "renesas,rcar-gen2-scif", "renesas,scif";
 883                         reg = <0 0xe6e68000 0 0x40>;
 884                         interrupts = <GIC_SPI 153 IRQ_TYPE_LEVEL_HIGH>;
 885                         clocks = <&cpg CPG_MOD 720>,
 886                                  <&cpg CPG_CORE R8A7743_CLK_ZS>, <&scif_clk>;
 887                         clock-names = "fck", "brg_int", "scif_clk";
 888                         dmas = <&dmac0 0x2d>, <&dmac0 0x2e>,
 889                                <&dmac1 0x2d>, <&dmac1 0x2e>;
 890                         dma-names = "tx", "rx", "tx", "rx";
 891                         power-domains = <&sysc R8A7743_PD_ALWAYS_ON>;
 892                         resets = <&cpg 720>;
 893                         status = "disabled";
 894                 };
 895
 896                 scif2: serial@e6e58000 {
 897                         compatible = "renesas,scif-r8a7743",
 898                                      "renesas,rcar-gen2-scif", "renesas,scif";
 899                         reg = <0 0xe6e58000 0 0x40>;
 900                         interrupts = <GIC_SPI 22 IRQ_TYPE_LEVEL_HIGH>;
 901                         clocks = <&cpg CPG_MOD 719>,
 902                                  <&cpg CPG_CORE R8A7743_CLK_ZS>, <&scif_clk>;
 903                         clock-names = "fck", "brg_int", "scif_clk";
 904                         dmas = <&dmac0 0x2b>, <&dmac0 0x2c>,
 905                                <&dmac1 0x2b>, <&dmac1 0x2c>;
 906                         dma-names = "tx", "rx", "tx", "rx";
 907                         power-domains = <&sysc R8A7743_PD_ALWAYS_ON>;
 908                         resets = <&cpg 719>;
 909                         status = "disabled";
 910                 };
 911
 912                 scif3: serial@e6ea8000 {
 913                         compatible = "renesas,scif-r8a7743",
 914                                      "renesas,rcar-gen2-scif", "renesas,scif";
 915                         reg = <0 0xe6ea8000 0 0x40>;
 916                         interrupts = <GIC_SPI 23 IRQ_TYPE_LEVEL_HIGH>;
 917                         clocks = <&cpg CPG_MOD 718>,
 918                                  <&cpg CPG_CORE R8A7743_CLK_ZS>, <&scif_clk>;
 919                         clock-names = "fck", "brg_int", "scif_clk";
 920                         dmas = <&dmac0 0x2f>, <&dmac0 0x30>,
 921                                <&dmac1 0x2f>, <&dmac1 0x30>;
 922                         dma-names = "tx", "rx", "tx", "rx";
 923                         power-domains = <&sysc R8A7743_PD_ALWAYS_ON>;
 924                         resets = <&cpg 718>;
 925                         status = "disabled";
 926                 };
 927
 928                 scif4: serial@e6ee0000 {
 929                         compatible = "renesas,scif-r8a7743",
 930                                      "renesas,rcar-gen2-scif", "renesas,scif";
 931                         reg = <0 0xe6ee0000 0 0x40>;
 932                         interrupts = <GIC_SPI 24 IRQ_TYPE_LEVEL_HIGH>;
 933                         clocks = <&cpg CPG_MOD 715>,
 934                                  <&cpg CPG_CORE R8A7743_CLK_ZS>, <&scif_clk>;
 935                         clock-names = "fck", "brg_int", "scif_clk";
 936                         dmas = <&dmac0 0xfb>, <&dmac0 0xfc>,
 937                                <&dmac1 0xfb>, <&dmac1 0xfc>;
 938                         dma-names = "tx", "rx", "tx", "rx";
 939                         power-domains = <&sysc R8A7743_PD_ALWAYS_ON>;
 940                         resets = <&cpg 715>;
 941                         status = "disabled";
 942                 };
 943
 944                 scif5: serial@e6ee8000 {
 945                         compatible = "renesas,scif-r8a7743",
 946                                      "renesas,rcar-gen2-scif", "renesas,scif";
 947                         reg = <0 0xe6ee8000 0 0x40>;
 948                         interrupts = <GIC_SPI 25 IRQ_TYPE_LEVEL_HIGH>;
 949                         clocks = <&cpg CPG_MOD 714>,
 950                                  <&cpg CPG_CORE R8A7743_CLK_ZS>, <&scif_clk>;
 951                         clock-names = "fck", "brg_int", "scif_clk";
 952                         dmas = <&dmac0 0xfd>, <&dmac0 0xfe>,
 953                                <&dmac1 0xfd>, <&dmac1 0xfe>;
 954                         dma-names = "tx", "rx", "tx", "rx";
 955                         power-domains = <&sysc R8A7743_PD_ALWAYS_ON>;
 956                         resets = <&cpg 714>;
 957                         status = "disabled";
 958                 };
 959
 960                 hscif0: serial@e62c0000 {
 961                         compatible = "renesas,hscif-r8a7743",
 962                                      "renesas,rcar-gen2-hscif", "renesas,hscif";
 963                         reg = <0 0xe62c0000 0 0x60>;
 964                         interrupts = <GIC_SPI 154 IRQ_TYPE_LEVEL_HIGH>;
 965                         clocks = <&cpg CPG_MOD 717>,
 966                                  <&cpg CPG_CORE R8A7743_CLK_ZS>, <&scif_clk>;
 967                         clock-names = "fck", "brg_int", "scif_clk";
 968                         dmas = <&dmac0 0x39>, <&dmac0 0x3a>,
 969                                <&dmac1 0x39>, <&dmac1 0x3a>;
 970                         dma-names = "tx", "rx", "tx", "rx";
 971                         power-domains = <&sysc R8A7743_PD_ALWAYS_ON>;
 972                         resets = <&cpg 717>;
 973                         status = "disabled";
 974                 };
 975
 976                 hscif1: serial@e62c8000 {
 977                         compatible = "renesas,hscif-r8a7743",
 978                                      "renesas,rcar-gen2-hscif", "renesas,hscif";
 979                         reg = <0 0xe62c8000 0 0x60>;
 980                         interrupts = <GIC_SPI 155 IRQ_TYPE_LEVEL_HIGH>;
 981                         clocks = <&cpg CPG_MOD 716>,
 982                                  <&cpg CPG_CORE R8A7743_CLK_ZS>, <&scif_clk>;
 983                         clock-names = "fck", "brg_int", "scif_clk";
 984                         dmas = <&dmac0 0x4d>, <&dmac0 0x4e>,
 985                                <&dmac1 0x4d>, <&dmac1 0x4e>;
 986                         dma-names = "tx", "rx", "tx", "rx";
 987                         power-domains = <&sysc R8A7743_PD_ALWAYS_ON>;
 988                         resets = <&cpg 716>;
 989                         status = "disabled";
 990                 };
 991
 992                 hscif2: serial@e62d0000 {
 993                         compatible = "renesas,hscif-r8a7743",
 994                                      "renesas,rcar-gen2-hscif", "renesas,hscif";
 995                         reg = <0 0xe62d0000 0 0x60>;
 996                         interrupts = <GIC_SPI 21 IRQ_TYPE_LEVEL_HIGH>;
 997                         clocks = <&cpg CPG_MOD 713>,
 998                                  <&cpg CPG_CORE R8A7743_CLK_ZS>, <&scif_clk>;
 999                         clock-names = "fck", "brg_int", "scif_clk";
1000                         dmas = <&dmac0 0x3b>, <&dmac0 0x3c>,
1001                                <&dmac1 0x3b>, <&dmac1 0x3c>;
1002                         dma-names = "tx", "rx", "tx", "rx";
1003                         power-domains = <&sysc R8A7743_PD_ALWAYS_ON>;
1004                         resets = <&cpg 713>;
1005                         status = "disabled";
1006                 };
1007
1008                 msiof0: spi@e6e20000 {
1009                         compatible = "renesas,msiof-r8a7743",
1010                                      "renesas,rcar-gen2-msiof";
1011                         reg = <0 0xe6e20000 0 0x0064>;
1012                         interrupts = <GIC_SPI 156 IRQ_TYPE_LEVEL_HIGH>;
1013                         clocks = <&cpg CPG_MOD 000>;
1014                         dmas = <&dmac0 0x51>, <&dmac0 0x52>,
1015                                <&dmac1 0x51>, <&dmac1 0x52>;
1016                         dma-names = "tx", "rx", "tx", "rx";
1017                         power-domains = <&sysc R8A7743_PD_ALWAYS_ON>;
1018                         #address-cells = <1>;
1019                         #size-cells = <0>;
1020                         resets = <&cpg 000>;
1021                         status = "disabled";
1022                 };
1023
1024                 msiof1: spi@e6e10000 {
1025                         compatible = "renesas,msiof-r8a7743",
1026                                      "renesas,rcar-gen2-msiof";
1027                         reg = <0 0xe6e10000 0 0x0064>;
1028                         interrupts = <GIC_SPI 157 IRQ_TYPE_LEVEL_HIGH>;
1029                         clocks = <&cpg CPG_MOD 208>;
1030                         dmas = <&dmac0 0x55>, <&dmac0 0x56>,
1031                                <&dmac1 0x55>, <&dmac1 0x56>;
1032                         dma-names = "tx", "rx", "tx", "rx";
1033                         power-domains = <&sysc R8A7743_PD_ALWAYS_ON>;
1034                         #address-cells = <1>;
1035                         #size-cells = <0>;
1036                         resets = <&cpg 208>;
1037                         status = "disabled";
1038                 };
1039
1040                 msiof2: spi@e6e00000 {
1041                         compatible = "renesas,msiof-r8a7743",
1042                                      "renesas,rcar-gen2-msiof";
1043                         reg = <0 0xe6e00000 0 0x0064>;
1044                         interrupts = <GIC_SPI 158 IRQ_TYPE_LEVEL_HIGH>;
1045                         clocks = <&cpg CPG_MOD 205>;
1046                         dmas = <&dmac0 0x41>, <&dmac0 0x42>,
1047                                <&dmac1 0x41>, <&dmac1 0x42>;
1048                         dma-names = "tx", "rx", "tx", "rx";
1049                         power-domains = <&sysc R8A7743_PD_ALWAYS_ON>;
1050                         #address-cells = <1>;
1051                         #size-cells = <0>;
1052                         resets = <&cpg 205>;
1053                         status = "disabled";
1054                 };
1055
1056                 pwm0: pwm@e6e30000 {
1057                         compatible = "renesas,pwm-r8a7743", "renesas,pwm-rcar";
1058                         reg = <0 0xe6e30000 0 0x8>;
1059                         clocks = <&cpg CPG_MOD 523>;
1060                         power-domains = <&sysc R8A7743_PD_ALWAYS_ON>;
1061                         resets = <&cpg 523>;
1062                         #pwm-cells = <2>;
1063                         status = "disabled";
1064                 };
1065
1066                 pwm1: pwm@e6e31000 {
1067                         compatible = "renesas,pwm-r8a7743", "renesas,pwm-rcar";
1068                         reg = <0 0xe6e31000 0 0x8>;
1069                         clocks = <&cpg CPG_MOD 523>;
1070                         power-domains = <&sysc R8A7743_PD_ALWAYS_ON>;
1071                         resets = <&cpg 523>;
1072                         #pwm-cells = <2>;
1073                         status = "disabled";
1074                 };
1075
1076                 pwm2: pwm@e6e32000 {
1077                         compatible = "renesas,pwm-r8a7743", "renesas,pwm-rcar";
1078                         reg = <0 0xe6e32000 0 0x8>;
1079                         clocks = <&cpg CPG_MOD 523>;
1080                         power-domains = <&sysc R8A7743_PD_ALWAYS_ON>;
1081                         resets = <&cpg 523>;
1082                         #pwm-cells = <2>;
1083                         status = "disabled";
1084                 };
1085
1086                 pwm3: pwm@e6e33000 {
1087                         compatible = "renesas,pwm-r8a7743", "renesas,pwm-rcar";
1088                         reg = <0 0xe6e33000 0 0x8>;
1089                         clocks = <&cpg CPG_MOD 523>;
1090                         power-domains = <&sysc R8A7743_PD_ALWAYS_ON>;
1091                         resets = <&cpg 523>;
1092                         #pwm-cells = <2>;
1093                         status = "disabled";
1094                 };
1095
1096                 pwm4: pwm@e6e34000 {
1097                         compatible = "renesas,pwm-r8a7743", "renesas,pwm-rcar";
1098                         reg = <0 0xe6e34000 0 0x8>;
1099                         clocks = <&cpg CPG_MOD 523>;
1100                         power-domains = <&sysc R8A7743_PD_ALWAYS_ON>;
1101                         resets = <&cpg 523>;
1102                         #pwm-cells = <2>;
1103                         status = "disabled";
1104                 };
1105
1106                 pwm5: pwm@e6e35000 {
1107                         compatible = "renesas,pwm-r8a7743", "renesas,pwm-rcar";
1108                         reg = <0 0xe6e35000 0 0x8>;
1109                         clocks = <&cpg CPG_MOD 523>;
1110                         power-domains = <&sysc R8A7743_PD_ALWAYS_ON>;
1111                         resets = <&cpg 523>;
1112                         #pwm-cells = <2>;
1113                         status = "disabled";
1114                 };
1115
1116                 pwm6: pwm@e6e36000 {
1117                         compatible = "renesas,pwm-r8a7743", "renesas,pwm-rcar";
1118                         reg = <0 0xe6e36000 0 0x8>;
1119                         clocks = <&cpg CPG_MOD 523>;
1120                         power-domains = <&sysc R8A7743_PD_ALWAYS_ON>;
1121                         resets = <&cpg 523>;
1122                         #pwm-cells = <2>;
1123                         status = "disabled";
1124                 };
1125
1126                 can0: can@e6e80000 {
1127                         compatible = "renesas,can-r8a7743",
1128                                      "renesas,rcar-gen2-can";
1129                         reg = <0 0xe6e80000 0 0x1000>;
1130                         interrupts = <GIC_SPI 186 IRQ_TYPE_LEVEL_HIGH>;
1131                         clocks = <&cpg CPG_MOD 916>,
1132                                  <&cpg CPG_CORE R8A7743_CLK_RCAN>,
1133                                  <&can_clk>;
1134                         clock-names = "clkp1", "clkp2", "can_clk";
1135                         power-domains = <&sysc R8A7743_PD_ALWAYS_ON>;
1136                         resets = <&cpg 916>;
1137                         status = "disabled";
1138                 };
1139
1140                 can1: can@e6e88000 {
1141                         compatible = "renesas,can-r8a7743",
1142                                      "renesas,rcar-gen2-can";
1143                         reg = <0 0xe6e88000 0 0x1000>;
1144                         interrupts = <GIC_SPI 187 IRQ_TYPE_LEVEL_HIGH>;
1145                         clocks = <&cpg CPG_MOD 915>,
1146                                  <&cpg CPG_CORE R8A7743_CLK_RCAN>,
1147                                  <&can_clk>;
1148                         clock-names = "clkp1", "clkp2", "can_clk";
1149                         power-domains = <&sysc R8A7743_PD_ALWAYS_ON>;
1150                         resets = <&cpg 915>;
1151                         status = "disabled";
1152                 };
1153
1154                 vin0: video@e6ef0000 {
1155                         compatible = "renesas,vin-r8a7743",
1156                                      "renesas,rcar-gen2-vin";
1157                         reg = <0 0xe6ef0000 0 0x1000>;
1158                         interrupts = <GIC_SPI 188 IRQ_TYPE_LEVEL_HIGH>;
1159                         clocks = <&cpg CPG_MOD 811>;
1160                         power-domains = <&sysc R8A7743_PD_ALWAYS_ON>;
1161                         resets = <&cpg 811>;
1162                         status = "disabled";
1163                 };
1164
1165                 vin1: video@e6ef1000 {
1166                         compatible = "renesas,vin-r8a7743",
1167                                      "renesas,rcar-gen2-vin";
1168                         reg = <0 0xe6ef1000 0 0x1000>;
1169                         interrupts = <GIC_SPI 189 IRQ_TYPE_LEVEL_HIGH>;
1170                         clocks = <&cpg CPG_MOD 810>;
1171                         power-domains = <&sysc R8A7743_PD_ALWAYS_ON>;
1172                         resets = <&cpg 810>;
1173                         status = "disabled";
1174                 };
1175
1176                 vin2: video@e6ef2000 {
1177                         compatible = "renesas,vin-r8a7743",
1178                                      "renesas,rcar-gen2-vin";
1179                         reg = <0 0xe6ef2000 0 0x1000>;
1180                         interrupts = <GIC_SPI 190 IRQ_TYPE_LEVEL_HIGH>;
1181                         clocks = <&cpg CPG_MOD 809>;
1182                         power-domains = <&sysc R8A7743_PD_ALWAYS_ON>;
1183                         resets = <&cpg 809>;
1184                         status = "disabled";
1185                 };
1186
1187                 rcar_sound: sound@ec500000 {
1188                         /*
1189                          * #sound-dai-cells is required
1190                          *
1191                          * Single DAI : #sound-dai-cells = <0>;         <&rcar_sound>;
1192                          * Multi  DAI : #sound-dai-cells = <1>;         <&rcar_sound N>;
1193                          */
1194                         compatible = "renesas,rcar_sound-r8a7743",
1195                                      "renesas,rcar_sound-gen2";
1196                         reg = <0 0xec500000 0 0x1000>, /* SCU */
1197                               <0 0xec5a0000 0 0x100>,  /* ADG */
1198                               <0 0xec540000 0 0x1000>, /* SSIU */
1199                               <0 0xec541000 0 0x280>,  /* SSI */
1200                               <0 0xec740000 0 0x200>;  /* Audio DMAC peri peri*/
1201                         reg-names = "scu", "adg", "ssiu", "ssi", "audmapp";
1202
1203                         clocks = <&cpg CPG_MOD 1005>,
1204                                  <&cpg CPG_MOD 1006>, <&cpg CPG_MOD 1007>,
1205                                  <&cpg CPG_MOD 1008>, <&cpg CPG_MOD 1009>,
1206                                  <&cpg CPG_MOD 1010>, <&cpg CPG_MOD 1011>,
1207                                  <&cpg CPG_MOD 1012>, <&cpg CPG_MOD 1013>,
1208                                  <&cpg CPG_MOD 1014>, <&cpg CPG_MOD 1015>,
1209                                  <&cpg CPG_MOD 1022>, <&cpg CPG_MOD 1023>,
1210                                  <&cpg CPG_MOD 1024>, <&cpg CPG_MOD 1025>,
1211                                  <&cpg CPG_MOD 1026>, <&cpg CPG_MOD 1027>,
1212                                  <&cpg CPG_MOD 1028>, <&cpg CPG_MOD 1029>,
1213                                  <&cpg CPG_MOD 1030>, <&cpg CPG_MOD 1031>,
1214                                  <&cpg CPG_MOD 1021>, <&cpg CPG_MOD 1020>,
1215                                  <&cpg CPG_MOD 1021>, <&cpg CPG_MOD 1020>,
1216                                  <&cpg CPG_MOD 1019>, <&cpg CPG_MOD 1018>,
1217                                  <&audio_clk_a>, <&audio_clk_b>, <&audio_clk_c>,
1218                                  <&cpg CPG_CORE R8A7743_CLK_M2>;
1219                         clock-names = "ssi-all",
1220                                       "ssi.9", "ssi.8", "ssi.7", "ssi.6", "ssi.5",
1221                                       "ssi.4", "ssi.3", "ssi.2", "ssi.1", "ssi.0",
1222                                       "src.9", "src.8", "src.7", "src.6", "src.5",
1223                                       "src.4", "src.3", "src.2", "src.1", "src.0",
1224                                       "ctu.0", "ctu.1",
1225                                       "mix.0", "mix.1",
1226                                       "dvc.0", "dvc.1",
1227                                       "clk_a", "clk_b", "clk_c", "clk_i";
1228                         power-domains = <&sysc R8A7743_PD_ALWAYS_ON>;
1229                         resets = <&cpg 1005>,
1230                                  <&cpg 1006>, <&cpg 1007>, <&cpg 1008>, <&cpg 1009>,
1231                                  <&cpg 1010>, <&cpg 1011>, <&cpg 1012>, <&cpg 1013>,
1232                                  <&cpg 1014>, <&cpg 1015>;
1233                         reset-names = "ssi-all",
1234                                       "ssi.9", "ssi.8", "ssi.7", "ssi.6", "ssi.5",
1235                                       "ssi.4", "ssi.3", "ssi.2", "ssi.1", "ssi.0";
1236                         status = "disabled";
1237
1238                         rcar_sound,dvc {
1239                                 dvc0: dvc-0 {
1240                                         dmas = <&audma1 0xbc>;
1241                                         dma-names = "tx";
1242                                 };
1243                                 dvc1: dvc-1 {
1244                                         dmas = <&audma1 0xbe>;
1245                                         dma-names = "tx";
1246                                 };
1247                         };
1248
1249                         rcar_sound,mix {
1250                                 mix0: mix-0 { };
1251                                 mix1: mix-1 { };
1252                         };
1253
1254                         rcar_sound,ctu {
1255                                 ctu00: ctu-0 { };
1256                                 ctu01: ctu-1 { };
1257                                 ctu02: ctu-2 { };
1258                                 ctu03: ctu-3 { };
1259                                 ctu10: ctu-4 { };
1260                                 ctu11: ctu-5 { };
1261                                 ctu12: ctu-6 { };
1262                                 ctu13: ctu-7 { };
1263                         };
1264
1265                         rcar_sound,src {
1266                                 src0: src-0 {
1267                                         interrupts = <GIC_SPI 352 IRQ_TYPE_LEVEL_HIGH>;
1268                                         dmas = <&audma0 0x85>, <&audma1 0x9a>;
1269                                         dma-names = "rx", "tx";
1270                                 };
1271                                 src1: src-1 {
1272                                         interrupts = <GIC_SPI 353 IRQ_TYPE_LEVEL_HIGH>;
1273                                         dmas = <&audma0 0x87>, <&audma1 0x9c>;
1274                                         dma-names = "rx", "tx";
1275                                 };
1276                                 src2: src-2 {
1277                                         interrupts = <GIC_SPI 354 IRQ_TYPE_LEVEL_HIGH>;
1278                                         dmas = <&audma0 0x89>, <&audma1 0x9e>;
1279                                         dma-names = "rx", "tx";
1280                                 };
1281                                 src3: src-3 {
1282                                         interrupts = <GIC_SPI 355 IRQ_TYPE_LEVEL_HIGH>;
1283                                         dmas = <&audma0 0x8b>, <&audma1 0xa0>;
1284                                         dma-names = "rx", "tx";
1285                                 };
1286                                 src4: src-4 {
1287                                         interrupts = <GIC_SPI 356 IRQ_TYPE_LEVEL_HIGH>;
1288                                         dmas = <&audma0 0x8d>, <&audma1 0xb0>;
1289                                         dma-names = "rx", "tx";
1290                                 };
1291                                 src5: src-5 {
1292                                         interrupts = <GIC_SPI 357 IRQ_TYPE_LEVEL_HIGH>;
1293                                         dmas = <&audma0 0x8f>, <&audma1 0xb2>;
1294                                         dma-names = "rx", "tx";
1295                                 };
1296                                 src6: src-6 {
1297                                         interrupts = <GIC_SPI 358 IRQ_TYPE_LEVEL_HIGH>;
1298                                         dmas = <&audma0 0x91>, <&audma1 0xb4>;
1299                                         dma-names = "rx", "tx";
1300                                 };
1301                                 src7: src-7 {
1302                                         interrupts = <GIC_SPI 359 IRQ_TYPE_LEVEL_HIGH>;
1303                                         dmas = <&audma0 0x93>, <&audma1 0xb6>;
1304                                         dma-names = "rx", "tx";
1305                                 };
1306                                 src8: src-8 {
1307                                         interrupts = <GIC_SPI 360 IRQ_TYPE_LEVEL_HIGH>;
1308                                         dmas = <&audma0 0x95>, <&audma1 0xb8>;
1309                                         dma-names = "rx", "tx";
1310                                 };
1311                                 src9: src-9 {
1312                                         interrupts = <GIC_SPI 361 IRQ_TYPE_LEVEL_HIGH>;
1313                                         dmas = <&audma0 0x97>, <&audma1 0xba>;
1314                                         dma-names = "rx", "tx";
1315                                 };
1316                         };
1317
1318                         rcar_sound,ssi {
1319                                 ssi0: ssi-0 {
1320                                         interrupts = <GIC_SPI 370 IRQ_TYPE_LEVEL_HIGH>;
1321                                         dmas = <&audma0 0x01>, <&audma1 0x02>, <&audma0 0x15>, <&audma1 0x16>;
1322                                         dma-names = "rx", "tx", "rxu", "txu";
1323                                 };
1324                                 ssi1: ssi-1 {
1325                                         interrupts = <GIC_SPI 371 IRQ_TYPE_LEVEL_HIGH>;
1326                                         dmas = <&audma0 0x03>, <&audma1 0x04>, <&audma0 0x49>, <&audma1 0x4a>;
1327                                         dma-names = "rx", "tx", "rxu", "txu";
1328                                 };
1329                                 ssi2: ssi-2 {
1330                                         interrupts = <GIC_SPI 372 IRQ_TYPE_LEVEL_HIGH>;
1331                                         dmas = <&audma0 0x05>, <&audma1 0x06>, <&audma0 0x63>, <&audma1 0x64>;
1332                                         dma-names = "rx", "tx", "rxu", "txu";
1333                                 };
1334                                 ssi3: ssi-3 {
1335                                         interrupts = <GIC_SPI 373 IRQ_TYPE_LEVEL_HIGH>;
1336                                         dmas = <&audma0 0x07>, <&audma1 0x08>, <&audma0 0x6f>, <&audma1 0x70>;
1337                                         dma-names = "rx", "tx", "rxu", "txu";
1338                                 };
1339                                 ssi4: ssi-4 {
1340                                         interrupts = <GIC_SPI 374 IRQ_TYPE_LEVEL_HIGH>;
1341                                         dmas = <&audma0 0x09>, <&audma1 0x0a>, <&audma0 0x71>, <&audma1 0x72>;
1342                                         dma-names = "rx", "tx", "rxu", "txu";
1343                                 };
1344                                 ssi5: ssi-5 {
1345                                         interrupts = <GIC_SPI 375 IRQ_TYPE_LEVEL_HIGH>;
1346                                         dmas = <&audma0 0x0b>, <&audma1 0x0c>, <&audma0 0x73>, <&audma1 0x74>;
1347                                         dma-names = "rx", "tx", "rxu", "txu";
1348                                 };
1349                                 ssi6: ssi-6 {
1350                                         interrupts = <GIC_SPI 376 IRQ_TYPE_LEVEL_HIGH>;
1351                                         dmas = <&audma0 0x0d>, <&audma1 0x0e>, <&audma0 0x75>, <&audma1 0x76>;
1352                                         dma-names = "rx", "tx", "rxu", "txu";
1353                                 };
1354                                 ssi7: ssi-7 {
1355                                         interrupts = <GIC_SPI 377 IRQ_TYPE_LEVEL_HIGH>;
1356                                         dmas = <&audma0 0x0f>, <&audma1 0x10>, <&audma0 0x79>, <&audma1 0x7a>;
1357                                         dma-names = "rx", "tx", "rxu", "txu";
1358                                 };
1359                                 ssi8: ssi-8 {
1360                                         interrupts = <GIC_SPI 378 IRQ_TYPE_LEVEL_HIGH>;
1361                                         dmas = <&audma0 0x11>, <&audma1 0x12>, <&audma0 0x7b>, <&audma1 0x7c>;
1362                                         dma-names = "rx", "tx", "rxu", "txu";
1363                                 };
1364                                 ssi9: ssi-9 {
1365                                         interrupts = <GIC_SPI 379 IRQ_TYPE_LEVEL_HIGH>;
1366                                         dmas = <&audma0 0x13>, <&audma1 0x14>, <&audma0 0x7d>, <&audma1 0x7e>;
1367                                         dma-names = "rx", "tx", "rxu", "txu";
1368                                 };
1369                         };
1370                 };
1371
1372                 audma0: dma-controller@ec700000 {
1373                         compatible = "renesas,dmac-r8a7743",
1374                                      "renesas,rcar-dmac";
1375                         reg = <0 0xec700000 0 0x10000>;
1376                         interrupts = <GIC_SPI 346 IRQ_TYPE_LEVEL_HIGH>,
1377                                      <GIC_SPI 320 IRQ_TYPE_LEVEL_HIGH>,
1378                                      <GIC_SPI 321 IRQ_TYPE_LEVEL_HIGH>,
1379                                      <GIC_SPI 322 IRQ_TYPE_LEVEL_HIGH>,
1380                                      <GIC_SPI 323 IRQ_TYPE_LEVEL_HIGH>,
1381                                      <GIC_SPI 324 IRQ_TYPE_LEVEL_HIGH>,
1382                                      <GIC_SPI 325 IRQ_TYPE_LEVEL_HIGH>,
1383                                      <GIC_SPI 326 IRQ_TYPE_LEVEL_HIGH>,
1384                                      <GIC_SPI 327 IRQ_TYPE_LEVEL_HIGH>,
1385                                      <GIC_SPI 328 IRQ_TYPE_LEVEL_HIGH>,
1386                                      <GIC_SPI 329 IRQ_TYPE_LEVEL_HIGH>,
1387                                      <GIC_SPI 330 IRQ_TYPE_LEVEL_HIGH>,
1388                                      <GIC_SPI 331 IRQ_TYPE_LEVEL_HIGH>,
1389                                      <GIC_SPI 332 IRQ_TYPE_LEVEL_HIGH>;
1390                         interrupt-names = "error",
1391                                           "ch0", "ch1", "ch2", "ch3",
1392                                           "ch4", "ch5", "ch6", "ch7",
1393                                           "ch8", "ch9", "ch10", "ch11",
1394                                           "ch12";
1395                         clocks = <&cpg CPG_MOD 502>;
1396                         clock-names = "fck";
1397                         power-domains = <&sysc R8A7743_PD_ALWAYS_ON>;
1398                         resets = <&cpg 502>;
1399                         #dma-cells = <1>;
1400                         dma-channels = <13>;
1401                 };
1402
1403                 audma1: dma-controller@ec720000 {
1404                         compatible = "renesas,dmac-r8a7743",
1405                                      "renesas,rcar-dmac";
1406                         reg = <0 0xec720000 0 0x10000>;
1407                         interrupts = <GIC_SPI 347 IRQ_TYPE_LEVEL_HIGH>,
1408                                      <GIC_SPI 333 IRQ_TYPE_LEVEL_HIGH>,
1409                                      <GIC_SPI 334 IRQ_TYPE_LEVEL_HIGH>,
1410                                      <GIC_SPI 335 IRQ_TYPE_LEVEL_HIGH>,
1411                                      <GIC_SPI 336 IRQ_TYPE_LEVEL_HIGH>,
1412                                      <GIC_SPI 337 IRQ_TYPE_LEVEL_HIGH>,
1413                                      <GIC_SPI 338 IRQ_TYPE_LEVEL_HIGH>,
1414                                      <GIC_SPI 339 IRQ_TYPE_LEVEL_HIGH>,
1415                                      <GIC_SPI 340 IRQ_TYPE_LEVEL_HIGH>,
1416                                      <GIC_SPI 341 IRQ_TYPE_LEVEL_HIGH>,
1417                                      <GIC_SPI 342 IRQ_TYPE_LEVEL_HIGH>,
1418                                      <GIC_SPI 343 IRQ_TYPE_LEVEL_HIGH>,
1419                                      <GIC_SPI 344 IRQ_TYPE_LEVEL_HIGH>,
1420                                      <GIC_SPI 345 IRQ_TYPE_LEVEL_HIGH>;
1421                         interrupt-names = "error",
1422                                           "ch0", "ch1", "ch2", "ch3",
1423                                           "ch4", "ch5", "ch6", "ch7",
1424                                           "ch8", "ch9", "ch10", "ch11",
1425                                           "ch12";
1426                         clocks = <&cpg CPG_MOD 501>;
1427                         clock-names = "fck";
1428                         power-domains = <&sysc R8A7743_PD_ALWAYS_ON>;
1429                         resets = <&cpg 501>;
1430                         #dma-cells = <1>;
1431                         dma-channels = <13>;
1432                 };
1433
1434                 /*
1435                  * pci1 and xhci share the same phy, therefore only one of them
1436                  * can be active at any one time. If both of them are enabled,
1437                  * a race condition will determine who'll control the phy.
1438                  * A firmware file is needed by the xhci driver in order for
1439                  * USB 3.0 to work properly.
1440                  */
1441                 xhci: usb@ee000000 {
1442                         compatible = "renesas,xhci-r8a7743",
1443                                      "renesas,rcar-gen2-xhci";
1444                         reg = <0 0xee000000 0 0xc00>;
1445                         interrupts = <GIC_SPI 101 IRQ_TYPE_LEVEL_HIGH>;
1446                         clocks = <&cpg CPG_MOD 328>;
1447                         power-domains = <&sysc R8A7743_PD_ALWAYS_ON>;
1448                         resets = <&cpg 328>;
1449                         phys = <&usb2 1>;
1450                         phy-names = "usb";
1451                         status = "disabled";
1452                 };
1453
1454                 pci0: pci@ee090000 {
1455                         compatible = "renesas,pci-r8a7743",
1456                                      "renesas,pci-rcar-gen2";
1457                         device_type = "pci";
1458                         reg = <0 0xee090000 0 0xc00>,
1459                               <0 0xee080000 0 0x1100>;
1460                         interrupts = <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>;
1461                         clocks = <&cpg CPG_MOD 703>;
1462                         power-domains = <&sysc R8A7743_PD_ALWAYS_ON>;
1463                         resets = <&cpg 703>;
1464                         status = "disabled";
1465
1466                         bus-range = <0 0>;
1467                         #address-cells = <3>;
1468                         #size-cells = <2>;
1469                         #interrupt-cells = <1>;
1470                         ranges = <0x02000000 0 0xee080000 0 0xee080000 0 0x00010000>;
1471                         interrupt-map-mask = <0xf800 0 0 0x7>;
1472                         interrupt-map = <0x0000 0 0 1 &gic GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>,
1473                                         <0x0800 0 0 1 &gic GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>,
1474                                         <0x1000 0 0 2 &gic GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>;
1475
1476                         usb@1,0 {
1477                                 reg = <0x800 0 0 0 0>;
1478                                 phys = <&usb0 0>;
1479                                 phy-names = "usb";
1480                         };
1481
1482                         usb@2,0 {
1483                                 reg = <0x1000 0 0 0 0>;
1484                                 phys = <&usb0 0>;
1485                                 phy-names = "usb";
1486                         };
1487                 };
1488
1489                 pci1: pci@ee0d0000 {
1490                         compatible = "renesas,pci-r8a7743",
1491                                      "renesas,pci-rcar-gen2";
1492                         device_type = "pci";
1493                         reg = <0 0xee0d0000 0 0xc00>,
1494                               <0 0xee0c0000 0 0x1100>;
1495                         interrupts = <GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH>;
1496                         clocks = <&cpg CPG_MOD 703>;
1497                         power-domains = <&sysc R8A7743_PD_ALWAYS_ON>;
1498                         resets = <&cpg 703>;
1499                         status = "disabled";
1500
1501                         bus-range = <1 1>;
1502                         #address-cells = <3>;
1503                         #size-cells = <2>;
1504                         #interrupt-cells = <1>;
1505                         ranges = <0x02000000 0 0xee0c0000 0 0xee0c0000 0 0x00010000>;
1506                         interrupt-map-mask = <0xf800 0 0 0x7>;
1507                         interrupt-map = <0x0000 0 0 1 &gic GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH>,
1508                                         <0x0800 0 0 1 &gic GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH>,
1509                                         <0x1000 0 0 2 &gic GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH>;
1510
1511                         usb@1,0 {
1512                                 reg = <0x10800 0 0 0 0>;
1513                                 phys = <&usb2 0>;
1514                                 phy-names = "usb";
1515                         };
1516
1517                         usb@2,0 {
1518                                 reg = <0x11000 0 0 0 0>;
1519                                 phys = <&usb2 0>;
1520                                 phy-names = "usb";
1521                         };
1522                 };
1523
1524                 sdhi0: mmc@ee100000 {
1525                         compatible = "renesas,sdhi-r8a7743",
1526                                      "renesas,rcar-gen2-sdhi";
1527                         reg = <0 0xee100000 0 0x328>;
1528                         interrupts = <GIC_SPI 165 IRQ_TYPE_LEVEL_HIGH>;
1529                         clocks = <&cpg CPG_MOD 314>;
1530                         dmas = <&dmac0 0xcd>, <&dmac0 0xce>,
1531                                <&dmac1 0xcd>, <&dmac1 0xce>;
1532                         dma-names = "tx", "rx", "tx", "rx";
1533                         max-frequency = <195000000>;
1534                         power-domains = <&sysc R8A7743_PD_ALWAYS_ON>;
1535                         resets = <&cpg 314>;
1536                         status = "disabled";
1537                 };
1538
1539                 sdhi1: mmc@ee140000 {
1540                         compatible = "renesas,sdhi-r8a7743",
1541                                      "renesas,rcar-gen2-sdhi";
1542                         reg = <0 0xee140000 0 0x100>;
1543                         interrupts = <GIC_SPI 167 IRQ_TYPE_LEVEL_HIGH>;
1544                         clocks = <&cpg CPG_MOD 312>;
1545                         dmas = <&dmac0 0xc1>, <&dmac0 0xc2>,
1546                                <&dmac1 0xc1>, <&dmac1 0xc2>;
1547                         dma-names = "tx", "rx", "tx", "rx";
1548                         max-frequency = <97500000>;
1549                         power-domains = <&sysc R8A7743_PD_ALWAYS_ON>;
1550                         resets = <&cpg 312>;
1551                         status = "disabled";
1552                 };
1553
1554                 sdhi2: mmc@ee160000 {
1555                         compatible = "renesas,sdhi-r8a7743",
1556                                      "renesas,rcar-gen2-sdhi";
1557                         reg = <0 0xee160000 0 0x100>;
1558                         interrupts = <GIC_SPI 168 IRQ_TYPE_LEVEL_HIGH>;
1559                         clocks = <&cpg CPG_MOD 311>;
1560                         dmas = <&dmac0 0xd3>, <&dmac0 0xd4>,
1561                                <&dmac1 0xd3>, <&dmac1 0xd4>;
1562                         dma-names = "tx", "rx", "tx", "rx";
1563                         max-frequency = <97500000>;
1564                         power-domains = <&sysc R8A7743_PD_ALWAYS_ON>;
1565                         resets = <&cpg 311>;
1566                         status = "disabled";
1567                 };
1568
1569                 mmcif0: mmc@ee200000 {
1570                         compatible = "renesas,mmcif-r8a7743",
1571                                      "renesas,sh-mmcif";
1572                         reg = <0 0xee200000 0 0x80>;
1573                         interrupts = <GIC_SPI 169 IRQ_TYPE_LEVEL_HIGH>;
1574                         clocks = <&cpg CPG_MOD 315>;
1575                         dmas = <&dmac0 0xd1>, <&dmac0 0xd2>,
1576                                <&dmac1 0xd1>, <&dmac1 0xd2>;
1577                         dma-names = "tx", "rx", "tx", "rx";
1578                         power-domains = <&sysc R8A7743_PD_ALWAYS_ON>;
1579                         resets = <&cpg 315>;
1580                         reg-io-width = <4>;
1581                         max-frequency = <97500000>;
1582                         status = "disabled";
1583                 };
1584
1585                 ether: ethernet@ee700000 {
1586                         compatible = "renesas,ether-r8a7743",
1587                                      "renesas,rcar-gen2-ether";
1588                         reg = <0 0xee700000 0 0x400>;
1589                         interrupts = <GIC_SPI 162 IRQ_TYPE_LEVEL_HIGH>;
1590                         clocks = <&cpg CPG_MOD 813>;
1591                         power-domains = <&sysc R8A7743_PD_ALWAYS_ON>;
1592                         resets = <&cpg 813>;
1593                         phy-mode = "rmii";
1594                         #address-cells = <1>;
1595                         #size-cells = <0>;
1596                         status = "disabled";
1597                 };
1598
1599                 gic: interrupt-controller@f1001000 {
1600                         compatible = "arm,gic-400";
1601                         #interrupt-cells = <3>;
1602                         #address-cells = <0>;
1603                         interrupt-controller;
1604                         reg = <0 0xf1001000 0 0x1000>, <0 0xf1002000 0 0x2000>,
1605                               <0 0xf1004000 0 0x2000>, <0 0xf1006000 0 0x2000>;
1606                         interrupts = <GIC_PPI 9 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_HIGH)>;
1607                         clocks = <&cpg CPG_MOD 408>;
1608                         clock-names = "clk";
1609                         power-domains = <&sysc R8A7743_PD_ALWAYS_ON>;
1610                         resets = <&cpg 408>;
1611                 };
1612
1613                 pciec: pcie@fe000000 {
1614                         compatible = "renesas,pcie-r8a7743",
1615                                      "renesas,pcie-rcar-gen2";
1616                         reg = <0 0xfe000000 0 0x80000>;
1617                         #address-cells = <3>;
1618                         #size-cells = <2>;
1619                         bus-range = <0x00 0xff>;
1620                         device_type = "pci";
1621                         ranges = <0x01000000 0 0x00000000 0 0xfe100000 0 0x00100000>,
1622                                  <0x02000000 0 0xfe200000 0 0xfe200000 0 0x00200000>,
1623                                  <0x02000000 0 0x30000000 0 0x30000000 0 0x08000000>,
1624                                  <0x42000000 0 0x38000000 0 0x38000000 0 0x08000000>;
1625                         /* Map all possible DDR as inbound ranges */
1626                         dma-ranges = <0x42000000 0 0x40000000 0 0x40000000 0 0x80000000>,
1627                                      <0x43000000 2 0x00000000 2 0x00000000 1 0x00000000>;
1628                         interrupts = <GIC_SPI 116 IRQ_TYPE_LEVEL_HIGH>,
1629                                      <GIC_SPI 117 IRQ_TYPE_LEVEL_HIGH>,
1630                                      <GIC_SPI 118 IRQ_TYPE_LEVEL_HIGH>;
1631                         #interrupt-cells = <1>;
1632                         interrupt-map-mask = <0 0 0 0>;
1633                         interrupt-map = <0 0 0 0 &gic GIC_SPI 116 IRQ_TYPE_LEVEL_HIGH>;
1634                         clocks = <&cpg CPG_MOD 319>, <&pcie_bus_clk>;
1635                         clock-names = "pcie", "pcie_bus";
1636                         power-domains = <&sysc R8A7743_PD_ALWAYS_ON>;
1637                         resets = <&cpg 319>;
1638                         status = "disabled";
1639                 };
1640
1641                 vsp@fe928000 {
1642                         compatible = "renesas,vsp1";
1643                         reg = <0 0xfe928000 0 0x8000>;
1644                         interrupts = <GIC_SPI 267 IRQ_TYPE_LEVEL_HIGH>;
1645                         clocks = <&cpg CPG_MOD 131>;
1646                         power-domains = <&sysc R8A7743_PD_ALWAYS_ON>;
1647                         resets = <&cpg 131>;
1648                 };
1649
1650                 vsp@fe930000 {
1651                         compatible = "renesas,vsp1";
1652                         reg = <0 0xfe930000 0 0x8000>;
1653                         interrupts = <GIC_SPI 246 IRQ_TYPE_LEVEL_HIGH>;
1654                         clocks = <&cpg CPG_MOD 128>;
1655                         power-domains = <&sysc R8A7743_PD_ALWAYS_ON>;
1656                         resets = <&cpg 128>;
1657                 };
1658
1659                 vsp@fe938000 {
1660                         compatible = "renesas,vsp1";
1661                         reg = <0 0xfe938000 0 0x8000>;
1662                         interrupts = <GIC_SPI 247 IRQ_TYPE_LEVEL_HIGH>;
1663                         clocks = <&cpg CPG_MOD 127>;
1664                         power-domains = <&sysc R8A7743_PD_ALWAYS_ON>;
1665                         resets = <&cpg 127>;
1666                 };
1667
1668                 du: display@feb00000 {
1669                         compatible = "renesas,du-r8a7743";
1670                         reg = <0 0xfeb00000 0 0x40000>;
1671                         interrupts = <GIC_SPI 256 IRQ_TYPE_LEVEL_HIGH>,
1672                                      <GIC_SPI 268 IRQ_TYPE_LEVEL_HIGH>;
1673                         clocks = <&cpg CPG_MOD 724>, <&cpg CPG_MOD 723>;
1674                         clock-names = "du.0", "du.1";
1675                         resets = <&cpg 724>;
1676                         reset-names = "du.0";
1677                         status = "disabled";
1678
1679                         ports {
1680                                 #address-cells = <1>;
1681                                 #size-cells = <0>;
1682
1683                                 port@0 {
1684                                         reg = <0>;
1685                                         du_out_rgb: endpoint {
1686                                         };
1687                                 };
1688                                 port@1 {
1689                                         reg = <1>;
1690                                         du_out_lvds0: endpoint {
1691                                                 remote-endpoint = <&lvds0_in>;
1692                                         };
1693                                 };
1694                         };
1695                 };
1696
1697                 lvds0: lvds@feb90000 {
1698                         compatible = "renesas,r8a7743-lvds";
1699                         reg = <0 0xfeb90000 0 0x1c>;
1700                         clocks = <&cpg CPG_MOD 726>;
1701                         power-domains = <&sysc R8A7743_PD_ALWAYS_ON>;
1702                         resets = <&cpg 726>;
1703                         status = "disabled";
1704
1705                         ports {
1706                                 #address-cells = <1>;
1707                                 #size-cells = <0>;
1708
1709                                 port@0 {
1710                                         reg = <0>;
1711                                         lvds0_in: endpoint {
1712                                                 remote-endpoint = <&du_out_lvds0>;
1713                                         };
1714                                 };
1715                                 port@1 {
1716                                         reg = <1>;
1717                                         lvds0_out: endpoint {
1718                                         };
1719                                 };
1720                         };
1721                 };
1722
1723                 prr: chipid@ff000044 {
1724                         compatible = "renesas,prr";
1725                         reg = <0 0xff000044 0 4>;
1726                 };
1727
1728                 cmt0: timer@ffca0000 {
1729                         compatible = "renesas,r8a7743-cmt0",
1730                                      "renesas,rcar-gen2-cmt0";
1731                         reg = <0 0xffca0000 0 0x1004>;
1732                         interrupts = <GIC_SPI 142 IRQ_TYPE_LEVEL_HIGH>,
1733                                      <GIC_SPI 143 IRQ_TYPE_LEVEL_HIGH>;
1734                         clocks = <&cpg CPG_MOD 124>;
1735                         clock-names = "fck";
1736                         power-domains = <&sysc R8A7743_PD_ALWAYS_ON>;
1737                         resets = <&cpg 124>;
1738                         status = "disabled";
1739                 };
1740
1741                 cmt1: timer@e6130000 {
1742                         compatible = "renesas,r8a7743-cmt1",
1743                                      "renesas,rcar-gen2-cmt1";
1744                         reg = <0 0xe6130000 0 0x1004>;
1745                         interrupts = <GIC_SPI 120 IRQ_TYPE_LEVEL_HIGH>,
1746                                      <GIC_SPI 121 IRQ_TYPE_LEVEL_HIGH>,
1747                                      <GIC_SPI 122 IRQ_TYPE_LEVEL_HIGH>,
1748                                      <GIC_SPI 123 IRQ_TYPE_LEVEL_HIGH>,
1749                                      <GIC_SPI 124 IRQ_TYPE_LEVEL_HIGH>,
1750                                      <GIC_SPI 125 IRQ_TYPE_LEVEL_HIGH>,
1751                                      <GIC_SPI 126 IRQ_TYPE_LEVEL_HIGH>,
1752                                      <GIC_SPI 127 IRQ_TYPE_LEVEL_HIGH>;
1753                         clocks = <&cpg CPG_MOD 329>;
1754                         clock-names = "fck";
1755                         power-domains = <&sysc R8A7743_PD_ALWAYS_ON>;
1756                         resets = <&cpg 329>;
1757                         status = "disabled";
1758                 };
1759         };
1760
1761         thermal-zones {
1762                 cpu_thermal: cpu-thermal {
1763                         polling-delay-passive = <0>;
1764                         polling-delay = <0>;
1765
1766                         thermal-sensors = <&thermal>;
1767
1768                         trips {
1769                                 cpu-crit {
1770                                         temperature = <95000>;
1771                                         hysteresis = <0>;
1772                                         type = "critical";
1773                                 };
1774                         };
1775
1776                         cooling-maps {
1777                         };
1778                 };
1779         };
1780
1781         timer {
1782                 compatible = "arm,armv7-timer";
1783                 interrupts-extended = <&gic GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>,
1784                                       <&gic GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>,
1785                                       <&gic GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>,
1786                                       <&gic GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>;
1787         };
1788
1789         /* External USB clock - can be overridden by the board */
1790         usb_extal_clk: usb_extal {
1791                 compatible = "fixed-clock";
1792                 #clock-cells = <0>;
1793                 clock-frequency = <48000000>;
1794         };
1795 };