arch/arm/boot/dts/r8a7742.dtsi

   1 // SPDX-License-Identifier: GPL-2.0
   2 /*
   3  * Device Tree Source for the r8a7742 SoC
   4  *
   5  * Copyright (C) 2020 Renesas Electronics Corp.
   6  */
   7
   8 #include <dt-bindings/clock/r8a7742-cpg-mssr.h>
   9 #include <dt-bindings/interrupt-controller/arm-gic.h>
  10 #include <dt-bindings/interrupt-controller/irq.h>
  11 #include <dt-bindings/power/r8a7742-sysc.h>
  12
  13 / {
  14         compatible = "renesas,r8a7742";
  15         #address-cells = <2>;
  16         #size-cells = <2>;
  17
  18         /*
  19          * The external audio clocks are configured as 0 Hz fixed frequency
  20          * clocks by default.
  21          * Boards that provide audio clocks should override them.
  22          */
  23         audio_clk_a: audio_clk_a {
  24                 compatible = "fixed-clock";
  25                 #clock-cells = <0>;
  26                 clock-frequency = <0>;
  27         };
  28         audio_clk_b: audio_clk_b {
  29                 compatible = "fixed-clock";
  30                 #clock-cells = <0>;
  31                 clock-frequency = <0>;
  32         };
  33         audio_clk_c: audio_clk_c {
  34                 compatible = "fixed-clock";
  35                 #clock-cells = <0>;
  36                 clock-frequency = <0>;
  37         };
  38
  39         cpus {
  40                 #address-cells = <1>;
  41                 #size-cells = <0>;
  42                 enable-method = "renesas,apmu";
  43
  44                 cpu0: cpu@0 {
  45                         device_type = "cpu";
  46                         compatible = "arm,cortex-a15";
  47                         reg = <0>;
  48                         clock-frequency = <1400000000>;
  49                         clocks = <&cpg CPG_CORE R8A7742_CLK_Z>;
  50                         power-domains = <&sysc R8A7742_PD_CA15_CPU0>;
  51                         next-level-cache = <&L2_CA15>;
  52                         capacity-dmips-mhz = <1024>;
  53                         voltage-tolerance = <1>; /* 1% */
  54                         clock-latency = <300000>; /* 300 us */
  55
  56                         /* kHz - uV - OPPs unknown yet */
  57                         operating-points = <1400000 1000000>,
  58                                            <1225000 1000000>,
  59                                            <1050000 1000000>,
  60                                            < 875000 1000000>,
  61                                            < 700000 1000000>,
  62                                            < 350000 1000000>;
  63                 };
  64
  65                 cpu1: cpu@1 {
  66                         device_type = "cpu";
  67                         compatible = "arm,cortex-a15";
  68                         reg = <1>;
  69                         clock-frequency = <1400000000>;
  70                         clocks = <&cpg CPG_CORE R8A7742_CLK_Z>;
  71                         power-domains = <&sysc R8A7742_PD_CA15_CPU1>;
  72                         next-level-cache = <&L2_CA15>;
  73                         capacity-dmips-mhz = <1024>;
  74                         voltage-tolerance = <1>; /* 1% */
  75                         clock-latency = <300000>; /* 300 us */
  76
  77                         /* kHz - uV - OPPs unknown yet */
  78                         operating-points = <1400000 1000000>,
  79                                            <1225000 1000000>,
  80                                            <1050000 1000000>,
  81                                            < 875000 1000000>,
  82                                            < 700000 1000000>,
  83                                            < 350000 1000000>;
  84                 };
  85
  86                 cpu2: cpu@2 {
  87                         device_type = "cpu";
  88                         compatible = "arm,cortex-a15";
  89                         reg = <2>;
  90                         clock-frequency = <1400000000>;
  91                         clocks = <&cpg CPG_CORE R8A7742_CLK_Z>;
  92                         power-domains = <&sysc R8A7742_PD_CA15_CPU2>;
  93                         next-level-cache = <&L2_CA15>;
  94                         capacity-dmips-mhz = <1024>;
  95                         voltage-tolerance = <1>; /* 1% */
  96                         clock-latency = <300000>; /* 300 us */
  97
  98                         /* kHz - uV - OPPs unknown yet */
  99                         operating-points = <1400000 1000000>,
 100                                            <1225000 1000000>,
 101                                            <1050000 1000000>,
 102                                            < 875000 1000000>,
 103                                            < 700000 1000000>,
 104                                            < 350000 1000000>;
 105                 };
 106
 107                 cpu3: cpu@3 {
 108                         device_type = "cpu";
 109                         compatible = "arm,cortex-a15";
 110                         reg = <3>;
 111                         clock-frequency = <1400000000>;
 112                         clocks = <&cpg CPG_CORE R8A7742_CLK_Z>;
 113                         power-domains = <&sysc R8A7742_PD_CA15_CPU3>;
 114                         next-level-cache = <&L2_CA15>;
 115                         capacity-dmips-mhz = <1024>;
 116                         voltage-tolerance = <1>; /* 1% */
 117                         clock-latency = <300000>; /* 300 us */
 118
 119                         /* kHz - uV - OPPs unknown yet */
 120                         operating-points = <1400000 1000000>,
 121                                            <1225000 1000000>,
 122                                            <1050000 1000000>,
 123                                            < 875000 1000000>,
 124                                            < 700000 1000000>,
 125                                            < 350000 1000000>;
 126                 };
 127
 128                 cpu4: cpu@100 {
 129                         device_type = "cpu";
 130                         compatible = "arm,cortex-a7";
 131                         reg = <0x100>;
 132                         clock-frequency = <780000000>;
 133                         clocks = <&cpg CPG_CORE R8A7742_CLK_Z2>;
 134                         power-domains = <&sysc R8A7742_PD_CA7_CPU0>;
 135                         next-level-cache = <&L2_CA7>;
 136                 };
 137
 138                 cpu5: cpu@101 {
 139                         device_type = "cpu";
 140                         compatible = "arm,cortex-a7";
 141                         reg = <0x101>;
 142                         clock-frequency = <780000000>;
 143                         clocks = <&cpg CPG_CORE R8A7742_CLK_Z2>;
 144                         power-domains = <&sysc R8A7742_PD_CA7_CPU1>;
 145                         next-level-cache = <&L2_CA7>;
 146                 };
 147
 148                 cpu6: cpu@102 {
 149                         device_type = "cpu";
 150                         compatible = "arm,cortex-a7";
 151                         reg = <0x102>;
 152                         clock-frequency = <780000000>;
 153                         clocks = <&cpg CPG_CORE R8A7742_CLK_Z2>;
 154                         power-domains = <&sysc R8A7742_PD_CA7_CPU2>;
 155                         next-level-cache = <&L2_CA7>;
 156                 };
 157
 158                 cpu7: cpu@103 {
 159                         device_type = "cpu";
 160                         compatible = "arm,cortex-a7";
 161                         reg = <0x103>;
 162                         clock-frequency = <780000000>;
 163                         clocks = <&cpg CPG_CORE R8A7742_CLK_Z2>;
 164                         power-domains = <&sysc R8A7742_PD_CA7_CPU3>;
 165                         next-level-cache = <&L2_CA7>;
 166                 };
 167
 168                 L2_CA15: cache-controller-0 {
 169                         compatible = "cache";
 170                         power-domains = <&sysc R8A7742_PD_CA15_SCU>;
 171                         cache-unified;
 172                         cache-level = <2>;
 173                 };
 174
 175                 L2_CA7: cache-controller-1 {
 176                         compatible = "cache";
 177                         power-domains = <&sysc R8A7742_PD_CA7_SCU>;
 178                         cache-unified;
 179                         cache-level = <2>;
 180                 };
 181         };
 182
 183         /* External root clock */
 184         extal_clk: extal {
 185                 compatible = "fixed-clock";
 186                 #clock-cells = <0>;
 187                 /* This value must be overridden by the board. */
 188                 clock-frequency = <0>;
 189         };
 190
 191         pmu-0 {
 192                 compatible = "arm,cortex-a15-pmu";
 193                 interrupts-extended = <&gic GIC_SPI 72 IRQ_TYPE_LEVEL_HIGH>,
 194                                       <&gic GIC_SPI 73 IRQ_TYPE_LEVEL_HIGH>,
 195                                       <&gic GIC_SPI 74 IRQ_TYPE_LEVEL_HIGH>,
 196                                       <&gic GIC_SPI 75 IRQ_TYPE_LEVEL_HIGH>;
 197                 interrupt-affinity = <&cpu0>, <&cpu1>, <&cpu2>, <&cpu3>;
 198         };
 199
 200         pmu-1 {
 201                 compatible = "arm,cortex-a7-pmu";
 202                 interrupts-extended = <&gic GIC_SPI 82 IRQ_TYPE_LEVEL_HIGH>,
 203                                       <&gic GIC_SPI 83 IRQ_TYPE_LEVEL_HIGH>,
 204                                       <&gic GIC_SPI 84 IRQ_TYPE_LEVEL_HIGH>,
 205                                       <&gic GIC_SPI 85 IRQ_TYPE_LEVEL_HIGH>;
 206                 interrupt-affinity = <&cpu4>, <&cpu5>, <&cpu6>, <&cpu7>;
 207         };
 208
 209         /* External SCIF clock */
 210         scif_clk: scif {
 211                 compatible = "fixed-clock";
 212                 #clock-cells = <0>;
 213                 /* This value must be overridden by the board. */
 214                 clock-frequency = <0>;
 215         };
 216
 217         soc {
 218                 compatible = "simple-bus";
 219                 interrupt-parent = <&gic>;
 220
 221                 #address-cells = <2>;
 222                 #size-cells = <2>;
 223                 ranges;
 224
 225                 rwdt: watchdog@e6020000 {
 226                         compatible = "renesas,r8a7742-wdt",
 227                                      "renesas,rcar-gen2-wdt";
 228                         reg = <0 0xe6020000 0 0x0c>;
 229                         interrupts = <GIC_SPI 140 IRQ_TYPE_LEVEL_HIGH>;
 230                         clocks = <&cpg CPG_MOD 402>;
 231                         power-domains = <&sysc R8A7742_PD_ALWAYS_ON>;
 232                         resets = <&cpg 402>;
 233                         status = "disabled";
 234                 };
 235
 236                 gpio0: gpio@e6050000 {
 237                         compatible = "renesas,gpio-r8a7742",
 238                                      "renesas,rcar-gen2-gpio";
 239                         reg = <0 0xe6050000 0 0x50>;
 240                         interrupts = <GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH>;
 241                         #gpio-cells = <2>;
 242                         gpio-controller;
 243                         gpio-ranges = <&pfc 0 0 32>;
 244                         #interrupt-cells = <2>;
 245                         interrupt-controller;
 246                         clocks = <&cpg CPG_MOD 912>;
 247                         power-domains = <&sysc R8A7742_PD_ALWAYS_ON>;
 248                         resets = <&cpg 912>;
 249                 };
 250
 251                 gpio1: gpio@e6051000 {
 252                         compatible = "renesas,gpio-r8a7742",
 253                                      "renesas,rcar-gen2-gpio";
 254                         reg = <0 0xe6051000 0 0x50>;
 255                         interrupts = <GIC_SPI 5 IRQ_TYPE_LEVEL_HIGH>;
 256                         #gpio-cells = <2>;
 257                         gpio-controller;
 258                         gpio-ranges = <&pfc 0 32 30>;
 259                         #interrupt-cells = <2>;
 260                         interrupt-controller;
 261                         clocks = <&cpg CPG_MOD 911>;
 262                         power-domains = <&sysc R8A7742_PD_ALWAYS_ON>;
 263                         resets = <&cpg 911>;
 264                 };
 265
 266                 gpio2: gpio@e6052000 {
 267                         compatible = "renesas,gpio-r8a7742",
 268                                      "renesas,rcar-gen2-gpio";
 269                         reg = <0 0xe6052000 0 0x50>;
 270                         interrupts = <GIC_SPI 6 IRQ_TYPE_LEVEL_HIGH>;
 271                         #gpio-cells = <2>;
 272                         gpio-controller;
 273                         gpio-ranges = <&pfc 0 64 30>;
 274                         #interrupt-cells = <2>;
 275                         interrupt-controller;
 276                         clocks = <&cpg CPG_MOD 910>;
 277                         power-domains = <&sysc R8A7742_PD_ALWAYS_ON>;
 278                         resets = <&cpg 910>;
 279                 };
 280
 281                 gpio3: gpio@e6053000 {
 282                         compatible = "renesas,gpio-r8a7742",
 283                                      "renesas,rcar-gen2-gpio";
 284                         reg = <0 0xe6053000 0 0x50>;
 285                         interrupts = <GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>;
 286                         #gpio-cells = <2>;
 287                         gpio-controller;
 288                         gpio-ranges = <&pfc 0 96 32>;
 289                         #interrupt-cells = <2>;
 290                         interrupt-controller;
 291                         clocks = <&cpg CPG_MOD 909>;
 292                         power-domains = <&sysc R8A7742_PD_ALWAYS_ON>;
 293                         resets = <&cpg 909>;
 294                 };
 295
 296                 gpio4: gpio@e6054000 {
 297                         compatible = "renesas,gpio-r8a7742",
 298                                      "renesas,rcar-gen2-gpio";
 299                         reg = <0 0xe6054000 0 0x50>;
 300                         interrupts = <GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH>;
 301                         #gpio-cells = <2>;
 302                         gpio-controller;
 303                         gpio-ranges = <&pfc 0 128 32>;
 304                         #interrupt-cells = <2>;
 305                         interrupt-controller;
 306                         clocks = <&cpg CPG_MOD 908>;
 307                         power-domains = <&sysc R8A7742_PD_ALWAYS_ON>;
 308                         resets = <&cpg 908>;
 309                 };
 310
 311                 gpio5: gpio@e6055000 {
 312                         compatible = "renesas,gpio-r8a7742",
 313                                      "renesas,rcar-gen2-gpio";
 314                         reg = <0 0xe6055000 0 0x50>;
 315                         interrupts = <GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH>;
 316                         #gpio-cells = <2>;
 317                         gpio-controller;
 318                         gpio-ranges = <&pfc 0 160 32>;
 319                         #interrupt-cells = <2>;
 320                         interrupt-controller;
 321                         clocks = <&cpg CPG_MOD 907>;
 322                         power-domains = <&sysc R8A7742_PD_ALWAYS_ON>;
 323                         resets = <&cpg 907>;
 324                 };
 325
 326                 pfc: pin-controller@e6060000 {
 327                         compatible = "renesas,pfc-r8a7742";
 328                         reg = <0 0xe6060000 0 0x250>;
 329                 };
 330
 331                 cpg: clock-controller@e6150000 {
 332                         compatible = "renesas,r8a7742-cpg-mssr";
 333                         reg = <0 0xe6150000 0 0x1000>;
 334                         clocks = <&extal_clk>, <&usb_extal_clk>;
 335                         clock-names = "extal", "usb_extal";
 336                         #clock-cells = <2>;
 337                         #power-domain-cells = <0>;
 338                         #reset-cells = <1>;
 339                 };
 340
 341                 apmu@e6151000 {
 342                         compatible = "renesas,r8a7742-apmu", "renesas,apmu";
 343                         reg = <0 0xe6151000 0 0x188>;
 344                         cpus = <&cpu4 &cpu5 &cpu6 &cpu7>;
 345                 };
 346
 347                 apmu@e6152000 {
 348                         compatible = "renesas,r8a7742-apmu", "renesas,apmu";
 349                         reg = <0 0xe6152000 0 0x188>;
 350                         cpus = <&cpu0 &cpu1 &cpu2 &cpu3>;
 351                 };
 352
 353                 rst: reset-controller@e6160000 {
 354                         compatible = "renesas,r8a7742-rst";
 355                         reg = <0 0xe6160000 0 0x0100>;
 356                 };
 357
 358                 sysc: system-controller@e6180000 {
 359                         compatible = "renesas,r8a7742-sysc";
 360                         reg = <0 0xe6180000 0 0x0200>;
 361                         #power-domain-cells = <1>;
 362                 };
 363
 364                 irqc: interrupt-controller@e61c0000 {
 365                         compatible = "renesas,irqc-r8a7742", "renesas,irqc";
 366                         #interrupt-cells = <2>;
 367                         interrupt-controller;
 368                         reg = <0 0xe61c0000 0 0x200>;
 369                         interrupts = <GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH>,
 370                                      <GIC_SPI 1 IRQ_TYPE_LEVEL_HIGH>,
 371                                      <GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH>,
 372                                      <GIC_SPI 3 IRQ_TYPE_LEVEL_HIGH>;
 373                         clocks = <&cpg CPG_MOD 407>;
 374                         power-domains = <&sysc R8A7742_PD_ALWAYS_ON>;
 375                         resets = <&cpg 407>;
 376                 };
 377
 378                 thermal: thermal@e61f0000 {
 379                         compatible = "renesas,thermal-r8a7742",
 380                                      "renesas,rcar-gen2-thermal";
 381                         reg = <0 0xe61f0000 0 0x10>, <0 0xe61f0100 0 0x38>;
 382                         interrupts = <GIC_SPI 69 IRQ_TYPE_LEVEL_HIGH>;
 383                         clocks = <&cpg CPG_MOD 522>;
 384                         power-domains = <&sysc R8A7742_PD_ALWAYS_ON>;
 385                         resets = <&cpg 522>;
 386                         #thermal-sensor-cells = <0>;
 387                 };
 388
 389                 icram0: sram@e63a0000 {
 390                         compatible = "mmio-sram";
 391                         reg = <0 0xe63a0000 0 0x12000>;
 392                         #address-cells = <1>;
 393                         #size-cells = <1>;
 394                         ranges = <0 0 0xe63a0000 0x12000>;
 395                 };
 396
 397                 icram1: sram@e63c0000 {
 398                         compatible = "mmio-sram";
 399                         reg = <0 0xe63c0000 0 0x1000>;
 400                         #address-cells = <1>;
 401                         #size-cells = <1>;
 402                         ranges = <0 0 0xe63c0000 0x1000>;
 403
 404                         smp-sram@0 {
 405                                 compatible = "renesas,smp-sram";
 406                                 reg = <0 0x100>;
 407                         };
 408                 };
 409
 410                 icram2: sram@e6300000 {
 411                         compatible = "mmio-sram";
 412                         reg = <0 0xe6300000 0 0x40000>;
 413                         #address-cells = <1>;
 414                         #size-cells = <1>;
 415                         ranges = <0 0 0xe6300000 0x40000>;
 416                 };
 417
 418                 i2c0: i2c@e6508000 {
 419                         #address-cells = <1>;
 420                         #size-cells = <0>;
 421                         compatible = "renesas,i2c-r8a7742",
 422                                      "renesas,rcar-gen2-i2c";
 423                         reg = <0 0xe6508000 0 0x40>;
 424                         interrupts = <GIC_SPI 287 IRQ_TYPE_LEVEL_HIGH>;
 425                         clocks = <&cpg CPG_MOD 931>;
 426                         power-domains = <&sysc R8A7742_PD_ALWAYS_ON>;
 427                         resets = <&cpg 931>;
 428                         i2c-scl-internal-delay-ns = <110>;
 429                         status = "disabled";
 430                 };
 431
 432                 i2c1: i2c@e6518000 {
 433                         #address-cells = <1>;
 434                         #size-cells = <0>;
 435                         compatible = "renesas,i2c-r8a7742",
 436                                      "renesas,rcar-gen2-i2c";
 437                         reg = <0 0xe6518000 0 0x40>;
 438                         interrupts = <GIC_SPI 288 IRQ_TYPE_LEVEL_HIGH>;
 439                         clocks = <&cpg CPG_MOD 930>;
 440                         power-domains = <&sysc R8A7742_PD_ALWAYS_ON>;
 441                         resets = <&cpg 930>;
 442                         i2c-scl-internal-delay-ns = <6>;
 443                         status = "disabled";
 444                 };
 445
 446                 i2c2: i2c@e6530000 {
 447                         #address-cells = <1>;
 448                         #size-cells = <0>;
 449                         compatible = "renesas,i2c-r8a7742",
 450                                      "renesas,rcar-gen2-i2c";
 451                         reg = <0 0xe6530000 0 0x40>;
 452                         interrupts = <GIC_SPI 286 IRQ_TYPE_LEVEL_HIGH>;
 453                         clocks = <&cpg CPG_MOD 929>;
 454                         power-domains = <&sysc R8A7742_PD_ALWAYS_ON>;
 455                         resets = <&cpg 929>;
 456                         i2c-scl-internal-delay-ns = <6>;
 457                         status = "disabled";
 458                 };
 459
 460                 i2c3: i2c@e6540000 {
 461                         #address-cells = <1>;
 462                         #size-cells = <0>;
 463                         compatible = "renesas,i2c-r8a7742",
 464                                      "renesas,rcar-gen2-i2c";
 465                         reg = <0 0xe6540000 0 0x40>;
 466                         interrupts = <GIC_SPI 290 IRQ_TYPE_LEVEL_HIGH>;
 467                         clocks = <&cpg CPG_MOD 928>;
 468                         power-domains = <&sysc R8A7742_PD_ALWAYS_ON>;
 469                         resets = <&cpg 928>;
 470                         i2c-scl-internal-delay-ns = <110>;
 471                         status = "disabled";
 472                 };
 473
 474                 iic0: i2c@e6500000 {
 475                         #address-cells = <1>;
 476                         #size-cells = <0>;
 477                         compatible = "renesas,iic-r8a7742",
 478                                      "renesas,rcar-gen2-iic",
 479                                      "renesas,rmobile-iic";
 480                         reg = <0 0xe6500000 0 0x425>;
 481                         interrupts = <GIC_SPI 174 IRQ_TYPE_LEVEL_HIGH>;
 482                         clocks = <&cpg CPG_MOD 318>;
 483                         dmas = <&dmac0 0x61>, <&dmac0 0x62>,
 484                                <&dmac1 0x61>, <&dmac1 0x62>;
 485                         dma-names = "tx", "rx", "tx", "rx";
 486                         power-domains = <&sysc R8A7742_PD_ALWAYS_ON>;
 487                         resets = <&cpg 318>;
 488                         status = "disabled";
 489                 };
 490
 491                 iic1: i2c@e6510000 {
 492                         #address-cells = <1>;
 493                         #size-cells = <0>;
 494                         compatible = "renesas,iic-r8a7742",
 495                                      "renesas,rcar-gen2-iic",
 496                                      "renesas,rmobile-iic";
 497                         reg = <0 0xe6510000 0 0x425>;
 498                         interrupts = <GIC_SPI 175 IRQ_TYPE_LEVEL_HIGH>;
 499                         clocks = <&cpg CPG_MOD 323>;
 500                         dmas = <&dmac0 0x65>, <&dmac0 0x66>,
 501                                <&dmac1 0x65>, <&dmac1 0x66>;
 502                         dma-names = "tx", "rx", "tx", "rx";
 503                         power-domains = <&sysc R8A7742_PD_ALWAYS_ON>;
 504                         resets = <&cpg 323>;
 505                         status = "disabled";
 506                 };
 507
 508                 iic2: i2c@e6520000 {
 509                         #address-cells = <1>;
 510                         #size-cells = <0>;
 511                         compatible = "renesas,iic-r8a7742",
 512                                      "renesas,rcar-gen2-iic",
 513                                      "renesas,rmobile-iic";
 514                         reg = <0 0xe6520000 0 0x425>;
 515                         interrupts = <GIC_SPI 176 IRQ_TYPE_LEVEL_HIGH>;
 516                         clocks = <&cpg CPG_MOD 300>;
 517                         dmas = <&dmac0 0x69>, <&dmac0 0x6a>,
 518                                <&dmac1 0x69>, <&dmac1 0x6a>;
 519                         dma-names = "tx", "rx", "tx", "rx";
 520                         power-domains = <&sysc R8A7742_PD_ALWAYS_ON>;
 521                         resets = <&cpg 300>;
 522                         status = "disabled";
 523                 };
 524
 525                 iic3: i2c@e60b0000 {
 526                         #address-cells = <1>;
 527                         #size-cells = <0>;
 528                         compatible = "renesas,iic-r8a7742";
 529                         reg = <0 0xe60b0000 0 0x425>;
 530                         interrupts = <GIC_SPI 173 IRQ_TYPE_LEVEL_HIGH>;
 531                         clocks = <&cpg CPG_MOD 926>;
 532                         dmas = <&dmac0 0x77>, <&dmac0 0x78>,
 533                                <&dmac1 0x77>, <&dmac1 0x78>;
 534                         dma-names = "tx", "rx", "tx", "rx";
 535                         power-domains = <&sysc R8A7742_PD_ALWAYS_ON>;
 536                         resets = <&cpg 926>;
 537                         status = "disabled";
 538                 };
 539
 540                 hsusb: usb@e6590000 {
 541                         compatible = "renesas,usbhs-r8a7742",
 542                                      "renesas,rcar-gen2-usbhs";
 543                         reg = <0 0xe6590000 0 0x100>;
 544                         interrupts = <GIC_SPI 107 IRQ_TYPE_LEVEL_HIGH>;
 545                         clocks = <&cpg CPG_MOD 704>;
 546                         dmas = <&usb_dmac0 0>, <&usb_dmac0 1>,
 547                                <&usb_dmac1 0>, <&usb_dmac1 1>;
 548                         dma-names = "ch0", "ch1", "ch2", "ch3";
 549                         power-domains = <&sysc R8A7742_PD_ALWAYS_ON>;
 550                         resets = <&cpg 704>;
 551                         renesas,buswait = <4>;
 552                         phys = <&usb0 1>;
 553                         phy-names = "usb";
 554                         status = "disabled";
 555                 };
 556
 557                 usbphy: usb-phy@e6590100 {
 558                         compatible = "renesas,usb-phy-r8a7742",
 559                                      "renesas,rcar-gen2-usb-phy";
 560                         reg = <0 0xe6590100 0 0x100>;
 561                         #address-cells = <1>;
 562                         #size-cells = <0>;
 563                         clocks = <&cpg CPG_MOD 704>;
 564                         clock-names = "usbhs";
 565                         power-domains = <&sysc R8A7742_PD_ALWAYS_ON>;
 566                         resets = <&cpg 704>;
 567                         status = "disabled";
 568
 569                         usb0: usb-channel@0 {
 570                                 reg = <0>;
 571                                 #phy-cells = <1>;
 572                         };
 573                         usb2: usb-channel@2 {
 574                                 reg = <2>;
 575                                 #phy-cells = <1>;
 576                         };
 577                 };
 578
 579                 usb_dmac0: dma-controller@e65a0000 {
 580                         compatible = "renesas,r8a7742-usb-dmac",
 581                                      "renesas,usb-dmac";
 582                         reg = <0 0xe65a0000 0 0x100>;
 583                         interrupts = <GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH>,
 584                                      <GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH>;
 585                         interrupt-names = "ch0", "ch1";
 586                         clocks = <&cpg CPG_MOD 330>;
 587                         power-domains = <&sysc R8A7742_PD_ALWAYS_ON>;
 588                         resets = <&cpg 330>;
 589                         #dma-cells = <1>;
 590                         dma-channels = <2>;
 591                 };
 592
 593                 usb_dmac1: dma-controller@e65b0000 {
 594                         compatible = "renesas,r8a7742-usb-dmac",
 595                                      "renesas,usb-dmac";
 596                         reg = <0 0xe65b0000 0 0x100>;
 597                         interrupts = <GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH>,
 598                                      <GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH>;
 599                         interrupt-names = "ch0", "ch1";
 600                         clocks = <&cpg CPG_MOD 331>;
 601                         power-domains = <&sysc R8A7742_PD_ALWAYS_ON>;
 602                         resets = <&cpg 331>;
 603                         #dma-cells = <1>;
 604                         dma-channels = <2>;
 605                 };
 606
 607                 dmac0: dma-controller@e6700000 {
 608                         compatible = "renesas,dmac-r8a7742",
 609                                      "renesas,rcar-dmac";
 610                         reg = <0 0xe6700000 0 0x20000>;
 611                         interrupts = <GIC_SPI 197 IRQ_TYPE_LEVEL_HIGH>,
 612                                      <GIC_SPI 200 IRQ_TYPE_LEVEL_HIGH>,
 613                                      <GIC_SPI 201 IRQ_TYPE_LEVEL_HIGH>,
 614                                      <GIC_SPI 202 IRQ_TYPE_LEVEL_HIGH>,
 615                                      <GIC_SPI 203 IRQ_TYPE_LEVEL_HIGH>,
 616                                      <GIC_SPI 204 IRQ_TYPE_LEVEL_HIGH>,
 617                                      <GIC_SPI 205 IRQ_TYPE_LEVEL_HIGH>,
 618                                      <GIC_SPI 206 IRQ_TYPE_LEVEL_HIGH>,
 619                                      <GIC_SPI 207 IRQ_TYPE_LEVEL_HIGH>,
 620                                      <GIC_SPI 208 IRQ_TYPE_LEVEL_HIGH>,
 621                                      <GIC_SPI 209 IRQ_TYPE_LEVEL_HIGH>,
 622                                      <GIC_SPI 210 IRQ_TYPE_LEVEL_HIGH>,
 623                                      <GIC_SPI 211 IRQ_TYPE_LEVEL_HIGH>,
 624                                      <GIC_SPI 212 IRQ_TYPE_LEVEL_HIGH>,
 625                                      <GIC_SPI 213 IRQ_TYPE_LEVEL_HIGH>,
 626                                      <GIC_SPI 214 IRQ_TYPE_LEVEL_HIGH>;
 627                         interrupt-names = "error",
 628                                           "ch0", "ch1", "ch2", "ch3",
 629                                           "ch4", "ch5", "ch6", "ch7",
 630                                           "ch8", "ch9", "ch10", "ch11",
 631                                           "ch12", "ch13", "ch14";
 632                         clocks = <&cpg CPG_MOD 219>;
 633                         clock-names = "fck";
 634                         power-domains = <&sysc R8A7742_PD_ALWAYS_ON>;
 635                         resets = <&cpg 219>;
 636                         #dma-cells = <1>;
 637                         dma-channels = <15>;
 638                 };
 639
 640                 dmac1: dma-controller@e6720000 {
 641                         compatible = "renesas,dmac-r8a7742",
 642                                      "renesas,rcar-dmac";
 643                         reg = <0 0xe6720000 0 0x20000>;
 644                         interrupts = <GIC_SPI 220 IRQ_TYPE_LEVEL_HIGH>,
 645                                      <GIC_SPI 216 IRQ_TYPE_LEVEL_HIGH>,
 646                                      <GIC_SPI 217 IRQ_TYPE_LEVEL_HIGH>,
 647                                      <GIC_SPI 218 IRQ_TYPE_LEVEL_HIGH>,
 648                                      <GIC_SPI 219 IRQ_TYPE_LEVEL_HIGH>,
 649                                      <GIC_SPI 308 IRQ_TYPE_LEVEL_HIGH>,
 650                                      <GIC_SPI 309 IRQ_TYPE_LEVEL_HIGH>,
 651                                      <GIC_SPI 310 IRQ_TYPE_LEVEL_HIGH>,
 652                                      <GIC_SPI 311 IRQ_TYPE_LEVEL_HIGH>,
 653                                      <GIC_SPI 312 IRQ_TYPE_LEVEL_HIGH>,
 654                                      <GIC_SPI 313 IRQ_TYPE_LEVEL_HIGH>,
 655                                      <GIC_SPI 314 IRQ_TYPE_LEVEL_HIGH>,
 656                                      <GIC_SPI 315 IRQ_TYPE_LEVEL_HIGH>,
 657                                      <GIC_SPI 316 IRQ_TYPE_LEVEL_HIGH>,
 658                                      <GIC_SPI 317 IRQ_TYPE_LEVEL_HIGH>,
 659                                      <GIC_SPI 318 IRQ_TYPE_LEVEL_HIGH>;
 660                         interrupt-names = "error",
 661                                           "ch0", "ch1", "ch2", "ch3",
 662                                           "ch4", "ch5", "ch6", "ch7",
 663                                           "ch8", "ch9", "ch10", "ch11",
 664                                           "ch12", "ch13", "ch14";
 665                         clocks = <&cpg CPG_MOD 218>;
 666                         clock-names = "fck";
 667                         power-domains = <&sysc R8A7742_PD_ALWAYS_ON>;
 668                         resets = <&cpg 218>;
 669                         #dma-cells = <1>;
 670                         dma-channels = <15>;
 671                 };
 672
 673                 avb: ethernet@e6800000 {
 674                         compatible = "renesas,etheravb-r8a7742",
 675                                      "renesas,etheravb-rcar-gen2";
 676                         reg = <0 0xe6800000 0 0x800>, <0 0xee0e8000 0 0x4000>;
 677                         interrupts = <GIC_SPI 163 IRQ_TYPE_LEVEL_HIGH>;
 678                         clocks = <&cpg CPG_MOD 812>;
 679                         power-domains = <&sysc R8A7742_PD_ALWAYS_ON>;
 680                         resets = <&cpg 812>;
 681                         #address-cells = <1>;
 682                         #size-cells = <0>;
 683                         status = "disabled";
 684                 };
 685
 686                 scifa0: serial@e6c40000 {
 687                         compatible = "renesas,scifa-r8a7742",
 688                                      "renesas,rcar-gen2-scifa", "renesas,scifa";
 689                         reg = <0 0xe6c40000 0 0x40>;
 690                         interrupts = <GIC_SPI 144 IRQ_TYPE_LEVEL_HIGH>;
 691                         clocks = <&cpg CPG_MOD 204>;
 692                         clock-names = "fck";
 693                         dmas = <&dmac0 0x21>, <&dmac0 0x22>,
 694                                <&dmac1 0x21>, <&dmac1 0x22>;
 695                         dma-names = "tx", "rx", "tx", "rx";
 696                         power-domains = <&sysc R8A7742_PD_ALWAYS_ON>;
 697                         resets = <&cpg 204>;
 698                         status = "disabled";
 699                 };
 700
 701                 scifa1: serial@e6c50000 {
 702                         compatible = "renesas,scifa-r8a7742",
 703                                      "renesas,rcar-gen2-scifa", "renesas,scifa";
 704                         reg = <0 0xe6c50000 0 0x40>;
 705                         interrupts = <GIC_SPI 145 IRQ_TYPE_LEVEL_HIGH>;
 706                         clocks = <&cpg CPG_MOD 203>;
 707                         clock-names = "fck";
 708                         dmas = <&dmac0 0x25>, <&dmac0 0x26>,
 709                                <&dmac1 0x25>, <&dmac1 0x26>;
 710                         dma-names = "tx", "rx", "tx", "rx";
 711                         power-domains = <&sysc R8A7742_PD_ALWAYS_ON>;
 712                         resets = <&cpg 203>;
 713                         status = "disabled";
 714                 };
 715
 716                 scifa2: serial@e6c60000 {
 717                         compatible = "renesas,scifa-r8a7742",
 718                                      "renesas,rcar-gen2-scifa", "renesas,scifa";
 719                         reg = <0 0xe6c60000 0 0x40>;
 720                         interrupts = <GIC_SPI 151 IRQ_TYPE_LEVEL_HIGH>;
 721                         clocks = <&cpg CPG_MOD 202>;
 722                         clock-names = "fck";
 723                         dmas = <&dmac0 0x27>, <&dmac0 0x28>,
 724                                <&dmac1 0x27>, <&dmac1 0x28>;
 725                         dma-names = "tx", "rx", "tx", "rx";
 726                         power-domains = <&sysc R8A7742_PD_ALWAYS_ON>;
 727                         resets = <&cpg 202>;
 728                         status = "disabled";
 729                 };
 730
 731                 scifb0: serial@e6c20000 {
 732                         compatible = "renesas,scifb-r8a7742",
 733                                      "renesas,rcar-gen2-scifb", "renesas,scifb";
 734                         reg = <0 0xe6c20000 0 0x100>;
 735                         interrupts = <GIC_SPI 148 IRQ_TYPE_LEVEL_HIGH>;
 736                         clocks = <&cpg CPG_MOD 206>;
 737                         clock-names = "fck";
 738                         dmas = <&dmac0 0x3d>, <&dmac0 0x3e>,
 739                                <&dmac1 0x3d>, <&dmac1 0x3e>;
 740                         dma-names = "tx", "rx", "tx", "rx";
 741                         power-domains = <&sysc R8A7742_PD_ALWAYS_ON>;
 742                         resets = <&cpg 206>;
 743                         status = "disabled";
 744                 };
 745
 746                 scifb1: serial@e6c30000 {
 747                         compatible = "renesas,scifb-r8a7742",
 748                                      "renesas,rcar-gen2-scifb", "renesas,scifb";
 749                         reg = <0 0xe6c30000 0 0x100>;
 750                         interrupts = <GIC_SPI 149 IRQ_TYPE_LEVEL_HIGH>;
 751                         clocks = <&cpg CPG_MOD 207>;
 752                         clock-names = "fck";
 753                         dmas = <&dmac0 0x19>, <&dmac0 0x1a>,
 754                                <&dmac1 0x19>, <&dmac1 0x1a>;
 755                         dma-names = "tx", "rx", "tx", "rx";
 756                         power-domains = <&sysc R8A7742_PD_ALWAYS_ON>;
 757                         resets = <&cpg 207>;
 758                         status = "disabled";
 759                 };
 760
 761                 scifb2: serial@e6ce0000 {
 762                         compatible = "renesas,scifb-r8a7742",
 763                                      "renesas,rcar-gen2-scifb", "renesas,scifb";
 764                         reg = <0 0xe6ce0000 0 0x100>;
 765                         interrupts = <GIC_SPI 150 IRQ_TYPE_LEVEL_HIGH>;
 766                         clocks = <&cpg CPG_MOD 216>;
 767                         clock-names = "fck";
 768                         dmas = <&dmac0 0x1d>, <&dmac0 0x1e>,
 769                                <&dmac1 0x1d>, <&dmac1 0x1e>;
 770                         dma-names = "tx", "rx", "tx", "rx";
 771                         power-domains = <&sysc R8A7742_PD_ALWAYS_ON>;
 772                         resets = <&cpg 216>;
 773                         status = "disabled";
 774                 };
 775
 776                 scif0: serial@e6e60000 {
 777                         compatible = "renesas,scif-r8a7742",
 778                                      "renesas,rcar-gen2-scif", "renesas,scif";
 779                         reg = <0 0xe6e60000 0 0x40>;
 780                         interrupts = <GIC_SPI 152 IRQ_TYPE_LEVEL_HIGH>;
 781                         clocks = <&cpg CPG_MOD 721>,
 782                                  <&cpg CPG_CORE R8A7742_CLK_ZS>, <&scif_clk>;
 783                         clock-names = "fck", "brg_int", "scif_clk";
 784                         dmas = <&dmac0 0x29>, <&dmac0 0x2a>,
 785                                <&dmac1 0x29>, <&dmac1 0x2a>;
 786                         dma-names = "tx", "rx", "tx", "rx";
 787                         power-domains = <&sysc R8A7742_PD_ALWAYS_ON>;
 788                         resets = <&cpg 721>;
 789                         status = "disabled";
 790                 };
 791
 792                 scif1: serial@e6e68000 {
 793                         compatible = "renesas,scif-r8a7742",
 794                                      "renesas,rcar-gen2-scif", "renesas,scif";
 795                         reg = <0 0xe6e68000 0 0x40>;
 796                         interrupts = <GIC_SPI 153 IRQ_TYPE_LEVEL_HIGH>;
 797                         clocks = <&cpg CPG_MOD 720>,
 798                                  <&cpg CPG_CORE R8A7742_CLK_ZS>, <&scif_clk>;
 799                         clock-names = "fck", "brg_int", "scif_clk";
 800                         dmas = <&dmac0 0x2d>, <&dmac0 0x2e>,
 801                                <&dmac1 0x2d>, <&dmac1 0x2e>;
 802                         dma-names = "tx", "rx", "tx", "rx";
 803                         power-domains = <&sysc R8A7742_PD_ALWAYS_ON>;
 804                         resets = <&cpg 720>;
 805                         status = "disabled";
 806                 };
 807
 808                 scif2: serial@e6e56000 {
 809                         compatible = "renesas,scif-r8a7742",
 810                                      "renesas,rcar-gen2-scif", "renesas,scif";
 811                         reg = <0 0xe6e56000 0 0x40>;
 812                         interrupts = <GIC_SPI 164 IRQ_TYPE_LEVEL_HIGH>;
 813                         clocks = <&cpg CPG_MOD 310>,
 814                                  <&cpg CPG_CORE R8A7742_CLK_ZS>, <&scif_clk>;
 815                         clock-names = "fck", "brg_int", "scif_clk";
 816                         dmas = <&dmac0 0x2b>, <&dmac0 0x2c>,
 817                                <&dmac1 0x2b>, <&dmac1 0x2c>;
 818                         dma-names = "tx", "rx", "tx", "rx";
 819                         power-domains = <&sysc R8A7742_PD_ALWAYS_ON>;
 820                         resets = <&cpg 310>;
 821                         status = "disabled";
 822                 };
 823
 824                 hscif0: serial@e62c0000 {
 825                         compatible = "renesas,hscif-r8a7742",
 826                                      "renesas,rcar-gen2-hscif", "renesas,hscif";
 827                         reg = <0 0xe62c0000 0 0x60>;
 828                         interrupts = <GIC_SPI 154 IRQ_TYPE_LEVEL_HIGH>;
 829                         clocks = <&cpg CPG_MOD 717>,
 830                                  <&cpg CPG_CORE R8A7742_CLK_ZS>, <&scif_clk>;
 831                         clock-names = "fck", "brg_int", "scif_clk";
 832                         dmas = <&dmac0 0x39>, <&dmac0 0x3a>,
 833                                <&dmac1 0x39>, <&dmac1 0x3a>;
 834                         dma-names = "tx", "rx", "tx", "rx";
 835                         power-domains = <&sysc R8A7742_PD_ALWAYS_ON>;
 836                         resets = <&cpg 717>;
 837                         status = "disabled";
 838                 };
 839
 840                 hscif1: serial@e62c8000 {
 841                         compatible = "renesas,hscif-r8a7742",
 842                                      "renesas,rcar-gen2-hscif", "renesas,hscif";
 843                         reg = <0 0xe62c8000 0 0x60>;
 844                         interrupts = <GIC_SPI 155 IRQ_TYPE_LEVEL_HIGH>;
 845                         clocks = <&cpg CPG_MOD 716>,
 846                                  <&cpg CPG_CORE R8A7742_CLK_ZS>, <&scif_clk>;
 847                         clock-names = "fck", "brg_int", "scif_clk";
 848                         dmas = <&dmac0 0x4d>, <&dmac0 0x4e>,
 849                                <&dmac1 0x4d>, <&dmac1 0x4e>;
 850                         dma-names = "tx", "rx", "tx", "rx";
 851                         power-domains = <&sysc R8A7742_PD_ALWAYS_ON>;
 852                         resets = <&cpg 716>;
 853                         status = "disabled";
 854                 };
 855
 856                 msiof0: spi@e6e20000 {
 857                         compatible = "renesas,msiof-r8a7742",
 858                                      "renesas,rcar-gen2-msiof";
 859                         reg = <0 0xe6e20000 0 0x0064>;
 860                         interrupts = <GIC_SPI 156 IRQ_TYPE_LEVEL_HIGH>;
 861                         clocks = <&cpg CPG_MOD 0>;
 862                         dmas = <&dmac0 0x51>, <&dmac0 0x52>,
 863                                <&dmac1 0x51>, <&dmac1 0x52>;
 864                         dma-names = "tx", "rx", "tx", "rx";
 865                         power-domains = <&sysc R8A7742_PD_ALWAYS_ON>;
 866                         resets = <&cpg 0>;
 867                         #address-cells = <1>;
 868                         #size-cells = <0>;
 869                         status = "disabled";
 870                 };
 871
 872                 msiof1: spi@e6e10000 {
 873                         compatible = "renesas,msiof-r8a7742",
 874                                      "renesas,rcar-gen2-msiof";
 875                         reg = <0 0xe6e10000 0 0x0064>;
 876                         interrupts = <GIC_SPI 157 IRQ_TYPE_LEVEL_HIGH>;
 877                         clocks = <&cpg CPG_MOD 208>;
 878                         dmas = <&dmac0 0x55>, <&dmac0 0x56>,
 879                                <&dmac1 0x55>, <&dmac1 0x56>;
 880                         dma-names = "tx", "rx", "tx", "rx";
 881                         power-domains = <&sysc R8A7742_PD_ALWAYS_ON>;
 882                         resets = <&cpg 208>;
 883                         #address-cells = <1>;
 884                         #size-cells = <0>;
 885                         status = "disabled";
 886                 };
 887
 888                 msiof2: spi@e6e00000 {
 889                         compatible = "renesas,msiof-r8a7742",
 890                                      "renesas,rcar-gen2-msiof";
 891                         reg = <0 0xe6e00000 0 0x0064>;
 892                         interrupts = <GIC_SPI 158 IRQ_TYPE_LEVEL_HIGH>;
 893                         clocks = <&cpg CPG_MOD 205>;
 894                         dmas = <&dmac0 0x41>, <&dmac0 0x42>,
 895                                <&dmac1 0x41>, <&dmac1 0x42>;
 896                         dma-names = "tx", "rx", "tx", "rx";
 897                         power-domains = <&sysc R8A7742_PD_ALWAYS_ON>;
 898                         resets = <&cpg 205>;
 899                         #address-cells = <1>;
 900                         #size-cells = <0>;
 901                         status = "disabled";
 902                 };
 903
 904                 msiof3: spi@e6c90000 {
 905                         compatible = "renesas,msiof-r8a7742",
 906                                      "renesas,rcar-gen2-msiof";
 907                         reg = <0 0xe6c90000 0 0x0064>;
 908                         interrupts = <GIC_SPI 159 IRQ_TYPE_LEVEL_HIGH>;
 909                         clocks = <&cpg CPG_MOD 215>;
 910                         dmas = <&dmac0 0x45>, <&dmac0 0x46>,
 911                                <&dmac1 0x45>, <&dmac1 0x46>;
 912                         dma-names = "tx", "rx", "tx", "rx";
 913                         power-domains = <&sysc R8A7742_PD_ALWAYS_ON>;
 914                         resets = <&cpg 215>;
 915                         #address-cells = <1>;
 916                         #size-cells = <0>;
 917                         status = "disabled";
 918                 };
 919
 920                 rcar_sound: sound@ec500000 {
 921                         /*
 922                          * #sound-dai-cells is required
 923                          *
 924                          * Single DAI : #sound-dai-cells = <0>;         <&rcar_sound>;
 925                          * Multi  DAI : #sound-dai-cells = <1>;         <&rcar_sound N>;
 926                          */
 927                         compatible = "renesas,rcar_sound-r8a7742",
 928                                      "renesas,rcar_sound-gen2";
 929                         reg = <0 0xec500000 0 0x1000>, /* SCU */
 930                               <0 0xec5a0000 0 0x100>,  /* ADG */
 931                               <0 0xec540000 0 0x1000>, /* SSIU */
 932                               <0 0xec541000 0 0x280>,  /* SSI */
 933                               <0 0xec740000 0 0x200>;  /* Audio DMAC peri peri*/
 934                         reg-names = "scu", "adg", "ssiu", "ssi", "audmapp";
 935
 936                         clocks = <&cpg CPG_MOD 1005>,
 937                                  <&cpg CPG_MOD 1006>, <&cpg CPG_MOD 1007>,
 938                                  <&cpg CPG_MOD 1008>, <&cpg CPG_MOD 1009>,
 939                                  <&cpg CPG_MOD 1010>, <&cpg CPG_MOD 1011>,
 940                                  <&cpg CPG_MOD 1012>, <&cpg CPG_MOD 1013>,
 941                                  <&cpg CPG_MOD 1014>, <&cpg CPG_MOD 1015>,
 942                                  <&cpg CPG_MOD 1022>, <&cpg CPG_MOD 1023>,
 943                                  <&cpg CPG_MOD 1024>, <&cpg CPG_MOD 1025>,
 944                                  <&cpg CPG_MOD 1026>, <&cpg CPG_MOD 1027>,
 945                                  <&cpg CPG_MOD 1028>, <&cpg CPG_MOD 1029>,
 946                                  <&cpg CPG_MOD 1030>, <&cpg CPG_MOD 1031>,
 947                                  <&cpg CPG_MOD 1021>, <&cpg CPG_MOD 1020>,
 948                                  <&cpg CPG_MOD 1021>, <&cpg CPG_MOD 1020>,
 949                                  <&cpg CPG_MOD 1019>, <&cpg CPG_MOD 1018>,
 950                                  <&audio_clk_a>, <&audio_clk_b>, <&audio_clk_c>,
 951                                  <&cpg CPG_CORE R8A7742_CLK_M2>;
 952                         clock-names = "ssi-all",
 953                                       "ssi.9", "ssi.8", "ssi.7", "ssi.6",
 954                                       "ssi.5", "ssi.4", "ssi.3", "ssi.2",
 955                                       "ssi.1", "ssi.0",
 956                                       "src.9", "src.8", "src.7", "src.6",
 957                                       "src.5", "src.4", "src.3", "src.2",
 958                                       "src.1", "src.0",
 959                                       "ctu.0", "ctu.1",
 960                                       "mix.0", "mix.1",
 961                                       "dvc.0", "dvc.1",
 962                                       "clk_a", "clk_b", "clk_c", "clk_i";
 963                         power-domains = <&sysc R8A7742_PD_ALWAYS_ON>;
 964                         resets = <&cpg 1005>,
 965                                  <&cpg 1006>, <&cpg 1007>,
 966                                  <&cpg 1008>, <&cpg 1009>,
 967                                  <&cpg 1010>, <&cpg 1011>,
 968                                  <&cpg 1012>, <&cpg 1013>,
 969                                  <&cpg 1014>, <&cpg 1015>;
 970                         reset-names = "ssi-all",
 971                                       "ssi.9", "ssi.8", "ssi.7", "ssi.6",
 972                                       "ssi.5", "ssi.4", "ssi.3", "ssi.2",
 973                                       "ssi.1", "ssi.0";
 974
 975                         status = "disabled";
 976
 977                         rcar_sound,dvc {
 978                                 dvc0: dvc-0 {
 979                                         dmas = <&audma1 0xbc>;
 980                                         dma-names = "tx";
 981                                 };
 982                                 dvc1: dvc-1 {
 983                                         dmas = <&audma1 0xbe>;
 984                                         dma-names = "tx";
 985                                 };
 986                         };
 987
 988                         rcar_sound,mix {
 989                                 mix0: mix-0 { };
 990                                 mix1: mix-1 { };
 991                         };
 992
 993                         rcar_sound,ctu {
 994                                 ctu00: ctu-0 { };
 995                                 ctu01: ctu-1 { };
 996                                 ctu02: ctu-2 { };
 997                                 ctu03: ctu-3 { };
 998                                 ctu10: ctu-4 { };
 999                                 ctu11: ctu-5 { };
1000                                 ctu12: ctu-6 { };
1001                                 ctu13: ctu-7 { };
1002                         };
1003
1004                         rcar_sound,src {
1005                                 src0: src-0 {
1006                                         interrupts = <GIC_SPI 352 IRQ_TYPE_LEVEL_HIGH>;
1007                                         dmas = <&audma0 0x85>, <&audma1 0x9a>;
1008                                         dma-names = "rx", "tx";
1009                                 };
1010                                 src1: src-1 {
1011                                         interrupts = <GIC_SPI 353 IRQ_TYPE_LEVEL_HIGH>;
1012                                         dmas = <&audma0 0x87>, <&audma1 0x9c>;
1013                                         dma-names = "rx", "tx";
1014                                 };
1015                                 src2: src-2 {
1016                                         interrupts = <GIC_SPI 354 IRQ_TYPE_LEVEL_HIGH>;
1017                                         dmas = <&audma0 0x89>, <&audma1 0x9e>;
1018                                         dma-names = "rx", "tx";
1019                                 };
1020                                 src3: src-3 {
1021                                         interrupts = <GIC_SPI 355 IRQ_TYPE_LEVEL_HIGH>;
1022                                         dmas = <&audma0 0x8b>, <&audma1 0xa0>;
1023                                         dma-names = "rx", "tx";
1024                                 };
1025                                 src4: src-4 {
1026                                         interrupts = <GIC_SPI 356 IRQ_TYPE_LEVEL_HIGH>;
1027                                         dmas = <&audma0 0x8d>, <&audma1 0xb0>;
1028                                         dma-names = "rx", "tx";
1029                                 };
1030                                 src5: src-5 {
1031                                         interrupts = <GIC_SPI 357 IRQ_TYPE_LEVEL_HIGH>;
1032                                         dmas = <&audma0 0x8f>, <&audma1 0xb2>;
1033                                         dma-names = "rx", "tx";
1034                                 };
1035                                 src6: src-6 {
1036                                         interrupts = <GIC_SPI 358 IRQ_TYPE_LEVEL_HIGH>;
1037                                         dmas = <&audma0 0x91>, <&audma1 0xb4>;
1038                                         dma-names = "rx", "tx";
1039                                 };
1040                                 src7: src-7 {
1041                                         interrupts = <GIC_SPI 359 IRQ_TYPE_LEVEL_HIGH>;
1042                                         dmas = <&audma0 0x93>, <&audma1 0xb6>;
1043                                         dma-names = "rx", "tx";
1044                                 };
1045                                 src8: src-8 {
1046                                         interrupts = <GIC_SPI 360 IRQ_TYPE_LEVEL_HIGH>;
1047                                         dmas = <&audma0 0x95>, <&audma1 0xb8>;
1048                                         dma-names = "rx", "tx";
1049                                 };
1050                                 src9: src-9 {
1051                                         interrupts = <GIC_SPI 361 IRQ_TYPE_LEVEL_HIGH>;
1052                                         dmas = <&audma0 0x97>, <&audma1 0xba>;
1053                                         dma-names = "rx", "tx";
1054                                 };
1055                         };
1056
1057                         rcar_sound,ssi {
1058                                 ssi0: ssi-0 {
1059                                         interrupts = <GIC_SPI 370 IRQ_TYPE_LEVEL_HIGH>;
1060                                         dmas = <&audma0 0x01>, <&audma1 0x02>,
1061                                                <&audma0 0x15>, <&audma1 0x16>;
1062                                         dma-names = "rx", "tx", "rxu", "txu";
1063                                 };
1064                                 ssi1: ssi-1 {
1065                                          interrupts = <GIC_SPI 371 IRQ_TYPE_LEVEL_HIGH>;
1066                                         dmas = <&audma0 0x03>, <&audma1 0x04>,
1067                                                <&audma0 0x49>, <&audma1 0x4a>;
1068                                         dma-names = "rx", "tx", "rxu", "txu";
1069                                 };
1070                                 ssi2: ssi-2 {
1071                                         interrupts = <GIC_SPI 372 IRQ_TYPE_LEVEL_HIGH>;
1072                                         dmas = <&audma0 0x05>, <&audma1 0x06>,
1073                                                <&audma0 0x63>, <&audma1 0x64>;
1074                                         dma-names = "rx", "tx", "rxu", "txu";
1075                                 };
1076                                 ssi3: ssi-3 {
1077                                         interrupts = <GIC_SPI 373 IRQ_TYPE_LEVEL_HIGH>;
1078                                         dmas = <&audma0 0x07>, <&audma1 0x08>,
1079                                                <&audma0 0x6f>, <&audma1 0x70>;
1080                                         dma-names = "rx", "tx", "rxu", "txu";
1081                                 };
1082                                 ssi4: ssi-4 {
1083                                         interrupts = <GIC_SPI 374 IRQ_TYPE_LEVEL_HIGH>;
1084                                         dmas = <&audma0 0x09>, <&audma1 0x0a>,
1085                                                <&audma0 0x71>, <&audma1 0x72>;
1086                                         dma-names = "rx", "tx", "rxu", "txu";
1087                                 };
1088                                 ssi5: ssi-5 {
1089                                         interrupts = <GIC_SPI 375 IRQ_TYPE_LEVEL_HIGH>;
1090                                         dmas = <&audma0 0x0b>, <&audma1 0x0c>,
1091                                                <&audma0 0x73>, <&audma1 0x74>;
1092                                         dma-names = "rx", "tx", "rxu", "txu";
1093                                 };
1094                                 ssi6: ssi-6 {
1095                                         interrupts = <GIC_SPI 376 IRQ_TYPE_LEVEL_HIGH>;
1096                                         dmas = <&audma0 0x0d>, <&audma1 0x0e>,
1097                                                <&audma0 0x75>, <&audma1 0x76>;
1098                                         dma-names = "rx", "tx", "rxu", "txu";
1099                                 };
1100                                 ssi7: ssi-7 {
1101                                         interrupts = <GIC_SPI 377 IRQ_TYPE_LEVEL_HIGH>;
1102                                         dmas = <&audma0 0x0f>, <&audma1 0x10>,
1103                                                <&audma0 0x79>, <&audma1 0x7a>;
1104                                         dma-names = "rx", "tx", "rxu", "txu";
1105                                 };
1106                                 ssi8: ssi-8 {
1107                                         interrupts = <GIC_SPI 378 IRQ_TYPE_LEVEL_HIGH>;
1108                                         dmas = <&audma0 0x11>, <&audma1 0x12>,
1109                                                <&audma0 0x7b>, <&audma1 0x7c>;
1110                                         dma-names = "rx", "tx", "rxu", "txu";
1111                                 };
1112                                 ssi9: ssi-9 {
1113                                         interrupts = <GIC_SPI 379 IRQ_TYPE_LEVEL_HIGH>;
1114                                         dmas = <&audma0 0x13>, <&audma1 0x14>,
1115                                                <&audma0 0x7d>, <&audma1 0x7e>;
1116                                         dma-names = "rx", "tx", "rxu", "txu";
1117                                 };
1118                         };
1119                 };
1120
1121                 audma0: dma-controller@ec700000 {
1122                         compatible = "renesas,dmac-r8a7742",
1123                                      "renesas,rcar-dmac";
1124                         reg = <0 0xec700000 0 0x10000>;
1125                         interrupts = <GIC_SPI 346 IRQ_TYPE_LEVEL_HIGH>,
1126                                      <GIC_SPI 320 IRQ_TYPE_LEVEL_HIGH>,
1127                                      <GIC_SPI 321 IRQ_TYPE_LEVEL_HIGH>,
1128                                      <GIC_SPI 322 IRQ_TYPE_LEVEL_HIGH>,
1129                                      <GIC_SPI 323 IRQ_TYPE_LEVEL_HIGH>,
1130                                      <GIC_SPI 324 IRQ_TYPE_LEVEL_HIGH>,
1131                                      <GIC_SPI 325 IRQ_TYPE_LEVEL_HIGH>,
1132                                      <GIC_SPI 326 IRQ_TYPE_LEVEL_HIGH>,
1133                                      <GIC_SPI 327 IRQ_TYPE_LEVEL_HIGH>,
1134                                      <GIC_SPI 328 IRQ_TYPE_LEVEL_HIGH>,
1135                                      <GIC_SPI 329 IRQ_TYPE_LEVEL_HIGH>,
1136                                      <GIC_SPI 330 IRQ_TYPE_LEVEL_HIGH>,
1137                                      <GIC_SPI 331 IRQ_TYPE_LEVEL_HIGH>,
1138                                      <GIC_SPI 332 IRQ_TYPE_LEVEL_HIGH>;
1139                         interrupt-names = "error",
1140                                           "ch0", "ch1", "ch2", "ch3",
1141                                           "ch4", "ch5", "ch6", "ch7",
1142                                           "ch8", "ch9", "ch10", "ch11",
1143                                           "ch12";
1144                         clocks = <&cpg CPG_MOD 502>;
1145                         clock-names = "fck";
1146                         power-domains = <&sysc R8A7742_PD_ALWAYS_ON>;
1147                         resets = <&cpg 502>;
1148                         #dma-cells = <1>;
1149                         dma-channels = <13>;
1150                 };
1151
1152                 audma1: dma-controller@ec720000 {
1153                         compatible = "renesas,dmac-r8a7742",
1154                                      "renesas,rcar-dmac";
1155                         reg = <0 0xec720000 0 0x10000>;
1156                         interrupts = <GIC_SPI 347 IRQ_TYPE_LEVEL_HIGH>,
1157                                      <GIC_SPI 333 IRQ_TYPE_LEVEL_HIGH>,
1158                                      <GIC_SPI 334 IRQ_TYPE_LEVEL_HIGH>,
1159                                      <GIC_SPI 335 IRQ_TYPE_LEVEL_HIGH>,
1160                                      <GIC_SPI 336 IRQ_TYPE_LEVEL_HIGH>,
1161                                      <GIC_SPI 337 IRQ_TYPE_LEVEL_HIGH>,
1162                                      <GIC_SPI 338 IRQ_TYPE_LEVEL_HIGH>,
1163                                      <GIC_SPI 339 IRQ_TYPE_LEVEL_HIGH>,
1164                                      <GIC_SPI 340 IRQ_TYPE_LEVEL_HIGH>,
1165                                      <GIC_SPI 341 IRQ_TYPE_LEVEL_HIGH>,
1166                                      <GIC_SPI 342 IRQ_TYPE_LEVEL_HIGH>,
1167                                      <GIC_SPI 343 IRQ_TYPE_LEVEL_HIGH>,
1168                                      <GIC_SPI 344 IRQ_TYPE_LEVEL_HIGH>,
1169                                      <GIC_SPI 345 IRQ_TYPE_LEVEL_HIGH>;
1170                         interrupt-names = "error",
1171                                           "ch0", "ch1", "ch2", "ch3",
1172                                           "ch4", "ch5", "ch6", "ch7",
1173                                           "ch8", "ch9", "ch10", "ch11",
1174                                           "ch12";
1175                         clocks = <&cpg CPG_MOD 501>;
1176                         clock-names = "fck";
1177                         power-domains = <&sysc R8A7742_PD_ALWAYS_ON>;
1178                         resets = <&cpg 501>;
1179                         #dma-cells = <1>;
1180                         dma-channels = <13>;
1181                 };
1182
1183                 xhci: usb@ee000000 {
1184                         compatible = "renesas,xhci-r8a7742",
1185                                      "renesas,rcar-gen2-xhci";
1186                         reg = <0 0xee000000 0 0xc00>;
1187                         interrupts = <GIC_SPI 101 IRQ_TYPE_LEVEL_HIGH>;
1188                         clocks = <&cpg CPG_MOD 328>;
1189                         power-domains = <&sysc R8A7742_PD_ALWAYS_ON>;
1190                         resets = <&cpg 328>;
1191                         phys = <&usb2 1>;
1192                         phy-names = "usb";
1193                         status = "disabled";
1194                 };
1195
1196                 pci0: pci@ee090000 {
1197                         compatible = "renesas,pci-r8a7742",
1198                                      "renesas,pci-rcar-gen2";
1199                         device_type = "pci";
1200                         reg = <0 0xee090000 0 0xc00>,
1201                               <0 0xee080000 0 0x1100>;
1202                         interrupts = <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>;
1203                         clocks = <&cpg CPG_MOD 703>;
1204                         power-domains = <&sysc R8A7742_PD_ALWAYS_ON>;
1205                         resets = <&cpg 703>;
1206                         status = "disabled";
1207
1208                         bus-range = <0 0>;
1209                         #address-cells = <3>;
1210                         #size-cells = <2>;
1211                         #interrupt-cells = <1>;
1212                         ranges = <0x02000000 0 0xee080000 0 0xee080000 0 0x00010000>;
1213                         interrupt-map-mask = <0xf800 0 0 0x7>;
1214                         interrupt-map = <0x0000 0 0 1 &gic GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>,
1215                                         <0x0800 0 0 1 &gic GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>,
1216                                         <0x1000 0 0 2 &gic GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>;
1217
1218                         usb@1,0 {
1219                                 reg = <0x800 0 0 0 0>;
1220                                 phys = <&usb0 0>;
1221                                 phy-names = "usb";
1222                         };
1223
1224                         usb@2,0 {
1225                                 reg = <0x1000 0 0 0 0>;
1226                                 phys = <&usb0 0>;
1227                                 phy-names = "usb";
1228                         };
1229                 };
1230
1231                 pci1: pci@ee0b0000 {
1232                         compatible = "renesas,pci-r8a7742",
1233                                      "renesas,pci-rcar-gen2";
1234                         device_type = "pci";
1235                         reg = <0 0xee0b0000 0 0xc00>,
1236                               <0 0xee0a0000 0 0x1100>;
1237                         interrupts = <GIC_SPI 112 IRQ_TYPE_LEVEL_HIGH>;
1238                         clocks = <&cpg CPG_MOD 703>;
1239                         power-domains = <&sysc R8A7742_PD_ALWAYS_ON>;
1240                         resets = <&cpg 703>;
1241                         status = "disabled";
1242
1243                         bus-range = <1 1>;
1244                         #address-cells = <3>;
1245                         #size-cells = <2>;
1246                         #interrupt-cells = <1>;
1247                         ranges = <0x02000000 0 0xee0a0000 0 0xee0a0000 0 0x00010000>;
1248                         interrupt-map-mask = <0xf800 0 0 0x7>;
1249                         interrupt-map = <0x0000 0 0 1 &gic GIC_SPI 112 IRQ_TYPE_LEVEL_HIGH>,
1250                                         <0x0800 0 0 1 &gic GIC_SPI 112 IRQ_TYPE_LEVEL_HIGH>,
1251                                         <0x1000 0 0 2 &gic GIC_SPI 112 IRQ_TYPE_LEVEL_HIGH>;
1252                 };
1253
1254                 pci2: pci@ee0d0000 {
1255                         compatible = "renesas,pci-r8a7742",
1256                                      "renesas,pci-rcar-gen2";
1257                         device_type = "pci";
1258                         clocks = <&cpg CPG_MOD 703>;
1259                         power-domains = <&sysc R8A7742_PD_ALWAYS_ON>;
1260                         resets = <&cpg 703>;
1261                         reg = <0 0xee0d0000 0 0xc00>,
1262                               <0 0xee0c0000 0 0x1100>;
1263                         interrupts = <GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH>;
1264                         status = "disabled";
1265
1266                         bus-range = <2 2>;
1267                         #address-cells = <3>;
1268                         #size-cells = <2>;
1269                         #interrupt-cells = <1>;
1270                         ranges = <0x02000000 0 0xee0c0000 0 0xee0c0000 0 0x00010000>;
1271                         interrupt-map-mask = <0xf800 0 0 0x7>;
1272                         interrupt-map = <0x0000 0 0 1 &gic GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH>,
1273                                         <0x0800 0 0 1 &gic GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH>,
1274                                         <0x1000 0 0 2 &gic GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH>;
1275
1276                         usb@1,0 {
1277                                 reg = <0x20800 0 0 0 0>;
1278                                 phys = <&usb2 0>;
1279                                 phy-names = "usb";
1280                         };
1281
1282                         usb@2,0 {
1283                                 reg = <0x21000 0 0 0 0>;
1284                                 phys = <&usb2 0>;
1285                                 phy-names = "usb";
1286                         };
1287                 };
1288
1289                 sdhi0: sd@ee100000 {
1290                         compatible = "renesas,sdhi-r8a7742",
1291                                      "renesas,rcar-gen2-sdhi";
1292                         reg = <0 0xee100000 0 0x328>;
1293                         interrupts = <GIC_SPI 165 IRQ_TYPE_LEVEL_HIGH>;
1294                         clocks = <&cpg CPG_MOD 314>;
1295                         dmas = <&dmac0 0xcd>, <&dmac0 0xce>,
1296                                <&dmac1 0xcd>, <&dmac1 0xce>;
1297                         dma-names = "tx", "rx", "tx", "rx";
1298                         max-frequency = <195000000>;
1299                         power-domains = <&sysc R8A7742_PD_ALWAYS_ON>;
1300                         resets = <&cpg 314>;
1301                         status = "disabled";
1302                 };
1303
1304                 sdhi1: sd@ee120000 {
1305                         compatible = "renesas,sdhi-r8a7742",
1306                                      "renesas,rcar-gen2-sdhi";
1307                         reg = <0 0xee120000 0 0x328>;
1308                         interrupts = <GIC_SPI 166 IRQ_TYPE_LEVEL_HIGH>;
1309                         clocks = <&cpg CPG_MOD 313>;
1310                         dmas = <&dmac0 0xc9>, <&dmac0 0xca>,
1311                                <&dmac1 0xc9>, <&dmac1 0xca>;
1312                         dma-names = "tx", "rx", "tx", "rx";
1313                         max-frequency = <195000000>;
1314                         power-domains = <&sysc R8A7742_PD_ALWAYS_ON>;
1315                         resets = <&cpg 313>;
1316                         status = "disabled";
1317                 };
1318
1319                 sdhi2: sd@ee140000 {
1320                         compatible = "renesas,sdhi-r8a7742",
1321                                      "renesas,rcar-gen2-sdhi";
1322                         reg = <0 0xee140000 0 0x100>;
1323                         interrupts = <GIC_SPI 167 IRQ_TYPE_LEVEL_HIGH>;
1324                         clocks = <&cpg CPG_MOD 312>;
1325                         dmas = <&dmac0 0xc1>, <&dmac0 0xc2>,
1326                                <&dmac1 0xc1>, <&dmac1 0xc2>;
1327                         dma-names = "tx", "rx", "tx", "rx";
1328                         max-frequency = <97500000>;
1329                         power-domains = <&sysc R8A7742_PD_ALWAYS_ON>;
1330                         resets = <&cpg 312>;
1331                         status = "disabled";
1332                 };
1333
1334                 sdhi3: sd@ee160000 {
1335                         compatible = "renesas,sdhi-r8a7742",
1336                                      "renesas,rcar-gen2-sdhi";
1337                         reg = <0 0xee160000 0 0x100>;
1338                         interrupts = <GIC_SPI 168 IRQ_TYPE_LEVEL_HIGH>;
1339                         clocks = <&cpg CPG_MOD 311>;
1340                         dmas = <&dmac0 0xd3>, <&dmac0 0xd4>,
1341                                <&dmac1 0xd3>, <&dmac1 0xd4>;
1342                         dma-names = "tx", "rx", "tx", "rx";
1343                         max-frequency = <97500000>;
1344                         power-domains = <&sysc R8A7742_PD_ALWAYS_ON>;
1345                         resets = <&cpg 311>;
1346                         status = "disabled";
1347                 };
1348
1349                 mmcif0: mmc@ee200000 {
1350                         compatible = "renesas,mmcif-r8a7742",
1351                                      "renesas,sh-mmcif";
1352                         reg = <0 0xee200000 0 0x80>;
1353                         interrupts = <GIC_SPI 169 IRQ_TYPE_LEVEL_HIGH>;
1354                         clocks = <&cpg CPG_MOD 315>;
1355                         dmas = <&dmac0 0xd1>, <&dmac0 0xd2>,
1356                                <&dmac1 0xd1>, <&dmac1 0xd2>;
1357                         dma-names = "tx", "rx", "tx", "rx";
1358                         power-domains = <&sysc R8A7742_PD_ALWAYS_ON>;
1359                         resets = <&cpg 315>;
1360                         reg-io-width = <4>;
1361                         status = "disabled";
1362                         max-frequency = <97500000>;
1363                 };
1364
1365                 mmcif1: mmc@ee220000 {
1366                         compatible = "renesas,mmcif-r8a7742",
1367                                      "renesas,sh-mmcif";
1368                         reg = <0 0xee220000 0 0x80>;
1369                         interrupts = <GIC_SPI 170 IRQ_TYPE_LEVEL_HIGH>;
1370                         clocks = <&cpg CPG_MOD 305>;
1371                         dmas = <&dmac0 0xe1>, <&dmac0 0xe2>,
1372                                <&dmac1 0xe1>, <&dmac1 0xe2>;
1373                         dma-names = "tx", "rx", "tx", "rx";
1374                         power-domains = <&sysc R8A7742_PD_ALWAYS_ON>;
1375                         resets = <&cpg 305>;
1376                         reg-io-width = <4>;
1377                         status = "disabled";
1378                         max-frequency = <97500000>;
1379                 };
1380
1381                 sata0: sata@ee300000 {
1382                         compatible = "renesas,sata-r8a7742",
1383                                      "renesas,rcar-gen2-sata";
1384                         reg = <0 0xee300000 0 0x200000>;
1385                         interrupts = <GIC_SPI 105 IRQ_TYPE_LEVEL_HIGH>;
1386                         clocks = <&cpg CPG_MOD 815>;
1387                         power-domains = <&sysc R8A7742_PD_ALWAYS_ON>;
1388                         resets = <&cpg 815>;
1389                         status = "disabled";
1390                 };
1391
1392                 sata1: sata@ee500000 {
1393                         compatible = "renesas,sata-r8a7742",
1394                                      "renesas,rcar-gen2-sata";
1395                         reg = <0 0xee500000 0 0x200000>;
1396                         interrupts = <GIC_SPI 106 IRQ_TYPE_LEVEL_HIGH>;
1397                         clocks = <&cpg CPG_MOD 814>;
1398                         power-domains = <&sysc R8A7742_PD_ALWAYS_ON>;
1399                         resets = <&cpg 814>;
1400                         status = "disabled";
1401                 };
1402
1403                 ether: ethernet@ee700000 {
1404                         compatible = "renesas,ether-r8a7742",
1405                                      "renesas,rcar-gen2-ether";
1406                         reg = <0 0xee700000 0 0x400>;
1407                         interrupts = <GIC_SPI 162 IRQ_TYPE_LEVEL_HIGH>;
1408                         clocks = <&cpg CPG_MOD 813>;
1409                         power-domains = <&sysc R8A7742_PD_ALWAYS_ON>;
1410                         resets = <&cpg 813>;
1411                         phy-mode = "rmii";
1412                         #address-cells = <1>;
1413                         #size-cells = <0>;
1414                         status = "disabled";
1415                 };
1416
1417                 gic: interrupt-controller@f1001000 {
1418                         compatible = "arm,gic-400";
1419                         #interrupt-cells = <3>;
1420                         #address-cells = <0>;
1421                         interrupt-controller;
1422                         reg = <0 0xf1001000 0 0x1000>, <0 0xf1002000 0 0x2000>,
1423                               <0 0xf1004000 0 0x2000>, <0 0xf1006000 0 0x2000>;
1424                         interrupts = <GIC_PPI 9 (GIC_CPU_MASK_SIMPLE(8) | IRQ_TYPE_LEVEL_HIGH)>;
1425                         clocks = <&cpg CPG_MOD 408>;
1426                         clock-names = "clk";
1427                         power-domains = <&sysc R8A7742_PD_ALWAYS_ON>;
1428                         resets = <&cpg 408>;
1429                 };
1430
1431                 prr: chipid@ff000044 {
1432                         compatible = "renesas,prr";
1433                         reg = <0 0xff000044 0 4>;
1434                 };
1435
1436                 cmt0: timer@ffca0000 {
1437                         compatible = "renesas,r8a7742-cmt0",
1438                                      "renesas,rcar-gen2-cmt0";
1439                         reg = <0 0xffca0000 0 0x1004>;
1440                         interrupts = <GIC_SPI 142 IRQ_TYPE_LEVEL_HIGH>,
1441                                      <GIC_SPI 143 IRQ_TYPE_LEVEL_HIGH>;
1442                         clocks = <&cpg CPG_MOD 124>;
1443                         clock-names = "fck";
1444                         power-domains = <&sysc R8A7742_PD_ALWAYS_ON>;
1445                         resets = <&cpg 124>;
1446                         status = "disabled";
1447                 };
1448
1449                 cmt1: timer@e6130000 {
1450                         compatible = "renesas,r8a7742-cmt1",
1451                                      "renesas,rcar-gen2-cmt1";
1452                         reg = <0 0xe6130000 0 0x1004>;
1453                         interrupts = <GIC_SPI 120 IRQ_TYPE_LEVEL_HIGH>,
1454                                      <GIC_SPI 121 IRQ_TYPE_LEVEL_HIGH>,
1455                                      <GIC_SPI 122 IRQ_TYPE_LEVEL_HIGH>,
1456                                      <GIC_SPI 123 IRQ_TYPE_LEVEL_HIGH>,
1457                                      <GIC_SPI 124 IRQ_TYPE_LEVEL_HIGH>,
1458                                      <GIC_SPI 125 IRQ_TYPE_LEVEL_HIGH>,
1459                                      <GIC_SPI 126 IRQ_TYPE_LEVEL_HIGH>,
1460                                      <GIC_SPI 127 IRQ_TYPE_LEVEL_HIGH>;
1461                         clocks = <&cpg CPG_MOD 329>;
1462                         clock-names = "fck";
1463                         power-domains = <&sysc R8A7742_PD_ALWAYS_ON>;
1464                         resets = <&cpg 329>;
1465                         status = "disabled";
1466                 };
1467         };
1468
1469         thermal-zones {
1470                 cpu_thermal: cpu-thermal {
1471                         polling-delay-passive = <0>;
1472                         polling-delay = <0>;
1473
1474                         thermal-sensors = <&thermal>;
1475
1476                         trips {
1477                                 cpu-crit {
1478                                         temperature = <95000>;
1479                                         hysteresis = <0>;
1480                                         type = "critical";
1481                                 };
1482                         };
1483                         cooling-maps {
1484                         };
1485                 };
1486         };
1487
1488         timer {
1489                 compatible = "arm,armv7-timer";
1490                 interrupts-extended = <&gic GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(8) | IRQ_TYPE_LEVEL_LOW)>,
1491                                       <&gic GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(8) | IRQ_TYPE_LEVEL_LOW)>,
1492                                       <&gic GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(8) | IRQ_TYPE_LEVEL_LOW)>,
1493                                       <&gic GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(8) | IRQ_TYPE_LEVEL_LOW)>;
1494         };
1495
1496         /* External USB clock - can be overridden by the board */
1497         usb_extal_clk: usb_extal {
1498                 compatible = "fixed-clock";
1499                 #clock-cells = <0>;
1500                 clock-frequency = <48000000>;
1501         };
1502 };