arch/arm/boot/dts/r8a7742.dtsi

   1 // SPDX-License-Identifier: GPL-2.0
   2 /*
   3  * Device Tree Source for the r8a7742 SoC
   4  *
   5  * Copyright (C) 2020 Renesas Electronics Corp.
   6  */
   7
   8 #include <dt-bindings/clock/r8a7742-cpg-mssr.h>
   9 #include <dt-bindings/interrupt-controller/arm-gic.h>
  10 #include <dt-bindings/interrupt-controller/irq.h>
  11 #include <dt-bindings/power/r8a7742-sysc.h>
  12
  13 / {
  14         compatible = "renesas,r8a7742";
  15         #address-cells = <2>;
  16         #size-cells = <2>;
  17
  18         /*
  19          * The external audio clocks are configured as 0 Hz fixed frequency
  20          * clocks by default.
  21          * Boards that provide audio clocks should override them.
  22          */
  23         audio_clk_a: audio_clk_a {
  24                 compatible = "fixed-clock";
  25                 #clock-cells = <0>;
  26                 clock-frequency = <0>;
  27         };
  28         audio_clk_b: audio_clk_b {
  29                 compatible = "fixed-clock";
  30                 #clock-cells = <0>;
  31                 clock-frequency = <0>;
  32         };
  33         audio_clk_c: audio_clk_c {
  34                 compatible = "fixed-clock";
  35                 #clock-cells = <0>;
  36                 clock-frequency = <0>;
  37         };
  38
  39         cpus {
  40                 #address-cells = <1>;
  41                 #size-cells = <0>;
  42                 enable-method = "renesas,apmu";
  43
  44                 cpu0: cpu@0 {
  45                         device_type = "cpu";
  46                         compatible = "arm,cortex-a15";
  47                         reg = <0>;
  48                         clock-frequency = <1400000000>;
  49                         clocks = <&cpg CPG_CORE R8A7742_CLK_Z>;
  50                         power-domains = <&sysc R8A7742_PD_CA15_CPU0>;
  51                         next-level-cache = <&L2_CA15>;
  52                         capacity-dmips-mhz = <1024>;
  53                         voltage-tolerance = <1>; /* 1% */
  54                         clock-latency = <300000>; /* 300 us */
  55
  56                         /* kHz - uV - OPPs unknown yet */
  57                         operating-points = <1400000 1000000>,
  58                                            <1225000 1000000>,
  59                                            <1050000 1000000>,
  60                                            < 875000 1000000>,
  61                                            < 700000 1000000>,
  62                                            < 350000 1000000>;
  63                 };
  64
  65                 cpu1: cpu@1 {
  66                         device_type = "cpu";
  67                         compatible = "arm,cortex-a15";
  68                         reg = <1>;
  69                         clock-frequency = <1400000000>;
  70                         clocks = <&cpg CPG_CORE R8A7742_CLK_Z>;
  71                         power-domains = <&sysc R8A7742_PD_CA15_CPU1>;
  72                         next-level-cache = <&L2_CA15>;
  73                         capacity-dmips-mhz = <1024>;
  74                         voltage-tolerance = <1>; /* 1% */
  75                         clock-latency = <300000>; /* 300 us */
  76
  77                         /* kHz - uV - OPPs unknown yet */
  78                         operating-points = <1400000 1000000>,
  79                                            <1225000 1000000>,
  80                                            <1050000 1000000>,
  81                                            < 875000 1000000>,
  82                                            < 700000 1000000>,
  83                                            < 350000 1000000>;
  84                 };
  85
  86                 cpu2: cpu@2 {
  87                         device_type = "cpu";
  88                         compatible = "arm,cortex-a15";
  89                         reg = <2>;
  90                         clock-frequency = <1400000000>;
  91                         clocks = <&cpg CPG_CORE R8A7742_CLK_Z>;
  92                         power-domains = <&sysc R8A7742_PD_CA15_CPU2>;
  93                         next-level-cache = <&L2_CA15>;
  94                         capacity-dmips-mhz = <1024>;
  95                         voltage-tolerance = <1>; /* 1% */
  96                         clock-latency = <300000>; /* 300 us */
  97
  98                         /* kHz - uV - OPPs unknown yet */
  99                         operating-points = <1400000 1000000>,
 100                                            <1225000 1000000>,
 101                                            <1050000 1000000>,
 102                                            < 875000 1000000>,
 103                                            < 700000 1000000>,
 104                                            < 350000 1000000>;
 105                 };
 106
 107                 cpu3: cpu@3 {
 108                         device_type = "cpu";
 109                         compatible = "arm,cortex-a15";
 110                         reg = <3>;
 111                         clock-frequency = <1400000000>;
 112                         clocks = <&cpg CPG_CORE R8A7742_CLK_Z>;
 113                         power-domains = <&sysc R8A7742_PD_CA15_CPU3>;
 114                         next-level-cache = <&L2_CA15>;
 115                         capacity-dmips-mhz = <1024>;
 116                         voltage-tolerance = <1>; /* 1% */
 117                         clock-latency = <300000>; /* 300 us */
 118
 119                         /* kHz - uV - OPPs unknown yet */
 120                         operating-points = <1400000 1000000>,
 121                                            <1225000 1000000>,
 122                                            <1050000 1000000>,
 123                                            < 875000 1000000>,
 124                                            < 700000 1000000>,
 125                                            < 350000 1000000>;
 126                 };
 127
 128                 cpu4: cpu@100 {
 129                         device_type = "cpu";
 130                         compatible = "arm,cortex-a7";
 131                         reg = <0x100>;
 132                         clock-frequency = <780000000>;
 133                         clocks = <&cpg CPG_CORE R8A7742_CLK_Z2>;
 134                         power-domains = <&sysc R8A7742_PD_CA7_CPU0>;
 135                         next-level-cache = <&L2_CA7>;
 136                 };
 137
 138                 cpu5: cpu@101 {
 139                         device_type = "cpu";
 140                         compatible = "arm,cortex-a7";
 141                         reg = <0x101>;
 142                         clock-frequency = <780000000>;
 143                         clocks = <&cpg CPG_CORE R8A7742_CLK_Z2>;
 144                         power-domains = <&sysc R8A7742_PD_CA7_CPU1>;
 145                         next-level-cache = <&L2_CA7>;
 146                 };
 147
 148                 cpu6: cpu@102 {
 149                         device_type = "cpu";
 150                         compatible = "arm,cortex-a7";
 151                         reg = <0x102>;
 152                         clock-frequency = <780000000>;
 153                         clocks = <&cpg CPG_CORE R8A7742_CLK_Z2>;
 154                         power-domains = <&sysc R8A7742_PD_CA7_CPU2>;
 155                         next-level-cache = <&L2_CA7>;
 156                 };
 157
 158                 cpu7: cpu@103 {
 159                         device_type = "cpu";
 160                         compatible = "arm,cortex-a7";
 161                         reg = <0x103>;
 162                         clock-frequency = <780000000>;
 163                         clocks = <&cpg CPG_CORE R8A7742_CLK_Z2>;
 164                         power-domains = <&sysc R8A7742_PD_CA7_CPU3>;
 165                         next-level-cache = <&L2_CA7>;
 166                 };
 167
 168                 L2_CA15: cache-controller-0 {
 169                         compatible = "cache";
 170                         power-domains = <&sysc R8A7742_PD_CA15_SCU>;
 171                         cache-unified;
 172                         cache-level = <2>;
 173                 };
 174
 175                 L2_CA7: cache-controller-1 {
 176                         compatible = "cache";
 177                         power-domains = <&sysc R8A7742_PD_CA7_SCU>;
 178                         cache-unified;
 179                         cache-level = <2>;
 180                 };
 181         };
 182
 183         /* External root clock */
 184         extal_clk: extal {
 185                 compatible = "fixed-clock";
 186                 #clock-cells = <0>;
 187                 /* This value must be overridden by the board. */
 188                 clock-frequency = <0>;
 189         };
 190
 191         pmu-0 {
 192                 compatible = "arm,cortex-a15-pmu";
 193                 interrupts-extended = <&gic GIC_SPI 72 IRQ_TYPE_LEVEL_HIGH>,
 194                                       <&gic GIC_SPI 73 IRQ_TYPE_LEVEL_HIGH>,
 195                                       <&gic GIC_SPI 74 IRQ_TYPE_LEVEL_HIGH>,
 196                                       <&gic GIC_SPI 75 IRQ_TYPE_LEVEL_HIGH>;
 197                 interrupt-affinity = <&cpu0>, <&cpu1>, <&cpu2>, <&cpu3>;
 198         };
 199
 200         pmu-1 {
 201                 compatible = "arm,cortex-a7-pmu";
 202                 interrupts-extended = <&gic GIC_SPI 82 IRQ_TYPE_LEVEL_HIGH>,
 203                                       <&gic GIC_SPI 83 IRQ_TYPE_LEVEL_HIGH>,
 204                                       <&gic GIC_SPI 84 IRQ_TYPE_LEVEL_HIGH>,
 205                                       <&gic GIC_SPI 85 IRQ_TYPE_LEVEL_HIGH>;
 206                 interrupt-affinity = <&cpu4>, <&cpu5>, <&cpu6>, <&cpu7>;
 207         };
 208
 209         /* External SCIF clock */
 210         scif_clk: scif {
 211                 compatible = "fixed-clock";
 212                 #clock-cells = <0>;
 213                 /* This value must be overridden by the board. */
 214                 clock-frequency = <0>;
 215         };
 216
 217         soc {
 218                 compatible = "simple-bus";
 219                 interrupt-parent = <&gic>;
 220
 221                 #address-cells = <2>;
 222                 #size-cells = <2>;
 223                 ranges;
 224
 225                 rwdt: watchdog@e6020000 {
 226                         compatible = "renesas,r8a7742-wdt",
 227                                      "renesas,rcar-gen2-wdt";
 228                         reg = <0 0xe6020000 0 0x0c>;
 229                         interrupts = <GIC_SPI 140 IRQ_TYPE_LEVEL_HIGH>;
 230                         clocks = <&cpg CPG_MOD 402>;
 231                         power-domains = <&sysc R8A7742_PD_ALWAYS_ON>;
 232                         resets = <&cpg 402>;
 233                         status = "disabled";
 234                 };
 235
 236                 gpio0: gpio@e6050000 {
 237                         compatible = "renesas,gpio-r8a7742",
 238                                      "renesas,rcar-gen2-gpio";
 239                         reg = <0 0xe6050000 0 0x50>;
 240                         interrupts = <GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH>;
 241                         #gpio-cells = <2>;
 242                         gpio-controller;
 243                         gpio-ranges = <&pfc 0 0 32>;
 244                         #interrupt-cells = <2>;
 245                         interrupt-controller;
 246                         clocks = <&cpg CPG_MOD 912>;
 247                         power-domains = <&sysc R8A7742_PD_ALWAYS_ON>;
 248                         resets = <&cpg 912>;
 249                 };
 250
 251                 gpio1: gpio@e6051000 {
 252                         compatible = "renesas,gpio-r8a7742",
 253                                      "renesas,rcar-gen2-gpio";
 254                         reg = <0 0xe6051000 0 0x50>;
 255                         interrupts = <GIC_SPI 5 IRQ_TYPE_LEVEL_HIGH>;
 256                         #gpio-cells = <2>;
 257                         gpio-controller;
 258                         gpio-ranges = <&pfc 0 32 30>;
 259                         #interrupt-cells = <2>;
 260                         interrupt-controller;
 261                         clocks = <&cpg CPG_MOD 911>;
 262                         power-domains = <&sysc R8A7742_PD_ALWAYS_ON>;
 263                         resets = <&cpg 911>;
 264                 };
 265
 266                 gpio2: gpio@e6052000 {
 267                         compatible = "renesas,gpio-r8a7742",
 268                                      "renesas,rcar-gen2-gpio";
 269                         reg = <0 0xe6052000 0 0x50>;
 270                         interrupts = <GIC_SPI 6 IRQ_TYPE_LEVEL_HIGH>;
 271                         #gpio-cells = <2>;
 272                         gpio-controller;
 273                         gpio-ranges = <&pfc 0 64 30>;
 274                         #interrupt-cells = <2>;
 275                         interrupt-controller;
 276                         clocks = <&cpg CPG_MOD 910>;
 277                         power-domains = <&sysc R8A7742_PD_ALWAYS_ON>;
 278                         resets = <&cpg 910>;
 279                 };
 280
 281                 gpio3: gpio@e6053000 {
 282                         compatible = "renesas,gpio-r8a7742",
 283                                      "renesas,rcar-gen2-gpio";
 284                         reg = <0 0xe6053000 0 0x50>;
 285                         interrupts = <GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>;
 286                         #gpio-cells = <2>;
 287                         gpio-controller;
 288                         gpio-ranges = <&pfc 0 96 32>;
 289                         #interrupt-cells = <2>;
 290                         interrupt-controller;
 291                         clocks = <&cpg CPG_MOD 909>;
 292                         power-domains = <&sysc R8A7742_PD_ALWAYS_ON>;
 293                         resets = <&cpg 909>;
 294                 };
 295
 296                 gpio4: gpio@e6054000 {
 297                         compatible = "renesas,gpio-r8a7742",
 298                                      "renesas,rcar-gen2-gpio";
 299                         reg = <0 0xe6054000 0 0x50>;
 300                         interrupts = <GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH>;
 301                         #gpio-cells = <2>;
 302                         gpio-controller;
 303                         gpio-ranges = <&pfc 0 128 32>;
 304                         #interrupt-cells = <2>;
 305                         interrupt-controller;
 306                         clocks = <&cpg CPG_MOD 908>;
 307                         power-domains = <&sysc R8A7742_PD_ALWAYS_ON>;
 308                         resets = <&cpg 908>;
 309                 };
 310
 311                 gpio5: gpio@e6055000 {
 312                         compatible = "renesas,gpio-r8a7742",
 313                                      "renesas,rcar-gen2-gpio";
 314                         reg = <0 0xe6055000 0 0x50>;
 315                         interrupts = <GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH>;
 316                         #gpio-cells = <2>;
 317                         gpio-controller;
 318                         gpio-ranges = <&pfc 0 160 32>;
 319                         #interrupt-cells = <2>;
 320                         interrupt-controller;
 321                         clocks = <&cpg CPG_MOD 907>;
 322                         power-domains = <&sysc R8A7742_PD_ALWAYS_ON>;
 323                         resets = <&cpg 907>;
 324                 };
 325
 326                 pfc: pin-controller@e6060000 {
 327                         compatible = "renesas,pfc-r8a7742";
 328                         reg = <0 0xe6060000 0 0x250>;
 329                 };
 330
 331                 cpg: clock-controller@e6150000 {
 332                         compatible = "renesas,r8a7742-cpg-mssr";
 333                         reg = <0 0xe6150000 0 0x1000>;
 334                         clocks = <&extal_clk>, <&usb_extal_clk>;
 335                         clock-names = "extal", "usb_extal";
 336                         #clock-cells = <2>;
 337                         #power-domain-cells = <0>;
 338                         #reset-cells = <1>;
 339                 };
 340
 341                 apmu@e6151000 {
 342                         compatible = "renesas,r8a7742-apmu", "renesas,apmu";
 343                         reg = <0 0xe6151000 0 0x188>;
 344                         cpus = <&cpu4 &cpu5 &cpu6 &cpu7>;
 345                 };
 346
 347                 apmu@e6152000 {
 348                         compatible = "renesas,r8a7742-apmu", "renesas,apmu";
 349                         reg = <0 0xe6152000 0 0x188>;
 350                         cpus = <&cpu0 &cpu1 &cpu2 &cpu3>;
 351                 };
 352
 353                 rst: reset-controller@e6160000 {
 354                         compatible = "renesas,r8a7742-rst";
 355                         reg = <0 0xe6160000 0 0x0100>;
 356                 };
 357
 358                 sysc: system-controller@e6180000 {
 359                         compatible = "renesas,r8a7742-sysc";
 360                         reg = <0 0xe6180000 0 0x0200>;
 361                         #power-domain-cells = <1>;
 362                 };
 363
 364                 irqc: interrupt-controller@e61c0000 {
 365                         compatible = "renesas,irqc-r8a7742", "renesas,irqc";
 366                         #interrupt-cells = <2>;
 367                         interrupt-controller;
 368                         reg = <0 0xe61c0000 0 0x200>;
 369                         interrupts = <GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH>,
 370                                      <GIC_SPI 1 IRQ_TYPE_LEVEL_HIGH>,
 371                                      <GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH>,
 372                                      <GIC_SPI 3 IRQ_TYPE_LEVEL_HIGH>;
 373                         clocks = <&cpg CPG_MOD 407>;
 374                         power-domains = <&sysc R8A7742_PD_ALWAYS_ON>;
 375                         resets = <&cpg 407>;
 376                 };
 377
 378                 thermal: thermal@e61f0000 {
 379                         compatible = "renesas,thermal-r8a7742",
 380                                      "renesas,rcar-gen2-thermal";
 381                         reg = <0 0xe61f0000 0 0x10>, <0 0xe61f0100 0 0x38>;
 382                         interrupts = <GIC_SPI 69 IRQ_TYPE_LEVEL_HIGH>;
 383                         clocks = <&cpg CPG_MOD 522>;
 384                         power-domains = <&sysc R8A7742_PD_ALWAYS_ON>;
 385                         resets = <&cpg 522>;
 386                         #thermal-sensor-cells = <0>;
 387                 };
 388
 389                 ipmmu_sy0: iommu@e6280000 {
 390                         compatible = "renesas,ipmmu-r8a7742",
 391                                      "renesas,ipmmu-vmsa";
 392                         reg = <0 0xe6280000 0 0x1000>;
 393                         interrupts = <GIC_SPI 223 IRQ_TYPE_LEVEL_HIGH>,
 394                                      <GIC_SPI 224 IRQ_TYPE_LEVEL_HIGH>;
 395                         #iommu-cells = <1>;
 396                         status = "disabled";
 397                 };
 398
 399                 ipmmu_sy1: iommu@e6290000 {
 400                         compatible = "renesas,ipmmu-r8a7742",
 401                                      "renesas,ipmmu-vmsa";
 402                         reg = <0 0xe6290000 0 0x1000>;
 403                         interrupts = <GIC_SPI 225 IRQ_TYPE_LEVEL_HIGH>;
 404                         #iommu-cells = <1>;
 405                         status = "disabled";
 406                 };
 407
 408                 ipmmu_ds: iommu@e6740000 {
 409                         compatible = "renesas,ipmmu-r8a7742",
 410                                      "renesas,ipmmu-vmsa";
 411                         reg = <0 0xe6740000 0 0x1000>;
 412                         interrupts = <GIC_SPI 198 IRQ_TYPE_LEVEL_HIGH>,
 413                                      <GIC_SPI 199 IRQ_TYPE_LEVEL_HIGH>;
 414                         #iommu-cells = <1>;
 415                         status = "disabled";
 416                 };
 417
 418                 ipmmu_mp: iommu@ec680000 {
 419                         compatible = "renesas,ipmmu-r8a7742",
 420                                      "renesas,ipmmu-vmsa";
 421                         reg = <0 0xec680000 0 0x1000>;
 422                         interrupts = <GIC_SPI 226 IRQ_TYPE_LEVEL_HIGH>;
 423                         #iommu-cells = <1>;
 424                         status = "disabled";
 425                 };
 426
 427                 ipmmu_mx: iommu@fe951000 {
 428                         compatible = "renesas,ipmmu-r8a7742",
 429                                      "renesas,ipmmu-vmsa";
 430                         reg = <0 0xfe951000 0 0x1000>;
 431                         interrupts = <GIC_SPI 222 IRQ_TYPE_LEVEL_HIGH>,
 432                                      <GIC_SPI 221 IRQ_TYPE_LEVEL_HIGH>;
 433                         #iommu-cells = <1>;
 434                         status = "disabled";
 435                 };
 436
 437                 icram0: sram@e63a0000 {
 438                         compatible = "mmio-sram";
 439                         reg = <0 0xe63a0000 0 0x12000>;
 440                         #address-cells = <1>;
 441                         #size-cells = <1>;
 442                         ranges = <0 0 0xe63a0000 0x12000>;
 443                 };
 444
 445                 icram1: sram@e63c0000 {
 446                         compatible = "mmio-sram";
 447                         reg = <0 0xe63c0000 0 0x1000>;
 448                         #address-cells = <1>;
 449                         #size-cells = <1>;
 450                         ranges = <0 0 0xe63c0000 0x1000>;
 451
 452                         smp-sram@0 {
 453                                 compatible = "renesas,smp-sram";
 454                                 reg = <0 0x100>;
 455                         };
 456                 };
 457
 458                 icram2: sram@e6300000 {
 459                         compatible = "mmio-sram";
 460                         reg = <0 0xe6300000 0 0x40000>;
 461                         #address-cells = <1>;
 462                         #size-cells = <1>;
 463                         ranges = <0 0 0xe6300000 0x40000>;
 464                 };
 465
 466                 i2c0: i2c@e6508000 {
 467                         #address-cells = <1>;
 468                         #size-cells = <0>;
 469                         compatible = "renesas,i2c-r8a7742",
 470                                      "renesas,rcar-gen2-i2c";
 471                         reg = <0 0xe6508000 0 0x40>;
 472                         interrupts = <GIC_SPI 287 IRQ_TYPE_LEVEL_HIGH>;
 473                         clocks = <&cpg CPG_MOD 931>;
 474                         power-domains = <&sysc R8A7742_PD_ALWAYS_ON>;
 475                         resets = <&cpg 931>;
 476                         i2c-scl-internal-delay-ns = <110>;
 477                         status = "disabled";
 478                 };
 479
 480                 i2c1: i2c@e6518000 {
 481                         #address-cells = <1>;
 482                         #size-cells = <0>;
 483                         compatible = "renesas,i2c-r8a7742",
 484                                      "renesas,rcar-gen2-i2c";
 485                         reg = <0 0xe6518000 0 0x40>;
 486                         interrupts = <GIC_SPI 288 IRQ_TYPE_LEVEL_HIGH>;
 487                         clocks = <&cpg CPG_MOD 930>;
 488                         power-domains = <&sysc R8A7742_PD_ALWAYS_ON>;
 489                         resets = <&cpg 930>;
 490                         i2c-scl-internal-delay-ns = <6>;
 491                         status = "disabled";
 492                 };
 493
 494                 i2c2: i2c@e6530000 {
 495                         #address-cells = <1>;
 496                         #size-cells = <0>;
 497                         compatible = "renesas,i2c-r8a7742",
 498                                      "renesas,rcar-gen2-i2c";
 499                         reg = <0 0xe6530000 0 0x40>;
 500                         interrupts = <GIC_SPI 286 IRQ_TYPE_LEVEL_HIGH>;
 501                         clocks = <&cpg CPG_MOD 929>;
 502                         power-domains = <&sysc R8A7742_PD_ALWAYS_ON>;
 503                         resets = <&cpg 929>;
 504                         i2c-scl-internal-delay-ns = <6>;
 505                         status = "disabled";
 506                 };
 507
 508                 i2c3: i2c@e6540000 {
 509                         #address-cells = <1>;
 510                         #size-cells = <0>;
 511                         compatible = "renesas,i2c-r8a7742",
 512                                      "renesas,rcar-gen2-i2c";
 513                         reg = <0 0xe6540000 0 0x40>;
 514                         interrupts = <GIC_SPI 290 IRQ_TYPE_LEVEL_HIGH>;
 515                         clocks = <&cpg CPG_MOD 928>;
 516                         power-domains = <&sysc R8A7742_PD_ALWAYS_ON>;
 517                         resets = <&cpg 928>;
 518                         i2c-scl-internal-delay-ns = <110>;
 519                         status = "disabled";
 520                 };
 521
 522                 iic0: i2c@e6500000 {
 523                         #address-cells = <1>;
 524                         #size-cells = <0>;
 525                         compatible = "renesas,iic-r8a7742",
 526                                      "renesas,rcar-gen2-iic",
 527                                      "renesas,rmobile-iic";
 528                         reg = <0 0xe6500000 0 0x425>;
 529                         interrupts = <GIC_SPI 174 IRQ_TYPE_LEVEL_HIGH>;
 530                         clocks = <&cpg CPG_MOD 318>;
 531                         dmas = <&dmac0 0x61>, <&dmac0 0x62>,
 532                                <&dmac1 0x61>, <&dmac1 0x62>;
 533                         dma-names = "tx", "rx", "tx", "rx";
 534                         power-domains = <&sysc R8A7742_PD_ALWAYS_ON>;
 535                         resets = <&cpg 318>;
 536                         status = "disabled";
 537                 };
 538
 539                 iic1: i2c@e6510000 {
 540                         #address-cells = <1>;
 541                         #size-cells = <0>;
 542                         compatible = "renesas,iic-r8a7742",
 543                                      "renesas,rcar-gen2-iic",
 544                                      "renesas,rmobile-iic";
 545                         reg = <0 0xe6510000 0 0x425>;
 546                         interrupts = <GIC_SPI 175 IRQ_TYPE_LEVEL_HIGH>;
 547                         clocks = <&cpg CPG_MOD 323>;
 548                         dmas = <&dmac0 0x65>, <&dmac0 0x66>,
 549                                <&dmac1 0x65>, <&dmac1 0x66>;
 550                         dma-names = "tx", "rx", "tx", "rx";
 551                         power-domains = <&sysc R8A7742_PD_ALWAYS_ON>;
 552                         resets = <&cpg 323>;
 553                         status = "disabled";
 554                 };
 555
 556                 iic2: i2c@e6520000 {
 557                         #address-cells = <1>;
 558                         #size-cells = <0>;
 559                         compatible = "renesas,iic-r8a7742",
 560                                      "renesas,rcar-gen2-iic",
 561                                      "renesas,rmobile-iic";
 562                         reg = <0 0xe6520000 0 0x425>;
 563                         interrupts = <GIC_SPI 176 IRQ_TYPE_LEVEL_HIGH>;
 564                         clocks = <&cpg CPG_MOD 300>;
 565                         dmas = <&dmac0 0x69>, <&dmac0 0x6a>,
 566                                <&dmac1 0x69>, <&dmac1 0x6a>;
 567                         dma-names = "tx", "rx", "tx", "rx";
 568                         power-domains = <&sysc R8A7742_PD_ALWAYS_ON>;
 569                         resets = <&cpg 300>;
 570                         status = "disabled";
 571                 };
 572
 573                 iic3: i2c@e60b0000 {
 574                         #address-cells = <1>;
 575                         #size-cells = <0>;
 576                         compatible = "renesas,iic-r8a7742";
 577                         reg = <0 0xe60b0000 0 0x425>;
 578                         interrupts = <GIC_SPI 173 IRQ_TYPE_LEVEL_HIGH>;
 579                         clocks = <&cpg CPG_MOD 926>;
 580                         dmas = <&dmac0 0x77>, <&dmac0 0x78>,
 581                                <&dmac1 0x77>, <&dmac1 0x78>;
 582                         dma-names = "tx", "rx", "tx", "rx";
 583                         power-domains = <&sysc R8A7742_PD_ALWAYS_ON>;
 584                         resets = <&cpg 926>;
 585                         status = "disabled";
 586                 };
 587
 588                 hsusb: usb@e6590000 {
 589                         compatible = "renesas,usbhs-r8a7742",
 590                                      "renesas,rcar-gen2-usbhs";
 591                         reg = <0 0xe6590000 0 0x100>;
 592                         interrupts = <GIC_SPI 107 IRQ_TYPE_LEVEL_HIGH>;
 593                         clocks = <&cpg CPG_MOD 704>;
 594                         dmas = <&usb_dmac0 0>, <&usb_dmac0 1>,
 595                                <&usb_dmac1 0>, <&usb_dmac1 1>;
 596                         dma-names = "ch0", "ch1", "ch2", "ch3";
 597                         power-domains = <&sysc R8A7742_PD_ALWAYS_ON>;
 598                         resets = <&cpg 704>;
 599                         renesas,buswait = <4>;
 600                         phys = <&usb0 1>;
 601                         phy-names = "usb";
 602                         status = "disabled";
 603                 };
 604
 605                 usbphy: usb-phy@e6590100 {
 606                         compatible = "renesas,usb-phy-r8a7742",
 607                                      "renesas,rcar-gen2-usb-phy";
 608                         reg = <0 0xe6590100 0 0x100>;
 609                         #address-cells = <1>;
 610                         #size-cells = <0>;
 611                         clocks = <&cpg CPG_MOD 704>;
 612                         clock-names = "usbhs";
 613                         power-domains = <&sysc R8A7742_PD_ALWAYS_ON>;
 614                         resets = <&cpg 704>;
 615                         status = "disabled";
 616
 617                         usb0: usb-channel@0 {
 618                                 reg = <0>;
 619                                 #phy-cells = <1>;
 620                         };
 621                         usb2: usb-channel@2 {
 622                                 reg = <2>;
 623                                 #phy-cells = <1>;
 624                         };
 625                 };
 626
 627                 usb_dmac0: dma-controller@e65a0000 {
 628                         compatible = "renesas,r8a7742-usb-dmac",
 629                                      "renesas,usb-dmac";
 630                         reg = <0 0xe65a0000 0 0x100>;
 631                         interrupts = <GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH>,
 632                                      <GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH>;
 633                         interrupt-names = "ch0", "ch1";
 634                         clocks = <&cpg CPG_MOD 330>;
 635                         power-domains = <&sysc R8A7742_PD_ALWAYS_ON>;
 636                         resets = <&cpg 330>;
 637                         #dma-cells = <1>;
 638                         dma-channels = <2>;
 639                 };
 640
 641                 usb_dmac1: dma-controller@e65b0000 {
 642                         compatible = "renesas,r8a7742-usb-dmac",
 643                                      "renesas,usb-dmac";
 644                         reg = <0 0xe65b0000 0 0x100>;
 645                         interrupts = <GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH>,
 646                                      <GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH>;
 647                         interrupt-names = "ch0", "ch1";
 648                         clocks = <&cpg CPG_MOD 331>;
 649                         power-domains = <&sysc R8A7742_PD_ALWAYS_ON>;
 650                         resets = <&cpg 331>;
 651                         #dma-cells = <1>;
 652                         dma-channels = <2>;
 653                 };
 654
 655                 dmac0: dma-controller@e6700000 {
 656                         compatible = "renesas,dmac-r8a7742",
 657                                      "renesas,rcar-dmac";
 658                         reg = <0 0xe6700000 0 0x20000>;
 659                         interrupts = <GIC_SPI 197 IRQ_TYPE_LEVEL_HIGH>,
 660                                      <GIC_SPI 200 IRQ_TYPE_LEVEL_HIGH>,
 661                                      <GIC_SPI 201 IRQ_TYPE_LEVEL_HIGH>,
 662                                      <GIC_SPI 202 IRQ_TYPE_LEVEL_HIGH>,
 663                                      <GIC_SPI 203 IRQ_TYPE_LEVEL_HIGH>,
 664                                      <GIC_SPI 204 IRQ_TYPE_LEVEL_HIGH>,
 665                                      <GIC_SPI 205 IRQ_TYPE_LEVEL_HIGH>,
 666                                      <GIC_SPI 206 IRQ_TYPE_LEVEL_HIGH>,
 667                                      <GIC_SPI 207 IRQ_TYPE_LEVEL_HIGH>,
 668                                      <GIC_SPI 208 IRQ_TYPE_LEVEL_HIGH>,
 669                                      <GIC_SPI 209 IRQ_TYPE_LEVEL_HIGH>,
 670                                      <GIC_SPI 210 IRQ_TYPE_LEVEL_HIGH>,
 671                                      <GIC_SPI 211 IRQ_TYPE_LEVEL_HIGH>,
 672                                      <GIC_SPI 212 IRQ_TYPE_LEVEL_HIGH>,
 673                                      <GIC_SPI 213 IRQ_TYPE_LEVEL_HIGH>,
 674                                      <GIC_SPI 214 IRQ_TYPE_LEVEL_HIGH>;
 675                         interrupt-names = "error",
 676                                           "ch0", "ch1", "ch2", "ch3",
 677                                           "ch4", "ch5", "ch6", "ch7",
 678                                           "ch8", "ch9", "ch10", "ch11",
 679                                           "ch12", "ch13", "ch14";
 680                         clocks = <&cpg CPG_MOD 219>;
 681                         clock-names = "fck";
 682                         power-domains = <&sysc R8A7742_PD_ALWAYS_ON>;
 683                         resets = <&cpg 219>;
 684                         #dma-cells = <1>;
 685                         dma-channels = <15>;
 686                 };
 687
 688                 dmac1: dma-controller@e6720000 {
 689                         compatible = "renesas,dmac-r8a7742",
 690                                      "renesas,rcar-dmac";
 691                         reg = <0 0xe6720000 0 0x20000>;
 692                         interrupts = <GIC_SPI 220 IRQ_TYPE_LEVEL_HIGH>,
 693                                      <GIC_SPI 216 IRQ_TYPE_LEVEL_HIGH>,
 694                                      <GIC_SPI 217 IRQ_TYPE_LEVEL_HIGH>,
 695                                      <GIC_SPI 218 IRQ_TYPE_LEVEL_HIGH>,
 696                                      <GIC_SPI 219 IRQ_TYPE_LEVEL_HIGH>,
 697                                      <GIC_SPI 308 IRQ_TYPE_LEVEL_HIGH>,
 698                                      <GIC_SPI 309 IRQ_TYPE_LEVEL_HIGH>,
 699                                      <GIC_SPI 310 IRQ_TYPE_LEVEL_HIGH>,
 700                                      <GIC_SPI 311 IRQ_TYPE_LEVEL_HIGH>,
 701                                      <GIC_SPI 312 IRQ_TYPE_LEVEL_HIGH>,
 702                                      <GIC_SPI 313 IRQ_TYPE_LEVEL_HIGH>,
 703                                      <GIC_SPI 314 IRQ_TYPE_LEVEL_HIGH>,
 704                                      <GIC_SPI 315 IRQ_TYPE_LEVEL_HIGH>,
 705                                      <GIC_SPI 316 IRQ_TYPE_LEVEL_HIGH>,
 706                                      <GIC_SPI 317 IRQ_TYPE_LEVEL_HIGH>,
 707                                      <GIC_SPI 318 IRQ_TYPE_LEVEL_HIGH>;
 708                         interrupt-names = "error",
 709                                           "ch0", "ch1", "ch2", "ch3",
 710                                           "ch4", "ch5", "ch6", "ch7",
 711                                           "ch8", "ch9", "ch10", "ch11",
 712                                           "ch12", "ch13", "ch14";
 713                         clocks = <&cpg CPG_MOD 218>;
 714                         clock-names = "fck";
 715                         power-domains = <&sysc R8A7742_PD_ALWAYS_ON>;
 716                         resets = <&cpg 218>;
 717                         #dma-cells = <1>;
 718                         dma-channels = <15>;
 719                 };
 720
 721                 avb: ethernet@e6800000 {
 722                         compatible = "renesas,etheravb-r8a7742",
 723                                      "renesas,etheravb-rcar-gen2";
 724                         reg = <0 0xe6800000 0 0x800>, <0 0xee0e8000 0 0x4000>;
 725                         interrupts = <GIC_SPI 163 IRQ_TYPE_LEVEL_HIGH>;
 726                         clocks = <&cpg CPG_MOD 812>;
 727                         power-domains = <&sysc R8A7742_PD_ALWAYS_ON>;
 728                         resets = <&cpg 812>;
 729                         #address-cells = <1>;
 730                         #size-cells = <0>;
 731                         status = "disabled";
 732                 };
 733
 734                 scifa0: serial@e6c40000 {
 735                         compatible = "renesas,scifa-r8a7742",
 736                                      "renesas,rcar-gen2-scifa", "renesas,scifa";
 737                         reg = <0 0xe6c40000 0 0x40>;
 738                         interrupts = <GIC_SPI 144 IRQ_TYPE_LEVEL_HIGH>;
 739                         clocks = <&cpg CPG_MOD 204>;
 740                         clock-names = "fck";
 741                         dmas = <&dmac0 0x21>, <&dmac0 0x22>,
 742                                <&dmac1 0x21>, <&dmac1 0x22>;
 743                         dma-names = "tx", "rx", "tx", "rx";
 744                         power-domains = <&sysc R8A7742_PD_ALWAYS_ON>;
 745                         resets = <&cpg 204>;
 746                         status = "disabled";
 747                 };
 748
 749                 scifa1: serial@e6c50000 {
 750                         compatible = "renesas,scifa-r8a7742",
 751                                      "renesas,rcar-gen2-scifa", "renesas,scifa";
 752                         reg = <0 0xe6c50000 0 0x40>;
 753                         interrupts = <GIC_SPI 145 IRQ_TYPE_LEVEL_HIGH>;
 754                         clocks = <&cpg CPG_MOD 203>;
 755                         clock-names = "fck";
 756                         dmas = <&dmac0 0x25>, <&dmac0 0x26>,
 757                                <&dmac1 0x25>, <&dmac1 0x26>;
 758                         dma-names = "tx", "rx", "tx", "rx";
 759                         power-domains = <&sysc R8A7742_PD_ALWAYS_ON>;
 760                         resets = <&cpg 203>;
 761                         status = "disabled";
 762                 };
 763
 764                 scifa2: serial@e6c60000 {
 765                         compatible = "renesas,scifa-r8a7742",
 766                                      "renesas,rcar-gen2-scifa", "renesas,scifa";
 767                         reg = <0 0xe6c60000 0 0x40>;
 768                         interrupts = <GIC_SPI 151 IRQ_TYPE_LEVEL_HIGH>;
 769                         clocks = <&cpg CPG_MOD 202>;
 770                         clock-names = "fck";
 771                         dmas = <&dmac0 0x27>, <&dmac0 0x28>,
 772                                <&dmac1 0x27>, <&dmac1 0x28>;
 773                         dma-names = "tx", "rx", "tx", "rx";
 774                         power-domains = <&sysc R8A7742_PD_ALWAYS_ON>;
 775                         resets = <&cpg 202>;
 776                         status = "disabled";
 777                 };
 778
 779                 scifb0: serial@e6c20000 {
 780                         compatible = "renesas,scifb-r8a7742",
 781                                      "renesas,rcar-gen2-scifb", "renesas,scifb";
 782                         reg = <0 0xe6c20000 0 0x100>;
 783                         interrupts = <GIC_SPI 148 IRQ_TYPE_LEVEL_HIGH>;
 784                         clocks = <&cpg CPG_MOD 206>;
 785                         clock-names = "fck";
 786                         dmas = <&dmac0 0x3d>, <&dmac0 0x3e>,
 787                                <&dmac1 0x3d>, <&dmac1 0x3e>;
 788                         dma-names = "tx", "rx", "tx", "rx";
 789                         power-domains = <&sysc R8A7742_PD_ALWAYS_ON>;
 790                         resets = <&cpg 206>;
 791                         status = "disabled";
 792                 };
 793
 794                 scifb1: serial@e6c30000 {
 795                         compatible = "renesas,scifb-r8a7742",
 796                                      "renesas,rcar-gen2-scifb", "renesas,scifb";
 797                         reg = <0 0xe6c30000 0 0x100>;
 798                         interrupts = <GIC_SPI 149 IRQ_TYPE_LEVEL_HIGH>;
 799                         clocks = <&cpg CPG_MOD 207>;
 800                         clock-names = "fck";
 801                         dmas = <&dmac0 0x19>, <&dmac0 0x1a>,
 802                                <&dmac1 0x19>, <&dmac1 0x1a>;
 803                         dma-names = "tx", "rx", "tx", "rx";
 804                         power-domains = <&sysc R8A7742_PD_ALWAYS_ON>;
 805                         resets = <&cpg 207>;
 806                         status = "disabled";
 807                 };
 808
 809                 scifb2: serial@e6ce0000 {
 810                         compatible = "renesas,scifb-r8a7742",
 811                                      "renesas,rcar-gen2-scifb", "renesas,scifb";
 812                         reg = <0 0xe6ce0000 0 0x100>;
 813                         interrupts = <GIC_SPI 150 IRQ_TYPE_LEVEL_HIGH>;
 814                         clocks = <&cpg CPG_MOD 216>;
 815                         clock-names = "fck";
 816                         dmas = <&dmac0 0x1d>, <&dmac0 0x1e>,
 817                                <&dmac1 0x1d>, <&dmac1 0x1e>;
 818                         dma-names = "tx", "rx", "tx", "rx";
 819                         power-domains = <&sysc R8A7742_PD_ALWAYS_ON>;
 820                         resets = <&cpg 216>;
 821                         status = "disabled";
 822                 };
 823
 824                 scif0: serial@e6e60000 {
 825                         compatible = "renesas,scif-r8a7742",
 826                                      "renesas,rcar-gen2-scif", "renesas,scif";
 827                         reg = <0 0xe6e60000 0 0x40>;
 828                         interrupts = <GIC_SPI 152 IRQ_TYPE_LEVEL_HIGH>;
 829                         clocks = <&cpg CPG_MOD 721>,
 830                                  <&cpg CPG_CORE R8A7742_CLK_ZS>, <&scif_clk>;
 831                         clock-names = "fck", "brg_int", "scif_clk";
 832                         dmas = <&dmac0 0x29>, <&dmac0 0x2a>,
 833                                <&dmac1 0x29>, <&dmac1 0x2a>;
 834                         dma-names = "tx", "rx", "tx", "rx";
 835                         power-domains = <&sysc R8A7742_PD_ALWAYS_ON>;
 836                         resets = <&cpg 721>;
 837                         status = "disabled";
 838                 };
 839
 840                 scif1: serial@e6e68000 {
 841                         compatible = "renesas,scif-r8a7742",
 842                                      "renesas,rcar-gen2-scif", "renesas,scif";
 843                         reg = <0 0xe6e68000 0 0x40>;
 844                         interrupts = <GIC_SPI 153 IRQ_TYPE_LEVEL_HIGH>;
 845                         clocks = <&cpg CPG_MOD 720>,
 846                                  <&cpg CPG_CORE R8A7742_CLK_ZS>, <&scif_clk>;
 847                         clock-names = "fck", "brg_int", "scif_clk";
 848                         dmas = <&dmac0 0x2d>, <&dmac0 0x2e>,
 849                                <&dmac1 0x2d>, <&dmac1 0x2e>;
 850                         dma-names = "tx", "rx", "tx", "rx";
 851                         power-domains = <&sysc R8A7742_PD_ALWAYS_ON>;
 852                         resets = <&cpg 720>;
 853                         status = "disabled";
 854                 };
 855
 856                 scif2: serial@e6e56000 {
 857                         compatible = "renesas,scif-r8a7742",
 858                                      "renesas,rcar-gen2-scif", "renesas,scif";
 859                         reg = <0 0xe6e56000 0 0x40>;
 860                         interrupts = <GIC_SPI 164 IRQ_TYPE_LEVEL_HIGH>;
 861                         clocks = <&cpg CPG_MOD 310>,
 862                                  <&cpg CPG_CORE R8A7742_CLK_ZS>, <&scif_clk>;
 863                         clock-names = "fck", "brg_int", "scif_clk";
 864                         dmas = <&dmac0 0x2b>, <&dmac0 0x2c>,
 865                                <&dmac1 0x2b>, <&dmac1 0x2c>;
 866                         dma-names = "tx", "rx", "tx", "rx";
 867                         power-domains = <&sysc R8A7742_PD_ALWAYS_ON>;
 868                         resets = <&cpg 310>;
 869                         status = "disabled";
 870                 };
 871
 872                 hscif0: serial@e62c0000 {
 873                         compatible = "renesas,hscif-r8a7742",
 874                                      "renesas,rcar-gen2-hscif", "renesas,hscif";
 875                         reg = <0 0xe62c0000 0 0x60>;
 876                         interrupts = <GIC_SPI 154 IRQ_TYPE_LEVEL_HIGH>;
 877                         clocks = <&cpg CPG_MOD 717>,
 878                                  <&cpg CPG_CORE R8A7742_CLK_ZS>, <&scif_clk>;
 879                         clock-names = "fck", "brg_int", "scif_clk";
 880                         dmas = <&dmac0 0x39>, <&dmac0 0x3a>,
 881                                <&dmac1 0x39>, <&dmac1 0x3a>;
 882                         dma-names = "tx", "rx", "tx", "rx";
 883                         power-domains = <&sysc R8A7742_PD_ALWAYS_ON>;
 884                         resets = <&cpg 717>;
 885                         status = "disabled";
 886                 };
 887
 888                 hscif1: serial@e62c8000 {
 889                         compatible = "renesas,hscif-r8a7742",
 890                                      "renesas,rcar-gen2-hscif", "renesas,hscif";
 891                         reg = <0 0xe62c8000 0 0x60>;
 892                         interrupts = <GIC_SPI 155 IRQ_TYPE_LEVEL_HIGH>;
 893                         clocks = <&cpg CPG_MOD 716>,
 894                                  <&cpg CPG_CORE R8A7742_CLK_ZS>, <&scif_clk>;
 895                         clock-names = "fck", "brg_int", "scif_clk";
 896                         dmas = <&dmac0 0x4d>, <&dmac0 0x4e>,
 897                                <&dmac1 0x4d>, <&dmac1 0x4e>;
 898                         dma-names = "tx", "rx", "tx", "rx";
 899                         power-domains = <&sysc R8A7742_PD_ALWAYS_ON>;
 900                         resets = <&cpg 716>;
 901                         status = "disabled";
 902                 };
 903
 904                 msiof0: spi@e6e20000 {
 905                         compatible = "renesas,msiof-r8a7742",
 906                                      "renesas,rcar-gen2-msiof";
 907                         reg = <0 0xe6e20000 0 0x0064>;
 908                         interrupts = <GIC_SPI 156 IRQ_TYPE_LEVEL_HIGH>;
 909                         clocks = <&cpg CPG_MOD 0>;
 910                         dmas = <&dmac0 0x51>, <&dmac0 0x52>,
 911                                <&dmac1 0x51>, <&dmac1 0x52>;
 912                         dma-names = "tx", "rx", "tx", "rx";
 913                         power-domains = <&sysc R8A7742_PD_ALWAYS_ON>;
 914                         resets = <&cpg 0>;
 915                         #address-cells = <1>;
 916                         #size-cells = <0>;
 917                         status = "disabled";
 918                 };
 919
 920                 msiof1: spi@e6e10000 {
 921                         compatible = "renesas,msiof-r8a7742",
 922                                      "renesas,rcar-gen2-msiof";
 923                         reg = <0 0xe6e10000 0 0x0064>;
 924                         interrupts = <GIC_SPI 157 IRQ_TYPE_LEVEL_HIGH>;
 925                         clocks = <&cpg CPG_MOD 208>;
 926                         dmas = <&dmac0 0x55>, <&dmac0 0x56>,
 927                                <&dmac1 0x55>, <&dmac1 0x56>;
 928                         dma-names = "tx", "rx", "tx", "rx";
 929                         power-domains = <&sysc R8A7742_PD_ALWAYS_ON>;
 930                         resets = <&cpg 208>;
 931                         #address-cells = <1>;
 932                         #size-cells = <0>;
 933                         status = "disabled";
 934                 };
 935
 936                 msiof2: spi@e6e00000 {
 937                         compatible = "renesas,msiof-r8a7742",
 938                                      "renesas,rcar-gen2-msiof";
 939                         reg = <0 0xe6e00000 0 0x0064>;
 940                         interrupts = <GIC_SPI 158 IRQ_TYPE_LEVEL_HIGH>;
 941                         clocks = <&cpg CPG_MOD 205>;
 942                         dmas = <&dmac0 0x41>, <&dmac0 0x42>,
 943                                <&dmac1 0x41>, <&dmac1 0x42>;
 944                         dma-names = "tx", "rx", "tx", "rx";
 945                         power-domains = <&sysc R8A7742_PD_ALWAYS_ON>;
 946                         resets = <&cpg 205>;
 947                         #address-cells = <1>;
 948                         #size-cells = <0>;
 949                         status = "disabled";
 950                 };
 951
 952                 msiof3: spi@e6c90000 {
 953                         compatible = "renesas,msiof-r8a7742",
 954                                      "renesas,rcar-gen2-msiof";
 955                         reg = <0 0xe6c90000 0 0x0064>;
 956                         interrupts = <GIC_SPI 159 IRQ_TYPE_LEVEL_HIGH>;
 957                         clocks = <&cpg CPG_MOD 215>;
 958                         dmas = <&dmac0 0x45>, <&dmac0 0x46>,
 959                                <&dmac1 0x45>, <&dmac1 0x46>;
 960                         dma-names = "tx", "rx", "tx", "rx";
 961                         power-domains = <&sysc R8A7742_PD_ALWAYS_ON>;
 962                         resets = <&cpg 215>;
 963                         #address-cells = <1>;
 964                         #size-cells = <0>;
 965                         status = "disabled";
 966                 };
 967
 968                 rcar_sound: sound@ec500000 {
 969                         /*
 970                          * #sound-dai-cells is required
 971                          *
 972                          * Single DAI : #sound-dai-cells = <0>;         <&rcar_sound>;
 973                          * Multi  DAI : #sound-dai-cells = <1>;         <&rcar_sound N>;
 974                          */
 975                         compatible = "renesas,rcar_sound-r8a7742",
 976                                      "renesas,rcar_sound-gen2";
 977                         reg = <0 0xec500000 0 0x1000>, /* SCU */
 978                               <0 0xec5a0000 0 0x100>,  /* ADG */
 979                               <0 0xec540000 0 0x1000>, /* SSIU */
 980                               <0 0xec541000 0 0x280>,  /* SSI */
 981                               <0 0xec740000 0 0x200>;  /* Audio DMAC peri peri*/
 982                         reg-names = "scu", "adg", "ssiu", "ssi", "audmapp";
 983
 984                         clocks = <&cpg CPG_MOD 1005>,
 985                                  <&cpg CPG_MOD 1006>, <&cpg CPG_MOD 1007>,
 986                                  <&cpg CPG_MOD 1008>, <&cpg CPG_MOD 1009>,
 987                                  <&cpg CPG_MOD 1010>, <&cpg CPG_MOD 1011>,
 988                                  <&cpg CPG_MOD 1012>, <&cpg CPG_MOD 1013>,
 989                                  <&cpg CPG_MOD 1014>, <&cpg CPG_MOD 1015>,
 990                                  <&cpg CPG_MOD 1022>, <&cpg CPG_MOD 1023>,
 991                                  <&cpg CPG_MOD 1024>, <&cpg CPG_MOD 1025>,
 992                                  <&cpg CPG_MOD 1026>, <&cpg CPG_MOD 1027>,
 993                                  <&cpg CPG_MOD 1028>, <&cpg CPG_MOD 1029>,
 994                                  <&cpg CPG_MOD 1030>, <&cpg CPG_MOD 1031>,
 995                                  <&cpg CPG_MOD 1021>, <&cpg CPG_MOD 1020>,
 996                                  <&cpg CPG_MOD 1021>, <&cpg CPG_MOD 1020>,
 997                                  <&cpg CPG_MOD 1019>, <&cpg CPG_MOD 1018>,
 998                                  <&audio_clk_a>, <&audio_clk_b>, <&audio_clk_c>,
 999                                  <&cpg CPG_CORE R8A7742_CLK_M2>;
1000                         clock-names = "ssi-all",
1001                                       "ssi.9", "ssi.8", "ssi.7", "ssi.6",
1002                                       "ssi.5", "ssi.4", "ssi.3", "ssi.2",
1003                                       "ssi.1", "ssi.0",
1004                                       "src.9", "src.8", "src.7", "src.6",
1005                                       "src.5", "src.4", "src.3", "src.2",
1006                                       "src.1", "src.0",
1007                                       "ctu.0", "ctu.1",
1008                                       "mix.0", "mix.1",
1009                                       "dvc.0", "dvc.1",
1010                                       "clk_a", "clk_b", "clk_c", "clk_i";
1011                         power-domains = <&sysc R8A7742_PD_ALWAYS_ON>;
1012                         resets = <&cpg 1005>,
1013                                  <&cpg 1006>, <&cpg 1007>,
1014                                  <&cpg 1008>, <&cpg 1009>,
1015                                  <&cpg 1010>, <&cpg 1011>,
1016                                  <&cpg 1012>, <&cpg 1013>,
1017                                  <&cpg 1014>, <&cpg 1015>;
1018                         reset-names = "ssi-all",
1019                                       "ssi.9", "ssi.8", "ssi.7", "ssi.6",
1020                                       "ssi.5", "ssi.4", "ssi.3", "ssi.2",
1021                                       "ssi.1", "ssi.0";
1022
1023                         status = "disabled";
1024
1025                         rcar_sound,dvc {
1026                                 dvc0: dvc-0 {
1027                                         dmas = <&audma1 0xbc>;
1028                                         dma-names = "tx";
1029                                 };
1030                                 dvc1: dvc-1 {
1031                                         dmas = <&audma1 0xbe>;
1032                                         dma-names = "tx";
1033                                 };
1034                         };
1035
1036                         rcar_sound,mix {
1037                                 mix0: mix-0 { };
1038                                 mix1: mix-1 { };
1039                         };
1040
1041                         rcar_sound,ctu {
1042                                 ctu00: ctu-0 { };
1043                                 ctu01: ctu-1 { };
1044                                 ctu02: ctu-2 { };
1045                                 ctu03: ctu-3 { };
1046                                 ctu10: ctu-4 { };
1047                                 ctu11: ctu-5 { };
1048                                 ctu12: ctu-6 { };
1049                                 ctu13: ctu-7 { };
1050                         };
1051
1052                         rcar_sound,src {
1053                                 src0: src-0 {
1054                                         interrupts = <GIC_SPI 352 IRQ_TYPE_LEVEL_HIGH>;
1055                                         dmas = <&audma0 0x85>, <&audma1 0x9a>;
1056                                         dma-names = "rx", "tx";
1057                                 };
1058                                 src1: src-1 {
1059                                         interrupts = <GIC_SPI 353 IRQ_TYPE_LEVEL_HIGH>;
1060                                         dmas = <&audma0 0x87>, <&audma1 0x9c>;
1061                                         dma-names = "rx", "tx";
1062                                 };
1063                                 src2: src-2 {
1064                                         interrupts = <GIC_SPI 354 IRQ_TYPE_LEVEL_HIGH>;
1065                                         dmas = <&audma0 0x89>, <&audma1 0x9e>;
1066                                         dma-names = "rx", "tx";
1067                                 };
1068                                 src3: src-3 {
1069                                         interrupts = <GIC_SPI 355 IRQ_TYPE_LEVEL_HIGH>;
1070                                         dmas = <&audma0 0x8b>, <&audma1 0xa0>;
1071                                         dma-names = "rx", "tx";
1072                                 };
1073                                 src4: src-4 {
1074                                         interrupts = <GIC_SPI 356 IRQ_TYPE_LEVEL_HIGH>;
1075                                         dmas = <&audma0 0x8d>, <&audma1 0xb0>;
1076                                         dma-names = "rx", "tx";
1077                                 };
1078                                 src5: src-5 {
1079                                         interrupts = <GIC_SPI 357 IRQ_TYPE_LEVEL_HIGH>;
1080                                         dmas = <&audma0 0x8f>, <&audma1 0xb2>;
1081                                         dma-names = "rx", "tx";
1082                                 };
1083                                 src6: src-6 {
1084                                         interrupts = <GIC_SPI 358 IRQ_TYPE_LEVEL_HIGH>;
1085                                         dmas = <&audma0 0x91>, <&audma1 0xb4>;
1086                                         dma-names = "rx", "tx";
1087                                 };
1088                                 src7: src-7 {
1089                                         interrupts = <GIC_SPI 359 IRQ_TYPE_LEVEL_HIGH>;
1090                                         dmas = <&audma0 0x93>, <&audma1 0xb6>;
1091                                         dma-names = "rx", "tx";
1092                                 };
1093                                 src8: src-8 {
1094                                         interrupts = <GIC_SPI 360 IRQ_TYPE_LEVEL_HIGH>;
1095                                         dmas = <&audma0 0x95>, <&audma1 0xb8>;
1096                                         dma-names = "rx", "tx";
1097                                 };
1098                                 src9: src-9 {
1099                                         interrupts = <GIC_SPI 361 IRQ_TYPE_LEVEL_HIGH>;
1100                                         dmas = <&audma0 0x97>, <&audma1 0xba>;
1101                                         dma-names = "rx", "tx";
1102                                 };
1103                         };
1104
1105                         rcar_sound,ssi {
1106                                 ssi0: ssi-0 {
1107                                         interrupts = <GIC_SPI 370 IRQ_TYPE_LEVEL_HIGH>;
1108                                         dmas = <&audma0 0x01>, <&audma1 0x02>,
1109                                                <&audma0 0x15>, <&audma1 0x16>;
1110                                         dma-names = "rx", "tx", "rxu", "txu";
1111                                 };
1112                                 ssi1: ssi-1 {
1113                                          interrupts = <GIC_SPI 371 IRQ_TYPE_LEVEL_HIGH>;
1114                                         dmas = <&audma0 0x03>, <&audma1 0x04>,
1115                                                <&audma0 0x49>, <&audma1 0x4a>;
1116                                         dma-names = "rx", "tx", "rxu", "txu";
1117                                 };
1118                                 ssi2: ssi-2 {
1119                                         interrupts = <GIC_SPI 372 IRQ_TYPE_LEVEL_HIGH>;
1120                                         dmas = <&audma0 0x05>, <&audma1 0x06>,
1121                                                <&audma0 0x63>, <&audma1 0x64>;
1122                                         dma-names = "rx", "tx", "rxu", "txu";
1123                                 };
1124                                 ssi3: ssi-3 {
1125                                         interrupts = <GIC_SPI 373 IRQ_TYPE_LEVEL_HIGH>;
1126                                         dmas = <&audma0 0x07>, <&audma1 0x08>,
1127                                                <&audma0 0x6f>, <&audma1 0x70>;
1128                                         dma-names = "rx", "tx", "rxu", "txu";
1129                                 };
1130                                 ssi4: ssi-4 {
1131                                         interrupts = <GIC_SPI 374 IRQ_TYPE_LEVEL_HIGH>;
1132                                         dmas = <&audma0 0x09>, <&audma1 0x0a>,
1133                                                <&audma0 0x71>, <&audma1 0x72>;
1134                                         dma-names = "rx", "tx", "rxu", "txu";
1135                                 };
1136                                 ssi5: ssi-5 {
1137                                         interrupts = <GIC_SPI 375 IRQ_TYPE_LEVEL_HIGH>;
1138                                         dmas = <&audma0 0x0b>, <&audma1 0x0c>,
1139                                                <&audma0 0x73>, <&audma1 0x74>;
1140                                         dma-names = "rx", "tx", "rxu", "txu";
1141                                 };
1142                                 ssi6: ssi-6 {
1143                                         interrupts = <GIC_SPI 376 IRQ_TYPE_LEVEL_HIGH>;
1144                                         dmas = <&audma0 0x0d>, <&audma1 0x0e>,
1145                                                <&audma0 0x75>, <&audma1 0x76>;
1146                                         dma-names = "rx", "tx", "rxu", "txu";
1147                                 };
1148                                 ssi7: ssi-7 {
1149                                         interrupts = <GIC_SPI 377 IRQ_TYPE_LEVEL_HIGH>;
1150                                         dmas = <&audma0 0x0f>, <&audma1 0x10>,
1151                                                <&audma0 0x79>, <&audma1 0x7a>;
1152                                         dma-names = "rx", "tx", "rxu", "txu";
1153                                 };
1154                                 ssi8: ssi-8 {
1155                                         interrupts = <GIC_SPI 378 IRQ_TYPE_LEVEL_HIGH>;
1156                                         dmas = <&audma0 0x11>, <&audma1 0x12>,
1157                                                <&audma0 0x7b>, <&audma1 0x7c>;
1158                                         dma-names = "rx", "tx", "rxu", "txu";
1159                                 };
1160                                 ssi9: ssi-9 {
1161                                         interrupts = <GIC_SPI 379 IRQ_TYPE_LEVEL_HIGH>;
1162                                         dmas = <&audma0 0x13>, <&audma1 0x14>,
1163                                                <&audma0 0x7d>, <&audma1 0x7e>;
1164                                         dma-names = "rx", "tx", "rxu", "txu";
1165                                 };
1166                         };
1167                 };
1168
1169                 audma0: dma-controller@ec700000 {
1170                         compatible = "renesas,dmac-r8a7742",
1171                                      "renesas,rcar-dmac";
1172                         reg = <0 0xec700000 0 0x10000>;
1173                         interrupts = <GIC_SPI 346 IRQ_TYPE_LEVEL_HIGH>,
1174                                      <GIC_SPI 320 IRQ_TYPE_LEVEL_HIGH>,
1175                                      <GIC_SPI 321 IRQ_TYPE_LEVEL_HIGH>,
1176                                      <GIC_SPI 322 IRQ_TYPE_LEVEL_HIGH>,
1177                                      <GIC_SPI 323 IRQ_TYPE_LEVEL_HIGH>,
1178                                      <GIC_SPI 324 IRQ_TYPE_LEVEL_HIGH>,
1179                                      <GIC_SPI 325 IRQ_TYPE_LEVEL_HIGH>,
1180                                      <GIC_SPI 326 IRQ_TYPE_LEVEL_HIGH>,
1181                                      <GIC_SPI 327 IRQ_TYPE_LEVEL_HIGH>,
1182                                      <GIC_SPI 328 IRQ_TYPE_LEVEL_HIGH>,
1183                                      <GIC_SPI 329 IRQ_TYPE_LEVEL_HIGH>,
1184                                      <GIC_SPI 330 IRQ_TYPE_LEVEL_HIGH>,
1185                                      <GIC_SPI 331 IRQ_TYPE_LEVEL_HIGH>,
1186                                      <GIC_SPI 332 IRQ_TYPE_LEVEL_HIGH>;
1187                         interrupt-names = "error",
1188                                           "ch0", "ch1", "ch2", "ch3",
1189                                           "ch4", "ch5", "ch6", "ch7",
1190                                           "ch8", "ch9", "ch10", "ch11",
1191                                           "ch12";
1192                         clocks = <&cpg CPG_MOD 502>;
1193                         clock-names = "fck";
1194                         power-domains = <&sysc R8A7742_PD_ALWAYS_ON>;
1195                         resets = <&cpg 502>;
1196                         #dma-cells = <1>;
1197                         dma-channels = <13>;
1198                 };
1199
1200                 audma1: dma-controller@ec720000 {
1201                         compatible = "renesas,dmac-r8a7742",
1202                                      "renesas,rcar-dmac";
1203                         reg = <0 0xec720000 0 0x10000>;
1204                         interrupts = <GIC_SPI 347 IRQ_TYPE_LEVEL_HIGH>,
1205                                      <GIC_SPI 333 IRQ_TYPE_LEVEL_HIGH>,
1206                                      <GIC_SPI 334 IRQ_TYPE_LEVEL_HIGH>,
1207                                      <GIC_SPI 335 IRQ_TYPE_LEVEL_HIGH>,
1208                                      <GIC_SPI 336 IRQ_TYPE_LEVEL_HIGH>,
1209                                      <GIC_SPI 337 IRQ_TYPE_LEVEL_HIGH>,
1210                                      <GIC_SPI 338 IRQ_TYPE_LEVEL_HIGH>,
1211                                      <GIC_SPI 339 IRQ_TYPE_LEVEL_HIGH>,
1212                                      <GIC_SPI 340 IRQ_TYPE_LEVEL_HIGH>,
1213                                      <GIC_SPI 341 IRQ_TYPE_LEVEL_HIGH>,
1214                                      <GIC_SPI 342 IRQ_TYPE_LEVEL_HIGH>,
1215                                      <GIC_SPI 343 IRQ_TYPE_LEVEL_HIGH>,
1216                                      <GIC_SPI 344 IRQ_TYPE_LEVEL_HIGH>,
1217                                      <GIC_SPI 345 IRQ_TYPE_LEVEL_HIGH>;
1218                         interrupt-names = "error",
1219                                           "ch0", "ch1", "ch2", "ch3",
1220                                           "ch4", "ch5", "ch6", "ch7",
1221                                           "ch8", "ch9", "ch10", "ch11",
1222                                           "ch12";
1223                         clocks = <&cpg CPG_MOD 501>;
1224                         clock-names = "fck";
1225                         power-domains = <&sysc R8A7742_PD_ALWAYS_ON>;
1226                         resets = <&cpg 501>;
1227                         #dma-cells = <1>;
1228                         dma-channels = <13>;
1229                 };
1230
1231                 xhci: usb@ee000000 {
1232                         compatible = "renesas,xhci-r8a7742",
1233                                      "renesas,rcar-gen2-xhci";
1234                         reg = <0 0xee000000 0 0xc00>;
1235                         interrupts = <GIC_SPI 101 IRQ_TYPE_LEVEL_HIGH>;
1236                         clocks = <&cpg CPG_MOD 328>;
1237                         power-domains = <&sysc R8A7742_PD_ALWAYS_ON>;
1238                         resets = <&cpg 328>;
1239                         phys = <&usb2 1>;
1240                         phy-names = "usb";
1241                         status = "disabled";
1242                 };
1243
1244                 pci0: pci@ee090000 {
1245                         compatible = "renesas,pci-r8a7742",
1246                                      "renesas,pci-rcar-gen2";
1247                         device_type = "pci";
1248                         reg = <0 0xee090000 0 0xc00>,
1249                               <0 0xee080000 0 0x1100>;
1250                         interrupts = <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>;
1251                         clocks = <&cpg CPG_MOD 703>;
1252                         power-domains = <&sysc R8A7742_PD_ALWAYS_ON>;
1253                         resets = <&cpg 703>;
1254                         status = "disabled";
1255
1256                         bus-range = <0 0>;
1257                         #address-cells = <3>;
1258                         #size-cells = <2>;
1259                         #interrupt-cells = <1>;
1260                         ranges = <0x02000000 0 0xee080000 0 0xee080000 0 0x00010000>;
1261                         interrupt-map-mask = <0xf800 0 0 0x7>;
1262                         interrupt-map = <0x0000 0 0 1 &gic GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>,
1263                                         <0x0800 0 0 1 &gic GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>,
1264                                         <0x1000 0 0 2 &gic GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>;
1265
1266                         usb@1,0 {
1267                                 reg = <0x800 0 0 0 0>;
1268                                 phys = <&usb0 0>;
1269                                 phy-names = "usb";
1270                         };
1271
1272                         usb@2,0 {
1273                                 reg = <0x1000 0 0 0 0>;
1274                                 phys = <&usb0 0>;
1275                                 phy-names = "usb";
1276                         };
1277                 };
1278
1279                 pci1: pci@ee0b0000 {
1280                         compatible = "renesas,pci-r8a7742",
1281                                      "renesas,pci-rcar-gen2";
1282                         device_type = "pci";
1283                         reg = <0 0xee0b0000 0 0xc00>,
1284                               <0 0xee0a0000 0 0x1100>;
1285                         interrupts = <GIC_SPI 112 IRQ_TYPE_LEVEL_HIGH>;
1286                         clocks = <&cpg CPG_MOD 703>;
1287                         power-domains = <&sysc R8A7742_PD_ALWAYS_ON>;
1288                         resets = <&cpg 703>;
1289                         status = "disabled";
1290
1291                         bus-range = <1 1>;
1292                         #address-cells = <3>;
1293                         #size-cells = <2>;
1294                         #interrupt-cells = <1>;
1295                         ranges = <0x02000000 0 0xee0a0000 0 0xee0a0000 0 0x00010000>;
1296                         interrupt-map-mask = <0xf800 0 0 0x7>;
1297                         interrupt-map = <0x0000 0 0 1 &gic GIC_SPI 112 IRQ_TYPE_LEVEL_HIGH>,
1298                                         <0x0800 0 0 1 &gic GIC_SPI 112 IRQ_TYPE_LEVEL_HIGH>,
1299                                         <0x1000 0 0 2 &gic GIC_SPI 112 IRQ_TYPE_LEVEL_HIGH>;
1300                 };
1301
1302                 pci2: pci@ee0d0000 {
1303                         compatible = "renesas,pci-r8a7742",
1304                                      "renesas,pci-rcar-gen2";
1305                         device_type = "pci";
1306                         clocks = <&cpg CPG_MOD 703>;
1307                         power-domains = <&sysc R8A7742_PD_ALWAYS_ON>;
1308                         resets = <&cpg 703>;
1309                         reg = <0 0xee0d0000 0 0xc00>,
1310                               <0 0xee0c0000 0 0x1100>;
1311                         interrupts = <GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH>;
1312                         status = "disabled";
1313
1314                         bus-range = <2 2>;
1315                         #address-cells = <3>;
1316                         #size-cells = <2>;
1317                         #interrupt-cells = <1>;
1318                         ranges = <0x02000000 0 0xee0c0000 0 0xee0c0000 0 0x00010000>;
1319                         interrupt-map-mask = <0xf800 0 0 0x7>;
1320                         interrupt-map = <0x0000 0 0 1 &gic GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH>,
1321                                         <0x0800 0 0 1 &gic GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH>,
1322                                         <0x1000 0 0 2 &gic GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH>;
1323
1324                         usb@1,0 {
1325                                 reg = <0x20800 0 0 0 0>;
1326                                 phys = <&usb2 0>;
1327                                 phy-names = "usb";
1328                         };
1329
1330                         usb@2,0 {
1331                                 reg = <0x21000 0 0 0 0>;
1332                                 phys = <&usb2 0>;
1333                                 phy-names = "usb";
1334                         };
1335                 };
1336
1337                 sdhi0: mmc@ee100000 {
1338                         compatible = "renesas,sdhi-r8a7742",
1339                                      "renesas,rcar-gen2-sdhi";
1340                         reg = <0 0xee100000 0 0x328>;
1341                         interrupts = <GIC_SPI 165 IRQ_TYPE_LEVEL_HIGH>;
1342                         clocks = <&cpg CPG_MOD 314>;
1343                         dmas = <&dmac0 0xcd>, <&dmac0 0xce>,
1344                                <&dmac1 0xcd>, <&dmac1 0xce>;
1345                         dma-names = "tx", "rx", "tx", "rx";
1346                         max-frequency = <195000000>;
1347                         power-domains = <&sysc R8A7742_PD_ALWAYS_ON>;
1348                         resets = <&cpg 314>;
1349                         status = "disabled";
1350                 };
1351
1352                 sdhi1: mmc@ee120000 {
1353                         compatible = "renesas,sdhi-r8a7742",
1354                                      "renesas,rcar-gen2-sdhi";
1355                         reg = <0 0xee120000 0 0x328>;
1356                         interrupts = <GIC_SPI 166 IRQ_TYPE_LEVEL_HIGH>;
1357                         clocks = <&cpg CPG_MOD 313>;
1358                         dmas = <&dmac0 0xc9>, <&dmac0 0xca>,
1359                                <&dmac1 0xc9>, <&dmac1 0xca>;
1360                         dma-names = "tx", "rx", "tx", "rx";
1361                         max-frequency = <195000000>;
1362                         power-domains = <&sysc R8A7742_PD_ALWAYS_ON>;
1363                         resets = <&cpg 313>;
1364                         status = "disabled";
1365                 };
1366
1367                 sdhi2: mmc@ee140000 {
1368                         compatible = "renesas,sdhi-r8a7742",
1369                                      "renesas,rcar-gen2-sdhi";
1370                         reg = <0 0xee140000 0 0x100>;
1371                         interrupts = <GIC_SPI 167 IRQ_TYPE_LEVEL_HIGH>;
1372                         clocks = <&cpg CPG_MOD 312>;
1373                         dmas = <&dmac0 0xc1>, <&dmac0 0xc2>,
1374                                <&dmac1 0xc1>, <&dmac1 0xc2>;
1375                         dma-names = "tx", "rx", "tx", "rx";
1376                         max-frequency = <97500000>;
1377                         power-domains = <&sysc R8A7742_PD_ALWAYS_ON>;
1378                         resets = <&cpg 312>;
1379                         status = "disabled";
1380                 };
1381
1382                 sdhi3: mmc@ee160000 {
1383                         compatible = "renesas,sdhi-r8a7742",
1384                                      "renesas,rcar-gen2-sdhi";
1385                         reg = <0 0xee160000 0 0x100>;
1386                         interrupts = <GIC_SPI 168 IRQ_TYPE_LEVEL_HIGH>;
1387                         clocks = <&cpg CPG_MOD 311>;
1388                         dmas = <&dmac0 0xd3>, <&dmac0 0xd4>,
1389                                <&dmac1 0xd3>, <&dmac1 0xd4>;
1390                         dma-names = "tx", "rx", "tx", "rx";
1391                         max-frequency = <97500000>;
1392                         power-domains = <&sysc R8A7742_PD_ALWAYS_ON>;
1393                         resets = <&cpg 311>;
1394                         status = "disabled";
1395                 };
1396
1397                 mmcif0: mmc@ee200000 {
1398                         compatible = "renesas,mmcif-r8a7742",
1399                                      "renesas,sh-mmcif";
1400                         reg = <0 0xee200000 0 0x80>;
1401                         interrupts = <GIC_SPI 169 IRQ_TYPE_LEVEL_HIGH>;
1402                         clocks = <&cpg CPG_MOD 315>;
1403                         dmas = <&dmac0 0xd1>, <&dmac0 0xd2>,
1404                                <&dmac1 0xd1>, <&dmac1 0xd2>;
1405                         dma-names = "tx", "rx", "tx", "rx";
1406                         power-domains = <&sysc R8A7742_PD_ALWAYS_ON>;
1407                         resets = <&cpg 315>;
1408                         reg-io-width = <4>;
1409                         status = "disabled";
1410                         max-frequency = <97500000>;
1411                 };
1412
1413                 mmcif1: mmc@ee220000 {
1414                         compatible = "renesas,mmcif-r8a7742",
1415                                      "renesas,sh-mmcif";
1416                         reg = <0 0xee220000 0 0x80>;
1417                         interrupts = <GIC_SPI 170 IRQ_TYPE_LEVEL_HIGH>;
1418                         clocks = <&cpg CPG_MOD 305>;
1419                         dmas = <&dmac0 0xe1>, <&dmac0 0xe2>,
1420                                <&dmac1 0xe1>, <&dmac1 0xe2>;
1421                         dma-names = "tx", "rx", "tx", "rx";
1422                         power-domains = <&sysc R8A7742_PD_ALWAYS_ON>;
1423                         resets = <&cpg 305>;
1424                         reg-io-width = <4>;
1425                         status = "disabled";
1426                         max-frequency = <97500000>;
1427                 };
1428
1429                 sata0: sata@ee300000 {
1430                         compatible = "renesas,sata-r8a7742",
1431                                      "renesas,rcar-gen2-sata";
1432                         reg = <0 0xee300000 0 0x200000>;
1433                         interrupts = <GIC_SPI 105 IRQ_TYPE_LEVEL_HIGH>;
1434                         clocks = <&cpg CPG_MOD 815>;
1435                         power-domains = <&sysc R8A7742_PD_ALWAYS_ON>;
1436                         resets = <&cpg 815>;
1437                         status = "disabled";
1438                 };
1439
1440                 sata1: sata@ee500000 {
1441                         compatible = "renesas,sata-r8a7742",
1442                                      "renesas,rcar-gen2-sata";
1443                         reg = <0 0xee500000 0 0x200000>;
1444                         interrupts = <GIC_SPI 106 IRQ_TYPE_LEVEL_HIGH>;
1445                         clocks = <&cpg CPG_MOD 814>;
1446                         power-domains = <&sysc R8A7742_PD_ALWAYS_ON>;
1447                         resets = <&cpg 814>;
1448                         status = "disabled";
1449                 };
1450
1451                 ether: ethernet@ee700000 {
1452                         compatible = "renesas,ether-r8a7742",
1453                                      "renesas,rcar-gen2-ether";
1454                         reg = <0 0xee700000 0 0x400>;
1455                         interrupts = <GIC_SPI 162 IRQ_TYPE_LEVEL_HIGH>;
1456                         clocks = <&cpg CPG_MOD 813>;
1457                         power-domains = <&sysc R8A7742_PD_ALWAYS_ON>;
1458                         resets = <&cpg 813>;
1459                         phy-mode = "rmii";
1460                         #address-cells = <1>;
1461                         #size-cells = <0>;
1462                         status = "disabled";
1463                 };
1464
1465                 gic: interrupt-controller@f1001000 {
1466                         compatible = "arm,gic-400";
1467                         #interrupt-cells = <3>;
1468                         #address-cells = <0>;
1469                         interrupt-controller;
1470                         reg = <0 0xf1001000 0 0x1000>, <0 0xf1002000 0 0x2000>,
1471                               <0 0xf1004000 0 0x2000>, <0 0xf1006000 0 0x2000>;
1472                         interrupts = <GIC_PPI 9 (GIC_CPU_MASK_SIMPLE(8) | IRQ_TYPE_LEVEL_HIGH)>;
1473                         clocks = <&cpg CPG_MOD 408>;
1474                         clock-names = "clk";
1475                         power-domains = <&sysc R8A7742_PD_ALWAYS_ON>;
1476                         resets = <&cpg 408>;
1477                 };
1478
1479                 prr: chipid@ff000044 {
1480                         compatible = "renesas,prr";
1481                         reg = <0 0xff000044 0 4>;
1482                 };
1483
1484                 cmt0: timer@ffca0000 {
1485                         compatible = "renesas,r8a7742-cmt0",
1486                                      "renesas,rcar-gen2-cmt0";
1487                         reg = <0 0xffca0000 0 0x1004>;
1488                         interrupts = <GIC_SPI 142 IRQ_TYPE_LEVEL_HIGH>,
1489                                      <GIC_SPI 143 IRQ_TYPE_LEVEL_HIGH>;
1490                         clocks = <&cpg CPG_MOD 124>;
1491                         clock-names = "fck";
1492                         power-domains = <&sysc R8A7742_PD_ALWAYS_ON>;
1493                         resets = <&cpg 124>;
1494                         status = "disabled";
1495                 };
1496
1497                 cmt1: timer@e6130000 {
1498                         compatible = "renesas,r8a7742-cmt1",
1499                                      "renesas,rcar-gen2-cmt1";
1500                         reg = <0 0xe6130000 0 0x1004>;
1501                         interrupts = <GIC_SPI 120 IRQ_TYPE_LEVEL_HIGH>,
1502                                      <GIC_SPI 121 IRQ_TYPE_LEVEL_HIGH>,
1503                                      <GIC_SPI 122 IRQ_TYPE_LEVEL_HIGH>,
1504                                      <GIC_SPI 123 IRQ_TYPE_LEVEL_HIGH>,
1505                                      <GIC_SPI 124 IRQ_TYPE_LEVEL_HIGH>,
1506                                      <GIC_SPI 125 IRQ_TYPE_LEVEL_HIGH>,
1507                                      <GIC_SPI 126 IRQ_TYPE_LEVEL_HIGH>,
1508                                      <GIC_SPI 127 IRQ_TYPE_LEVEL_HIGH>;
1509                         clocks = <&cpg CPG_MOD 329>;
1510                         clock-names = "fck";
1511                         power-domains = <&sysc R8A7742_PD_ALWAYS_ON>;
1512                         resets = <&cpg 329>;
1513                         status = "disabled";
1514                 };
1515         };
1516
1517         thermal-zones {
1518                 cpu_thermal: cpu-thermal {
1519                         polling-delay-passive = <0>;
1520                         polling-delay = <0>;
1521
1522                         thermal-sensors = <&thermal>;
1523
1524                         trips {
1525                                 cpu-crit {
1526                                         temperature = <95000>;
1527                                         hysteresis = <0>;
1528                                         type = "critical";
1529                                 };
1530                         };
1531                         cooling-maps {
1532                         };
1533                 };
1534         };
1535
1536         timer {
1537                 compatible = "arm,armv7-timer";
1538                 interrupts-extended = <&gic GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(8) | IRQ_TYPE_LEVEL_LOW)>,
1539                                       <&gic GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(8) | IRQ_TYPE_LEVEL_LOW)>,
1540                                       <&gic GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(8) | IRQ_TYPE_LEVEL_LOW)>,
1541                                       <&gic GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(8) | IRQ_TYPE_LEVEL_LOW)>;
1542         };
1543
1544         /* External USB clock - can be overridden by the board */
1545         usb_extal_clk: usb_extal {
1546                 compatible = "fixed-clock";
1547                 #clock-cells = <0>;
1548                 clock-frequency = <48000000>;
1549         };
1550 };