Merge git://git.kernel.org/pub/scm/linux/kernel/git/pablo/nf
[linux-2.6-microblaze.git] / arch / arm / boot / dts / r7s72100-rskrza1.dts
1 // SPDX-License-Identifier: GPL-2.0
2 /*
3  * Device Tree Source for the RZ/A1H RSK board
4  *
5  * Copyright (C) 2016 Renesas Electronics
6  */
7
8 /dts-v1/;
9 #include "r7s72100.dtsi"
10 #include <dt-bindings/gpio/gpio.h>
11 #include <dt-bindings/pinctrl/r7s72100-pinctrl.h>
12
13 / {
14         model = "RSKRZA1";
15         compatible = "renesas,rskrza1", "renesas,r7s72100";
16
17         aliases {
18                 serial0 = &scif2;
19         };
20
21         chosen {
22                 bootargs = "ignore_loglevel";
23                 stdout-path = "serial0:115200n8";
24         };
25
26         memory@8000000 {
27                 device_type = "memory";
28                 reg = <0x08000000 0x02000000>;
29         };
30
31         lbsc {
32                 #address-cells = <1>;
33                 #size-cells = <1>;
34         };
35
36         leds {
37                 compatible = "gpio-leds";
38
39                 led0 {
40                         gpios = <&port7 1 GPIO_ACTIVE_LOW>;
41                 };
42
43                 led1 {
44                         gpios = <&io_expander1 0 GPIO_ACTIVE_LOW>;
45                 };
46
47                 led2 {
48                         gpios = <&io_expander1 1 GPIO_ACTIVE_LOW>;
49                 };
50
51                 led3 {
52                         gpios = <&io_expander1 2 GPIO_ACTIVE_LOW>;
53                 };
54         };
55 };
56
57 &extal_clk {
58         clock-frequency = <13330000>;
59 };
60
61 &i2c3 {
62         pinctrl-names = "default";
63         pinctrl-0 = <&i2c3_pins>;
64         status = "okay";
65
66         clock-frequency = <400000>;
67
68         io_expander1: gpio@20 {
69                 compatible = "onnn,cat9554";
70                 reg = <0x20>;
71                 gpio-controller;
72                 #gpio-cells = <2>;
73         };
74
75         io_expander2: gpio@21 {
76                 compatible = "onnn,cat9554";
77                 reg = <0x21>;
78                 gpio-controller;
79                 #gpio-cells = <2>;
80         };
81
82         eeprom@50 {
83                 compatible = "renesas,r1ex24016", "atmel,24c16";
84                 reg = <0x50>;
85                 pagesize = <16>;
86         };
87 };
88
89 &usb_x1_clk {
90         clock-frequency = <48000000>;
91 };
92
93 &rtc_x1_clk {
94         clock-frequency = <32768>;
95 };
96
97 &pinctrl {
98         /* RIIC ch3 (Port Expander, EEPROM (MAC Addr), Audio Codec) */
99         i2c3_pins: i2c3 {
100                 pinmux = <RZA1_PINMUX(1, 6, 1)>,        /* RIIC3SCL */
101                          <RZA1_PINMUX(1, 7, 1)>;        /* RIIC3SDA */
102         };
103
104         /* Serial Console */
105         scif2_pins: serial2 {
106                 pinmux = <RZA1_PINMUX(3, 0, 6)>,        /* TxD2 */
107                          <RZA1_PINMUX(3, 2, 4)>;        /* RxD2 */
108         };
109
110         /* Ethernet */
111         ether_pins: ether {
112                 /* Ethernet on Ports 1,2,3,5 */
113                 pinmux = <RZA1_PINMUX(1, 14, 4)>,       /* ET_COL   */
114                          <RZA1_PINMUX(5, 9, 2)>,        /* ET_MDC   */
115                          <RZA1_PINMUX(3, 3, 2)>,        /* ET_MDIO  */
116                          <RZA1_PINMUX(3, 4, 2)>,        /* ET_RXCLK */
117                          <RZA1_PINMUX(3, 5, 2)>,        /* ET_RXER  */
118                          <RZA1_PINMUX(3, 6, 2)>,        /* ET_RXDV  */
119                          <RZA1_PINMUX(2, 0, 2)>,        /* ET_TXCLK */
120                          <RZA1_PINMUX(2, 1, 2)>,        /* ET_TXER  */
121                          <RZA1_PINMUX(2, 2, 2)>,        /* ET_TXEN  */
122                          <RZA1_PINMUX(2, 3, 2)>,        /* ET_CRS   */
123                          <RZA1_PINMUX(2, 4, 2)>,        /* ET_TXD0  */
124                          <RZA1_PINMUX(2, 5, 2)>,        /* ET_TXD1  */
125                          <RZA1_PINMUX(2, 6, 2)>,        /* ET_TXD2  */
126                          <RZA1_PINMUX(2, 7, 2)>,        /* ET_TXD3  */
127                          <RZA1_PINMUX(2, 8, 2)>,        /* ET_RXD0  */
128                          <RZA1_PINMUX(2, 9, 2)>,        /* ET_RXD1  */
129                          <RZA1_PINMUX(2, 10, 2)>,       /* ET_RXD2  */
130                          <RZA1_PINMUX(2, 11, 2)>;       /* ET_RXD3  */
131         };
132
133         /* SDHI ch1 on CN1 */
134         sdhi1_pins: sdhi1 {
135                 pinmux = <RZA1_PINMUX(3, 8, 7)>,        /* SD_CD_1 */
136                          <RZA1_PINMUX(3, 9, 7)>,        /* SD_WP_1 */
137                          <RZA1_PINMUX(3, 10, 7)>,       /* SD_D1_1 */
138                          <RZA1_PINMUX(3, 11, 7)>,       /* SD_D0_1 */
139                          <RZA1_PINMUX(3, 12, 7)>,       /* SD_CLK_1 */
140                          <RZA1_PINMUX(3, 13, 7)>,       /* SD_CMD_1 */
141                          <RZA1_PINMUX(3, 14, 7)>,       /* SD_D3_1 */
142                          <RZA1_PINMUX(3, 15, 7)>;       /* SD_D2_1 */
143         };
144 };
145
146 &mtu2 {
147         status = "okay";
148 };
149
150 &ether {
151         pinctrl-names = "default";
152         pinctrl-0 = <&ether_pins>;
153         status = "okay";
154         renesas,no-ether-link;
155         phy-handle = <&phy0>;
156         phy0: ethernet-phy@0 {
157                 reg = <0>;
158         };
159 };
160
161 &sdhi1 {
162         pinctrl-names = "default";
163         pinctrl-0 = <&sdhi1_pins>;
164         bus-width = <4>;
165         status = "okay";
166 };
167
168 &ostm0 {
169         status = "okay";
170 };
171
172 &ostm1 {
173         status = "okay";
174 };
175
176 &rtc {
177         status = "okay";
178 };
179
180 &scif2 {
181         pinctrl-names = "default";
182         pinctrl-0 = <&scif2_pins>;
183         status = "okay";
184 };