1 // SPDX-License-Identifier: GPL-2.0-or-later
3 * Copyright (C) 2016 Robert Jarzmik <robert.jarzmik@free.fr>
6 #include "dt-bindings/clock/pxa-clock.h"
9 model = "Marvell PXA25x family SoC";
10 compatible = "marvell,pxa250";
14 * The muxing of external clocks/internal dividers for osc* clock
15 * sources has been hidden under the carpet by now.
21 clks: pxa2xx_clks@41300004 {
22 compatible = "marvell,pxa250-core-clocks";
27 /* timer oscillator */
28 clktimer: oscillator {
29 compatible = "fixed-clock";
31 clock-frequency = <3686400>;
32 clock-output-names = "ostimer";
37 pdma: dma-controller@40000000 {
38 compatible = "marvell,pdma-1.0";
39 reg = <0x40000000 0x10000>;
47 pxairq: interrupt-controller@40d00000 {
48 marvell,intc-priority;
49 marvell,intc-nr-irqs = <32>;
52 pinctrl: pinctrl@40e00000 {
53 reg = <0x40e00054 0x20 0x40e0000c 0xc 0x40e0010c 4
55 compatible = "marvell,pxa25x-pinctrl";
59 compatible = "intel,pxa25x-gpio";
60 gpio-ranges = <&pinctrl 0 0 84>;
61 clocks = <&clks CLK_NONE>;
65 compatible = "marvell,pxa250-pwm";
66 reg = <0x40b00000 0x10>;
68 clocks = <&clks CLK_PWM0>;
72 compatible = "marvell,pxa250-pwm";
73 reg = <0x40b00010 0x10>;
75 clocks = <&clks CLK_PWM1>;
79 clocks = <&clks CLK_OSC32k768>;
84 compatible = "marvell,pxa-timer";
85 reg = <0x40a00000 0x20>;
91 pxa250_opp_table: opp_table0 {
92 compatible = "operating-points-v2";
95 opp-hz = /bits/ 64 <99532800>;
96 opp-microvolt = <1000000 950000 1650000>;
97 clock-latency-ns = <20>;
100 opp-hz = /bits/ 64 <199065600>;
101 opp-microvolt = <1000000 950000 1650000>;
102 clock-latency-ns = <20>;
105 opp-hz = /bits/ 64 <298598400>;
106 opp-microvolt = <1100000 1045000 1650000>;
107 clock-latency-ns = <20>;
110 opp-hz = /bits/ 64 <398131200>;
111 opp-microvolt = <1300000 1235000 1650000>;
112 clock-latency-ns = <20>;