1 &l4_cfg { /* 0x4a000000 */
2 compatible = "ti,omap5-l4-cfg", "simple-bus";
3 reg = <0x4a000000 0x800>,
6 reg-names = "ap", "la", "ia0";
9 ranges = <0x00000000 0x4a000000 0x080000>, /* segment 0 */
10 <0x00080000 0x4a080000 0x080000>, /* segment 1 */
11 <0x00100000 0x4a100000 0x080000>, /* segment 2 */
12 <0x00180000 0x4a180000 0x080000>, /* segment 3 */
13 <0x00200000 0x4a200000 0x080000>, /* segment 4 */
14 <0x00280000 0x4a280000 0x080000>, /* segment 5 */
15 <0x00300000 0x4a300000 0x080000>; /* segment 6 */
17 segment@0 { /* 0x4a000000 */
18 compatible = "simple-bus";
21 ranges = <0x00000000 0x00000000 0x000800>, /* ap 0 */
22 <0x00001000 0x00001000 0x001000>, /* ap 1 */
23 <0x00000800 0x00000800 0x000800>, /* ap 2 */
24 <0x00002000 0x00002000 0x001000>, /* ap 3 */
25 <0x00003000 0x00003000 0x001000>, /* ap 4 */
26 <0x00004000 0x00004000 0x001000>, /* ap 5 */
27 <0x00005000 0x00005000 0x001000>, /* ap 6 */
28 <0x00056000 0x00056000 0x001000>, /* ap 7 */
29 <0x00057000 0x00057000 0x001000>, /* ap 8 */
30 <0x0005c000 0x0005c000 0x001000>, /* ap 9 */
31 <0x00058000 0x00058000 0x001000>, /* ap 10 */
32 <0x00062000 0x00062000 0x001000>, /* ap 11 */
33 <0x00063000 0x00063000 0x001000>, /* ap 12 */
34 <0x00008000 0x00008000 0x002000>, /* ap 21 */
35 <0x0000a000 0x0000a000 0x001000>, /* ap 22 */
36 <0x00066000 0x00066000 0x001000>, /* ap 23 */
37 <0x00067000 0x00067000 0x001000>, /* ap 24 */
38 <0x0005e000 0x0005e000 0x002000>, /* ap 69 */
39 <0x00060000 0x00060000 0x001000>, /* ap 70 */
40 <0x00064000 0x00064000 0x001000>, /* ap 71 */
41 <0x00065000 0x00065000 0x001000>, /* ap 72 */
42 <0x0005a000 0x0005a000 0x001000>, /* ap 77 */
43 <0x0005b000 0x0005b000 0x001000>, /* ap 78 */
44 <0x00070000 0x00070000 0x004000>, /* ap 79 */
45 <0x00074000 0x00074000 0x001000>, /* ap 80 */
46 <0x00075000 0x00075000 0x001000>, /* ap 81 */
47 <0x00076000 0x00076000 0x001000>, /* ap 82 */
48 <0x00020000 0x00020000 0x020000>, /* ap 109 */
49 <0x00040000 0x00040000 0x001000>, /* ap 110 */
50 <0x00059000 0x00059000 0x001000>; /* ap 111 */
52 target-module@2000 { /* 0x4a002000, ap 3 44.0 */
53 compatible = "ti,sysc-omap4", "ti,sysc";
58 ranges = <0x0 0x2000 0x1000>;
61 compatible = "ti,omap5-scm-core", "simple-bus";
67 scm_conf: scm_conf@0 {
68 compatible = "syscon";
75 scm_padconf_core: scm@800 {
76 compatible = "ti,omap5-scm-padconf-core",
80 ranges = <0 0x800 0x800>;
82 omap5_pmx_core: pinmux@40 {
83 compatible = "ti,omap5-padconf",
89 #interrupt-cells = <1>;
91 pinctrl-single,register-width = <16>;
92 pinctrl-single,function-mask = <0x7fff>;
95 omap5_padconf_global: omap5_padconf_global@5a0 {
96 compatible = "syscon",
101 ranges = <0 0x5a0 0xec>;
103 pbias_regulator: pbias_regulator@60 {
104 compatible = "ti,pbias-omap5", "ti,pbias-omap";
106 syscon = <&omap5_padconf_global>;
107 pbias_mmc_reg: pbias_mmc_omap5 {
108 regulator-name = "pbias_mmc_omap5";
109 regulator-min-microvolt = <1800000>;
110 regulator-max-microvolt = <3300000>;
117 target-module@4000 { /* 0x4a004000, ap 5 5c.0 */
118 compatible = "ti,sysc-omap4", "ti,sysc";
121 #address-cells = <1>;
123 ranges = <0x0 0x4000 0x1000>;
125 cm_core_aon: cm_core_aon@0 {
126 compatible = "ti,omap5-cm-core-aon",
129 #address-cells = <1>;
131 ranges = <0 0 0x1000>;
133 cm_core_aon_clocks: clocks {
134 #address-cells = <1>;
138 cm_core_aon_clockdomains: clockdomains {
143 target-module@8000 { /* 0x4a008000, ap 21 4c.0 */
144 compatible = "ti,sysc-omap4", "ti,sysc";
147 #address-cells = <1>;
149 ranges = <0x0 0x8000 0x2000>;
152 compatible = "ti,omap5-cm-core", "simple-bus";
154 #address-cells = <1>;
156 ranges = <0 0 0x2000>;
158 cm_core_clocks: clocks {
159 #address-cells = <1>;
163 cm_core_clockdomains: clockdomains {
168 target-module@20000 { /* 0x4a020000, ap 109 08.0 */
169 compatible = "ti,sysc-omap4", "ti,sysc";
170 ti,hwmods = "usb_otg_ss";
173 reg-names = "rev", "sysc";
174 ti,sysc-mask = <SYSC_OMAP4_DMADISABLE>;
175 ti,sysc-midle = <SYSC_IDLE_FORCE>,
178 <SYSC_IDLE_SMART_WKUP>;
179 ti,sysc-sidle = <SYSC_IDLE_FORCE>,
182 <SYSC_IDLE_SMART_WKUP>;
183 /* Domains (V, P, C): core, l3init_pwrdm, l3init_clkdm */
184 clocks = <&l3init_clkctrl OMAP5_USB_OTG_SS_CLKCTRL 0>;
186 #address-cells = <1>;
188 ranges = <0x0 0x20000 0x20000>;
191 compatible = "ti,dwc3";
193 interrupts = <GIC_SPI 93 IRQ_TYPE_LEVEL_HIGH>;
194 #address-cells = <1>;
197 ranges = <0 0 0x20000>;
199 compatible = "snps,dwc3";
200 reg = <0x10000 0x10000>;
201 interrupts = <GIC_SPI 92 IRQ_TYPE_LEVEL_HIGH>,
202 <GIC_SPI 92 IRQ_TYPE_LEVEL_HIGH>,
203 <GIC_SPI 93 IRQ_TYPE_LEVEL_HIGH>;
204 interrupt-names = "peripheral",
207 phys = <&usb2_phy>, <&usb3_phy>;
208 phy-names = "usb2-phy", "usb3-phy";
209 dr_mode = "peripheral";
214 target-module@56000 { /* 0x4a056000, ap 7 02.0 */
215 compatible = "ti,sysc-omap2", "ti,sysc";
216 ti,hwmods = "dma_system";
220 reg-names = "rev", "sysc", "syss";
221 ti,sysc-mask = <(SYSC_OMAP2_CLOCKACTIVITY |
223 SYSC_OMAP2_SOFTRESET |
224 SYSC_OMAP2_AUTOIDLE)>;
225 ti,sysc-midle = <SYSC_IDLE_FORCE>,
228 ti,sysc-sidle = <SYSC_IDLE_FORCE>,
232 /* Domains (V, P, C): core, core_pwrdm, dma_clkdm */
233 clocks = <&dma_clkctrl OMAP5_DMA_SYSTEM_CLKCTRL 0>;
235 #address-cells = <1>;
237 ranges = <0x0 0x56000 0x1000>;
239 sdma: dma-controller@0 {
240 compatible = "ti,omap4430-sdma";
242 interrupts = <GIC_SPI 12 IRQ_TYPE_LEVEL_HIGH>,
243 <GIC_SPI 13 IRQ_TYPE_LEVEL_HIGH>,
244 <GIC_SPI 14 IRQ_TYPE_LEVEL_HIGH>,
245 <GIC_SPI 15 IRQ_TYPE_LEVEL_HIGH>;
248 dma-requests = <127>;
252 target-module@58000 { /* 0x4a058000, ap 10 06.0 */
253 compatible = "ti,sysc";
255 #address-cells = <1>;
257 ranges = <0x00000000 0x00058000 0x00001000>,
258 <0x00001000 0x00059000 0x00001000>,
259 <0x00002000 0x0005a000 0x00001000>,
260 <0x00003000 0x0005b000 0x00001000>;
263 target-module@5e000 { /* 0x4a05e000, ap 69 2a.0 */
264 compatible = "ti,sysc";
266 #address-cells = <1>;
268 ranges = <0x0 0x5e000 0x2000>;
271 target-module@62000 { /* 0x4a062000, ap 11 0e.0 */
272 compatible = "ti,sysc-omap2", "ti,sysc";
273 ti,hwmods = "usb_tll_hs";
277 reg-names = "rev", "sysc", "syss";
278 ti,sysc-mask = <(SYSC_OMAP2_CLOCKACTIVITY |
279 SYSC_OMAP2_ENAWAKEUP |
280 SYSC_OMAP2_SOFTRESET |
281 SYSC_OMAP2_AUTOIDLE)>;
282 ti,sysc-sidle = <SYSC_IDLE_FORCE>,
286 /* Domains (V, P, C): core, l3init_pwrdm, l3init_clkdm */
287 clocks = <&l3init_clkctrl OMAP5_USB_TLL_HS_CLKCTRL 0>;
289 #address-cells = <1>;
291 ranges = <0x0 0x62000 0x1000>;
293 usbhstll: usbhstll@0 {
294 compatible = "ti,usbhs-tll";
296 interrupts = <GIC_SPI 78 IRQ_TYPE_LEVEL_HIGH>;
300 target-module@64000 { /* 0x4a064000, ap 71 1e.0 */
301 compatible = "ti,sysc-omap4", "ti,sysc";
302 ti,hwmods = "usb_host_hs";
305 reg-names = "rev", "sysc";
306 ti,sysc-mask = <SYSC_OMAP4_SOFTRESET>;
307 ti,sysc-midle = <SYSC_IDLE_FORCE>,
310 <SYSC_IDLE_SMART_WKUP>;
311 ti,sysc-sidle = <SYSC_IDLE_FORCE>,
314 <SYSC_IDLE_SMART_WKUP>;
315 /* Domains (V, P, C): core, l3init_pwrdm, l3init_clkdm */
316 clocks = <&l3init_clkctrl OMAP5_USB_HOST_HS_CLKCTRL 0>;
318 #address-cells = <1>;
320 ranges = <0x0 0x64000 0x1000>;
322 usbhshost: usbhshost@0 {
323 compatible = "ti,usbhs-host";
325 #address-cells = <1>;
327 ranges = <0 0 0x1000>;
328 clocks = <&l3init_60m_fclk>,
331 clock-names = "refclk_60m_int",
335 usbhsohci: ohci@800 {
336 compatible = "ti,ohci-omap3";
338 interrupts = <GIC_SPI 76 IRQ_TYPE_LEVEL_HIGH>;
339 remote-wakeup-connected;
342 usbhsehci: ehci@c00 {
343 compatible = "ti,ehci-omap";
345 interrupts = <GIC_SPI 77 IRQ_TYPE_LEVEL_HIGH>;
350 target-module@66000 { /* 0x4a066000, ap 23 0a.0 */
351 compatible = "ti,sysc-omap2", "ti,sysc";
352 ti,hwmods = "mmu_dsp";
356 reg-names = "rev", "sysc", "syss";
357 ti,sysc-mask = <(SYSC_OMAP2_CLOCKACTIVITY |
358 SYSC_OMAP2_SOFTRESET |
359 SYSC_OMAP2_AUTOIDLE)>;
360 ti,sysc-sidle = <SYSC_IDLE_FORCE>,
364 /* Domains (V, P, C): mm, dsp_pwrdm, dsp_clkdm */
365 clocks = <&dsp_clkctrl OMAP5_MMU_DSP_CLKCTRL 0>;
367 #address-cells = <1>;
369 ranges = <0x0 0x66000 0x1000>;
371 /* mmu_dsp cannot be moved before reset driver */
375 target-module@70000 { /* 0x4a070000, ap 79 2e.0 */
376 compatible = "ti,sysc";
378 #address-cells = <1>;
380 ranges = <0x0 0x70000 0x4000>;
383 target-module@75000 { /* 0x4a075000, ap 81 32.0 */
384 compatible = "ti,sysc";
386 #address-cells = <1>;
388 ranges = <0x0 0x75000 0x1000>;
392 segment@80000 { /* 0x4a080000 */
393 compatible = "simple-bus";
394 #address-cells = <1>;
396 ranges = <0x00059000 0x000d9000 0x001000>, /* ap 13 */
397 <0x0005a000 0x000da000 0x001000>, /* ap 14 */
398 <0x0005b000 0x000db000 0x001000>, /* ap 15 */
399 <0x0005c000 0x000dc000 0x001000>, /* ap 16 */
400 <0x0005d000 0x000dd000 0x001000>, /* ap 17 */
401 <0x0005e000 0x000de000 0x001000>, /* ap 18 */
402 <0x00060000 0x000e0000 0x001000>, /* ap 19 */
403 <0x00061000 0x000e1000 0x001000>, /* ap 20 */
404 <0x00074000 0x000f4000 0x001000>, /* ap 25 */
405 <0x00075000 0x000f5000 0x001000>, /* ap 26 */
406 <0x00076000 0x000f6000 0x001000>, /* ap 27 */
407 <0x00077000 0x000f7000 0x001000>, /* ap 28 */
408 <0x00036000 0x000b6000 0x001000>, /* ap 65 */
409 <0x00037000 0x000b7000 0x001000>, /* ap 66 */
410 <0x0004d000 0x000cd000 0x001000>, /* ap 67 */
411 <0x0004e000 0x000ce000 0x001000>, /* ap 68 */
412 <0x00000000 0x00080000 0x004000>, /* ap 83 */
413 <0x00004000 0x00084000 0x001000>, /* ap 84 */
414 <0x00005000 0x00085000 0x001000>, /* ap 85 */
415 <0x00006000 0x00086000 0x001000>, /* ap 86 */
416 <0x00007000 0x00087000 0x001000>, /* ap 87 */
417 <0x00008000 0x00088000 0x001000>, /* ap 88 */
418 <0x00010000 0x00090000 0x004000>, /* ap 89 */
419 <0x00014000 0x00094000 0x001000>, /* ap 90 */
420 <0x00015000 0x00095000 0x001000>, /* ap 91 */
421 <0x00016000 0x00096000 0x001000>, /* ap 92 */
422 <0x00017000 0x00097000 0x001000>, /* ap 93 */
423 <0x00018000 0x00098000 0x001000>, /* ap 94 */
424 <0x00020000 0x000a0000 0x004000>, /* ap 95 */
425 <0x00024000 0x000a4000 0x001000>, /* ap 96 */
426 <0x00025000 0x000a5000 0x001000>, /* ap 97 */
427 <0x00026000 0x000a6000 0x001000>, /* ap 98 */
428 <0x00027000 0x000a7000 0x001000>, /* ap 99 */
429 <0x00028000 0x000a8000 0x001000>; /* ap 100 */
431 target-module@0 { /* 0x4a080000, ap 83 28.0 */
432 compatible = "ti,sysc-omap2", "ti,sysc";
433 ti,hwmods = "ocp2scp1";
437 reg-names = "rev", "sysc", "syss";
438 ti,sysc-mask = <(SYSC_OMAP2_SOFTRESET |
439 SYSC_OMAP2_AUTOIDLE)>;
440 ti,sysc-sidle = <SYSC_IDLE_FORCE>,
444 /* Domains (V, P, C): core, l3init_pwrdm, l3init_clkdm */
445 clocks = <&l3init_clkctrl OMAP5_OCP2SCP1_CLKCTRL 0>;
447 #address-cells = <1>;
449 ranges = <0x00000000 0x00000000 0x00004000>,
450 <0x00004000 0x00004000 0x00001000>,
451 <0x00005000 0x00005000 0x00001000>,
452 <0x00006000 0x00006000 0x00001000>,
453 <0x00007000 0x00007000 0x00001000>;
456 compatible = "ti,omap-ocp2scp";
457 #address-cells = <1>;
462 usb2_phy: usb2phy@4000 {
463 compatible = "ti,omap-usb2";
465 syscon-phy-power = <&scm_conf 0x300>;
466 clocks = <&usb_phy_cm_clk32k>,
467 <&l3init_clkctrl OMAP5_USB_OTG_SS_CLKCTRL 8>;
468 clock-names = "wkupclk", "refclk";
472 usb3_phy: usb3phy@4400 {
473 compatible = "ti,omap-usb3";
477 reg-names = "phy_rx", "phy_tx", "pll_ctrl";
478 syscon-phy-power = <&scm_conf 0x370>;
479 clocks = <&usb_phy_cm_clk32k>,
481 <&l3init_clkctrl OMAP5_USB_OTG_SS_CLKCTRL 8>;
482 clock-names = "wkupclk",
489 target-module@10000 { /* 0x4a090000, ap 89 36.0 */
490 compatible = "ti,sysc-omap2", "ti,sysc";
491 ti,hwmods = "ocp2scp3";
495 reg-names = "rev", "sysc", "syss";
496 ti,sysc-mask = <(SYSC_OMAP2_SOFTRESET |
497 SYSC_OMAP2_AUTOIDLE)>;
498 ti,sysc-sidle = <SYSC_IDLE_FORCE>,
502 /* Domains (V, P, C): core, l3init_pwrdm, l3init_clkdm */
503 clocks = <&l3init_clkctrl OMAP5_OCP2SCP3_CLKCTRL 0>;
505 #address-cells = <1>;
507 ranges = <0x00000000 0x00010000 0x00004000>,
508 <0x00004000 0x00014000 0x00001000>,
509 <0x00005000 0x00015000 0x00001000>,
510 <0x00006000 0x00016000 0x00001000>,
511 <0x00007000 0x00017000 0x00001000>;
514 compatible = "ti,omap-ocp2scp";
515 #address-cells = <1>;
521 compatible = "ti,phy-pipe3-sata";
522 reg = <0x6000 0x80>, /* phy_rx */
523 <0x6400 0x64>, /* phy_tx */
524 <0x6800 0x40>; /* pll_ctrl */
525 reg-names = "phy_rx", "phy_tx", "pll_ctrl";
526 syscon-phy-power = <&scm_conf 0x374>;
527 clocks = <&sys_clkin>,
528 <&l3init_clkctrl OMAP5_SATA_CLKCTRL 8>;
529 clock-names = "sysclk", "refclk";
534 target-module@20000 { /* 0x4a0a0000, ap 95 50.0 */
535 compatible = "ti,sysc";
537 #address-cells = <1>;
539 ranges = <0x00000000 0x00020000 0x00004000>,
540 <0x00004000 0x00024000 0x00001000>,
541 <0x00005000 0x00025000 0x00001000>,
542 <0x00006000 0x00026000 0x00001000>,
543 <0x00007000 0x00027000 0x00001000>;
546 target-module@36000 { /* 0x4a0b6000, ap 65 6c.0 */
547 compatible = "ti,sysc";
549 #address-cells = <1>;
551 ranges = <0x0 0x36000 0x1000>;
554 target-module@4d000 { /* 0x4a0cd000, ap 67 64.0 */
555 compatible = "ti,sysc";
557 #address-cells = <1>;
559 ranges = <0x0 0x4d000 0x1000>;
562 target-module@59000 { /* 0x4a0d9000, ap 13 20.0 */
563 compatible = "ti,sysc";
565 #address-cells = <1>;
567 ranges = <0x0 0x59000 0x1000>;
570 target-module@5b000 { /* 0x4a0db000, ap 15 10.0 */
571 compatible = "ti,sysc";
573 #address-cells = <1>;
575 ranges = <0x0 0x5b000 0x1000>;
578 target-module@5d000 { /* 0x4a0dd000, ap 17 18.0 */
579 compatible = "ti,sysc";
581 #address-cells = <1>;
583 ranges = <0x0 0x5d000 0x1000>;
586 target-module@60000 { /* 0x4a0e0000, ap 19 54.0 */
587 compatible = "ti,sysc";
589 #address-cells = <1>;
591 ranges = <0x0 0x60000 0x1000>;
594 target-module@74000 { /* 0x4a0f4000, ap 25 04.0 */
595 compatible = "ti,sysc-omap4", "ti,sysc";
596 ti,hwmods = "mailbox";
599 reg-names = "rev", "sysc";
600 ti,sysc-mask = <SYSC_OMAP4_SOFTRESET>;
601 ti,sysc-sidle = <SYSC_IDLE_FORCE>,
604 /* Domains (V, P, C): core, core_pwrdm, l4cfg_clkdm */
605 clocks = <&l4cfg_clkctrl OMAP5_MAILBOX_CLKCTRL 0>;
607 #address-cells = <1>;
609 ranges = <0x0 0x74000 0x1000>;
612 compatible = "ti,omap4-mailbox";
614 interrupts = <GIC_SPI 26 IRQ_TYPE_LEVEL_HIGH>;
616 ti,mbox-num-users = <3>;
617 ti,mbox-num-fifos = <8>;
619 ti,mbox-tx = <0 0 0>;
620 ti,mbox-rx = <1 0 0>;
623 ti,mbox-tx = <3 0 0>;
624 ti,mbox-rx = <2 0 0>;
629 target-module@76000 { /* 0x4a0f6000, ap 27 0c.0 */
630 compatible = "ti,sysc-omap2", "ti,sysc";
631 ti,hwmods = "spinlock";
635 reg-names = "rev", "sysc", "syss";
636 ti,sysc-mask = <(SYSC_OMAP2_CLOCKACTIVITY |
637 SYSC_OMAP2_ENAWAKEUP |
638 SYSC_OMAP2_SOFTRESET |
639 SYSC_OMAP2_AUTOIDLE)>;
640 ti,sysc-sidle = <SYSC_IDLE_FORCE>,
644 /* Domains (V, P, C): core, core_pwrdm, l4cfg_clkdm */
645 clocks = <&l4cfg_clkctrl OMAP5_SPINLOCK_CLKCTRL 0>;
647 #address-cells = <1>;
649 ranges = <0x0 0x76000 0x1000>;
651 hwspinlock: spinlock@0 {
652 compatible = "ti,omap4-hwspinlock";
659 segment@100000 { /* 0x4a100000 */
660 compatible = "simple-bus";
661 #address-cells = <1>;
663 ranges = <0x00002000 0x00102000 0x001000>, /* ap 59 */
664 <0x00003000 0x00103000 0x001000>, /* ap 60 */
665 <0x00008000 0x00108000 0x001000>, /* ap 61 */
666 <0x00009000 0x00109000 0x001000>, /* ap 62 */
667 <0x0000a000 0x0010a000 0x001000>, /* ap 63 */
668 <0x0000b000 0x0010b000 0x001000>, /* ap 64 */
669 <0x00040000 0x00140000 0x010000>, /* ap 101 */
670 <0x00050000 0x00150000 0x001000>; /* ap 102 */
672 target-module@2000 { /* 0x4a102000, ap 59 2c.0 */
673 compatible = "ti,sysc";
675 #address-cells = <1>;
677 ranges = <0x0 0x2000 0x1000>;
680 target-module@8000 { /* 0x4a108000, ap 61 26.0 */
681 compatible = "ti,sysc";
683 #address-cells = <1>;
685 ranges = <0x0 0x8000 0x1000>;
688 target-module@a000 { /* 0x4a10a000, ap 63 22.0 */
689 compatible = "ti,sysc";
691 #address-cells = <1>;
693 ranges = <0x0 0xa000 0x1000>;
696 target-module@40000 { /* 0x4a140000, ap 101 16.0 */
697 compatible = "ti,sysc";
699 #address-cells = <1>;
701 ranges = <0x0 0x40000 0x10000>;
705 segment@180000 { /* 0x4a180000 */
706 compatible = "simple-bus";
707 #address-cells = <1>;
711 segment@200000 { /* 0x4a200000 */
712 compatible = "simple-bus";
713 #address-cells = <1>;
715 ranges = <0x0001e000 0x0021e000 0x001000>, /* ap 29 */
716 <0x0001f000 0x0021f000 0x001000>, /* ap 30 */
717 <0x0000a000 0x0020a000 0x001000>, /* ap 31 */
718 <0x0000b000 0x0020b000 0x001000>, /* ap 32 */
719 <0x00006000 0x00206000 0x001000>, /* ap 33 */
720 <0x00007000 0x00207000 0x001000>, /* ap 34 */
721 <0x00004000 0x00204000 0x001000>, /* ap 35 */
722 <0x00005000 0x00205000 0x001000>, /* ap 36 */
723 <0x00012000 0x00212000 0x001000>, /* ap 37 */
724 <0x00013000 0x00213000 0x001000>, /* ap 38 */
725 <0x0000c000 0x0020c000 0x001000>, /* ap 39 */
726 <0x0000d000 0x0020d000 0x001000>, /* ap 40 */
727 <0x00010000 0x00210000 0x001000>, /* ap 41 */
728 <0x00011000 0x00211000 0x001000>, /* ap 42 */
729 <0x00016000 0x00216000 0x001000>, /* ap 43 */
730 <0x00017000 0x00217000 0x001000>, /* ap 44 */
731 <0x00014000 0x00214000 0x001000>, /* ap 45 */
732 <0x00015000 0x00215000 0x001000>, /* ap 46 */
733 <0x00018000 0x00218000 0x001000>, /* ap 47 */
734 <0x00019000 0x00219000 0x001000>, /* ap 48 */
735 <0x00020000 0x00220000 0x001000>, /* ap 49 */
736 <0x00021000 0x00221000 0x001000>, /* ap 50 */
737 <0x00026000 0x00226000 0x001000>, /* ap 51 */
738 <0x00027000 0x00227000 0x001000>, /* ap 52 */
739 <0x00028000 0x00228000 0x001000>, /* ap 53 */
740 <0x00029000 0x00229000 0x001000>, /* ap 54 */
741 <0x0002a000 0x0022a000 0x001000>, /* ap 55 */
742 <0x0002b000 0x0022b000 0x001000>, /* ap 56 */
743 <0x0001c000 0x0021c000 0x001000>, /* ap 57 */
744 <0x0001d000 0x0021d000 0x001000>, /* ap 58 */
745 <0x0001a000 0x0021a000 0x001000>, /* ap 73 */
746 <0x0001b000 0x0021b000 0x001000>, /* ap 74 */
747 <0x00024000 0x00224000 0x001000>, /* ap 75 */
748 <0x00025000 0x00225000 0x001000>, /* ap 76 */
749 <0x00002000 0x00202000 0x001000>, /* ap 103 */
750 <0x00003000 0x00203000 0x001000>, /* ap 104 */
751 <0x00008000 0x00208000 0x001000>, /* ap 105 */
752 <0x00009000 0x00209000 0x001000>, /* ap 106 */
753 <0x00022000 0x00222000 0x001000>, /* ap 107 */
754 <0x00023000 0x00223000 0x001000>; /* ap 108 */
756 target-module@2000 { /* 0x4a202000, ap 103 3c.0 */
757 compatible = "ti,sysc";
759 #address-cells = <1>;
761 ranges = <0x0 0x2000 0x1000>;
764 target-module@4000 { /* 0x4a204000, ap 35 46.0 */
765 compatible = "ti,sysc";
767 #address-cells = <1>;
769 ranges = <0x0 0x4000 0x1000>;
772 target-module@6000 { /* 0x4a206000, ap 33 4e.0 */
773 compatible = "ti,sysc";
775 #address-cells = <1>;
777 ranges = <0x0 0x6000 0x1000>;
780 target-module@8000 { /* 0x4a208000, ap 105 34.0 */
781 compatible = "ti,sysc";
783 #address-cells = <1>;
785 ranges = <0x0 0x8000 0x1000>;
788 target-module@a000 { /* 0x4a20a000, ap 31 30.0 */
789 compatible = "ti,sysc";
791 #address-cells = <1>;
793 ranges = <0x0 0xa000 0x1000>;
796 target-module@c000 { /* 0x4a20c000, ap 39 14.0 */
797 compatible = "ti,sysc";
799 #address-cells = <1>;
801 ranges = <0x0 0xc000 0x1000>;
804 target-module@10000 { /* 0x4a210000, ap 41 56.0 */
805 compatible = "ti,sysc";
807 #address-cells = <1>;
809 ranges = <0x0 0x10000 0x1000>;
812 target-module@12000 { /* 0x4a212000, ap 37 52.0 */
813 compatible = "ti,sysc";
815 #address-cells = <1>;
817 ranges = <0x0 0x12000 0x1000>;
820 target-module@14000 { /* 0x4a214000, ap 45 1c.0 */
821 compatible = "ti,sysc";
823 #address-cells = <1>;
825 ranges = <0x0 0x14000 0x1000>;
828 target-module@16000 { /* 0x4a216000, ap 43 42.0 */
829 compatible = "ti,sysc";
831 #address-cells = <1>;
833 ranges = <0x0 0x16000 0x1000>;
836 target-module@18000 { /* 0x4a218000, ap 47 1a.0 */
837 compatible = "ti,sysc";
839 #address-cells = <1>;
841 ranges = <0x0 0x18000 0x1000>;
844 target-module@1a000 { /* 0x4a21a000, ap 73 3e.0 */
845 compatible = "ti,sysc";
847 #address-cells = <1>;
849 ranges = <0x0 0x1a000 0x1000>;
852 target-module@1c000 { /* 0x4a21c000, ap 57 40.0 */
853 compatible = "ti,sysc";
855 #address-cells = <1>;
857 ranges = <0x0 0x1c000 0x1000>;
860 target-module@1e000 { /* 0x4a21e000, ap 29 12.0 */
861 compatible = "ti,sysc";
863 #address-cells = <1>;
865 ranges = <0x0 0x1e000 0x1000>;
868 target-module@20000 { /* 0x4a220000, ap 49 4a.0 */
869 compatible = "ti,sysc";
871 #address-cells = <1>;
873 ranges = <0x0 0x20000 0x1000>;
876 target-module@22000 { /* 0x4a222000, ap 107 3a.0 */
877 compatible = "ti,sysc";
879 #address-cells = <1>;
881 ranges = <0x0 0x22000 0x1000>;
884 target-module@24000 { /* 0x4a224000, ap 75 48.0 */
885 compatible = "ti,sysc";
887 #address-cells = <1>;
889 ranges = <0x0 0x24000 0x1000>;
892 target-module@26000 { /* 0x4a226000, ap 51 24.0 */
893 compatible = "ti,sysc";
895 #address-cells = <1>;
897 ranges = <0x0 0x26000 0x1000>;
900 target-module@28000 { /* 0x4a228000, ap 53 38.0 */
901 compatible = "ti,sysc";
903 #address-cells = <1>;
905 ranges = <0x0 0x28000 0x1000>;
908 target-module@2a000 { /* 0x4a22a000, ap 55 5a.0 */
909 compatible = "ti,sysc";
911 #address-cells = <1>;
913 ranges = <0x0 0x2a000 0x1000>;
917 segment@280000 { /* 0x4a280000 */
918 compatible = "simple-bus";
919 #address-cells = <1>;
923 segment@300000 { /* 0x4a300000 */
924 compatible = "simple-bus";
925 #address-cells = <1>;
930 &l4_per { /* 0x48000000 */
931 compatible = "ti,omap5-l4-per", "simple-bus";
932 reg = <0x48000000 0x800>,
938 reg-names = "ap", "la", "ia0", "ia1", "ia2", "ia3";
939 #address-cells = <1>;
941 ranges = <0x00000000 0x48000000 0x200000>, /* segment 0 */
942 <0x00200000 0x48200000 0x200000>; /* segment 1 */
944 segment@0 { /* 0x48000000 */
945 compatible = "simple-bus";
946 #address-cells = <1>;
948 ranges = <0x00000000 0x00000000 0x000800>, /* ap 0 */
949 <0x00001000 0x00001000 0x000400>, /* ap 1 */
950 <0x00000800 0x00000800 0x000800>, /* ap 2 */
951 <0x00020000 0x00020000 0x001000>, /* ap 3 */
952 <0x00021000 0x00021000 0x001000>, /* ap 4 */
953 <0x00032000 0x00032000 0x001000>, /* ap 5 */
954 <0x00033000 0x00033000 0x001000>, /* ap 6 */
955 <0x00034000 0x00034000 0x001000>, /* ap 7 */
956 <0x00035000 0x00035000 0x001000>, /* ap 8 */
957 <0x00036000 0x00036000 0x001000>, /* ap 9 */
958 <0x00037000 0x00037000 0x001000>, /* ap 10 */
959 <0x0003e000 0x0003e000 0x001000>, /* ap 11 */
960 <0x0003f000 0x0003f000 0x001000>, /* ap 12 */
961 <0x00055000 0x00055000 0x001000>, /* ap 13 */
962 <0x00056000 0x00056000 0x001000>, /* ap 14 */
963 <0x00057000 0x00057000 0x001000>, /* ap 15 */
964 <0x00058000 0x00058000 0x001000>, /* ap 16 */
965 <0x00059000 0x00059000 0x001000>, /* ap 17 */
966 <0x0005a000 0x0005a000 0x001000>, /* ap 18 */
967 <0x0005b000 0x0005b000 0x001000>, /* ap 19 */
968 <0x0005c000 0x0005c000 0x001000>, /* ap 20 */
969 <0x0005d000 0x0005d000 0x001000>, /* ap 21 */
970 <0x0005e000 0x0005e000 0x001000>, /* ap 22 */
971 <0x00060000 0x00060000 0x001000>, /* ap 23 */
972 <0x0006a000 0x0006a000 0x001000>, /* ap 24 */
973 <0x0006b000 0x0006b000 0x001000>, /* ap 25 */
974 <0x0006c000 0x0006c000 0x001000>, /* ap 26 */
975 <0x0006d000 0x0006d000 0x001000>, /* ap 27 */
976 <0x0006e000 0x0006e000 0x001000>, /* ap 28 */
977 <0x0006f000 0x0006f000 0x001000>, /* ap 29 */
978 <0x00070000 0x00070000 0x001000>, /* ap 30 */
979 <0x00071000 0x00071000 0x001000>, /* ap 31 */
980 <0x00072000 0x00072000 0x001000>, /* ap 32 */
981 <0x00073000 0x00073000 0x001000>, /* ap 33 */
982 <0x00061000 0x00061000 0x001000>, /* ap 34 */
983 <0x00053000 0x00053000 0x001000>, /* ap 35 */
984 <0x00054000 0x00054000 0x001000>, /* ap 36 */
985 <0x000b2000 0x000b2000 0x001000>, /* ap 37 */
986 <0x000b3000 0x000b3000 0x001000>, /* ap 38 */
987 <0x00078000 0x00078000 0x001000>, /* ap 39 */
988 <0x00079000 0x00079000 0x001000>, /* ap 40 */
989 <0x00086000 0x00086000 0x001000>, /* ap 41 */
990 <0x00087000 0x00087000 0x001000>, /* ap 42 */
991 <0x00088000 0x00088000 0x001000>, /* ap 43 */
992 <0x00089000 0x00089000 0x001000>, /* ap 44 */
993 <0x00051000 0x00051000 0x001000>, /* ap 45 */
994 <0x00052000 0x00052000 0x001000>, /* ap 46 */
995 <0x00098000 0x00098000 0x001000>, /* ap 47 */
996 <0x00099000 0x00099000 0x001000>, /* ap 48 */
997 <0x0009a000 0x0009a000 0x001000>, /* ap 49 */
998 <0x0009b000 0x0009b000 0x001000>, /* ap 50 */
999 <0x0009c000 0x0009c000 0x001000>, /* ap 51 */
1000 <0x0009d000 0x0009d000 0x001000>, /* ap 52 */
1001 <0x00068000 0x00068000 0x001000>, /* ap 53 */
1002 <0x00069000 0x00069000 0x001000>, /* ap 54 */
1003 <0x00090000 0x00090000 0x002000>, /* ap 55 */
1004 <0x00092000 0x00092000 0x001000>, /* ap 56 */
1005 <0x000a4000 0x000a4000 0x001000>, /* ap 57 */
1006 <0x000a6000 0x000a6000 0x001000>, /* ap 58 */
1007 <0x000a8000 0x000a8000 0x004000>, /* ap 59 */
1008 <0x000ac000 0x000ac000 0x001000>, /* ap 60 */
1009 <0x000ad000 0x000ad000 0x001000>, /* ap 61 */
1010 <0x000ae000 0x000ae000 0x001000>, /* ap 62 */
1011 <0x00066000 0x00066000 0x001000>, /* ap 63 */
1012 <0x00067000 0x00067000 0x001000>, /* ap 64 */
1013 <0x000b4000 0x000b4000 0x001000>, /* ap 65 */
1014 <0x000b5000 0x000b5000 0x001000>, /* ap 66 */
1015 <0x000b8000 0x000b8000 0x001000>, /* ap 67 */
1016 <0x000b9000 0x000b9000 0x001000>, /* ap 68 */
1017 <0x000ba000 0x000ba000 0x001000>, /* ap 69 */
1018 <0x000bb000 0x000bb000 0x001000>, /* ap 70 */
1019 <0x000d1000 0x000d1000 0x001000>, /* ap 71 */
1020 <0x000d2000 0x000d2000 0x001000>, /* ap 72 */
1021 <0x000d5000 0x000d5000 0x001000>, /* ap 73 */
1022 <0x000d6000 0x000d6000 0x001000>, /* ap 74 */
1023 <0x000a2000 0x000a2000 0x001000>, /* ap 75 */
1024 <0x000a3000 0x000a3000 0x001000>, /* ap 76 */
1025 <0x00001400 0x00001400 0x000400>, /* ap 77 */
1026 <0x00001800 0x00001800 0x000400>, /* ap 78 */
1027 <0x00001c00 0x00001c00 0x000400>, /* ap 79 */
1028 <0x000a5000 0x000a5000 0x001000>, /* ap 80 */
1029 <0x0007a000 0x0007a000 0x001000>, /* ap 81 */
1030 <0x0007b000 0x0007b000 0x001000>, /* ap 82 */
1031 <0x0007c000 0x0007c000 0x001000>, /* ap 83 */
1032 <0x0007d000 0x0007d000 0x001000>; /* ap 84 */
1034 target-module@20000 { /* 0x48020000, ap 3 04.0 */
1035 compatible = "ti,sysc-omap2", "ti,sysc";
1036 ti,hwmods = "uart3";
1037 reg = <0x20050 0x4>,
1040 reg-names = "rev", "sysc", "syss";
1041 ti,sysc-mask = <(SYSC_OMAP2_ENAWAKEUP |
1042 SYSC_OMAP2_SOFTRESET |
1043 SYSC_OMAP2_AUTOIDLE)>;
1044 ti,sysc-sidle = <SYSC_IDLE_FORCE>,
1047 <SYSC_IDLE_SMART_WKUP>;
1049 ti,no-reset-on-init;
1051 /* Domains (V, P, C): core, core_pwrdm, l4per_clkdm */
1052 clocks = <&l4per_clkctrl OMAP5_UART3_CLKCTRL 0>;
1053 clock-names = "fck";
1054 #address-cells = <1>;
1056 ranges = <0x0 0x20000 0x1000>;
1059 compatible = "ti,omap4-uart";
1061 interrupts = <GIC_SPI 74 IRQ_TYPE_LEVEL_HIGH>;
1062 clock-frequency = <48000000>;
1066 target-module@32000 { /* 0x48032000, ap 5 3e.0 */
1067 compatible = "ti,sysc-omap4-timer", "ti,sysc";
1068 ti,hwmods = "timer2";
1069 reg = <0x32000 0x4>,
1071 reg-names = "rev", "sysc";
1072 ti,sysc-mask = <(SYSC_OMAP4_FREEEMU |
1073 SYSC_OMAP4_SOFTRESET)>;
1074 ti,sysc-sidle = <SYSC_IDLE_FORCE>,
1077 <SYSC_IDLE_SMART_WKUP>;
1078 /* Domains (V, P, C): core, core_pwrdm, l4per_clkdm */
1079 clocks = <&l4per_clkctrl OMAP5_TIMER2_CLKCTRL 0>;
1080 clock-names = "fck";
1081 #address-cells = <1>;
1083 ranges = <0x0 0x32000 0x1000>;
1086 compatible = "ti,omap5430-timer";
1088 clocks = <&l4per_clkctrl OMAP5_TIMER2_CLKCTRL 24>;
1089 clock-names = "fck";
1090 interrupts = <GIC_SPI 38 IRQ_TYPE_LEVEL_HIGH>;
1094 target-module@34000 { /* 0x48034000, ap 7 46.0 */
1095 compatible = "ti,sysc-omap4-timer", "ti,sysc";
1096 ti,hwmods = "timer3";
1097 reg = <0x34000 0x4>,
1099 reg-names = "rev", "sysc";
1100 ti,sysc-mask = <(SYSC_OMAP4_FREEEMU |
1101 SYSC_OMAP4_SOFTRESET)>;
1102 ti,sysc-sidle = <SYSC_IDLE_FORCE>,
1105 <SYSC_IDLE_SMART_WKUP>;
1106 /* Domains (V, P, C): core, core_pwrdm, l4per_clkdm */
1107 clocks = <&l4per_clkctrl OMAP5_TIMER3_CLKCTRL 0>;
1108 clock-names = "fck";
1109 #address-cells = <1>;
1111 ranges = <0x0 0x34000 0x1000>;
1114 compatible = "ti,omap5430-timer";
1116 clocks = <&l4per_clkctrl OMAP5_TIMER3_CLKCTRL 24>;
1117 clock-names = "fck";
1118 interrupts = <GIC_SPI 39 IRQ_TYPE_LEVEL_HIGH>;
1122 target-module@36000 { /* 0x48036000, ap 9 4e.0 */
1123 compatible = "ti,sysc-omap4-timer", "ti,sysc";
1124 ti,hwmods = "timer4";
1125 reg = <0x36000 0x4>,
1127 reg-names = "rev", "sysc";
1128 ti,sysc-mask = <(SYSC_OMAP4_FREEEMU |
1129 SYSC_OMAP4_SOFTRESET)>;
1130 ti,sysc-sidle = <SYSC_IDLE_FORCE>,
1133 <SYSC_IDLE_SMART_WKUP>;
1134 /* Domains (V, P, C): core, core_pwrdm, l4per_clkdm */
1135 clocks = <&l4per_clkctrl OMAP5_TIMER4_CLKCTRL 0>;
1136 clock-names = "fck";
1137 #address-cells = <1>;
1139 ranges = <0x0 0x36000 0x1000>;
1142 compatible = "ti,omap5430-timer";
1144 clocks = <&l4per_clkctrl OMAP5_TIMER4_CLKCTRL 24>;
1145 clock-names = "fck";
1146 interrupts = <GIC_SPI 40 IRQ_TYPE_LEVEL_HIGH>;
1150 target-module@3e000 { /* 0x4803e000, ap 11 56.0 */
1151 compatible = "ti,sysc-omap4-timer", "ti,sysc";
1152 ti,hwmods = "timer9";
1153 reg = <0x3e000 0x4>,
1155 reg-names = "rev", "sysc";
1156 ti,sysc-mask = <(SYSC_OMAP4_FREEEMU |
1157 SYSC_OMAP4_SOFTRESET)>;
1158 ti,sysc-sidle = <SYSC_IDLE_FORCE>,
1161 <SYSC_IDLE_SMART_WKUP>;
1162 /* Domains (V, P, C): core, core_pwrdm, l4per_clkdm */
1163 clocks = <&l4per_clkctrl OMAP5_TIMER9_CLKCTRL 0>;
1164 clock-names = "fck";
1165 #address-cells = <1>;
1167 ranges = <0x0 0x3e000 0x1000>;
1170 compatible = "ti,omap5430-timer";
1172 clocks = <&l4per_clkctrl OMAP5_TIMER9_CLKCTRL 24>;
1173 clock-names = "fck";
1174 interrupts = <GIC_SPI 45 IRQ_TYPE_LEVEL_HIGH>;
1179 target-module@51000 { /* 0x48051000, ap 45 2e.0 */
1180 compatible = "ti,sysc-omap2", "ti,sysc";
1181 ti,hwmods = "gpio7";
1182 reg = <0x51000 0x4>,
1185 reg-names = "rev", "sysc", "syss";
1186 ti,sysc-mask = <(SYSC_OMAP2_ENAWAKEUP |
1187 SYSC_OMAP2_SOFTRESET |
1188 SYSC_OMAP2_AUTOIDLE)>;
1189 ti,sysc-sidle = <SYSC_IDLE_FORCE>,
1192 <SYSC_IDLE_SMART_WKUP>;
1194 /* Domains (V, P, C): core, core_pwrdm, l4per_clkdm */
1195 clocks = <&l4per_clkctrl OMAP5_GPIO7_CLKCTRL 0>,
1196 <&l4per_clkctrl OMAP5_GPIO7_CLKCTRL 8>;
1197 clock-names = "fck", "dbclk";
1198 #address-cells = <1>;
1200 ranges = <0x0 0x51000 0x1000>;
1203 compatible = "ti,omap4-gpio";
1205 interrupts = <GIC_SPI 35 IRQ_TYPE_LEVEL_HIGH>;
1208 interrupt-controller;
1209 #interrupt-cells = <2>;
1213 target-module@53000 { /* 0x48053000, ap 35 36.0 */
1214 compatible = "ti,sysc-omap2", "ti,sysc";
1215 ti,hwmods = "gpio8";
1216 reg = <0x53000 0x4>,
1219 reg-names = "rev", "sysc", "syss";
1220 ti,sysc-mask = <(SYSC_OMAP2_ENAWAKEUP |
1221 SYSC_OMAP2_SOFTRESET |
1222 SYSC_OMAP2_AUTOIDLE)>;
1223 ti,sysc-sidle = <SYSC_IDLE_FORCE>,
1226 <SYSC_IDLE_SMART_WKUP>;
1228 /* Domains (V, P, C): core, core_pwrdm, l4per_clkdm */
1229 clocks = <&l4per_clkctrl OMAP5_GPIO8_CLKCTRL 0>,
1230 <&l4per_clkctrl OMAP5_GPIO8_CLKCTRL 8>;
1231 clock-names = "fck", "dbclk";
1232 #address-cells = <1>;
1234 ranges = <0x0 0x53000 0x1000>;
1237 compatible = "ti,omap4-gpio";
1239 interrupts = <GIC_SPI 121 IRQ_TYPE_LEVEL_HIGH>;
1242 interrupt-controller;
1243 #interrupt-cells = <2>;
1247 target-module@55000 { /* 0x48055000, ap 13 0e.0 */
1248 compatible = "ti,sysc-omap2", "ti,sysc";
1249 ti,hwmods = "gpio2";
1250 reg = <0x55000 0x4>,
1253 reg-names = "rev", "sysc", "syss";
1254 ti,sysc-mask = <(SYSC_OMAP2_ENAWAKEUP |
1255 SYSC_OMAP2_SOFTRESET |
1256 SYSC_OMAP2_AUTOIDLE)>;
1257 ti,sysc-sidle = <SYSC_IDLE_FORCE>,
1260 <SYSC_IDLE_SMART_WKUP>;
1262 /* Domains (V, P, C): core, core_pwrdm, l4per_clkdm */
1263 clocks = <&l4per_clkctrl OMAP5_GPIO2_CLKCTRL 0>,
1264 <&l4per_clkctrl OMAP5_GPIO2_CLKCTRL 8>;
1265 clock-names = "fck", "dbclk";
1266 #address-cells = <1>;
1268 ranges = <0x0 0x55000 0x1000>;
1271 compatible = "ti,omap4-gpio";
1273 interrupts = <GIC_SPI 30 IRQ_TYPE_LEVEL_HIGH>;
1276 interrupt-controller;
1277 #interrupt-cells = <2>;
1281 target-module@57000 { /* 0x48057000, ap 15 06.0 */
1282 compatible = "ti,sysc-omap2", "ti,sysc";
1283 ti,hwmods = "gpio3";
1284 reg = <0x57000 0x4>,
1287 reg-names = "rev", "sysc", "syss";
1288 ti,sysc-mask = <(SYSC_OMAP2_ENAWAKEUP |
1289 SYSC_OMAP2_SOFTRESET |
1290 SYSC_OMAP2_AUTOIDLE)>;
1291 ti,sysc-sidle = <SYSC_IDLE_FORCE>,
1294 <SYSC_IDLE_SMART_WKUP>;
1296 /* Domains (V, P, C): core, core_pwrdm, l4per_clkdm */
1297 clocks = <&l4per_clkctrl OMAP5_GPIO3_CLKCTRL 0>,
1298 <&l4per_clkctrl OMAP5_GPIO3_CLKCTRL 8>;
1299 clock-names = "fck", "dbclk";
1300 #address-cells = <1>;
1302 ranges = <0x0 0x57000 0x1000>;
1305 compatible = "ti,omap4-gpio";
1307 interrupts = <GIC_SPI 31 IRQ_TYPE_LEVEL_HIGH>;
1310 interrupt-controller;
1311 #interrupt-cells = <2>;
1315 target-module@59000 { /* 0x48059000, ap 17 16.0 */
1316 compatible = "ti,sysc-omap2", "ti,sysc";
1317 ti,hwmods = "gpio4";
1318 reg = <0x59000 0x4>,
1321 reg-names = "rev", "sysc", "syss";
1322 ti,sysc-mask = <(SYSC_OMAP2_ENAWAKEUP |
1323 SYSC_OMAP2_SOFTRESET |
1324 SYSC_OMAP2_AUTOIDLE)>;
1325 ti,sysc-sidle = <SYSC_IDLE_FORCE>,
1328 <SYSC_IDLE_SMART_WKUP>;
1330 /* Domains (V, P, C): core, core_pwrdm, l4per_clkdm */
1331 clocks = <&l4per_clkctrl OMAP5_GPIO4_CLKCTRL 0>,
1332 <&l4per_clkctrl OMAP5_GPIO4_CLKCTRL 8>;
1333 clock-names = "fck", "dbclk";
1334 #address-cells = <1>;
1336 ranges = <0x0 0x59000 0x1000>;
1339 compatible = "ti,omap4-gpio";
1341 interrupts = <GIC_SPI 32 IRQ_TYPE_LEVEL_HIGH>;
1344 interrupt-controller;
1345 #interrupt-cells = <2>;
1349 target-module@5b000 { /* 0x4805b000, ap 19 1e.0 */
1350 compatible = "ti,sysc-omap2", "ti,sysc";
1351 ti,hwmods = "gpio5";
1352 reg = <0x5b000 0x4>,
1355 reg-names = "rev", "sysc", "syss";
1356 ti,sysc-mask = <(SYSC_OMAP2_ENAWAKEUP |
1357 SYSC_OMAP2_SOFTRESET |
1358 SYSC_OMAP2_AUTOIDLE)>;
1359 ti,sysc-sidle = <SYSC_IDLE_FORCE>,
1362 <SYSC_IDLE_SMART_WKUP>;
1364 /* Domains (V, P, C): core, core_pwrdm, l4per_clkdm */
1365 clocks = <&l4per_clkctrl OMAP5_GPIO5_CLKCTRL 0>,
1366 <&l4per_clkctrl OMAP5_GPIO5_CLKCTRL 8>;
1367 clock-names = "fck", "dbclk";
1368 #address-cells = <1>;
1370 ranges = <0x0 0x5b000 0x1000>;
1373 compatible = "ti,omap4-gpio";
1375 interrupts = <GIC_SPI 33 IRQ_TYPE_LEVEL_HIGH>;
1378 interrupt-controller;
1379 #interrupt-cells = <2>;
1383 target-module@5d000 { /* 0x4805d000, ap 21 26.0 */
1384 compatible = "ti,sysc-omap2", "ti,sysc";
1385 ti,hwmods = "gpio6";
1386 reg = <0x5d000 0x4>,
1389 reg-names = "rev", "sysc", "syss";
1390 ti,sysc-mask = <(SYSC_OMAP2_ENAWAKEUP |
1391 SYSC_OMAP2_SOFTRESET |
1392 SYSC_OMAP2_AUTOIDLE)>;
1393 ti,sysc-sidle = <SYSC_IDLE_FORCE>,
1396 <SYSC_IDLE_SMART_WKUP>;
1398 /* Domains (V, P, C): core, core_pwrdm, l4per_clkdm */
1399 clocks = <&l4per_clkctrl OMAP5_GPIO6_CLKCTRL 0>,
1400 <&l4per_clkctrl OMAP5_GPIO6_CLKCTRL 8>;
1401 clock-names = "fck", "dbclk";
1402 #address-cells = <1>;
1404 ranges = <0x0 0x5d000 0x1000>;
1407 compatible = "ti,omap4-gpio";
1409 interrupts = <GIC_SPI 34 IRQ_TYPE_LEVEL_HIGH>;
1412 interrupt-controller;
1413 #interrupt-cells = <2>;
1417 target-module@60000 { /* 0x48060000, ap 23 24.0 */
1418 compatible = "ti,sysc-omap2", "ti,sysc";
1420 reg = <0x60000 0x8>,
1423 reg-names = "rev", "sysc", "syss";
1424 ti,sysc-mask = <(SYSC_OMAP2_CLOCKACTIVITY |
1425 SYSC_OMAP2_ENAWAKEUP |
1426 SYSC_OMAP2_SOFTRESET |
1427 SYSC_OMAP2_AUTOIDLE)>;
1428 ti,sysc-sidle = <SYSC_IDLE_FORCE>,
1431 <SYSC_IDLE_SMART_WKUP>;
1433 /* Domains (V, P, C): core, core_pwrdm, l4per_clkdm */
1434 clocks = <&l4per_clkctrl OMAP5_I2C3_CLKCTRL 0>;
1435 clock-names = "fck";
1436 #address-cells = <1>;
1438 ranges = <0x0 0x60000 0x1000>;
1441 compatible = "ti,omap4-i2c";
1443 interrupts = <GIC_SPI 61 IRQ_TYPE_LEVEL_HIGH>;
1444 #address-cells = <1>;
1449 target-module@66000 { /* 0x48066000, ap 63 4c.0 */
1450 compatible = "ti,sysc-omap2", "ti,sysc";
1451 ti,hwmods = "uart5";
1452 reg = <0x66050 0x4>,
1455 reg-names = "rev", "sysc", "syss";
1456 ti,sysc-mask = <(SYSC_OMAP2_ENAWAKEUP |
1457 SYSC_OMAP2_SOFTRESET |
1458 SYSC_OMAP2_AUTOIDLE)>;
1459 ti,sysc-sidle = <SYSC_IDLE_FORCE>,
1462 <SYSC_IDLE_SMART_WKUP>;
1464 /* Domains (V, P, C): core, core_pwrdm, l4per_clkdm */
1465 clocks = <&l4per_clkctrl OMAP5_UART5_CLKCTRL 0>;
1466 clock-names = "fck";
1467 #address-cells = <1>;
1469 ranges = <0x0 0x66000 0x1000>;
1472 compatible = "ti,omap4-uart";
1474 interrupts = <GIC_SPI 105 IRQ_TYPE_LEVEL_HIGH>;
1475 clock-frequency = <48000000>;
1479 target-module@68000 { /* 0x48068000, ap 53 54.0 */
1480 compatible = "ti,sysc-omap2", "ti,sysc";
1481 ti,hwmods = "uart6";
1482 reg = <0x68050 0x4>,
1485 reg-names = "rev", "sysc", "syss";
1486 ti,sysc-mask = <(SYSC_OMAP2_ENAWAKEUP |
1487 SYSC_OMAP2_SOFTRESET |
1488 SYSC_OMAP2_AUTOIDLE)>;
1489 ti,sysc-sidle = <SYSC_IDLE_FORCE>,
1492 <SYSC_IDLE_SMART_WKUP>;
1494 /* Domains (V, P, C): core, core_pwrdm, l4per_clkdm */
1495 clocks = <&l4per_clkctrl OMAP5_UART6_CLKCTRL 0>;
1496 clock-names = "fck";
1497 #address-cells = <1>;
1499 ranges = <0x0 0x68000 0x1000>;
1502 compatible = "ti,omap4-uart";
1504 interrupts = <GIC_SPI 106 IRQ_TYPE_LEVEL_HIGH>;
1505 clock-frequency = <48000000>;
1509 target-module@6a000 { /* 0x4806a000, ap 24 0a.0 */
1510 compatible = "ti,sysc-omap2", "ti,sysc";
1511 ti,hwmods = "uart1";
1512 reg = <0x6a050 0x4>,
1515 reg-names = "rev", "sysc", "syss";
1516 ti,sysc-mask = <(SYSC_OMAP2_ENAWAKEUP |
1517 SYSC_OMAP2_SOFTRESET |
1518 SYSC_OMAP2_AUTOIDLE)>;
1519 ti,sysc-sidle = <SYSC_IDLE_FORCE>,
1522 <SYSC_IDLE_SMART_WKUP>;
1524 /* Domains (V, P, C): core, core_pwrdm, l4per_clkdm */
1525 clocks = <&l4per_clkctrl OMAP5_UART1_CLKCTRL 0>;
1526 clock-names = "fck";
1527 #address-cells = <1>;
1529 ranges = <0x0 0x6a000 0x1000>;
1532 compatible = "ti,omap4-uart";
1534 interrupts = <GIC_SPI 72 IRQ_TYPE_LEVEL_HIGH>;
1535 clock-frequency = <48000000>;
1539 target-module@6c000 { /* 0x4806c000, ap 26 22.0 */
1540 compatible = "ti,sysc-omap2", "ti,sysc";
1541 ti,hwmods = "uart2";
1542 reg = <0x6c050 0x4>,
1545 reg-names = "rev", "sysc", "syss";
1546 ti,sysc-mask = <(SYSC_OMAP2_ENAWAKEUP |
1547 SYSC_OMAP2_SOFTRESET |
1548 SYSC_OMAP2_AUTOIDLE)>;
1549 ti,sysc-sidle = <SYSC_IDLE_FORCE>,
1552 <SYSC_IDLE_SMART_WKUP>;
1554 /* Domains (V, P, C): core, core_pwrdm, l4per_clkdm */
1555 clocks = <&l4per_clkctrl OMAP5_UART2_CLKCTRL 0>;
1556 clock-names = "fck";
1557 #address-cells = <1>;
1559 ranges = <0x0 0x6c000 0x1000>;
1562 compatible = "ti,omap4-uart";
1564 interrupts = <GIC_SPI 73 IRQ_TYPE_LEVEL_HIGH>;
1565 clock-frequency = <48000000>;
1569 target-module@6e000 { /* 0x4806e000, ap 28 44.1 */
1570 compatible = "ti,sysc-omap2", "ti,sysc";
1571 ti,hwmods = "uart4";
1572 reg = <0x6e050 0x4>,
1575 reg-names = "rev", "sysc", "syss";
1576 ti,sysc-mask = <(SYSC_OMAP2_ENAWAKEUP |
1577 SYSC_OMAP2_SOFTRESET |
1578 SYSC_OMAP2_AUTOIDLE)>;
1579 ti,sysc-sidle = <SYSC_IDLE_FORCE>,
1582 <SYSC_IDLE_SMART_WKUP>;
1584 /* Domains (V, P, C): core, core_pwrdm, l4per_clkdm */
1585 clocks = <&l4per_clkctrl OMAP5_UART4_CLKCTRL 0>;
1586 clock-names = "fck";
1587 #address-cells = <1>;
1589 ranges = <0x0 0x6e000 0x1000>;
1592 compatible = "ti,omap4-uart";
1594 interrupts = <GIC_SPI 70 IRQ_TYPE_LEVEL_HIGH>;
1595 clock-frequency = <48000000>;
1599 target-module@70000 { /* 0x48070000, ap 30 14.0 */
1600 compatible = "ti,sysc-omap2", "ti,sysc";
1602 reg = <0x70000 0x8>,
1605 reg-names = "rev", "sysc", "syss";
1606 ti,sysc-mask = <(SYSC_OMAP2_CLOCKACTIVITY |
1607 SYSC_OMAP2_ENAWAKEUP |
1608 SYSC_OMAP2_SOFTRESET |
1609 SYSC_OMAP2_AUTOIDLE)>;
1610 ti,sysc-sidle = <SYSC_IDLE_FORCE>,
1613 <SYSC_IDLE_SMART_WKUP>;
1615 /* Domains (V, P, C): core, core_pwrdm, l4per_clkdm */
1616 clocks = <&l4per_clkctrl OMAP5_I2C1_CLKCTRL 0>;
1617 clock-names = "fck";
1618 #address-cells = <1>;
1620 ranges = <0x0 0x70000 0x1000>;
1623 compatible = "ti,omap4-i2c";
1625 interrupts = <GIC_SPI 56 IRQ_TYPE_LEVEL_HIGH>;
1626 #address-cells = <1>;
1631 target-module@72000 { /* 0x48072000, ap 32 1c.0 */
1632 compatible = "ti,sysc-omap2", "ti,sysc";
1634 reg = <0x72000 0x8>,
1637 reg-names = "rev", "sysc", "syss";
1638 ti,sysc-mask = <(SYSC_OMAP2_CLOCKACTIVITY |
1639 SYSC_OMAP2_ENAWAKEUP |
1640 SYSC_OMAP2_SOFTRESET |
1641 SYSC_OMAP2_AUTOIDLE)>;
1642 ti,sysc-sidle = <SYSC_IDLE_FORCE>,
1645 <SYSC_IDLE_SMART_WKUP>;
1647 /* Domains (V, P, C): core, core_pwrdm, l4per_clkdm */
1648 clocks = <&l4per_clkctrl OMAP5_I2C2_CLKCTRL 0>;
1649 clock-names = "fck";
1650 #address-cells = <1>;
1652 ranges = <0x0 0x72000 0x1000>;
1655 compatible = "ti,omap4-i2c";
1657 interrupts = <GIC_SPI 57 IRQ_TYPE_LEVEL_HIGH>;
1658 #address-cells = <1>;
1663 target-module@78000 { /* 0x48078000, ap 39 12.0 */
1664 compatible = "ti,sysc";
1665 status = "disabled";
1666 #address-cells = <1>;
1668 ranges = <0x0 0x78000 0x1000>;
1671 target-module@7a000 { /* 0x4807a000, ap 81 2c.0 */
1672 compatible = "ti,sysc-omap2", "ti,sysc";
1674 reg = <0x7a000 0x8>,
1677 reg-names = "rev", "sysc", "syss";
1678 ti,sysc-mask = <(SYSC_OMAP2_CLOCKACTIVITY |
1679 SYSC_OMAP2_ENAWAKEUP |
1680 SYSC_OMAP2_SOFTRESET |
1681 SYSC_OMAP2_AUTOIDLE)>;
1682 ti,sysc-sidle = <SYSC_IDLE_FORCE>,
1685 <SYSC_IDLE_SMART_WKUP>;
1687 /* Domains (V, P, C): core, core_pwrdm, l4per_clkdm */
1688 clocks = <&l4per_clkctrl OMAP5_I2C4_CLKCTRL 0>;
1689 clock-names = "fck";
1690 #address-cells = <1>;
1692 ranges = <0x0 0x7a000 0x1000>;
1695 compatible = "ti,omap4-i2c";
1697 interrupts = <GIC_SPI 62 IRQ_TYPE_LEVEL_HIGH>;
1698 #address-cells = <1>;
1703 target-module@7c000 { /* 0x4807c000, ap 83 34.0 */
1704 compatible = "ti,sysc-omap2", "ti,sysc";
1706 reg = <0x7c000 0x8>,
1709 reg-names = "rev", "sysc", "syss";
1710 ti,sysc-mask = <(SYSC_OMAP2_CLOCKACTIVITY |
1711 SYSC_OMAP2_ENAWAKEUP |
1712 SYSC_OMAP2_SOFTRESET |
1713 SYSC_OMAP2_AUTOIDLE)>;
1714 ti,sysc-sidle = <SYSC_IDLE_FORCE>,
1717 <SYSC_IDLE_SMART_WKUP>;
1719 /* Domains (V, P, C): core, core_pwrdm, l4per_clkdm */
1720 clocks = <&l4per_clkctrl OMAP5_I2C5_CLKCTRL 0>;
1721 clock-names = "fck";
1722 #address-cells = <1>;
1724 ranges = <0x0 0x7c000 0x1000>;
1727 compatible = "ti,omap4-i2c";
1729 interrupts = <GIC_SPI 60 IRQ_TYPE_LEVEL_HIGH>;
1730 #address-cells = <1>;
1735 target-module@86000 { /* 0x48086000, ap 41 5e.0 */
1736 compatible = "ti,sysc-omap4-timer", "ti,sysc";
1737 ti,hwmods = "timer10";
1738 reg = <0x86000 0x4>,
1740 reg-names = "rev", "sysc";
1741 ti,sysc-mask = <(SYSC_OMAP4_FREEEMU |
1742 SYSC_OMAP4_SOFTRESET)>;
1743 ti,sysc-sidle = <SYSC_IDLE_FORCE>,
1746 <SYSC_IDLE_SMART_WKUP>;
1747 /* Domains (V, P, C): core, core_pwrdm, l4per_clkdm */
1748 clocks = <&l4per_clkctrl OMAP5_TIMER10_CLKCTRL 0>;
1749 clock-names = "fck";
1750 #address-cells = <1>;
1752 ranges = <0x0 0x86000 0x1000>;
1755 compatible = "ti,omap5430-timer";
1757 clocks = <&l4per_clkctrl OMAP5_TIMER10_CLKCTRL 24>;
1758 clock-names = "fck";
1759 interrupts = <GIC_SPI 46 IRQ_TYPE_LEVEL_HIGH>;
1764 target-module@88000 { /* 0x48088000, ap 43 66.0 */
1765 compatible = "ti,sysc-omap4-timer", "ti,sysc";
1766 ti,hwmods = "timer11";
1767 reg = <0x88000 0x4>,
1769 reg-names = "rev", "sysc";
1770 ti,sysc-mask = <(SYSC_OMAP4_FREEEMU |
1771 SYSC_OMAP4_SOFTRESET)>;
1772 ti,sysc-sidle = <SYSC_IDLE_FORCE>,
1775 <SYSC_IDLE_SMART_WKUP>;
1776 /* Domains (V, P, C): core, core_pwrdm, l4per_clkdm */
1777 clocks = <&l4per_clkctrl OMAP5_TIMER11_CLKCTRL 0>;
1778 clock-names = "fck";
1779 #address-cells = <1>;
1781 ranges = <0x0 0x88000 0x1000>;
1784 compatible = "ti,omap5430-timer";
1786 clocks = <&l4per_clkctrl OMAP5_TIMER11_CLKCTRL 24>;
1787 clock-names = "fck";
1788 interrupts = <GIC_SPI 47 IRQ_TYPE_LEVEL_HIGH>;
1793 target-module@90000 { /* 0x48090000, ap 55 1a.0 */
1794 compatible = "ti,sysc";
1795 status = "disabled";
1796 #address-cells = <1>;
1798 ranges = <0x0 0x90000 0x2000>;
1801 target-module@98000 { /* 0x48098000, ap 47 08.0 */
1802 compatible = "ti,sysc-omap4", "ti,sysc";
1803 ti,hwmods = "mcspi1";
1804 reg = <0x98000 0x4>,
1806 reg-names = "rev", "sysc";
1807 ti,sysc-mask = <(SYSC_OMAP4_FREEEMU |
1808 SYSC_OMAP4_SOFTRESET)>;
1809 ti,sysc-sidle = <SYSC_IDLE_FORCE>,
1812 <SYSC_IDLE_SMART_WKUP>;
1813 /* Domains (V, P, C): core, core_pwrdm, l4per_clkdm */
1814 clocks = <&l4per_clkctrl OMAP5_MCSPI1_CLKCTRL 0>;
1815 clock-names = "fck";
1816 #address-cells = <1>;
1818 ranges = <0x0 0x98000 0x1000>;
1821 compatible = "ti,omap4-mcspi";
1823 interrupts = <GIC_SPI 65 IRQ_TYPE_LEVEL_HIGH>;
1824 #address-cells = <1>;
1826 ti,spi-num-cs = <4>;
1835 dma-names = "tx0", "rx0", "tx1", "rx1",
1836 "tx2", "rx2", "tx3", "rx3";
1840 target-module@9a000 { /* 0x4809a000, ap 49 10.0 */
1841 compatible = "ti,sysc-omap4", "ti,sysc";
1842 ti,hwmods = "mcspi2";
1843 reg = <0x9a000 0x4>,
1845 reg-names = "rev", "sysc";
1846 ti,sysc-mask = <(SYSC_OMAP4_FREEEMU |
1847 SYSC_OMAP4_SOFTRESET)>;
1848 ti,sysc-sidle = <SYSC_IDLE_FORCE>,
1851 <SYSC_IDLE_SMART_WKUP>;
1852 /* Domains (V, P, C): core, core_pwrdm, l4per_clkdm */
1853 clocks = <&l4per_clkctrl OMAP5_MCSPI2_CLKCTRL 0>;
1854 clock-names = "fck";
1855 #address-cells = <1>;
1857 ranges = <0x0 0x9a000 0x1000>;
1860 compatible = "ti,omap4-mcspi";
1862 interrupts = <GIC_SPI 66 IRQ_TYPE_LEVEL_HIGH>;
1863 #address-cells = <1>;
1865 ti,spi-num-cs = <2>;
1870 dma-names = "tx0", "rx0", "tx1", "rx1";
1874 target-module@9c000 { /* 0x4809c000, ap 51 3a.0 */
1875 compatible = "ti,sysc-omap4", "ti,sysc";
1877 reg = <0x9c000 0x4>,
1879 reg-names = "rev", "sysc";
1880 ti,sysc-mask = <(SYSC_OMAP4_FREEEMU |
1881 SYSC_OMAP4_SOFTRESET)>;
1882 ti,sysc-midle = <SYSC_IDLE_FORCE>,
1885 <SYSC_IDLE_SMART_WKUP>;
1886 ti,sysc-sidle = <SYSC_IDLE_FORCE>,
1889 <SYSC_IDLE_SMART_WKUP>;
1890 /* Domains (V, P, C): core, l3init_pwrdm, l3init_clkdm */
1891 clocks = <&l3init_clkctrl OMAP5_MMC1_CLKCTRL 0>;
1892 clock-names = "fck";
1893 #address-cells = <1>;
1895 ranges = <0x0 0x9c000 0x1000>;
1898 compatible = "ti,omap4-hsmmc";
1900 interrupts = <GIC_SPI 83 IRQ_TYPE_LEVEL_HIGH>;
1902 ti,needs-special-reset;
1903 dmas = <&sdma 61>, <&sdma 62>;
1904 dma-names = "tx", "rx";
1905 pbias-supply = <&pbias_mmc_reg>;
1909 target-module@a2000 { /* 0x480a2000, ap 75 02.0 */
1910 compatible = "ti,sysc";
1911 status = "disabled";
1912 #address-cells = <1>;
1914 ranges = <0x0 0xa2000 0x1000>;
1917 target-module@a4000 { /* 0x480a4000, ap 57 3c.0 */
1918 compatible = "ti,sysc";
1919 status = "disabled";
1920 #address-cells = <1>;
1922 ranges = <0x00000000 0x000a4000 0x00001000>,
1923 <0x00001000 0x000a5000 0x00001000>;
1926 target-module@a8000 { /* 0x480a8000, ap 59 2a.0 */
1927 compatible = "ti,sysc";
1928 status = "disabled";
1929 #address-cells = <1>;
1931 ranges = <0x0 0xa8000 0x4000>;
1934 target-module@ad000 { /* 0x480ad000, ap 61 20.0 */
1935 compatible = "ti,sysc-omap4", "ti,sysc";
1937 reg = <0xad000 0x4>,
1939 reg-names = "rev", "sysc";
1940 ti,sysc-mask = <(SYSC_OMAP4_FREEEMU |
1941 SYSC_OMAP4_SOFTRESET)>;
1942 ti,sysc-midle = <SYSC_IDLE_FORCE>,
1945 <SYSC_IDLE_SMART_WKUP>;
1946 ti,sysc-sidle = <SYSC_IDLE_FORCE>,
1949 <SYSC_IDLE_SMART_WKUP>;
1950 /* Domains (V, P, C): core, core_pwrdm, l4per_clkdm */
1951 clocks = <&l4per_clkctrl OMAP5_MMC3_CLKCTRL 0>;
1952 clock-names = "fck";
1953 #address-cells = <1>;
1955 ranges = <0x0 0xad000 0x1000>;
1958 compatible = "ti,omap4-hsmmc";
1960 interrupts = <GIC_SPI 94 IRQ_TYPE_LEVEL_HIGH>;
1961 ti,needs-special-reset;
1962 dmas = <&sdma 77>, <&sdma 78>;
1963 dma-names = "tx", "rx";
1967 target-module@b2000 { /* 0x480b2000, ap 37 0c.0 */
1968 compatible = "ti,sysc";
1969 status = "disabled";
1970 #address-cells = <1>;
1972 ranges = <0x0 0xb2000 0x1000>;
1975 target-module@b4000 { /* 0x480b4000, ap 65 42.0 */
1976 compatible = "ti,sysc-omap4", "ti,sysc";
1978 reg = <0xb4000 0x4>,
1980 reg-names = "rev", "sysc";
1981 ti,sysc-mask = <(SYSC_OMAP4_FREEEMU |
1982 SYSC_OMAP4_SOFTRESET)>;
1983 ti,sysc-midle = <SYSC_IDLE_FORCE>,
1986 <SYSC_IDLE_SMART_WKUP>;
1987 ti,sysc-sidle = <SYSC_IDLE_FORCE>,
1990 <SYSC_IDLE_SMART_WKUP>;
1991 /* Domains (V, P, C): core, l3init_pwrdm, l3init_clkdm */
1992 clocks = <&l3init_clkctrl OMAP5_MMC2_CLKCTRL 0>;
1993 clock-names = "fck";
1994 #address-cells = <1>;
1996 ranges = <0x0 0xb4000 0x1000>;
1999 compatible = "ti,omap4-hsmmc";
2001 interrupts = <GIC_SPI 86 IRQ_TYPE_LEVEL_HIGH>;
2002 ti,needs-special-reset;
2003 dmas = <&sdma 47>, <&sdma 48>;
2004 dma-names = "tx", "rx";
2008 target-module@b8000 { /* 0x480b8000, ap 67 32.0 */
2009 compatible = "ti,sysc-omap4", "ti,sysc";
2010 ti,hwmods = "mcspi3";
2011 reg = <0xb8000 0x4>,
2013 reg-names = "rev", "sysc";
2014 ti,sysc-mask = <(SYSC_OMAP4_FREEEMU |
2015 SYSC_OMAP4_SOFTRESET)>;
2016 ti,sysc-sidle = <SYSC_IDLE_FORCE>,
2019 <SYSC_IDLE_SMART_WKUP>;
2020 /* Domains (V, P, C): core, core_pwrdm, l4per_clkdm */
2021 clocks = <&l4per_clkctrl OMAP5_MCSPI3_CLKCTRL 0>;
2022 clock-names = "fck";
2023 #address-cells = <1>;
2025 ranges = <0x0 0xb8000 0x1000>;
2028 compatible = "ti,omap4-mcspi";
2030 interrupts = <GIC_SPI 91 IRQ_TYPE_LEVEL_HIGH>;
2031 #address-cells = <1>;
2033 ti,spi-num-cs = <2>;
2034 dmas = <&sdma 15>, <&sdma 16>;
2035 dma-names = "tx0", "rx0";
2039 target-module@ba000 { /* 0x480ba000, ap 69 18.0 */
2040 compatible = "ti,sysc-omap4", "ti,sysc";
2041 ti,hwmods = "mcspi4";
2042 reg = <0xba000 0x4>,
2044 reg-names = "rev", "sysc";
2045 ti,sysc-mask = <(SYSC_OMAP4_FREEEMU |
2046 SYSC_OMAP4_SOFTRESET)>;
2047 ti,sysc-sidle = <SYSC_IDLE_FORCE>,
2050 <SYSC_IDLE_SMART_WKUP>;
2051 /* Domains (V, P, C): core, core_pwrdm, l4per_clkdm */
2052 clocks = <&l4per_clkctrl OMAP5_MCSPI4_CLKCTRL 0>;
2053 clock-names = "fck";
2054 #address-cells = <1>;
2056 ranges = <0x0 0xba000 0x1000>;
2059 compatible = "ti,omap4-mcspi";
2061 interrupts = <GIC_SPI 48 IRQ_TYPE_LEVEL_HIGH>;
2062 #address-cells = <1>;
2064 ti,spi-num-cs = <1>;
2065 dmas = <&sdma 70>, <&sdma 71>;
2066 dma-names = "tx0", "rx0";
2070 target-module@d1000 { /* 0x480d1000, ap 71 28.0 */
2071 compatible = "ti,sysc-omap4", "ti,sysc";
2073 reg = <0xd1000 0x4>,
2075 reg-names = "rev", "sysc";
2076 ti,sysc-mask = <(SYSC_OMAP4_FREEEMU |
2077 SYSC_OMAP4_SOFTRESET)>;
2078 ti,sysc-midle = <SYSC_IDLE_FORCE>,
2081 <SYSC_IDLE_SMART_WKUP>;
2082 ti,sysc-sidle = <SYSC_IDLE_FORCE>,
2085 <SYSC_IDLE_SMART_WKUP>;
2086 /* Domains (V, P, C): core, core_pwrdm, l4per_clkdm */
2087 clocks = <&l4per_clkctrl OMAP5_MMC4_CLKCTRL 0>;
2088 clock-names = "fck";
2089 #address-cells = <1>;
2091 ranges = <0x0 0xd1000 0x1000>;
2094 compatible = "ti,omap4-hsmmc";
2096 interrupts = <GIC_SPI 96 IRQ_TYPE_LEVEL_HIGH>;
2097 ti,needs-special-reset;
2098 dmas = <&sdma 57>, <&sdma 58>;
2099 dma-names = "tx", "rx";
2103 target-module@d5000 { /* 0x480d5000, ap 73 30.0 */
2104 compatible = "ti,sysc-omap4", "ti,sysc";
2106 reg = <0xd5000 0x4>,
2108 reg-names = "rev", "sysc";
2109 ti,sysc-mask = <(SYSC_OMAP4_FREEEMU |
2110 SYSC_OMAP4_SOFTRESET)>;
2111 ti,sysc-midle = <SYSC_IDLE_FORCE>,
2114 <SYSC_IDLE_SMART_WKUP>;
2115 ti,sysc-sidle = <SYSC_IDLE_FORCE>,
2118 <SYSC_IDLE_SMART_WKUP>;
2119 /* Domains (V, P, C): core, core_pwrdm, l4per_clkdm */
2120 clocks = <&l4per_clkctrl OMAP5_MMC5_CLKCTRL 0>;
2121 clock-names = "fck";
2122 #address-cells = <1>;
2124 ranges = <0x0 0xd5000 0x1000>;
2127 compatible = "ti,omap4-hsmmc";
2129 interrupts = <GIC_SPI 59 IRQ_TYPE_LEVEL_HIGH>;
2130 ti,needs-special-reset;
2131 dmas = <&sdma 59>, <&sdma 60>;
2132 dma-names = "tx", "rx";
2137 segment@200000 { /* 0x48200000 */
2138 compatible = "simple-bus";
2139 #address-cells = <1>;
2144 &l4_wkup { /* 0x4ae00000 */
2145 compatible = "ti,omap5-l4-wkup", "simple-bus";
2146 reg = <0x4ae00000 0x800>,
2148 <0x4ae01000 0x1000>;
2149 reg-names = "ap", "la", "ia0";
2150 #address-cells = <1>;
2152 ranges = <0x00000000 0x4ae00000 0x010000>, /* segment 0 */
2153 <0x00010000 0x4ae10000 0x010000>, /* segment 1 */
2154 <0x00020000 0x4ae20000 0x010000>; /* segment 2 */
2156 segment@0 { /* 0x4ae00000 */
2157 compatible = "simple-bus";
2158 #address-cells = <1>;
2160 ranges = <0x00000000 0x00000000 0x000800>, /* ap 0 */
2161 <0x00001000 0x00001000 0x001000>, /* ap 1 */
2162 <0x00000800 0x00000800 0x000800>, /* ap 2 */
2163 <0x00006000 0x00006000 0x002000>, /* ap 3 */
2164 <0x00008000 0x00008000 0x001000>, /* ap 4 */
2165 <0x0000a000 0x0000a000 0x001000>, /* ap 15 */
2166 <0x0000b000 0x0000b000 0x001000>, /* ap 16 */
2167 <0x00004000 0x00004000 0x001000>, /* ap 17 */
2168 <0x00005000 0x00005000 0x001000>, /* ap 18 */
2169 <0x0000c000 0x0000c000 0x001000>, /* ap 19 */
2170 <0x0000d000 0x0000d000 0x001000>; /* ap 20 */
2172 target-module@4000 { /* 0x4ae04000, ap 17 20.0 */
2173 compatible = "ti,sysc-omap2", "ti,sysc";
2174 ti,hwmods = "counter_32k";
2177 reg-names = "rev", "sysc";
2178 ti,sysc-sidle = <SYSC_IDLE_FORCE>,
2180 /* Domains (V, P, C): wkup, wkupaon_pwrdm, wkupaon_clkdm */
2181 clocks = <&wkupaon_clkctrl OMAP5_COUNTER_32K_CLKCTRL 0>;
2182 clock-names = "fck";
2183 #address-cells = <1>;
2185 ranges = <0x0 0x4000 0x1000>;
2187 counter32k: counter@0 {
2188 compatible = "ti,omap-counter32k";
2193 target-module@6000 { /* 0x4ae06000, ap 3 08.0 */
2194 compatible = "ti,sysc-omap4", "ti,sysc";
2197 #address-cells = <1>;
2199 ranges = <0x0 0x6000 0x2000>;
2202 compatible = "ti,omap5-prm", "simple-bus";
2204 interrupts = <GIC_SPI 11 IRQ_TYPE_LEVEL_HIGH>;
2205 #address-cells = <1>;
2207 ranges = <0 0 0x2000>;
2209 prm_clocks: clocks {
2210 #address-cells = <1>;
2214 prm_clockdomains: clockdomains {
2219 target-module@a000 { /* 0x4ae0a000, ap 15 2c.0 */
2220 compatible = "ti,sysc-omap4", "ti,sysc";
2223 #address-cells = <1>;
2225 ranges = <0x0 0xa000 0x1000>;
2228 compatible = "ti,omap5-scrm";
2231 scrm_clocks: clocks {
2232 #address-cells = <1>;
2236 scrm_clockdomains: clockdomains {
2241 target-module@c000 { /* 0x4ae0c000, ap 19 28.0 */
2242 compatible = "ti,sysc-omap4", "ti,sysc";
2245 #address-cells = <1>;
2247 ranges = <0x0 0xc000 0x1000>;
2249 omap5_pmx_wkup: pinmux@840 {
2250 compatible = "ti,omap5-padconf",
2252 reg = <0x840 0x003c>;
2253 #address-cells = <1>;
2255 #pinctrl-cells = <1>;
2256 #interrupt-cells = <1>;
2257 interrupt-controller;
2258 pinctrl-single,register-width = <16>;
2259 pinctrl-single,function-mask = <0x7fff>;
2262 omap5_scm_wkup_pad_conf: omap5_scm_wkup_pad_conf@da0 {
2263 compatible = "ti,omap5-scm-wkup-pad-conf",
2266 #address-cells = <1>;
2268 ranges = <0 0 0x60>;
2270 scm_wkup_pad_conf: scm_conf@0 {
2271 compatible = "syscon", "simple-bus";
2273 #address-cells = <1>;
2275 ranges = <0 0x0 0x60>;
2277 scm_wkup_pad_conf_clocks: clocks@0 {
2278 #address-cells = <1>;
2286 segment@10000 { /* 0x4ae10000 */
2287 compatible = "simple-bus";
2288 #address-cells = <1>;
2290 ranges = <0x00000000 0x00010000 0x001000>, /* ap 5 */
2291 <0x00001000 0x00011000 0x001000>, /* ap 6 */
2292 <0x00004000 0x00014000 0x001000>, /* ap 7 */
2293 <0x00005000 0x00015000 0x001000>, /* ap 8 */
2294 <0x00008000 0x00018000 0x001000>, /* ap 9 */
2295 <0x00009000 0x00019000 0x001000>, /* ap 10 */
2296 <0x0000c000 0x0001c000 0x001000>, /* ap 11 */
2297 <0x0000d000 0x0001d000 0x001000>; /* ap 12 */
2299 target-module@0 { /* 0x4ae10000, ap 5 10.0 */
2300 compatible = "ti,sysc-omap2", "ti,sysc";
2301 ti,hwmods = "gpio1";
2305 reg-names = "rev", "sysc", "syss";
2306 ti,sysc-mask = <(SYSC_OMAP2_ENAWAKEUP |
2307 SYSC_OMAP2_SOFTRESET |
2308 SYSC_OMAP2_AUTOIDLE)>;
2309 ti,sysc-sidle = <SYSC_IDLE_FORCE>,
2312 <SYSC_IDLE_SMART_WKUP>;
2314 /* Domains (V, P, C): wkup, wkupaon_pwrdm, wkupaon_clkdm */
2315 clocks = <&wkupaon_clkctrl OMAP5_GPIO1_CLKCTRL 0>,
2316 <&wkupaon_clkctrl OMAP5_GPIO1_CLKCTRL 8>;
2317 clock-names = "fck", "dbclk";
2318 #address-cells = <1>;
2320 ranges = <0x0 0x0 0x1000>;
2323 compatible = "ti,omap4-gpio";
2325 interrupts = <GIC_SPI 29 IRQ_TYPE_LEVEL_HIGH>;
2329 interrupt-controller;
2330 #interrupt-cells = <2>;
2334 target-module@4000 { /* 0x4ae14000, ap 7 14.0 */
2335 compatible = "ti,sysc-omap2", "ti,sysc";
2336 ti,hwmods = "wd_timer2";
2340 reg-names = "rev", "sysc", "syss";
2341 ti,sysc-mask = <(SYSC_OMAP2_EMUFREE |
2342 SYSC_OMAP2_SOFTRESET)>;
2343 ti,sysc-sidle = <SYSC_IDLE_FORCE>,
2346 <SYSC_IDLE_SMART_WKUP>;
2348 /* Domains (V, P, C): wkup, wkupaon_pwrdm, wkupaon_clkdm */
2349 clocks = <&wkupaon_clkctrl OMAP5_WD_TIMER2_CLKCTRL 0>;
2350 clock-names = "fck";
2351 #address-cells = <1>;
2353 ranges = <0x0 0x4000 0x1000>;
2356 compatible = "ti,omap5-wdt", "ti,omap3-wdt";
2358 interrupts = <GIC_SPI 80 IRQ_TYPE_LEVEL_HIGH>;
2362 target-module@8000 { /* 0x4ae18000, ap 9 18.0 */
2363 compatible = "ti,sysc-omap4-timer", "ti,sysc";
2364 ti,hwmods = "timer1";
2367 reg-names = "rev", "sysc";
2368 ti,sysc-mask = <(SYSC_OMAP4_FREEEMU |
2369 SYSC_OMAP4_SOFTRESET)>;
2370 ti,sysc-sidle = <SYSC_IDLE_FORCE>,
2373 <SYSC_IDLE_SMART_WKUP>;
2374 /* Domains (V, P, C): wkup, wkupaon_pwrdm, wkupaon_clkdm */
2375 clocks = <&wkupaon_clkctrl OMAP5_TIMER1_CLKCTRL 0>;
2376 clock-names = "fck";
2377 #address-cells = <1>;
2379 ranges = <0x0 0x8000 0x1000>;
2382 compatible = "ti,omap5430-timer";
2384 clocks = <&wkupaon_clkctrl OMAP5_TIMER1_CLKCTRL 24>;
2385 clock-names = "fck";
2386 interrupts = <GIC_SPI 37 IRQ_TYPE_LEVEL_HIGH>;
2391 target-module@c000 { /* 0x4ae1c000, ap 11 1c.0 */
2392 compatible = "ti,sysc-omap2", "ti,sysc";
2396 reg-names = "rev", "sysc";
2397 ti,sysc-mask = <(SYSC_OMAP2_EMUFREE |
2398 SYSC_OMAP2_SOFTRESET)>;
2399 ti,sysc-sidle = <SYSC_IDLE_FORCE>,
2402 /* Domains (V, P, C): wkup, wkupaon_pwrdm, wkupaon_clkdm */
2403 clocks = <&wkupaon_clkctrl OMAP5_KBD_CLKCTRL 0>;
2404 clock-names = "fck";
2405 #address-cells = <1>;
2407 ranges = <0x0 0xc000 0x1000>;
2410 compatible = "ti,omap4-keypad";
2416 segment@20000 { /* 0x4ae20000 */
2417 compatible = "simple-bus";
2418 #address-cells = <1>;
2420 ranges = <0x00006000 0x00026000 0x001000>, /* ap 13 */
2421 <0x0000a000 0x0002a000 0x001000>, /* ap 14 */
2422 <0x00000000 0x00020000 0x001000>, /* ap 21 */
2423 <0x00001000 0x00021000 0x001000>, /* ap 22 */
2424 <0x00002000 0x00022000 0x001000>, /* ap 23 */
2425 <0x00003000 0x00023000 0x001000>, /* ap 24 */
2426 <0x00007000 0x00027000 0x000400>, /* ap 25 */
2427 <0x00008000 0x00028000 0x000800>, /* ap 26 */
2428 <0x00009000 0x00029000 0x000100>, /* ap 27 */
2429 <0x00008800 0x00028800 0x000200>, /* ap 28 */
2430 <0x00008a00 0x00028a00 0x000100>; /* ap 29 */
2432 target-module@0 { /* 0x4ae20000, ap 21 04.0 */
2433 compatible = "ti,sysc";
2434 status = "disabled";
2435 #address-cells = <1>;
2437 ranges = <0x0 0x0 0x1000>;
2440 target-module@2000 { /* 0x4ae22000, ap 23 0c.0 */
2441 compatible = "ti,sysc";
2442 status = "disabled";
2443 #address-cells = <1>;
2445 ranges = <0x0 0x2000 0x1000>;
2448 target-module@6000 { /* 0x4ae26000, ap 13 24.0 */
2449 compatible = "ti,sysc";
2450 status = "disabled";
2451 #address-cells = <1>;
2453 ranges = <0x00000000 0x00006000 0x00001000>,
2454 <0x00001000 0x00007000 0x00000400>,
2455 <0x00002000 0x00008000 0x00000800>,
2456 <0x00002800 0x00008800 0x00000200>,
2457 <0x00002a00 0x00008a00 0x00000100>,
2458 <0x00003000 0x00009000 0x00000100>;