Merge tag 'iio-fixes-for-5.6a' of git://git.kernel.org/pub/scm/linux/kernel/git/jic23...
[linux-2.6-microblaze.git] / arch / arm / boot / dts / omap5-l4.dtsi
1 &l4_cfg {                                               /* 0x4a000000 */
2         compatible = "ti,omap5-l4-cfg", "simple-bus";
3         reg = <0x4a000000 0x800>,
4               <0x4a000800 0x800>,
5               <0x4a001000 0x1000>;
6         reg-names = "ap", "la", "ia0";
7         #address-cells = <1>;
8         #size-cells = <1>;
9         ranges = <0x00000000 0x4a000000 0x080000>,      /* segment 0 */
10                  <0x00080000 0x4a080000 0x080000>,      /* segment 1 */
11                  <0x00100000 0x4a100000 0x080000>,      /* segment 2 */
12                  <0x00180000 0x4a180000 0x080000>,      /* segment 3 */
13                  <0x00200000 0x4a200000 0x080000>,      /* segment 4 */
14                  <0x00280000 0x4a280000 0x080000>,      /* segment 5 */
15                  <0x00300000 0x4a300000 0x080000>;      /* segment 6 */
16
17         segment@0 {                                     /* 0x4a000000 */
18                 compatible = "simple-bus";
19                 #address-cells = <1>;
20                 #size-cells = <1>;
21                 ranges = <0x00000000 0x00000000 0x000800>,      /* ap 0 */
22                          <0x00001000 0x00001000 0x001000>,      /* ap 1 */
23                          <0x00000800 0x00000800 0x000800>,      /* ap 2 */
24                          <0x00002000 0x00002000 0x001000>,      /* ap 3 */
25                          <0x00003000 0x00003000 0x001000>,      /* ap 4 */
26                          <0x00004000 0x00004000 0x001000>,      /* ap 5 */
27                          <0x00005000 0x00005000 0x001000>,      /* ap 6 */
28                          <0x00056000 0x00056000 0x001000>,      /* ap 7 */
29                          <0x00057000 0x00057000 0x001000>,      /* ap 8 */
30                          <0x0005c000 0x0005c000 0x001000>,      /* ap 9 */
31                          <0x00058000 0x00058000 0x001000>,      /* ap 10 */
32                          <0x00062000 0x00062000 0x001000>,      /* ap 11 */
33                          <0x00063000 0x00063000 0x001000>,      /* ap 12 */
34                          <0x00008000 0x00008000 0x002000>,      /* ap 21 */
35                          <0x0000a000 0x0000a000 0x001000>,      /* ap 22 */
36                          <0x00066000 0x00066000 0x001000>,      /* ap 23 */
37                          <0x00067000 0x00067000 0x001000>,      /* ap 24 */
38                          <0x0005e000 0x0005e000 0x002000>,      /* ap 69 */
39                          <0x00060000 0x00060000 0x001000>,      /* ap 70 */
40                          <0x00064000 0x00064000 0x001000>,      /* ap 71 */
41                          <0x00065000 0x00065000 0x001000>,      /* ap 72 */
42                          <0x0005a000 0x0005a000 0x001000>,      /* ap 77 */
43                          <0x0005b000 0x0005b000 0x001000>,      /* ap 78 */
44                          <0x00070000 0x00070000 0x004000>,      /* ap 79 */
45                          <0x00074000 0x00074000 0x001000>,      /* ap 80 */
46                          <0x00075000 0x00075000 0x001000>,      /* ap 81 */
47                          <0x00076000 0x00076000 0x001000>,      /* ap 82 */
48                          <0x00020000 0x00020000 0x020000>,      /* ap 109 */
49                          <0x00040000 0x00040000 0x001000>,      /* ap 110 */
50                          <0x00059000 0x00059000 0x001000>;      /* ap 111 */
51
52                 target-module@2000 {                    /* 0x4a002000, ap 3 44.0 */
53                         compatible = "ti,sysc-omap4", "ti,sysc";
54                         reg = <0x2000 0x4>;
55                         reg-names = "rev";
56                         #address-cells = <1>;
57                         #size-cells = <1>;
58                         ranges = <0x0 0x2000 0x1000>;
59
60                         scm_core: scm@0 {
61                                 compatible = "ti,omap5-scm-core", "simple-bus";
62                                 reg = <0x0 0x1000>;
63                                 #address-cells = <1>;
64                                 #size-cells = <1>;
65                                 ranges = <0 0 0x800>;
66
67                                 scm_conf: scm_conf@0 {
68                                         compatible = "syscon";
69                                         reg = <0x0 0x800>;
70                                         #address-cells = <1>;
71                                         #size-cells = <1>;
72                                 };
73                         };
74
75                         scm_padconf_core: scm@800 {
76                                 compatible = "ti,omap5-scm-padconf-core",
77                                              "simple-bus";
78                                 #address-cells = <1>;
79                                 #size-cells = <1>;
80                                 ranges = <0 0x800 0x800>;
81
82                                 omap5_pmx_core: pinmux@40 {
83                                         compatible = "ti,omap5-padconf",
84                                                      "pinctrl-single";
85                                         reg = <0x40 0x01b6>;
86                                         #address-cells = <1>;
87                                         #size-cells = <0>;
88                                         #pinctrl-cells = <1>;
89                                         #interrupt-cells = <1>;
90                                         interrupt-controller;
91                                         pinctrl-single,register-width = <16>;
92                                         pinctrl-single,function-mask = <0x7fff>;
93                                 };
94
95                                 omap5_padconf_global: omap5_padconf_global@5a0 {
96                                         compatible = "syscon",
97                                                      "simple-bus";
98                                         reg = <0x5a0 0xec>;
99                                         #address-cells = <1>;
100                                         #size-cells = <1>;
101                                         ranges = <0 0x5a0 0xec>;
102
103                                         pbias_regulator: pbias_regulator@60 {
104                                                 compatible = "ti,pbias-omap5", "ti,pbias-omap";
105                                                 reg = <0x60 0x4>;
106                                                 syscon = <&omap5_padconf_global>;
107                                                 pbias_mmc_reg: pbias_mmc_omap5 {
108                                                         regulator-name = "pbias_mmc_omap5";
109                                                         regulator-min-microvolt = <1800000>;
110                                                         regulator-max-microvolt = <3300000>;
111                                                 };
112                                         };
113                                 };
114                         };
115                 };
116
117                 target-module@4000 {                    /* 0x4a004000, ap 5 5c.0 */
118                         compatible = "ti,sysc-omap4", "ti,sysc";
119                         reg = <0x4000 0x4>;
120                         reg-names = "rev";
121                         #address-cells = <1>;
122                         #size-cells = <1>;
123                         ranges = <0x0 0x4000 0x1000>;
124
125                         cm_core_aon: cm_core_aon@0 {
126                                 compatible = "ti,omap5-cm-core-aon",
127                                              "simple-bus";
128                                 reg = <0x0 0x2000>;
129                                 #address-cells = <1>;
130                                 #size-cells = <1>;
131                                 ranges = <0 0 0x1000>;
132
133                                 cm_core_aon_clocks: clocks {
134                                         #address-cells = <1>;
135                                         #size-cells = <0>;
136                                 };
137
138                                 cm_core_aon_clockdomains: clockdomains {
139                                 };
140                         };
141                 };
142
143                 target-module@8000 {                    /* 0x4a008000, ap 21 4c.0 */
144                         compatible = "ti,sysc-omap4", "ti,sysc";
145                         reg = <0x8000 0x4>;
146                         reg-names = "rev";
147                         #address-cells = <1>;
148                         #size-cells = <1>;
149                         ranges = <0x0 0x8000 0x2000>;
150
151                         cm_core: cm_core@0 {
152                                 compatible = "ti,omap5-cm-core", "simple-bus";
153                                 reg = <0x0 0x2000>;
154                                 #address-cells = <1>;
155                                 #size-cells = <1>;
156                                 ranges = <0 0 0x2000>;
157
158                                 cm_core_clocks: clocks {
159                                         #address-cells = <1>;
160                                         #size-cells = <0>;
161                                 };
162
163                                 cm_core_clockdomains: clockdomains {
164                                 };
165                         };
166                 };
167
168                 target-module@20000 {                   /* 0x4a020000, ap 109 08.0 */
169                         compatible = "ti,sysc-omap4", "ti,sysc";
170                         ti,hwmods = "usb_otg_ss";
171                         reg = <0x20000 0x4>,
172                               <0x20010 0x4>;
173                         reg-names = "rev", "sysc";
174                         ti,sysc-mask = <SYSC_OMAP4_DMADISABLE>;
175                         ti,sysc-midle = <SYSC_IDLE_FORCE>,
176                                         <SYSC_IDLE_NO>,
177                                         <SYSC_IDLE_SMART>,
178                                         <SYSC_IDLE_SMART_WKUP>;
179                         ti,sysc-sidle = <SYSC_IDLE_FORCE>,
180                                         <SYSC_IDLE_NO>,
181                                         <SYSC_IDLE_SMART>,
182                                         <SYSC_IDLE_SMART_WKUP>;
183                         /* Domains (V, P, C): core, l3init_pwrdm, l3init_clkdm */
184                         clocks = <&l3init_clkctrl OMAP5_USB_OTG_SS_CLKCTRL 0>;
185                         clock-names = "fck";
186                         #address-cells = <1>;
187                         #size-cells = <1>;
188                         ranges = <0x0 0x20000 0x20000>;
189
190                         usb3: omap_dwc3@0 {
191                                 compatible = "ti,dwc3";
192                                 reg = <0x0 0x10000>;
193                                 interrupts = <GIC_SPI 93 IRQ_TYPE_LEVEL_HIGH>;
194                                 #address-cells = <1>;
195                                 #size-cells = <1>;
196                                 utmi-mode = <2>;
197                                 ranges = <0 0 0x20000>;
198                                 dwc3: dwc3@10000 {
199                                         compatible = "snps,dwc3";
200                                         reg = <0x10000 0x10000>;
201                                         interrupts = <GIC_SPI 92 IRQ_TYPE_LEVEL_HIGH>,
202                                                      <GIC_SPI 92 IRQ_TYPE_LEVEL_HIGH>,
203                                                      <GIC_SPI 93 IRQ_TYPE_LEVEL_HIGH>;
204                                         interrupt-names = "peripheral",
205                                                           "host",
206                                                           "otg";
207                                         phys = <&usb2_phy>, <&usb3_phy>;
208                                         phy-names = "usb2-phy", "usb3-phy";
209                                         dr_mode = "peripheral";
210                                 };
211                         };
212                 };
213
214                 target-module@56000 {                   /* 0x4a056000, ap 7 02.0 */
215                         compatible = "ti,sysc-omap2", "ti,sysc";
216                         reg = <0x56000 0x4>,
217                               <0x5602c 0x4>,
218                               <0x56028 0x4>;
219                         reg-names = "rev", "sysc", "syss";
220                         ti,sysc-mask = <(SYSC_OMAP2_CLOCKACTIVITY |
221                                          SYSC_OMAP2_EMUFREE |
222                                          SYSC_OMAP2_SOFTRESET |
223                                          SYSC_OMAP2_AUTOIDLE)>;
224                         ti,sysc-midle = <SYSC_IDLE_FORCE>,
225                                         <SYSC_IDLE_NO>,
226                                         <SYSC_IDLE_SMART>;
227                         ti,sysc-sidle = <SYSC_IDLE_FORCE>,
228                                         <SYSC_IDLE_NO>,
229                                         <SYSC_IDLE_SMART>;
230                         ti,syss-mask = <1>;
231                         /* Domains (V, P, C): core, core_pwrdm, dma_clkdm */
232                         clocks = <&dma_clkctrl OMAP5_DMA_SYSTEM_CLKCTRL 0>;
233                         clock-names = "fck";
234                         #address-cells = <1>;
235                         #size-cells = <1>;
236                         ranges = <0x0 0x56000 0x1000>;
237
238                         sdma: dma-controller@0 {
239                                 compatible = "ti,omap4430-sdma", "ti,omap-sdma";
240                                 reg = <0x0 0x1000>;
241                                 interrupts = <GIC_SPI 12 IRQ_TYPE_LEVEL_HIGH>,
242                                              <GIC_SPI 13 IRQ_TYPE_LEVEL_HIGH>,
243                                              <GIC_SPI 14 IRQ_TYPE_LEVEL_HIGH>,
244                                              <GIC_SPI 15 IRQ_TYPE_LEVEL_HIGH>;
245                                 #dma-cells = <1>;
246                                 dma-channels = <32>;
247                                 dma-requests = <127>;
248                         };
249                 };
250
251                 target-module@58000 {                   /* 0x4a058000, ap 10 06.0 */
252                         compatible = "ti,sysc";
253                         status = "disabled";
254                         #address-cells = <1>;
255                         #size-cells = <1>;
256                         ranges = <0x00000000 0x00058000 0x00001000>,
257                                  <0x00001000 0x00059000 0x00001000>,
258                                  <0x00002000 0x0005a000 0x00001000>,
259                                  <0x00003000 0x0005b000 0x00001000>;
260                 };
261
262                 target-module@5e000 {                   /* 0x4a05e000, ap 69 2a.0 */
263                         compatible = "ti,sysc";
264                         status = "disabled";
265                         #address-cells = <1>;
266                         #size-cells = <1>;
267                         ranges = <0x0 0x5e000 0x2000>;
268                 };
269
270                 target-module@62000 {                   /* 0x4a062000, ap 11 0e.0 */
271                         compatible = "ti,sysc-omap2", "ti,sysc";
272                         ti,hwmods = "usb_tll_hs";
273                         reg = <0x62000 0x4>,
274                               <0x62010 0x4>,
275                               <0x62014 0x4>;
276                         reg-names = "rev", "sysc", "syss";
277                         ti,sysc-mask = <(SYSC_OMAP2_CLOCKACTIVITY |
278                                          SYSC_OMAP2_ENAWAKEUP |
279                                          SYSC_OMAP2_SOFTRESET |
280                                          SYSC_OMAP2_AUTOIDLE)>;
281                         ti,sysc-sidle = <SYSC_IDLE_FORCE>,
282                                         <SYSC_IDLE_NO>,
283                                         <SYSC_IDLE_SMART>;
284                         ti,syss-mask = <1>;
285                         /* Domains (V, P, C): core, l3init_pwrdm, l3init_clkdm */
286                         clocks = <&l3init_clkctrl OMAP5_USB_TLL_HS_CLKCTRL 0>;
287                         clock-names = "fck";
288                         #address-cells = <1>;
289                         #size-cells = <1>;
290                         ranges = <0x0 0x62000 0x1000>;
291
292                         usbhstll: usbhstll@0 {
293                                 compatible = "ti,usbhs-tll";
294                                 reg = <0x0 0x1000>;
295                                 interrupts = <GIC_SPI 78 IRQ_TYPE_LEVEL_HIGH>;
296                         };
297                 };
298
299                 target-module@64000 {                   /* 0x4a064000, ap 71 1e.0 */
300                         compatible = "ti,sysc-omap4", "ti,sysc";
301                         ti,hwmods = "usb_host_hs";
302                         reg = <0x64000 0x4>,
303                               <0x64010 0x4>;
304                         reg-names = "rev", "sysc";
305                         ti,sysc-mask = <SYSC_OMAP4_SOFTRESET>;
306                         ti,sysc-midle = <SYSC_IDLE_FORCE>,
307                                         <SYSC_IDLE_NO>,
308                                         <SYSC_IDLE_SMART>,
309                                         <SYSC_IDLE_SMART_WKUP>;
310                         ti,sysc-sidle = <SYSC_IDLE_FORCE>,
311                                         <SYSC_IDLE_NO>,
312                                         <SYSC_IDLE_SMART>,
313                                         <SYSC_IDLE_SMART_WKUP>;
314                         /* Domains (V, P, C): core, l3init_pwrdm, l3init_clkdm */
315                         clocks = <&l3init_clkctrl OMAP5_USB_HOST_HS_CLKCTRL 0>;
316                         clock-names = "fck";
317                         #address-cells = <1>;
318                         #size-cells = <1>;
319                         ranges = <0x0 0x64000 0x1000>;
320
321                         usbhshost: usbhshost@0 {
322                                 compatible = "ti,usbhs-host";
323                                 reg = <0x0 0x800>;
324                                 #address-cells = <1>;
325                                 #size-cells = <1>;
326                                 ranges = <0 0 0x1000>;
327                                 clocks = <&l3init_60m_fclk>,
328                                          <&xclk60mhsp1_ck>,
329                                          <&xclk60mhsp2_ck>;
330                                 clock-names = "refclk_60m_int",
331                                               "refclk_60m_ext_p1",
332                                               "refclk_60m_ext_p2";
333
334                                 usbhsohci: ohci@800 {
335                                         compatible = "ti,ohci-omap3";
336                                         reg = <0x800 0x400>;
337                                         interrupts = <GIC_SPI 76 IRQ_TYPE_LEVEL_HIGH>;
338                                         remote-wakeup-connected;
339                                 };
340
341                                 usbhsehci: ehci@c00 {
342                                         compatible = "ti,ehci-omap";
343                                         reg = <0xc00 0x400>;
344                                         interrupts = <GIC_SPI 77 IRQ_TYPE_LEVEL_HIGH>;
345                                 };
346                         };
347                 };
348
349                 target-module@66000 {                   /* 0x4a066000, ap 23 0a.0 */
350                         compatible = "ti,sysc-omap2", "ti,sysc";
351                         reg = <0x66000 0x4>,
352                               <0x66010 0x4>,
353                               <0x66014 0x4>;
354                         reg-names = "rev", "sysc", "syss";
355                         ti,sysc-mask = <(SYSC_OMAP2_CLOCKACTIVITY |
356                                          SYSC_OMAP2_SOFTRESET |
357                                          SYSC_OMAP2_AUTOIDLE)>;
358                         ti,sysc-sidle = <SYSC_IDLE_FORCE>,
359                                         <SYSC_IDLE_NO>,
360                                         <SYSC_IDLE_SMART>;
361                         ti,syss-mask = <1>;
362                         /* Domains (V, P, C): mm, dsp_pwrdm, dsp_clkdm */
363                         clocks = <&dsp_clkctrl OMAP5_MMU_DSP_CLKCTRL 0>;
364                         clock-names = "fck";
365                         resets = <&prm_dsp 1>;
366                         reset-names = "rstctrl";
367                         #address-cells = <1>;
368                         #size-cells = <1>;
369                         ranges = <0x0 0x66000 0x1000>;
370
371                         mmu_dsp: mmu@0 {
372                                 compatible = "ti,omap4-iommu";
373                                 reg = <0x0 0x100>;
374                                 interrupts = <GIC_SPI 28 IRQ_TYPE_LEVEL_HIGH>;
375                                 #iommu-cells = <0>;
376                         };
377                 };
378
379                 target-module@70000 {                   /* 0x4a070000, ap 79 2e.0 */
380                         compatible = "ti,sysc";
381                         status = "disabled";
382                         #address-cells = <1>;
383                         #size-cells = <1>;
384                         ranges = <0x0 0x70000 0x4000>;
385                 };
386
387                 target-module@75000 {                   /* 0x4a075000, ap 81 32.0 */
388                         compatible = "ti,sysc";
389                         status = "disabled";
390                         #address-cells = <1>;
391                         #size-cells = <1>;
392                         ranges = <0x0 0x75000 0x1000>;
393                 };
394         };
395
396         segment@80000 {                                 /* 0x4a080000 */
397                 compatible = "simple-bus";
398                 #address-cells = <1>;
399                 #size-cells = <1>;
400                 ranges = <0x00059000 0x000d9000 0x001000>,      /* ap 13 */
401                          <0x0005a000 0x000da000 0x001000>,      /* ap 14 */
402                          <0x0005b000 0x000db000 0x001000>,      /* ap 15 */
403                          <0x0005c000 0x000dc000 0x001000>,      /* ap 16 */
404                          <0x0005d000 0x000dd000 0x001000>,      /* ap 17 */
405                          <0x0005e000 0x000de000 0x001000>,      /* ap 18 */
406                          <0x00060000 0x000e0000 0x001000>,      /* ap 19 */
407                          <0x00061000 0x000e1000 0x001000>,      /* ap 20 */
408                          <0x00074000 0x000f4000 0x001000>,      /* ap 25 */
409                          <0x00075000 0x000f5000 0x001000>,      /* ap 26 */
410                          <0x00076000 0x000f6000 0x001000>,      /* ap 27 */
411                          <0x00077000 0x000f7000 0x001000>,      /* ap 28 */
412                          <0x00036000 0x000b6000 0x001000>,      /* ap 65 */
413                          <0x00037000 0x000b7000 0x001000>,      /* ap 66 */
414                          <0x0004d000 0x000cd000 0x001000>,      /* ap 67 */
415                          <0x0004e000 0x000ce000 0x001000>,      /* ap 68 */
416                          <0x00000000 0x00080000 0x004000>,      /* ap 83 */
417                          <0x00004000 0x00084000 0x001000>,      /* ap 84 */
418                          <0x00005000 0x00085000 0x001000>,      /* ap 85 */
419                          <0x00006000 0x00086000 0x001000>,      /* ap 86 */
420                          <0x00007000 0x00087000 0x001000>,      /* ap 87 */
421                          <0x00008000 0x00088000 0x001000>,      /* ap 88 */
422                          <0x00010000 0x00090000 0x004000>,      /* ap 89 */
423                          <0x00014000 0x00094000 0x001000>,      /* ap 90 */
424                          <0x00015000 0x00095000 0x001000>,      /* ap 91 */
425                          <0x00016000 0x00096000 0x001000>,      /* ap 92 */
426                          <0x00017000 0x00097000 0x001000>,      /* ap 93 */
427                          <0x00018000 0x00098000 0x001000>,      /* ap 94 */
428                          <0x00020000 0x000a0000 0x004000>,      /* ap 95 */
429                          <0x00024000 0x000a4000 0x001000>,      /* ap 96 */
430                          <0x00025000 0x000a5000 0x001000>,      /* ap 97 */
431                          <0x00026000 0x000a6000 0x001000>,      /* ap 98 */
432                          <0x00027000 0x000a7000 0x001000>,      /* ap 99 */
433                          <0x00028000 0x000a8000 0x001000>;      /* ap 100 */
434
435                 target-module@0 {                       /* 0x4a080000, ap 83 28.0 */
436                         compatible = "ti,sysc-omap2", "ti,sysc";
437                         reg = <0x0 0x4>,
438                               <0x10 0x4>,
439                               <0x14 0x4>;
440                         reg-names = "rev", "sysc", "syss";
441                         ti,sysc-mask = <(SYSC_OMAP2_SOFTRESET |
442                                          SYSC_OMAP2_AUTOIDLE)>;
443                         ti,sysc-sidle = <SYSC_IDLE_FORCE>,
444                                         <SYSC_IDLE_NO>,
445                                         <SYSC_IDLE_SMART>;
446                         ti,syss-mask = <1>;
447                         /* Domains (V, P, C): core, l3init_pwrdm, l3init_clkdm */
448                         clocks = <&l3init_clkctrl OMAP5_OCP2SCP1_CLKCTRL 0>;
449                         clock-names = "fck";
450                         #address-cells = <1>;
451                         #size-cells = <1>;
452                         ranges = <0x00000000 0x00000000 0x00004000>,
453                                  <0x00004000 0x00004000 0x00001000>,
454                                  <0x00005000 0x00005000 0x00001000>,
455                                  <0x00006000 0x00006000 0x00001000>,
456                                  <0x00007000 0x00007000 0x00001000>;
457
458                         ocp2scp@0 {
459                                 compatible = "ti,omap-ocp2scp";
460                                 #address-cells = <1>;
461                                 #size-cells = <1>;
462                                 reg = <0 0x20>;
463                         };
464
465                         usb2_phy: usb2phy@4000 {
466                                 compatible = "ti,omap-usb2";
467                                 reg = <0x4000 0x7c>;
468                                 syscon-phy-power = <&scm_conf 0x300>;
469                                 clocks = <&usb_phy_cm_clk32k>,
470                                 <&l3init_clkctrl OMAP5_USB_OTG_SS_CLKCTRL 8>;
471                                 clock-names = "wkupclk", "refclk";
472                                 #phy-cells = <0>;
473                         };
474
475                         usb3_phy: usb3phy@4400 {
476                                 compatible = "ti,omap-usb3";
477                                 reg = <0x4400 0x80>,
478                                 <0x4800 0x64>,
479                                 <0x4c00 0x40>;
480                                 reg-names = "phy_rx", "phy_tx", "pll_ctrl";
481                                 syscon-phy-power = <&scm_conf 0x370>;
482                                 clocks = <&usb_phy_cm_clk32k>,
483                                 <&sys_clkin>,
484                                 <&l3init_clkctrl OMAP5_USB_OTG_SS_CLKCTRL 8>;
485                                 clock-names =   "wkupclk",
486                                 "sysclk",
487                                 "refclk";
488                                 #phy-cells = <0>;
489                         };
490                 };
491
492                 target-module@10000 {                   /* 0x4a090000, ap 89 36.0 */
493                         compatible = "ti,sysc-omap2", "ti,sysc";
494                         reg = <0x10000 0x4>,
495                               <0x10010 0x4>,
496                               <0x10014 0x4>;
497                         reg-names = "rev", "sysc", "syss";
498                         ti,sysc-mask = <(SYSC_OMAP2_SOFTRESET |
499                                          SYSC_OMAP2_AUTOIDLE)>;
500                         ti,sysc-sidle = <SYSC_IDLE_FORCE>,
501                                         <SYSC_IDLE_NO>,
502                                         <SYSC_IDLE_SMART>;
503                         ti,syss-mask = <1>;
504                         /* Domains (V, P, C): core, l3init_pwrdm, l3init_clkdm */
505                         clocks = <&l3init_clkctrl OMAP5_OCP2SCP3_CLKCTRL 0>;
506                         clock-names = "fck";
507                         #address-cells = <1>;
508                         #size-cells = <1>;
509                         ranges = <0x00000000 0x00010000 0x00004000>,
510                                  <0x00004000 0x00014000 0x00001000>,
511                                  <0x00005000 0x00015000 0x00001000>,
512                                  <0x00006000 0x00016000 0x00001000>,
513                                  <0x00007000 0x00017000 0x00001000>;
514
515                                 ocp2scp@0 {
516                                         compatible = "ti,omap-ocp2scp";
517                                         #address-cells = <1>;
518                                         #size-cells = <1>;
519                                         reg = <0x0 0x20>;
520                                 };
521
522                                 sata_phy: phy@6000 {
523                                         compatible = "ti,phy-pipe3-sata";
524                                         reg = <0x6000 0x80>, /* phy_rx */
525                                               <0x6400 0x64>, /* phy_tx */
526                                               <0x6800 0x40>; /* pll_ctrl */
527                                         reg-names = "phy_rx", "phy_tx", "pll_ctrl";
528                                         syscon-phy-power = <&scm_conf 0x374>;
529                                         clocks = <&sys_clkin>,
530                                                  <&l3init_clkctrl OMAP5_SATA_CLKCTRL 8>;
531                                         clock-names = "sysclk", "refclk";
532                                         #phy-cells = <0>;
533                                 };
534                 };
535
536                 target-module@20000 {                   /* 0x4a0a0000, ap 95 50.0 */
537                         compatible = "ti,sysc";
538                         status = "disabled";
539                         #address-cells = <1>;
540                         #size-cells = <1>;
541                         ranges = <0x00000000 0x00020000 0x00004000>,
542                                  <0x00004000 0x00024000 0x00001000>,
543                                  <0x00005000 0x00025000 0x00001000>,
544                                  <0x00006000 0x00026000 0x00001000>,
545                                  <0x00007000 0x00027000 0x00001000>;
546                 };
547
548                 target-module@36000 {                   /* 0x4a0b6000, ap 65 6c.0 */
549                         compatible = "ti,sysc";
550                         status = "disabled";
551                         #address-cells = <1>;
552                         #size-cells = <1>;
553                         ranges = <0x0 0x36000 0x1000>;
554                 };
555
556                 target-module@4d000 {                   /* 0x4a0cd000, ap 67 64.0 */
557                         compatible = "ti,sysc";
558                         status = "disabled";
559                         #address-cells = <1>;
560                         #size-cells = <1>;
561                         ranges = <0x0 0x4d000 0x1000>;
562                 };
563
564                 target-module@59000 {                   /* 0x4a0d9000, ap 13 20.0 */
565                         compatible = "ti,sysc";
566                         status = "disabled";
567                         #address-cells = <1>;
568                         #size-cells = <1>;
569                         ranges = <0x0 0x59000 0x1000>;
570                 };
571
572                 target-module@5b000 {                   /* 0x4a0db000, ap 15 10.0 */
573                         compatible = "ti,sysc";
574                         status = "disabled";
575                         #address-cells = <1>;
576                         #size-cells = <1>;
577                         ranges = <0x0 0x5b000 0x1000>;
578                 };
579
580                 target-module@5d000 {                   /* 0x4a0dd000, ap 17 18.0 */
581                         compatible = "ti,sysc";
582                         status = "disabled";
583                         #address-cells = <1>;
584                         #size-cells = <1>;
585                         ranges = <0x0 0x5d000 0x1000>;
586                 };
587
588                 target-module@60000 {                   /* 0x4a0e0000, ap 19 54.0 */
589                         compatible = "ti,sysc";
590                         status = "disabled";
591                         #address-cells = <1>;
592                         #size-cells = <1>;
593                         ranges = <0x0 0x60000 0x1000>;
594                 };
595
596                 target-module@74000 {                   /* 0x4a0f4000, ap 25 04.0 */
597                         compatible = "ti,sysc-omap4", "ti,sysc";
598                         reg = <0x74000 0x4>,
599                               <0x74010 0x4>;
600                         reg-names = "rev", "sysc";
601                         ti,sysc-mask = <SYSC_OMAP4_SOFTRESET>;
602                         ti,sysc-sidle = <SYSC_IDLE_FORCE>,
603                                         <SYSC_IDLE_NO>,
604                                         <SYSC_IDLE_SMART>;
605                         /* Domains (V, P, C): core, core_pwrdm, l4cfg_clkdm */
606                         clocks = <&l4cfg_clkctrl OMAP5_MAILBOX_CLKCTRL 0>;
607                         clock-names = "fck";
608                         #address-cells = <1>;
609                         #size-cells = <1>;
610                         ranges = <0x0 0x74000 0x1000>;
611
612                         mailbox: mailbox@0 {
613                                 compatible = "ti,omap4-mailbox";
614                                 reg = <0x0 0x200>;
615                                 interrupts = <GIC_SPI 26 IRQ_TYPE_LEVEL_HIGH>;
616                                 #mbox-cells = <1>;
617                                 ti,mbox-num-users = <3>;
618                                 ti,mbox-num-fifos = <8>;
619                                 mbox_ipu: mbox_ipu {
620                                         ti,mbox-tx = <0 0 0>;
621                                         ti,mbox-rx = <1 0 0>;
622                                 };
623                                 mbox_dsp: mbox_dsp {
624                                         ti,mbox-tx = <3 0 0>;
625                                         ti,mbox-rx = <2 0 0>;
626                                 };
627                         };
628                 };
629
630                 target-module@76000 {                   /* 0x4a0f6000, ap 27 0c.0 */
631                         compatible = "ti,sysc-omap2", "ti,sysc";
632                         reg = <0x76000 0x4>,
633                               <0x76010 0x4>,
634                               <0x76014 0x4>;
635                         reg-names = "rev", "sysc", "syss";
636                         ti,sysc-mask = <(SYSC_OMAP2_CLOCKACTIVITY |
637                                          SYSC_OMAP2_ENAWAKEUP |
638                                          SYSC_OMAP2_SOFTRESET |
639                                          SYSC_OMAP2_AUTOIDLE)>;
640                         ti,sysc-sidle = <SYSC_IDLE_FORCE>,
641                                         <SYSC_IDLE_NO>,
642                                         <SYSC_IDLE_SMART>;
643                         ti,syss-mask = <1>;
644                         /* Domains (V, P, C): core, core_pwrdm, l4cfg_clkdm */
645                         clocks = <&l4cfg_clkctrl OMAP5_SPINLOCK_CLKCTRL 0>;
646                         clock-names = "fck";
647                         #address-cells = <1>;
648                         #size-cells = <1>;
649                         ranges = <0x0 0x76000 0x1000>;
650
651                         hwspinlock: spinlock@0 {
652                                 compatible = "ti,omap4-hwspinlock";
653                                 reg = <0x0 0x1000>;
654                                 #hwlock-cells = <1>;
655                         };
656                 };
657         };
658
659         segment@100000 {                                        /* 0x4a100000 */
660                 compatible = "simple-bus";
661                 #address-cells = <1>;
662                 #size-cells = <1>;
663                 ranges = <0x00002000 0x00102000 0x001000>,      /* ap 59 */
664                          <0x00003000 0x00103000 0x001000>,      /* ap 60 */
665                          <0x00008000 0x00108000 0x001000>,      /* ap 61 */
666                          <0x00009000 0x00109000 0x001000>,      /* ap 62 */
667                          <0x0000a000 0x0010a000 0x001000>,      /* ap 63 */
668                          <0x0000b000 0x0010b000 0x001000>,      /* ap 64 */
669                          <0x00040000 0x00140000 0x010000>,      /* ap 101 */
670                          <0x00050000 0x00150000 0x001000>;      /* ap 102 */
671
672                 target-module@2000 {                    /* 0x4a102000, ap 59 2c.0 */
673                         compatible = "ti,sysc";
674                         status = "disabled";
675                         #address-cells = <1>;
676                         #size-cells = <1>;
677                         ranges = <0x0 0x2000 0x1000>;
678                 };
679
680                 target-module@8000 {                    /* 0x4a108000, ap 61 26.0 */
681                         compatible = "ti,sysc";
682                         status = "disabled";
683                         #address-cells = <1>;
684                         #size-cells = <1>;
685                         ranges = <0x0 0x8000 0x1000>;
686                 };
687
688                 target-module@a000 {                    /* 0x4a10a000, ap 63 22.0 */
689                         compatible = "ti,sysc";
690                         status = "disabled";
691                         #address-cells = <1>;
692                         #size-cells = <1>;
693                         ranges = <0x0 0xa000 0x1000>;
694                 };
695
696                 target-module@40000 {                   /* 0x4a140000, ap 101 16.0 */
697                         compatible = "ti,sysc";
698                         status = "disabled";
699                         #address-cells = <1>;
700                         #size-cells = <1>;
701                         ranges = <0x0 0x40000 0x10000>;
702                 };
703         };
704
705         segment@180000 {                                        /* 0x4a180000 */
706                 compatible = "simple-bus";
707                 #address-cells = <1>;
708                 #size-cells = <1>;
709         };
710
711         segment@200000 {                                        /* 0x4a200000 */
712                 compatible = "simple-bus";
713                 #address-cells = <1>;
714                 #size-cells = <1>;
715                 ranges = <0x0001e000 0x0021e000 0x001000>,      /* ap 29 */
716                          <0x0001f000 0x0021f000 0x001000>,      /* ap 30 */
717                          <0x0000a000 0x0020a000 0x001000>,      /* ap 31 */
718                          <0x0000b000 0x0020b000 0x001000>,      /* ap 32 */
719                          <0x00006000 0x00206000 0x001000>,      /* ap 33 */
720                          <0x00007000 0x00207000 0x001000>,      /* ap 34 */
721                          <0x00004000 0x00204000 0x001000>,      /* ap 35 */
722                          <0x00005000 0x00205000 0x001000>,      /* ap 36 */
723                          <0x00012000 0x00212000 0x001000>,      /* ap 37 */
724                          <0x00013000 0x00213000 0x001000>,      /* ap 38 */
725                          <0x0000c000 0x0020c000 0x001000>,      /* ap 39 */
726                          <0x0000d000 0x0020d000 0x001000>,      /* ap 40 */
727                          <0x00010000 0x00210000 0x001000>,      /* ap 41 */
728                          <0x00011000 0x00211000 0x001000>,      /* ap 42 */
729                          <0x00016000 0x00216000 0x001000>,      /* ap 43 */
730                          <0x00017000 0x00217000 0x001000>,      /* ap 44 */
731                          <0x00014000 0x00214000 0x001000>,      /* ap 45 */
732                          <0x00015000 0x00215000 0x001000>,      /* ap 46 */
733                          <0x00018000 0x00218000 0x001000>,      /* ap 47 */
734                          <0x00019000 0x00219000 0x001000>,      /* ap 48 */
735                          <0x00020000 0x00220000 0x001000>,      /* ap 49 */
736                          <0x00021000 0x00221000 0x001000>,      /* ap 50 */
737                          <0x00026000 0x00226000 0x001000>,      /* ap 51 */
738                          <0x00027000 0x00227000 0x001000>,      /* ap 52 */
739                          <0x00028000 0x00228000 0x001000>,      /* ap 53 */
740                          <0x00029000 0x00229000 0x001000>,      /* ap 54 */
741                          <0x0002a000 0x0022a000 0x001000>,      /* ap 55 */
742                          <0x0002b000 0x0022b000 0x001000>,      /* ap 56 */
743                          <0x0001c000 0x0021c000 0x001000>,      /* ap 57 */
744                          <0x0001d000 0x0021d000 0x001000>,      /* ap 58 */
745                          <0x0001a000 0x0021a000 0x001000>,      /* ap 73 */
746                          <0x0001b000 0x0021b000 0x001000>,      /* ap 74 */
747                          <0x00024000 0x00224000 0x001000>,      /* ap 75 */
748                          <0x00025000 0x00225000 0x001000>,      /* ap 76 */
749                          <0x00002000 0x00202000 0x001000>,      /* ap 103 */
750                          <0x00003000 0x00203000 0x001000>,      /* ap 104 */
751                          <0x00008000 0x00208000 0x001000>,      /* ap 105 */
752                          <0x00009000 0x00209000 0x001000>,      /* ap 106 */
753                          <0x00022000 0x00222000 0x001000>,      /* ap 107 */
754                          <0x00023000 0x00223000 0x001000>;      /* ap 108 */
755
756                 target-module@2000 {                    /* 0x4a202000, ap 103 3c.0 */
757                         compatible = "ti,sysc";
758                         status = "disabled";
759                         #address-cells = <1>;
760                         #size-cells = <1>;
761                         ranges = <0x0 0x2000 0x1000>;
762                 };
763
764                 target-module@4000 {                    /* 0x4a204000, ap 35 46.0 */
765                         compatible = "ti,sysc";
766                         status = "disabled";
767                         #address-cells = <1>;
768                         #size-cells = <1>;
769                         ranges = <0x0 0x4000 0x1000>;
770                 };
771
772                 target-module@6000 {                    /* 0x4a206000, ap 33 4e.0 */
773                         compatible = "ti,sysc";
774                         status = "disabled";
775                         #address-cells = <1>;
776                         #size-cells = <1>;
777                         ranges = <0x0 0x6000 0x1000>;
778                 };
779
780                 target-module@8000 {                    /* 0x4a208000, ap 105 34.0 */
781                         compatible = "ti,sysc";
782                         status = "disabled";
783                         #address-cells = <1>;
784                         #size-cells = <1>;
785                         ranges = <0x0 0x8000 0x1000>;
786                 };
787
788                 target-module@a000 {                    /* 0x4a20a000, ap 31 30.0 */
789                         compatible = "ti,sysc";
790                         status = "disabled";
791                         #address-cells = <1>;
792                         #size-cells = <1>;
793                         ranges = <0x0 0xa000 0x1000>;
794                 };
795
796                 target-module@c000 {                    /* 0x4a20c000, ap 39 14.0 */
797                         compatible = "ti,sysc";
798                         status = "disabled";
799                         #address-cells = <1>;
800                         #size-cells = <1>;
801                         ranges = <0x0 0xc000 0x1000>;
802                 };
803
804                 target-module@10000 {                   /* 0x4a210000, ap 41 56.0 */
805                         compatible = "ti,sysc";
806                         status = "disabled";
807                         #address-cells = <1>;
808                         #size-cells = <1>;
809                         ranges = <0x0 0x10000 0x1000>;
810                 };
811
812                 target-module@12000 {                   /* 0x4a212000, ap 37 52.0 */
813                         compatible = "ti,sysc";
814                         status = "disabled";
815                         #address-cells = <1>;
816                         #size-cells = <1>;
817                         ranges = <0x0 0x12000 0x1000>;
818                 };
819
820                 target-module@14000 {                   /* 0x4a214000, ap 45 1c.0 */
821                         compatible = "ti,sysc";
822                         status = "disabled";
823                         #address-cells = <1>;
824                         #size-cells = <1>;
825                         ranges = <0x0 0x14000 0x1000>;
826                 };
827
828                 target-module@16000 {                   /* 0x4a216000, ap 43 42.0 */
829                         compatible = "ti,sysc";
830                         status = "disabled";
831                         #address-cells = <1>;
832                         #size-cells = <1>;
833                         ranges = <0x0 0x16000 0x1000>;
834                 };
835
836                 target-module@18000 {                   /* 0x4a218000, ap 47 1a.0 */
837                         compatible = "ti,sysc";
838                         status = "disabled";
839                         #address-cells = <1>;
840                         #size-cells = <1>;
841                         ranges = <0x0 0x18000 0x1000>;
842                 };
843
844                 target-module@1a000 {                   /* 0x4a21a000, ap 73 3e.0 */
845                         compatible = "ti,sysc";
846                         status = "disabled";
847                         #address-cells = <1>;
848                         #size-cells = <1>;
849                         ranges = <0x0 0x1a000 0x1000>;
850                 };
851
852                 target-module@1c000 {                   /* 0x4a21c000, ap 57 40.0 */
853                         compatible = "ti,sysc";
854                         status = "disabled";
855                         #address-cells = <1>;
856                         #size-cells = <1>;
857                         ranges = <0x0 0x1c000 0x1000>;
858                 };
859
860                 target-module@1e000 {                   /* 0x4a21e000, ap 29 12.0 */
861                         compatible = "ti,sysc";
862                         status = "disabled";
863                         #address-cells = <1>;
864                         #size-cells = <1>;
865                         ranges = <0x0 0x1e000 0x1000>;
866                 };
867
868                 target-module@20000 {                   /* 0x4a220000, ap 49 4a.0 */
869                         compatible = "ti,sysc";
870                         status = "disabled";
871                         #address-cells = <1>;
872                         #size-cells = <1>;
873                         ranges = <0x0 0x20000 0x1000>;
874                 };
875
876                 target-module@22000 {                   /* 0x4a222000, ap 107 3a.0 */
877                         compatible = "ti,sysc";
878                         status = "disabled";
879                         #address-cells = <1>;
880                         #size-cells = <1>;
881                         ranges = <0x0 0x22000 0x1000>;
882                 };
883
884                 target-module@24000 {                   /* 0x4a224000, ap 75 48.0 */
885                         compatible = "ti,sysc";
886                         status = "disabled";
887                         #address-cells = <1>;
888                         #size-cells = <1>;
889                         ranges = <0x0 0x24000 0x1000>;
890                 };
891
892                 target-module@26000 {                   /* 0x4a226000, ap 51 24.0 */
893                         compatible = "ti,sysc";
894                         status = "disabled";
895                         #address-cells = <1>;
896                         #size-cells = <1>;
897                         ranges = <0x0 0x26000 0x1000>;
898                 };
899
900                 target-module@28000 {                   /* 0x4a228000, ap 53 38.0 */
901                         compatible = "ti,sysc";
902                         status = "disabled";
903                         #address-cells = <1>;
904                         #size-cells = <1>;
905                         ranges = <0x0 0x28000 0x1000>;
906                 };
907
908                 target-module@2a000 {                   /* 0x4a22a000, ap 55 5a.0 */
909                         compatible = "ti,sysc";
910                         status = "disabled";
911                         #address-cells = <1>;
912                         #size-cells = <1>;
913                         ranges = <0x0 0x2a000 0x1000>;
914                 };
915         };
916
917         segment@280000 {                                        /* 0x4a280000 */
918                 compatible = "simple-bus";
919                 #address-cells = <1>;
920                 #size-cells = <1>;
921         };
922
923         segment@300000 {                                        /* 0x4a300000 */
924                 compatible = "simple-bus";
925                 #address-cells = <1>;
926                 #size-cells = <1>;
927         };
928 };
929
930 &l4_per {                                               /* 0x48000000 */
931         compatible = "ti,omap5-l4-per", "simple-bus";
932         reg = <0x48000000 0x800>,
933               <0x48000800 0x800>,
934               <0x48001000 0x400>,
935               <0x48001400 0x400>,
936               <0x48001800 0x400>,
937               <0x48001c00 0x400>;
938         reg-names = "ap", "la", "ia0", "ia1", "ia2", "ia3";
939         #address-cells = <1>;
940         #size-cells = <1>;
941         ranges = <0x00000000 0x48000000 0x200000>,      /* segment 0 */
942                  <0x00200000 0x48200000 0x200000>;      /* segment 1 */
943
944         segment@0 {                                     /* 0x48000000 */
945                 compatible = "simple-bus";
946                 #address-cells = <1>;
947                 #size-cells = <1>;
948                 ranges = <0x00000000 0x00000000 0x000800>,      /* ap 0 */
949                          <0x00001000 0x00001000 0x000400>,      /* ap 1 */
950                          <0x00000800 0x00000800 0x000800>,      /* ap 2 */
951                          <0x00020000 0x00020000 0x001000>,      /* ap 3 */
952                          <0x00021000 0x00021000 0x001000>,      /* ap 4 */
953                          <0x00032000 0x00032000 0x001000>,      /* ap 5 */
954                          <0x00033000 0x00033000 0x001000>,      /* ap 6 */
955                          <0x00034000 0x00034000 0x001000>,      /* ap 7 */
956                          <0x00035000 0x00035000 0x001000>,      /* ap 8 */
957                          <0x00036000 0x00036000 0x001000>,      /* ap 9 */
958                          <0x00037000 0x00037000 0x001000>,      /* ap 10 */
959                          <0x0003e000 0x0003e000 0x001000>,      /* ap 11 */
960                          <0x0003f000 0x0003f000 0x001000>,      /* ap 12 */
961                          <0x00055000 0x00055000 0x001000>,      /* ap 13 */
962                          <0x00056000 0x00056000 0x001000>,      /* ap 14 */
963                          <0x00057000 0x00057000 0x001000>,      /* ap 15 */
964                          <0x00058000 0x00058000 0x001000>,      /* ap 16 */
965                          <0x00059000 0x00059000 0x001000>,      /* ap 17 */
966                          <0x0005a000 0x0005a000 0x001000>,      /* ap 18 */
967                          <0x0005b000 0x0005b000 0x001000>,      /* ap 19 */
968                          <0x0005c000 0x0005c000 0x001000>,      /* ap 20 */
969                          <0x0005d000 0x0005d000 0x001000>,      /* ap 21 */
970                          <0x0005e000 0x0005e000 0x001000>,      /* ap 22 */
971                          <0x00060000 0x00060000 0x001000>,      /* ap 23 */
972                          <0x0006a000 0x0006a000 0x001000>,      /* ap 24 */
973                          <0x0006b000 0x0006b000 0x001000>,      /* ap 25 */
974                          <0x0006c000 0x0006c000 0x001000>,      /* ap 26 */
975                          <0x0006d000 0x0006d000 0x001000>,      /* ap 27 */
976                          <0x0006e000 0x0006e000 0x001000>,      /* ap 28 */
977                          <0x0006f000 0x0006f000 0x001000>,      /* ap 29 */
978                          <0x00070000 0x00070000 0x001000>,      /* ap 30 */
979                          <0x00071000 0x00071000 0x001000>,      /* ap 31 */
980                          <0x00072000 0x00072000 0x001000>,      /* ap 32 */
981                          <0x00073000 0x00073000 0x001000>,      /* ap 33 */
982                          <0x00061000 0x00061000 0x001000>,      /* ap 34 */
983                          <0x00053000 0x00053000 0x001000>,      /* ap 35 */
984                          <0x00054000 0x00054000 0x001000>,      /* ap 36 */
985                          <0x000b2000 0x000b2000 0x001000>,      /* ap 37 */
986                          <0x000b3000 0x000b3000 0x001000>,      /* ap 38 */
987                          <0x00078000 0x00078000 0x001000>,      /* ap 39 */
988                          <0x00079000 0x00079000 0x001000>,      /* ap 40 */
989                          <0x00086000 0x00086000 0x001000>,      /* ap 41 */
990                          <0x00087000 0x00087000 0x001000>,      /* ap 42 */
991                          <0x00088000 0x00088000 0x001000>,      /* ap 43 */
992                          <0x00089000 0x00089000 0x001000>,      /* ap 44 */
993                          <0x00051000 0x00051000 0x001000>,      /* ap 45 */
994                          <0x00052000 0x00052000 0x001000>,      /* ap 46 */
995                          <0x00098000 0x00098000 0x001000>,      /* ap 47 */
996                          <0x00099000 0x00099000 0x001000>,      /* ap 48 */
997                          <0x0009a000 0x0009a000 0x001000>,      /* ap 49 */
998                          <0x0009b000 0x0009b000 0x001000>,      /* ap 50 */
999                          <0x0009c000 0x0009c000 0x001000>,      /* ap 51 */
1000                          <0x0009d000 0x0009d000 0x001000>,      /* ap 52 */
1001                          <0x00068000 0x00068000 0x001000>,      /* ap 53 */
1002                          <0x00069000 0x00069000 0x001000>,      /* ap 54 */
1003                          <0x00090000 0x00090000 0x002000>,      /* ap 55 */
1004                          <0x00092000 0x00092000 0x001000>,      /* ap 56 */
1005                          <0x000a4000 0x000a4000 0x001000>,      /* ap 57 */
1006                          <0x000a6000 0x000a6000 0x001000>,      /* ap 58 */
1007                          <0x000a8000 0x000a8000 0x004000>,      /* ap 59 */
1008                          <0x000ac000 0x000ac000 0x001000>,      /* ap 60 */
1009                          <0x000ad000 0x000ad000 0x001000>,      /* ap 61 */
1010                          <0x000ae000 0x000ae000 0x001000>,      /* ap 62 */
1011                          <0x00066000 0x00066000 0x001000>,      /* ap 63 */
1012                          <0x00067000 0x00067000 0x001000>,      /* ap 64 */
1013                          <0x000b4000 0x000b4000 0x001000>,      /* ap 65 */
1014                          <0x000b5000 0x000b5000 0x001000>,      /* ap 66 */
1015                          <0x000b8000 0x000b8000 0x001000>,      /* ap 67 */
1016                          <0x000b9000 0x000b9000 0x001000>,      /* ap 68 */
1017                          <0x000ba000 0x000ba000 0x001000>,      /* ap 69 */
1018                          <0x000bb000 0x000bb000 0x001000>,      /* ap 70 */
1019                          <0x000d1000 0x000d1000 0x001000>,      /* ap 71 */
1020                          <0x000d2000 0x000d2000 0x001000>,      /* ap 72 */
1021                          <0x000d5000 0x000d5000 0x001000>,      /* ap 73 */
1022                          <0x000d6000 0x000d6000 0x001000>,      /* ap 74 */
1023                          <0x000a2000 0x000a2000 0x001000>,      /* ap 75 */
1024                          <0x000a3000 0x000a3000 0x001000>,      /* ap 76 */
1025                          <0x00001400 0x00001400 0x000400>,      /* ap 77 */
1026                          <0x00001800 0x00001800 0x000400>,      /* ap 78 */
1027                          <0x00001c00 0x00001c00 0x000400>,      /* ap 79 */
1028                          <0x000a5000 0x000a5000 0x001000>,      /* ap 80 */
1029                          <0x0007a000 0x0007a000 0x001000>,      /* ap 81 */
1030                          <0x0007b000 0x0007b000 0x001000>,      /* ap 82 */
1031                          <0x0007c000 0x0007c000 0x001000>,      /* ap 83 */
1032                          <0x0007d000 0x0007d000 0x001000>;      /* ap 84 */
1033
1034                 target-module@20000 {                   /* 0x48020000, ap 3 04.0 */
1035                         compatible = "ti,sysc-omap2", "ti,sysc";
1036                         reg = <0x20050 0x4>,
1037                               <0x20054 0x4>,
1038                               <0x20058 0x4>;
1039                         reg-names = "rev", "sysc", "syss";
1040                         ti,sysc-mask = <(SYSC_OMAP2_ENAWAKEUP |
1041                                          SYSC_OMAP2_SOFTRESET |
1042                                          SYSC_OMAP2_AUTOIDLE)>;
1043                         ti,sysc-sidle = <SYSC_IDLE_FORCE>,
1044                                         <SYSC_IDLE_NO>,
1045                                         <SYSC_IDLE_SMART>,
1046                                         <SYSC_IDLE_SMART_WKUP>;
1047                         ti,syss-mask = <1>;
1048                         /* Domains (V, P, C): core, core_pwrdm, l4per_clkdm */
1049                         clocks = <&l4per_clkctrl OMAP5_UART3_CLKCTRL 0>;
1050                         clock-names = "fck";
1051                         #address-cells = <1>;
1052                         #size-cells = <1>;
1053                         ranges = <0x0 0x20000 0x1000>;
1054
1055                         uart3: serial@0 {
1056                                 compatible = "ti,omap4-uart";
1057                                 reg = <0x0 0x100>;
1058                                 interrupts = <GIC_SPI 74 IRQ_TYPE_LEVEL_HIGH>;
1059                                 clock-frequency = <48000000>;
1060                         };
1061                 };
1062
1063                 target-module@32000 {                   /* 0x48032000, ap 5 3e.0 */
1064                         compatible = "ti,sysc-omap4-timer", "ti,sysc";
1065                         reg = <0x32000 0x4>,
1066                               <0x32010 0x4>;
1067                         reg-names = "rev", "sysc";
1068                         ti,sysc-mask = <(SYSC_OMAP4_FREEEMU |
1069                                          SYSC_OMAP4_SOFTRESET)>;
1070                         ti,sysc-sidle = <SYSC_IDLE_FORCE>,
1071                                         <SYSC_IDLE_NO>,
1072                                         <SYSC_IDLE_SMART>,
1073                                         <SYSC_IDLE_SMART_WKUP>;
1074                         /* Domains (V, P, C): core, core_pwrdm, l4per_clkdm */
1075                         clocks = <&l4per_clkctrl OMAP5_TIMER2_CLKCTRL 0>;
1076                         clock-names = "fck";
1077                         #address-cells = <1>;
1078                         #size-cells = <1>;
1079                         ranges = <0x0 0x32000 0x1000>;
1080
1081                         timer2: timer@0 {
1082                                 compatible = "ti,omap5430-timer";
1083                                 reg = <0x0 0x80>;
1084                                 clocks = <&l4per_clkctrl OMAP5_TIMER2_CLKCTRL 24>;
1085                                 clock-names = "fck";
1086                                 interrupts = <GIC_SPI 38 IRQ_TYPE_LEVEL_HIGH>;
1087                         };
1088                 };
1089
1090                 target-module@34000 {                   /* 0x48034000, ap 7 46.0 */
1091                         compatible = "ti,sysc-omap4-timer", "ti,sysc";
1092                         reg = <0x34000 0x4>,
1093                               <0x34010 0x4>;
1094                         reg-names = "rev", "sysc";
1095                         ti,sysc-mask = <(SYSC_OMAP4_FREEEMU |
1096                                          SYSC_OMAP4_SOFTRESET)>;
1097                         ti,sysc-sidle = <SYSC_IDLE_FORCE>,
1098                                         <SYSC_IDLE_NO>,
1099                                         <SYSC_IDLE_SMART>,
1100                                         <SYSC_IDLE_SMART_WKUP>;
1101                         /* Domains (V, P, C): core, core_pwrdm, l4per_clkdm */
1102                         clocks = <&l4per_clkctrl OMAP5_TIMER3_CLKCTRL 0>;
1103                         clock-names = "fck";
1104                         #address-cells = <1>;
1105                         #size-cells = <1>;
1106                         ranges = <0x0 0x34000 0x1000>;
1107
1108                         timer3: timer@0 {
1109                                 compatible = "ti,omap5430-timer";
1110                                 reg = <0x0 0x80>;
1111                                 clocks = <&l4per_clkctrl OMAP5_TIMER3_CLKCTRL 24>;
1112                                 clock-names = "fck";
1113                                 interrupts = <GIC_SPI 39 IRQ_TYPE_LEVEL_HIGH>;
1114                         };
1115                 };
1116
1117                 target-module@36000 {                   /* 0x48036000, ap 9 4e.0 */
1118                         compatible = "ti,sysc-omap4-timer", "ti,sysc";
1119                         reg = <0x36000 0x4>,
1120                               <0x36010 0x4>;
1121                         reg-names = "rev", "sysc";
1122                         ti,sysc-mask = <(SYSC_OMAP4_FREEEMU |
1123                                          SYSC_OMAP4_SOFTRESET)>;
1124                         ti,sysc-sidle = <SYSC_IDLE_FORCE>,
1125                                         <SYSC_IDLE_NO>,
1126                                         <SYSC_IDLE_SMART>,
1127                                         <SYSC_IDLE_SMART_WKUP>;
1128                         /* Domains (V, P, C): core, core_pwrdm, l4per_clkdm */
1129                         clocks = <&l4per_clkctrl OMAP5_TIMER4_CLKCTRL 0>;
1130                         clock-names = "fck";
1131                         #address-cells = <1>;
1132                         #size-cells = <1>;
1133                         ranges = <0x0 0x36000 0x1000>;
1134
1135                         timer4: timer@0 {
1136                                 compatible = "ti,omap5430-timer";
1137                                 reg = <0x0 0x80>;
1138                                 clocks = <&l4per_clkctrl OMAP5_TIMER4_CLKCTRL 24>;
1139                                 clock-names = "fck";
1140                                 interrupts = <GIC_SPI 40 IRQ_TYPE_LEVEL_HIGH>;
1141                         };
1142                 };
1143
1144                 target-module@3e000 {                   /* 0x4803e000, ap 11 56.0 */
1145                         compatible = "ti,sysc-omap4-timer", "ti,sysc";
1146                         reg = <0x3e000 0x4>,
1147                               <0x3e010 0x4>;
1148                         reg-names = "rev", "sysc";
1149                         ti,sysc-mask = <(SYSC_OMAP4_FREEEMU |
1150                                          SYSC_OMAP4_SOFTRESET)>;
1151                         ti,sysc-sidle = <SYSC_IDLE_FORCE>,
1152                                         <SYSC_IDLE_NO>,
1153                                         <SYSC_IDLE_SMART>,
1154                                         <SYSC_IDLE_SMART_WKUP>;
1155                         /* Domains (V, P, C): core, core_pwrdm, l4per_clkdm */
1156                         clocks = <&l4per_clkctrl OMAP5_TIMER9_CLKCTRL 0>;
1157                         clock-names = "fck";
1158                         #address-cells = <1>;
1159                         #size-cells = <1>;
1160                         ranges = <0x0 0x3e000 0x1000>;
1161
1162                         timer9: timer@0 {
1163                                 compatible = "ti,omap5430-timer";
1164                                 reg = <0x0 0x80>;
1165                                 clocks = <&l4per_clkctrl OMAP5_TIMER9_CLKCTRL 24>;
1166                                 clock-names = "fck";
1167                                 interrupts = <GIC_SPI 45 IRQ_TYPE_LEVEL_HIGH>;
1168                                 ti,timer-pwm;
1169                         };
1170                 };
1171
1172                 target-module@51000 {                   /* 0x48051000, ap 45 2e.0 */
1173                         compatible = "ti,sysc-omap2", "ti,sysc";
1174                         reg = <0x51000 0x4>,
1175                               <0x51010 0x4>,
1176                               <0x51114 0x4>;
1177                         reg-names = "rev", "sysc", "syss";
1178                         ti,sysc-mask = <(SYSC_OMAP2_ENAWAKEUP |
1179                                          SYSC_OMAP2_SOFTRESET |
1180                                          SYSC_OMAP2_AUTOIDLE)>;
1181                         ti,sysc-sidle = <SYSC_IDLE_FORCE>,
1182                                         <SYSC_IDLE_NO>,
1183                                         <SYSC_IDLE_SMART>,
1184                                         <SYSC_IDLE_SMART_WKUP>;
1185                         ti,syss-mask = <1>;
1186                         /* Domains (V, P, C): core, core_pwrdm, l4per_clkdm */
1187                         clocks = <&l4per_clkctrl OMAP5_GPIO7_CLKCTRL 0>,
1188                                  <&l4per_clkctrl OMAP5_GPIO7_CLKCTRL 8>;
1189                         clock-names = "fck", "dbclk";
1190                         #address-cells = <1>;
1191                         #size-cells = <1>;
1192                         ranges = <0x0 0x51000 0x1000>;
1193
1194                         gpio7: gpio@0 {
1195                                 compatible = "ti,omap4-gpio";
1196                                 reg = <0x0 0x200>;
1197                                 interrupts = <GIC_SPI 35 IRQ_TYPE_LEVEL_HIGH>;
1198                                 gpio-controller;
1199                                 #gpio-cells = <2>;
1200                                 interrupt-controller;
1201                                 #interrupt-cells = <2>;
1202                         };
1203                 };
1204
1205                 target-module@53000 {                   /* 0x48053000, ap 35 36.0 */
1206                         compatible = "ti,sysc-omap2", "ti,sysc";
1207                         reg = <0x53000 0x4>,
1208                               <0x53010 0x4>,
1209                               <0x53114 0x4>;
1210                         reg-names = "rev", "sysc", "syss";
1211                         ti,sysc-mask = <(SYSC_OMAP2_ENAWAKEUP |
1212                                          SYSC_OMAP2_SOFTRESET |
1213                                          SYSC_OMAP2_AUTOIDLE)>;
1214                         ti,sysc-sidle = <SYSC_IDLE_FORCE>,
1215                                         <SYSC_IDLE_NO>,
1216                                         <SYSC_IDLE_SMART>,
1217                                         <SYSC_IDLE_SMART_WKUP>;
1218                         ti,syss-mask = <1>;
1219                         /* Domains (V, P, C): core, core_pwrdm, l4per_clkdm */
1220                         clocks = <&l4per_clkctrl OMAP5_GPIO8_CLKCTRL 0>,
1221                                  <&l4per_clkctrl OMAP5_GPIO8_CLKCTRL 8>;
1222                         clock-names = "fck", "dbclk";
1223                         #address-cells = <1>;
1224                         #size-cells = <1>;
1225                         ranges = <0x0 0x53000 0x1000>;
1226
1227                         gpio8: gpio@0 {
1228                                 compatible = "ti,omap4-gpio";
1229                                 reg = <0x0 0x200>;
1230                                 interrupts = <GIC_SPI 121 IRQ_TYPE_LEVEL_HIGH>;
1231                                 gpio-controller;
1232                                 #gpio-cells = <2>;
1233                                 interrupt-controller;
1234                                 #interrupt-cells = <2>;
1235                         };
1236                 };
1237
1238                 target-module@55000 {                   /* 0x48055000, ap 13 0e.0 */
1239                         compatible = "ti,sysc-omap2", "ti,sysc";
1240                         reg = <0x55000 0x4>,
1241                               <0x55010 0x4>,
1242                               <0x55114 0x4>;
1243                         reg-names = "rev", "sysc", "syss";
1244                         ti,sysc-mask = <(SYSC_OMAP2_ENAWAKEUP |
1245                                          SYSC_OMAP2_SOFTRESET |
1246                                          SYSC_OMAP2_AUTOIDLE)>;
1247                         ti,sysc-sidle = <SYSC_IDLE_FORCE>,
1248                                         <SYSC_IDLE_NO>,
1249                                         <SYSC_IDLE_SMART>,
1250                                         <SYSC_IDLE_SMART_WKUP>;
1251                         ti,syss-mask = <1>;
1252                         /* Domains (V, P, C): core, core_pwrdm, l4per_clkdm */
1253                         clocks = <&l4per_clkctrl OMAP5_GPIO2_CLKCTRL 0>,
1254                                  <&l4per_clkctrl OMAP5_GPIO2_CLKCTRL 8>;
1255                         clock-names = "fck", "dbclk";
1256                         #address-cells = <1>;
1257                         #size-cells = <1>;
1258                         ranges = <0x0 0x55000 0x1000>;
1259
1260                         gpio2: gpio@0 {
1261                                 compatible = "ti,omap4-gpio";
1262                                 reg = <0x0 0x200>;
1263                                 interrupts = <GIC_SPI 30 IRQ_TYPE_LEVEL_HIGH>;
1264                                 gpio-controller;
1265                                 #gpio-cells = <2>;
1266                                 interrupt-controller;
1267                                 #interrupt-cells = <2>;
1268                         };
1269                 };
1270
1271                 target-module@57000 {                   /* 0x48057000, ap 15 06.0 */
1272                         compatible = "ti,sysc-omap2", "ti,sysc";
1273                         reg = <0x57000 0x4>,
1274                               <0x57010 0x4>,
1275                               <0x57114 0x4>;
1276                         reg-names = "rev", "sysc", "syss";
1277                         ti,sysc-mask = <(SYSC_OMAP2_ENAWAKEUP |
1278                                          SYSC_OMAP2_SOFTRESET |
1279                                          SYSC_OMAP2_AUTOIDLE)>;
1280                         ti,sysc-sidle = <SYSC_IDLE_FORCE>,
1281                                         <SYSC_IDLE_NO>,
1282                                         <SYSC_IDLE_SMART>,
1283                                         <SYSC_IDLE_SMART_WKUP>;
1284                         ti,syss-mask = <1>;
1285                         /* Domains (V, P, C): core, core_pwrdm, l4per_clkdm */
1286                         clocks = <&l4per_clkctrl OMAP5_GPIO3_CLKCTRL 0>,
1287                                  <&l4per_clkctrl OMAP5_GPIO3_CLKCTRL 8>;
1288                         clock-names = "fck", "dbclk";
1289                         #address-cells = <1>;
1290                         #size-cells = <1>;
1291                         ranges = <0x0 0x57000 0x1000>;
1292
1293                         gpio3: gpio@0 {
1294                                 compatible = "ti,omap4-gpio";
1295                                 reg = <0x0 0x200>;
1296                                 interrupts = <GIC_SPI 31 IRQ_TYPE_LEVEL_HIGH>;
1297                                 gpio-controller;
1298                                 #gpio-cells = <2>;
1299                                 interrupt-controller;
1300                                 #interrupt-cells = <2>;
1301                         };
1302                 };
1303
1304                 target-module@59000 {                   /* 0x48059000, ap 17 16.0 */
1305                         compatible = "ti,sysc-omap2", "ti,sysc";
1306                         reg = <0x59000 0x4>,
1307                               <0x59010 0x4>,
1308                               <0x59114 0x4>;
1309                         reg-names = "rev", "sysc", "syss";
1310                         ti,sysc-mask = <(SYSC_OMAP2_ENAWAKEUP |
1311                                          SYSC_OMAP2_SOFTRESET |
1312                                          SYSC_OMAP2_AUTOIDLE)>;
1313                         ti,sysc-sidle = <SYSC_IDLE_FORCE>,
1314                                         <SYSC_IDLE_NO>,
1315                                         <SYSC_IDLE_SMART>,
1316                                         <SYSC_IDLE_SMART_WKUP>;
1317                         ti,syss-mask = <1>;
1318                         /* Domains (V, P, C): core, core_pwrdm, l4per_clkdm */
1319                         clocks = <&l4per_clkctrl OMAP5_GPIO4_CLKCTRL 0>,
1320                                  <&l4per_clkctrl OMAP5_GPIO4_CLKCTRL 8>;
1321                         clock-names = "fck", "dbclk";
1322                         #address-cells = <1>;
1323                         #size-cells = <1>;
1324                         ranges = <0x0 0x59000 0x1000>;
1325
1326                         gpio4: gpio@0 {
1327                                 compatible = "ti,omap4-gpio";
1328                                 reg = <0x0 0x200>;
1329                                 interrupts = <GIC_SPI 32 IRQ_TYPE_LEVEL_HIGH>;
1330                                 gpio-controller;
1331                                 #gpio-cells = <2>;
1332                                 interrupt-controller;
1333                                 #interrupt-cells = <2>;
1334                         };
1335                 };
1336
1337                 target-module@5b000 {                   /* 0x4805b000, ap 19 1e.0 */
1338                         compatible = "ti,sysc-omap2", "ti,sysc";
1339                         reg = <0x5b000 0x4>,
1340                               <0x5b010 0x4>,
1341                               <0x5b114 0x4>;
1342                         reg-names = "rev", "sysc", "syss";
1343                         ti,sysc-mask = <(SYSC_OMAP2_ENAWAKEUP |
1344                                          SYSC_OMAP2_SOFTRESET |
1345                                          SYSC_OMAP2_AUTOIDLE)>;
1346                         ti,sysc-sidle = <SYSC_IDLE_FORCE>,
1347                                         <SYSC_IDLE_NO>,
1348                                         <SYSC_IDLE_SMART>,
1349                                         <SYSC_IDLE_SMART_WKUP>;
1350                         ti,syss-mask = <1>;
1351                         /* Domains (V, P, C): core, core_pwrdm, l4per_clkdm */
1352                         clocks = <&l4per_clkctrl OMAP5_GPIO5_CLKCTRL 0>,
1353                                  <&l4per_clkctrl OMAP5_GPIO5_CLKCTRL 8>;
1354                         clock-names = "fck", "dbclk";
1355                         #address-cells = <1>;
1356                         #size-cells = <1>;
1357                         ranges = <0x0 0x5b000 0x1000>;
1358
1359                         gpio5: gpio@0 {
1360                                 compatible = "ti,omap4-gpio";
1361                                 reg = <0x0 0x200>;
1362                                 interrupts = <GIC_SPI 33 IRQ_TYPE_LEVEL_HIGH>;
1363                                 gpio-controller;
1364                                 #gpio-cells = <2>;
1365                                 interrupt-controller;
1366                                 #interrupt-cells = <2>;
1367                         };
1368                 };
1369
1370                 target-module@5d000 {                   /* 0x4805d000, ap 21 26.0 */
1371                         compatible = "ti,sysc-omap2", "ti,sysc";
1372                         reg = <0x5d000 0x4>,
1373                               <0x5d010 0x4>,
1374                               <0x5d114 0x4>;
1375                         reg-names = "rev", "sysc", "syss";
1376                         ti,sysc-mask = <(SYSC_OMAP2_ENAWAKEUP |
1377                                          SYSC_OMAP2_SOFTRESET |
1378                                          SYSC_OMAP2_AUTOIDLE)>;
1379                         ti,sysc-sidle = <SYSC_IDLE_FORCE>,
1380                                         <SYSC_IDLE_NO>,
1381                                         <SYSC_IDLE_SMART>,
1382                                         <SYSC_IDLE_SMART_WKUP>;
1383                         ti,syss-mask = <1>;
1384                         /* Domains (V, P, C): core, core_pwrdm, l4per_clkdm */
1385                         clocks = <&l4per_clkctrl OMAP5_GPIO6_CLKCTRL 0>,
1386                                  <&l4per_clkctrl OMAP5_GPIO6_CLKCTRL 8>;
1387                         clock-names = "fck", "dbclk";
1388                         #address-cells = <1>;
1389                         #size-cells = <1>;
1390                         ranges = <0x0 0x5d000 0x1000>;
1391
1392                         gpio6: gpio@0 {
1393                                 compatible = "ti,omap4-gpio";
1394                                 reg = <0x0 0x200>;
1395                                 interrupts = <GIC_SPI 34 IRQ_TYPE_LEVEL_HIGH>;
1396                                 gpio-controller;
1397                                 #gpio-cells = <2>;
1398                                 interrupt-controller;
1399                                 #interrupt-cells = <2>;
1400                         };
1401                 };
1402
1403                 target-module@60000 {                   /* 0x48060000, ap 23 24.0 */
1404                         compatible = "ti,sysc-omap2", "ti,sysc";
1405                         reg = <0x60000 0x8>,
1406                               <0x60010 0x8>,
1407                               <0x60090 0x8>;
1408                         reg-names = "rev", "sysc", "syss";
1409                         ti,sysc-mask = <(SYSC_OMAP2_CLOCKACTIVITY |
1410                                          SYSC_OMAP2_ENAWAKEUP |
1411                                          SYSC_OMAP2_SOFTRESET |
1412                                          SYSC_OMAP2_AUTOIDLE)>;
1413                         ti,sysc-sidle = <SYSC_IDLE_FORCE>,
1414                                         <SYSC_IDLE_NO>,
1415                                         <SYSC_IDLE_SMART>,
1416                                         <SYSC_IDLE_SMART_WKUP>;
1417                         ti,syss-mask = <1>;
1418                         /* Domains (V, P, C): core, core_pwrdm, l4per_clkdm */
1419                         clocks = <&l4per_clkctrl OMAP5_I2C3_CLKCTRL 0>;
1420                         clock-names = "fck";
1421                         #address-cells = <1>;
1422                         #size-cells = <1>;
1423                         ranges = <0x0 0x60000 0x1000>;
1424
1425                         i2c3: i2c@0 {
1426                                 compatible = "ti,omap4-i2c";
1427                                 reg = <0x0 0x100>;
1428                                 interrupts = <GIC_SPI 61 IRQ_TYPE_LEVEL_HIGH>;
1429                                 #address-cells = <1>;
1430                                 #size-cells = <0>;
1431                         };
1432                 };
1433
1434                 target-module@66000 {                   /* 0x48066000, ap 63 4c.0 */
1435                         compatible = "ti,sysc-omap2", "ti,sysc";
1436                         reg = <0x66050 0x4>,
1437                               <0x66054 0x4>,
1438                               <0x66058 0x4>;
1439                         reg-names = "rev", "sysc", "syss";
1440                         ti,sysc-mask = <(SYSC_OMAP2_ENAWAKEUP |
1441                                          SYSC_OMAP2_SOFTRESET |
1442                                          SYSC_OMAP2_AUTOIDLE)>;
1443                         ti,sysc-sidle = <SYSC_IDLE_FORCE>,
1444                                         <SYSC_IDLE_NO>,
1445                                         <SYSC_IDLE_SMART>,
1446                                         <SYSC_IDLE_SMART_WKUP>;
1447                         ti,syss-mask = <1>;
1448                         /* Domains (V, P, C): core, core_pwrdm, l4per_clkdm */
1449                         clocks = <&l4per_clkctrl OMAP5_UART5_CLKCTRL 0>;
1450                         clock-names = "fck";
1451                         #address-cells = <1>;
1452                         #size-cells = <1>;
1453                         ranges = <0x0 0x66000 0x1000>;
1454
1455                         uart5: serial@0 {
1456                                 compatible = "ti,omap4-uart";
1457                                 reg = <0x0 0x100>;
1458                                 interrupts = <GIC_SPI 105 IRQ_TYPE_LEVEL_HIGH>;
1459                                 clock-frequency = <48000000>;
1460                         };
1461                 };
1462
1463                 target-module@68000 {                   /* 0x48068000, ap 53 54.0 */
1464                         compatible = "ti,sysc-omap2", "ti,sysc";
1465                         reg = <0x68050 0x4>,
1466                               <0x68054 0x4>,
1467                               <0x68058 0x4>;
1468                         reg-names = "rev", "sysc", "syss";
1469                         ti,sysc-mask = <(SYSC_OMAP2_ENAWAKEUP |
1470                                          SYSC_OMAP2_SOFTRESET |
1471                                          SYSC_OMAP2_AUTOIDLE)>;
1472                         ti,sysc-sidle = <SYSC_IDLE_FORCE>,
1473                                         <SYSC_IDLE_NO>,
1474                                         <SYSC_IDLE_SMART>,
1475                                         <SYSC_IDLE_SMART_WKUP>;
1476                         ti,syss-mask = <1>;
1477                         /* Domains (V, P, C): core, core_pwrdm, l4per_clkdm */
1478                         clocks = <&l4per_clkctrl OMAP5_UART6_CLKCTRL 0>;
1479                         clock-names = "fck";
1480                         #address-cells = <1>;
1481                         #size-cells = <1>;
1482                         ranges = <0x0 0x68000 0x1000>;
1483
1484                         uart6: serial@0 {
1485                                 compatible = "ti,omap4-uart";
1486                                 reg = <0x0 0x100>;
1487                                 interrupts = <GIC_SPI 106 IRQ_TYPE_LEVEL_HIGH>;
1488                                 clock-frequency = <48000000>;
1489                         };
1490                 };
1491
1492                 target-module@6a000 {                   /* 0x4806a000, ap 24 0a.0 */
1493                         compatible = "ti,sysc-omap2", "ti,sysc";
1494                         reg = <0x6a050 0x4>,
1495                               <0x6a054 0x4>,
1496                               <0x6a058 0x4>;
1497                         reg-names = "rev", "sysc", "syss";
1498                         ti,sysc-mask = <(SYSC_OMAP2_ENAWAKEUP |
1499                                          SYSC_OMAP2_SOFTRESET |
1500                                          SYSC_OMAP2_AUTOIDLE)>;
1501                         ti,sysc-sidle = <SYSC_IDLE_FORCE>,
1502                                         <SYSC_IDLE_NO>,
1503                                         <SYSC_IDLE_SMART>,
1504                                         <SYSC_IDLE_SMART_WKUP>;
1505                         ti,syss-mask = <1>;
1506                         /* Domains (V, P, C): core, core_pwrdm, l4per_clkdm */
1507                         clocks = <&l4per_clkctrl OMAP5_UART1_CLKCTRL 0>;
1508                         clock-names = "fck";
1509                         #address-cells = <1>;
1510                         #size-cells = <1>;
1511                         ranges = <0x0 0x6a000 0x1000>;
1512
1513                         uart1: serial@0 {
1514                                 compatible = "ti,omap4-uart";
1515                                 reg = <0x0 0x100>;
1516                                 interrupts = <GIC_SPI 72 IRQ_TYPE_LEVEL_HIGH>;
1517                                 clock-frequency = <48000000>;
1518                         };
1519                 };
1520
1521                 target-module@6c000 {                   /* 0x4806c000, ap 26 22.0 */
1522                         compatible = "ti,sysc-omap2", "ti,sysc";
1523                         reg = <0x6c050 0x4>,
1524                               <0x6c054 0x4>,
1525                               <0x6c058 0x4>;
1526                         reg-names = "rev", "sysc", "syss";
1527                         ti,sysc-mask = <(SYSC_OMAP2_ENAWAKEUP |
1528                                          SYSC_OMAP2_SOFTRESET |
1529                                          SYSC_OMAP2_AUTOIDLE)>;
1530                         ti,sysc-sidle = <SYSC_IDLE_FORCE>,
1531                                         <SYSC_IDLE_NO>,
1532                                         <SYSC_IDLE_SMART>,
1533                                         <SYSC_IDLE_SMART_WKUP>;
1534                         ti,syss-mask = <1>;
1535                         /* Domains (V, P, C): core, core_pwrdm, l4per_clkdm */
1536                         clocks = <&l4per_clkctrl OMAP5_UART2_CLKCTRL 0>;
1537                         clock-names = "fck";
1538                         #address-cells = <1>;
1539                         #size-cells = <1>;
1540                         ranges = <0x0 0x6c000 0x1000>;
1541
1542                         uart2: serial@0 {
1543                                 compatible = "ti,omap4-uart";
1544                                 reg = <0x0 0x100>;
1545                                 interrupts = <GIC_SPI 73 IRQ_TYPE_LEVEL_HIGH>;
1546                                 clock-frequency = <48000000>;
1547                         };
1548                 };
1549
1550                 target-module@6e000 {                   /* 0x4806e000, ap 28 44.1 */
1551                         compatible = "ti,sysc-omap2", "ti,sysc";
1552                         reg = <0x6e050 0x4>,
1553                               <0x6e054 0x4>,
1554                               <0x6e058 0x4>;
1555                         reg-names = "rev", "sysc", "syss";
1556                         ti,sysc-mask = <(SYSC_OMAP2_ENAWAKEUP |
1557                                          SYSC_OMAP2_SOFTRESET |
1558                                          SYSC_OMAP2_AUTOIDLE)>;
1559                         ti,sysc-sidle = <SYSC_IDLE_FORCE>,
1560                                         <SYSC_IDLE_NO>,
1561                                         <SYSC_IDLE_SMART>,
1562                                         <SYSC_IDLE_SMART_WKUP>;
1563                         ti,syss-mask = <1>;
1564                         /* Domains (V, P, C): core, core_pwrdm, l4per_clkdm */
1565                         clocks = <&l4per_clkctrl OMAP5_UART4_CLKCTRL 0>;
1566                         clock-names = "fck";
1567                         #address-cells = <1>;
1568                         #size-cells = <1>;
1569                         ranges = <0x0 0x6e000 0x1000>;
1570
1571                         uart4: serial@0 {
1572                                 compatible = "ti,omap4-uart";
1573                                 reg = <0x0 0x100>;
1574                                 interrupts = <GIC_SPI 70 IRQ_TYPE_LEVEL_HIGH>;
1575                                 clock-frequency = <48000000>;
1576                         };
1577                 };
1578
1579                 target-module@70000 {                   /* 0x48070000, ap 30 14.0 */
1580                         compatible = "ti,sysc-omap2", "ti,sysc";
1581                         reg = <0x70000 0x8>,
1582                               <0x70010 0x8>,
1583                               <0x70090 0x8>;
1584                         reg-names = "rev", "sysc", "syss";
1585                         ti,sysc-mask = <(SYSC_OMAP2_CLOCKACTIVITY |
1586                                          SYSC_OMAP2_ENAWAKEUP |
1587                                          SYSC_OMAP2_SOFTRESET |
1588                                          SYSC_OMAP2_AUTOIDLE)>;
1589                         ti,sysc-sidle = <SYSC_IDLE_FORCE>,
1590                                         <SYSC_IDLE_NO>,
1591                                         <SYSC_IDLE_SMART>,
1592                                         <SYSC_IDLE_SMART_WKUP>;
1593                         ti,syss-mask = <1>;
1594                         /* Domains (V, P, C): core, core_pwrdm, l4per_clkdm */
1595                         clocks = <&l4per_clkctrl OMAP5_I2C1_CLKCTRL 0>;
1596                         clock-names = "fck";
1597                         #address-cells = <1>;
1598                         #size-cells = <1>;
1599                         ranges = <0x0 0x70000 0x1000>;
1600
1601                         i2c1: i2c@0 {
1602                                 compatible = "ti,omap4-i2c";
1603                                 reg = <0x0 0x100>;
1604                                 interrupts = <GIC_SPI 56 IRQ_TYPE_LEVEL_HIGH>;
1605                                 #address-cells = <1>;
1606                                 #size-cells = <0>;
1607                         };
1608                 };
1609
1610                 target-module@72000 {                   /* 0x48072000, ap 32 1c.0 */
1611                         compatible = "ti,sysc-omap2", "ti,sysc";
1612                         reg = <0x72000 0x8>,
1613                               <0x72010 0x8>,
1614                               <0x72090 0x8>;
1615                         reg-names = "rev", "sysc", "syss";
1616                         ti,sysc-mask = <(SYSC_OMAP2_CLOCKACTIVITY |
1617                                          SYSC_OMAP2_ENAWAKEUP |
1618                                          SYSC_OMAP2_SOFTRESET |
1619                                          SYSC_OMAP2_AUTOIDLE)>;
1620                         ti,sysc-sidle = <SYSC_IDLE_FORCE>,
1621                                         <SYSC_IDLE_NO>,
1622                                         <SYSC_IDLE_SMART>,
1623                                         <SYSC_IDLE_SMART_WKUP>;
1624                         ti,syss-mask = <1>;
1625                         /* Domains (V, P, C): core, core_pwrdm, l4per_clkdm */
1626                         clocks = <&l4per_clkctrl OMAP5_I2C2_CLKCTRL 0>;
1627                         clock-names = "fck";
1628                         #address-cells = <1>;
1629                         #size-cells = <1>;
1630                         ranges = <0x0 0x72000 0x1000>;
1631
1632                         i2c2: i2c@0 {
1633                                 compatible = "ti,omap4-i2c";
1634                                 reg = <0x0 0x100>;
1635                                 interrupts = <GIC_SPI 57 IRQ_TYPE_LEVEL_HIGH>;
1636                                 #address-cells = <1>;
1637                                 #size-cells = <0>;
1638                         };
1639                 };
1640
1641                 target-module@78000 {                   /* 0x48078000, ap 39 12.0 */
1642                         compatible = "ti,sysc";
1643                         status = "disabled";
1644                         #address-cells = <1>;
1645                         #size-cells = <1>;
1646                         ranges = <0x0 0x78000 0x1000>;
1647                 };
1648
1649                 target-module@7a000 {                   /* 0x4807a000, ap 81 2c.0 */
1650                         compatible = "ti,sysc-omap2", "ti,sysc";
1651                         reg = <0x7a000 0x8>,
1652                               <0x7a010 0x8>,
1653                               <0x7a090 0x8>;
1654                         reg-names = "rev", "sysc", "syss";
1655                         ti,sysc-mask = <(SYSC_OMAP2_CLOCKACTIVITY |
1656                                          SYSC_OMAP2_ENAWAKEUP |
1657                                          SYSC_OMAP2_SOFTRESET |
1658                                          SYSC_OMAP2_AUTOIDLE)>;
1659                         ti,sysc-sidle = <SYSC_IDLE_FORCE>,
1660                                         <SYSC_IDLE_NO>,
1661                                         <SYSC_IDLE_SMART>,
1662                                         <SYSC_IDLE_SMART_WKUP>;
1663                         ti,syss-mask = <1>;
1664                         /* Domains (V, P, C): core, core_pwrdm, l4per_clkdm */
1665                         clocks = <&l4per_clkctrl OMAP5_I2C4_CLKCTRL 0>;
1666                         clock-names = "fck";
1667                         #address-cells = <1>;
1668                         #size-cells = <1>;
1669                         ranges = <0x0 0x7a000 0x1000>;
1670
1671                         i2c4: i2c@0 {
1672                                 compatible = "ti,omap4-i2c";
1673                                 reg = <0x0 0x100>;
1674                                 interrupts = <GIC_SPI 62 IRQ_TYPE_LEVEL_HIGH>;
1675                                 #address-cells = <1>;
1676                                 #size-cells = <0>;
1677                         };
1678                 };
1679
1680                 target-module@7c000 {                   /* 0x4807c000, ap 83 34.0 */
1681                         compatible = "ti,sysc-omap2", "ti,sysc";
1682                         reg = <0x7c000 0x8>,
1683                               <0x7c010 0x8>,
1684                               <0x7c090 0x8>;
1685                         reg-names = "rev", "sysc", "syss";
1686                         ti,sysc-mask = <(SYSC_OMAP2_CLOCKACTIVITY |
1687                                          SYSC_OMAP2_ENAWAKEUP |
1688                                          SYSC_OMAP2_SOFTRESET |
1689                                          SYSC_OMAP2_AUTOIDLE)>;
1690                         ti,sysc-sidle = <SYSC_IDLE_FORCE>,
1691                                         <SYSC_IDLE_NO>,
1692                                         <SYSC_IDLE_SMART>,
1693                                         <SYSC_IDLE_SMART_WKUP>;
1694                         ti,syss-mask = <1>;
1695                         /* Domains (V, P, C): core, core_pwrdm, l4per_clkdm */
1696                         clocks = <&l4per_clkctrl OMAP5_I2C5_CLKCTRL 0>;
1697                         clock-names = "fck";
1698                         #address-cells = <1>;
1699                         #size-cells = <1>;
1700                         ranges = <0x0 0x7c000 0x1000>;
1701
1702                         i2c5: i2c@0 {
1703                                 compatible = "ti,omap4-i2c";
1704                                 reg = <0x0 0x100>;
1705                                 interrupts = <GIC_SPI 60 IRQ_TYPE_LEVEL_HIGH>;
1706                                 #address-cells = <1>;
1707                                 #size-cells = <0>;
1708                         };
1709                 };
1710
1711                 target-module@86000 {                   /* 0x48086000, ap 41 5e.0 */
1712                         compatible = "ti,sysc-omap4-timer", "ti,sysc";
1713                         reg = <0x86000 0x4>,
1714                               <0x86010 0x4>;
1715                         reg-names = "rev", "sysc";
1716                         ti,sysc-mask = <(SYSC_OMAP4_FREEEMU |
1717                                          SYSC_OMAP4_SOFTRESET)>;
1718                         ti,sysc-sidle = <SYSC_IDLE_FORCE>,
1719                                         <SYSC_IDLE_NO>,
1720                                         <SYSC_IDLE_SMART>,
1721                                         <SYSC_IDLE_SMART_WKUP>;
1722                         /* Domains (V, P, C): core, core_pwrdm, l4per_clkdm */
1723                         clocks = <&l4per_clkctrl OMAP5_TIMER10_CLKCTRL 0>;
1724                         clock-names = "fck";
1725                         #address-cells = <1>;
1726                         #size-cells = <1>;
1727                         ranges = <0x0 0x86000 0x1000>;
1728
1729                         timer10: timer@0 {
1730                                 compatible = "ti,omap5430-timer";
1731                                 reg = <0x0 0x80>;
1732                                 clocks = <&l4per_clkctrl OMAP5_TIMER10_CLKCTRL 24>;
1733                                 clock-names = "fck";
1734                                 interrupts = <GIC_SPI 46 IRQ_TYPE_LEVEL_HIGH>;
1735                                 ti,timer-pwm;
1736                         };
1737                 };
1738
1739                 target-module@88000 {                   /* 0x48088000, ap 43 66.0 */
1740                         compatible = "ti,sysc-omap4-timer", "ti,sysc";
1741                         reg = <0x88000 0x4>,
1742                               <0x88010 0x4>;
1743                         reg-names = "rev", "sysc";
1744                         ti,sysc-mask = <(SYSC_OMAP4_FREEEMU |
1745                                          SYSC_OMAP4_SOFTRESET)>;
1746                         ti,sysc-sidle = <SYSC_IDLE_FORCE>,
1747                                         <SYSC_IDLE_NO>,
1748                                         <SYSC_IDLE_SMART>,
1749                                         <SYSC_IDLE_SMART_WKUP>;
1750                         /* Domains (V, P, C): core, core_pwrdm, l4per_clkdm */
1751                         clocks = <&l4per_clkctrl OMAP5_TIMER11_CLKCTRL 0>;
1752                         clock-names = "fck";
1753                         #address-cells = <1>;
1754                         #size-cells = <1>;
1755                         ranges = <0x0 0x88000 0x1000>;
1756
1757                         timer11: timer@0 {
1758                                 compatible = "ti,omap5430-timer";
1759                                 reg = <0x0 0x80>;
1760                                 clocks = <&l4per_clkctrl OMAP5_TIMER11_CLKCTRL 24>;
1761                                 clock-names = "fck";
1762                                 interrupts = <GIC_SPI 47 IRQ_TYPE_LEVEL_HIGH>;
1763                                 ti,timer-pwm;
1764                         };
1765                 };
1766
1767                 rng_target: target-module@90000 {       /* 0x48090000, ap 55 1a.0 */
1768                         compatible = "ti,sysc-omap2", "ti,sysc";
1769                         reg = <0x91fe0 0x4>,
1770                               <0x91fe4 0x4>;
1771                         reg-names = "rev", "sysc";
1772                         ti,sysc-mask = <(SYSC_OMAP2_AUTOIDLE)>;
1773                         ti,sysc-sidle = <SYSC_IDLE_FORCE>,
1774                                         <SYSC_IDLE_NO>;
1775                         /* Domains (P, C): l4per_pwrdm, l4sec_clkdm */
1776                         clocks = <&l4sec_clkctrl OMAP5_RNG_CLKCTRL 0>;
1777                         clock-names = "fck";
1778                         #address-cells = <1>;
1779                         #size-cells = <1>;
1780                         ranges = <0x0 0x90000 0x2000>;
1781
1782                         rng: rng@0 {
1783                                 compatible = "ti,omap4-rng";
1784                                 reg = <0x0 0x2000>;
1785                                 interrupts = <GIC_SPI 52 IRQ_TYPE_LEVEL_HIGH>;
1786                         };
1787                 };
1788
1789                 target-module@98000 {                   /* 0x48098000, ap 47 08.0 */
1790                         compatible = "ti,sysc-omap4", "ti,sysc";
1791                         reg = <0x98000 0x4>,
1792                               <0x98010 0x4>;
1793                         reg-names = "rev", "sysc";
1794                         ti,sysc-mask = <(SYSC_OMAP4_FREEEMU |
1795                                          SYSC_OMAP4_SOFTRESET)>;
1796                         ti,sysc-sidle = <SYSC_IDLE_FORCE>,
1797                                         <SYSC_IDLE_NO>,
1798                                         <SYSC_IDLE_SMART>,
1799                                         <SYSC_IDLE_SMART_WKUP>;
1800                         /* Domains (V, P, C): core, core_pwrdm, l4per_clkdm */
1801                         clocks = <&l4per_clkctrl OMAP5_MCSPI1_CLKCTRL 0>;
1802                         clock-names = "fck";
1803                         #address-cells = <1>;
1804                         #size-cells = <1>;
1805                         ranges = <0x0 0x98000 0x1000>;
1806
1807                         mcspi1: spi@0 {
1808                                 compatible = "ti,omap4-mcspi";
1809                                 reg = <0x0 0x200>;
1810                                 interrupts = <GIC_SPI 65 IRQ_TYPE_LEVEL_HIGH>;
1811                                 #address-cells = <1>;
1812                                 #size-cells = <0>;
1813                                 ti,spi-num-cs = <4>;
1814                                 dmas = <&sdma 35>,
1815                                        <&sdma 36>,
1816                                        <&sdma 37>,
1817                                        <&sdma 38>,
1818                                        <&sdma 39>,
1819                                        <&sdma 40>,
1820                                        <&sdma 41>,
1821                                        <&sdma 42>;
1822                                 dma-names = "tx0", "rx0", "tx1", "rx1",
1823                                             "tx2", "rx2", "tx3", "rx3";
1824                         };
1825                 };
1826
1827                 target-module@9a000 {                   /* 0x4809a000, ap 49 10.0 */
1828                         compatible = "ti,sysc-omap4", "ti,sysc";
1829                         reg = <0x9a000 0x4>,
1830                               <0x9a010 0x4>;
1831                         reg-names = "rev", "sysc";
1832                         ti,sysc-mask = <(SYSC_OMAP4_FREEEMU |
1833                                          SYSC_OMAP4_SOFTRESET)>;
1834                         ti,sysc-sidle = <SYSC_IDLE_FORCE>,
1835                                         <SYSC_IDLE_NO>,
1836                                         <SYSC_IDLE_SMART>,
1837                                         <SYSC_IDLE_SMART_WKUP>;
1838                         /* Domains (V, P, C): core, core_pwrdm, l4per_clkdm */
1839                         clocks = <&l4per_clkctrl OMAP5_MCSPI2_CLKCTRL 0>;
1840                         clock-names = "fck";
1841                         #address-cells = <1>;
1842                         #size-cells = <1>;
1843                         ranges = <0x0 0x9a000 0x1000>;
1844
1845                         mcspi2: spi@0 {
1846                                 compatible = "ti,omap4-mcspi";
1847                                 reg = <0x0 0x200>;
1848                                 interrupts = <GIC_SPI 66 IRQ_TYPE_LEVEL_HIGH>;
1849                                 #address-cells = <1>;
1850                                 #size-cells = <0>;
1851                                 ti,spi-num-cs = <2>;
1852                                 dmas = <&sdma 43>,
1853                                        <&sdma 44>,
1854                                        <&sdma 45>,
1855                                        <&sdma 46>;
1856                                 dma-names = "tx0", "rx0", "tx1", "rx1";
1857                         };
1858                 };
1859
1860                 target-module@9c000 {                   /* 0x4809c000, ap 51 3a.0 */
1861                         compatible = "ti,sysc-omap4", "ti,sysc";
1862                         reg = <0x9c000 0x4>,
1863                               <0x9c010 0x4>;
1864                         reg-names = "rev", "sysc";
1865                         ti,sysc-mask = <(SYSC_OMAP4_FREEEMU |
1866                                          SYSC_OMAP4_SOFTRESET)>;
1867                         ti,sysc-midle = <SYSC_IDLE_FORCE>,
1868                                         <SYSC_IDLE_NO>,
1869                                         <SYSC_IDLE_SMART>,
1870                                         <SYSC_IDLE_SMART_WKUP>;
1871                         ti,sysc-sidle = <SYSC_IDLE_FORCE>,
1872                                         <SYSC_IDLE_NO>,
1873                                         <SYSC_IDLE_SMART>,
1874                                         <SYSC_IDLE_SMART_WKUP>;
1875                         /* Domains (V, P, C): core, l3init_pwrdm, l3init_clkdm */
1876                         clocks = <&l3init_clkctrl OMAP5_MMC1_CLKCTRL 0>;
1877                         clock-names = "fck";
1878                         #address-cells = <1>;
1879                         #size-cells = <1>;
1880                         ranges = <0x0 0x9c000 0x1000>;
1881
1882                         mmc1: mmc@0 {
1883                                 compatible = "ti,omap4-hsmmc";
1884                                 reg = <0x0 0x400>;
1885                                 interrupts = <GIC_SPI 83 IRQ_TYPE_LEVEL_HIGH>;
1886                                 ti,dual-volt;
1887                                 ti,needs-special-reset;
1888                                 dmas = <&sdma 61>, <&sdma 62>;
1889                                 dma-names = "tx", "rx";
1890                                 pbias-supply = <&pbias_mmc_reg>;
1891                         };
1892                 };
1893
1894                 target-module@a2000 {                   /* 0x480a2000, ap 75 02.0 */
1895                         compatible = "ti,sysc";
1896                         status = "disabled";
1897                         #address-cells = <1>;
1898                         #size-cells = <1>;
1899                         ranges = <0x0 0xa2000 0x1000>;
1900                 };
1901
1902                 target-module@a4000 {                   /* 0x480a4000, ap 57 3c.0 */
1903                         compatible = "ti,sysc";
1904                         status = "disabled";
1905                         #address-cells = <1>;
1906                         #size-cells = <1>;
1907                         ranges = <0x00000000 0x000a4000 0x00001000>,
1908                                  <0x00001000 0x000a5000 0x00001000>;
1909                 };
1910
1911                 target-module@a8000 {                   /* 0x480a8000, ap 59 2a.0 */
1912                         compatible = "ti,sysc";
1913                         status = "disabled";
1914                         #address-cells = <1>;
1915                         #size-cells = <1>;
1916                         ranges = <0x0 0xa8000 0x4000>;
1917                 };
1918
1919                 target-module@ad000 {                   /* 0x480ad000, ap 61 20.0 */
1920                         compatible = "ti,sysc-omap4", "ti,sysc";
1921                         reg = <0xad000 0x4>,
1922                               <0xad010 0x4>;
1923                         reg-names = "rev", "sysc";
1924                         ti,sysc-mask = <(SYSC_OMAP4_FREEEMU |
1925                                          SYSC_OMAP4_SOFTRESET)>;
1926                         ti,sysc-midle = <SYSC_IDLE_FORCE>,
1927                                         <SYSC_IDLE_NO>,
1928                                         <SYSC_IDLE_SMART>,
1929                                         <SYSC_IDLE_SMART_WKUP>;
1930                         ti,sysc-sidle = <SYSC_IDLE_FORCE>,
1931                                         <SYSC_IDLE_NO>,
1932                                         <SYSC_IDLE_SMART>,
1933                                         <SYSC_IDLE_SMART_WKUP>;
1934                         /* Domains (V, P, C): core, core_pwrdm, l4per_clkdm */
1935                         clocks = <&l4per_clkctrl OMAP5_MMC3_CLKCTRL 0>;
1936                         clock-names = "fck";
1937                         #address-cells = <1>;
1938                         #size-cells = <1>;
1939                         ranges = <0x0 0xad000 0x1000>;
1940
1941                         mmc3: mmc@0 {
1942                                 compatible = "ti,omap4-hsmmc";
1943                                 reg = <0x0 0x400>;
1944                                 interrupts = <GIC_SPI 94 IRQ_TYPE_LEVEL_HIGH>;
1945                                 ti,needs-special-reset;
1946                                 dmas = <&sdma 77>, <&sdma 78>;
1947                                 dma-names = "tx", "rx";
1948                         };
1949                 };
1950
1951                 target-module@b2000 {                   /* 0x480b2000, ap 37 0c.0 */
1952                         compatible = "ti,sysc";
1953                         status = "disabled";
1954                         #address-cells = <1>;
1955                         #size-cells = <1>;
1956                         ranges = <0x0 0xb2000 0x1000>;
1957                 };
1958
1959                 target-module@b4000 {                   /* 0x480b4000, ap 65 42.0 */
1960                         compatible = "ti,sysc-omap4", "ti,sysc";
1961                         reg = <0xb4000 0x4>,
1962                               <0xb4010 0x4>;
1963                         reg-names = "rev", "sysc";
1964                         ti,sysc-mask = <(SYSC_OMAP4_FREEEMU |
1965                                          SYSC_OMAP4_SOFTRESET)>;
1966                         ti,sysc-midle = <SYSC_IDLE_FORCE>,
1967                                         <SYSC_IDLE_NO>,
1968                                         <SYSC_IDLE_SMART>,
1969                                         <SYSC_IDLE_SMART_WKUP>;
1970                         ti,sysc-sidle = <SYSC_IDLE_FORCE>,
1971                                         <SYSC_IDLE_NO>,
1972                                         <SYSC_IDLE_SMART>,
1973                                         <SYSC_IDLE_SMART_WKUP>;
1974                         /* Domains (V, P, C): core, l3init_pwrdm, l3init_clkdm */
1975                         clocks = <&l3init_clkctrl OMAP5_MMC2_CLKCTRL 0>;
1976                         clock-names = "fck";
1977                         #address-cells = <1>;
1978                         #size-cells = <1>;
1979                         ranges = <0x0 0xb4000 0x1000>;
1980
1981                         mmc2: mmc@0 {
1982                                 compatible = "ti,omap4-hsmmc";
1983                                 reg = <0x0 0x400>;
1984                                 interrupts = <GIC_SPI 86 IRQ_TYPE_LEVEL_HIGH>;
1985                                 ti,needs-special-reset;
1986                                 dmas = <&sdma 47>, <&sdma 48>;
1987                                 dma-names = "tx", "rx";
1988                         };
1989                 };
1990
1991                 target-module@b8000 {                   /* 0x480b8000, ap 67 32.0 */
1992                         compatible = "ti,sysc-omap4", "ti,sysc";
1993                         reg = <0xb8000 0x4>,
1994                               <0xb8010 0x4>;
1995                         reg-names = "rev", "sysc";
1996                         ti,sysc-mask = <(SYSC_OMAP4_FREEEMU |
1997                                          SYSC_OMAP4_SOFTRESET)>;
1998                         ti,sysc-sidle = <SYSC_IDLE_FORCE>,
1999                                         <SYSC_IDLE_NO>,
2000                                         <SYSC_IDLE_SMART>,
2001                                         <SYSC_IDLE_SMART_WKUP>;
2002                         /* Domains (V, P, C): core, core_pwrdm, l4per_clkdm */
2003                         clocks = <&l4per_clkctrl OMAP5_MCSPI3_CLKCTRL 0>;
2004                         clock-names = "fck";
2005                         #address-cells = <1>;
2006                         #size-cells = <1>;
2007                         ranges = <0x0 0xb8000 0x1000>;
2008
2009                         mcspi3: spi@0 {
2010                                 compatible = "ti,omap4-mcspi";
2011                                 reg = <0x0 0x200>;
2012                                 interrupts = <GIC_SPI 91 IRQ_TYPE_LEVEL_HIGH>;
2013                                 #address-cells = <1>;
2014                                 #size-cells = <0>;
2015                                 ti,spi-num-cs = <2>;
2016                                 dmas = <&sdma 15>, <&sdma 16>;
2017                                 dma-names = "tx0", "rx0";
2018                         };
2019                 };
2020
2021                 target-module@ba000 {                   /* 0x480ba000, ap 69 18.0 */
2022                         compatible = "ti,sysc-omap4", "ti,sysc";
2023                         reg = <0xba000 0x4>,
2024                               <0xba010 0x4>;
2025                         reg-names = "rev", "sysc";
2026                         ti,sysc-mask = <(SYSC_OMAP4_FREEEMU |
2027                                          SYSC_OMAP4_SOFTRESET)>;
2028                         ti,sysc-sidle = <SYSC_IDLE_FORCE>,
2029                                         <SYSC_IDLE_NO>,
2030                                         <SYSC_IDLE_SMART>,
2031                                         <SYSC_IDLE_SMART_WKUP>;
2032                         /* Domains (V, P, C): core, core_pwrdm, l4per_clkdm */
2033                         clocks = <&l4per_clkctrl OMAP5_MCSPI4_CLKCTRL 0>;
2034                         clock-names = "fck";
2035                         #address-cells = <1>;
2036                         #size-cells = <1>;
2037                         ranges = <0x0 0xba000 0x1000>;
2038
2039                         mcspi4: spi@0 {
2040                                 compatible = "ti,omap4-mcspi";
2041                                 reg = <0x0 0x200>;
2042                                 interrupts = <GIC_SPI 48 IRQ_TYPE_LEVEL_HIGH>;
2043                                 #address-cells = <1>;
2044                                 #size-cells = <0>;
2045                                 ti,spi-num-cs = <1>;
2046                                 dmas = <&sdma 70>, <&sdma 71>;
2047                                 dma-names = "tx0", "rx0";
2048                         };
2049                 };
2050
2051                 target-module@d1000 {                   /* 0x480d1000, ap 71 28.0 */
2052                         compatible = "ti,sysc-omap4", "ti,sysc";
2053                         reg = <0xd1000 0x4>,
2054                               <0xd1010 0x4>;
2055                         reg-names = "rev", "sysc";
2056                         ti,sysc-mask = <(SYSC_OMAP4_FREEEMU |
2057                                          SYSC_OMAP4_SOFTRESET)>;
2058                         ti,sysc-midle = <SYSC_IDLE_FORCE>,
2059                                         <SYSC_IDLE_NO>,
2060                                         <SYSC_IDLE_SMART>,
2061                                         <SYSC_IDLE_SMART_WKUP>;
2062                         ti,sysc-sidle = <SYSC_IDLE_FORCE>,
2063                                         <SYSC_IDLE_NO>,
2064                                         <SYSC_IDLE_SMART>,
2065                                         <SYSC_IDLE_SMART_WKUP>;
2066                         /* Domains (V, P, C): core, core_pwrdm, l4per_clkdm */
2067                         clocks = <&l4per_clkctrl OMAP5_MMC4_CLKCTRL 0>;
2068                         clock-names = "fck";
2069                         #address-cells = <1>;
2070                         #size-cells = <1>;
2071                         ranges = <0x0 0xd1000 0x1000>;
2072
2073                         mmc4: mmc@0 {
2074                                 compatible = "ti,omap4-hsmmc";
2075                                 reg = <0x0 0x400>;
2076                                 interrupts = <GIC_SPI 96 IRQ_TYPE_LEVEL_HIGH>;
2077                                 ti,needs-special-reset;
2078                                 dmas = <&sdma 57>, <&sdma 58>;
2079                                 dma-names = "tx", "rx";
2080                         };
2081                 };
2082
2083                 target-module@d5000 {                   /* 0x480d5000, ap 73 30.0 */
2084                         compatible = "ti,sysc-omap4", "ti,sysc";
2085                         reg = <0xd5000 0x4>,
2086                               <0xd5010 0x4>;
2087                         reg-names = "rev", "sysc";
2088                         ti,sysc-mask = <(SYSC_OMAP4_FREEEMU |
2089                                          SYSC_OMAP4_SOFTRESET)>;
2090                         ti,sysc-midle = <SYSC_IDLE_FORCE>,
2091                                         <SYSC_IDLE_NO>,
2092                                         <SYSC_IDLE_SMART>,
2093                                         <SYSC_IDLE_SMART_WKUP>;
2094                         ti,sysc-sidle = <SYSC_IDLE_FORCE>,
2095                                         <SYSC_IDLE_NO>,
2096                                         <SYSC_IDLE_SMART>,
2097                                         <SYSC_IDLE_SMART_WKUP>;
2098                         /* Domains (V, P, C): core, core_pwrdm, l4per_clkdm */
2099                         clocks = <&l4per_clkctrl OMAP5_MMC5_CLKCTRL 0>;
2100                         clock-names = "fck";
2101                         #address-cells = <1>;
2102                         #size-cells = <1>;
2103                         ranges = <0x0 0xd5000 0x1000>;
2104
2105                         mmc5: mmc@0 {
2106                                 compatible = "ti,omap4-hsmmc";
2107                                 reg = <0x0 0x400>;
2108                                 interrupts = <GIC_SPI 59 IRQ_TYPE_LEVEL_HIGH>;
2109                                 ti,needs-special-reset;
2110                                 dmas = <&sdma 59>, <&sdma 60>;
2111                                 dma-names = "tx", "rx";
2112                         };
2113                 };
2114         };
2115
2116         segment@200000 {                                        /* 0x48200000 */
2117                 compatible = "simple-bus";
2118                 #address-cells = <1>;
2119                 #size-cells = <1>;
2120         };
2121 };
2122
2123 &l4_wkup {                                              /* 0x4ae00000 */
2124         compatible = "ti,omap5-l4-wkup", "simple-bus";
2125         reg = <0x4ae00000 0x800>,
2126               <0x4ae00800 0x800>,
2127               <0x4ae01000 0x1000>;
2128         reg-names = "ap", "la", "ia0";
2129         #address-cells = <1>;
2130         #size-cells = <1>;
2131         ranges = <0x00000000 0x4ae00000 0x010000>,      /* segment 0 */
2132                  <0x00010000 0x4ae10000 0x010000>,      /* segment 1 */
2133                  <0x00020000 0x4ae20000 0x010000>;      /* segment 2 */
2134
2135         segment@0 {                                     /* 0x4ae00000 */
2136                 compatible = "simple-bus";
2137                 #address-cells = <1>;
2138                 #size-cells = <1>;
2139                 ranges = <0x00000000 0x00000000 0x000800>,      /* ap 0 */
2140                          <0x00001000 0x00001000 0x001000>,      /* ap 1 */
2141                          <0x00000800 0x00000800 0x000800>,      /* ap 2 */
2142                          <0x00006000 0x00006000 0x002000>,      /* ap 3 */
2143                          <0x00008000 0x00008000 0x001000>,      /* ap 4 */
2144                          <0x0000a000 0x0000a000 0x001000>,      /* ap 15 */
2145                          <0x0000b000 0x0000b000 0x001000>,      /* ap 16 */
2146                          <0x00004000 0x00004000 0x001000>,      /* ap 17 */
2147                          <0x00005000 0x00005000 0x001000>,      /* ap 18 */
2148                          <0x0000c000 0x0000c000 0x001000>,      /* ap 19 */
2149                          <0x0000d000 0x0000d000 0x001000>;      /* ap 20 */
2150
2151                 target-module@4000 {                    /* 0x4ae04000, ap 17 20.0 */
2152                         compatible = "ti,sysc-omap2", "ti,sysc";
2153                         ti,hwmods = "counter_32k";
2154                         reg = <0x4000 0x4>,
2155                               <0x4010 0x4>;
2156                         reg-names = "rev", "sysc";
2157                         ti,sysc-sidle = <SYSC_IDLE_FORCE>,
2158                                         <SYSC_IDLE_NO>;
2159                         /* Domains (V, P, C): wkup, wkupaon_pwrdm, wkupaon_clkdm */
2160                         clocks = <&wkupaon_clkctrl OMAP5_COUNTER_32K_CLKCTRL 0>;
2161                         clock-names = "fck";
2162                         #address-cells = <1>;
2163                         #size-cells = <1>;
2164                         ranges = <0x0 0x4000 0x1000>;
2165
2166                         counter32k: counter@0 {
2167                                 compatible = "ti,omap-counter32k";
2168                                 reg = <0x0 0x40>;
2169                         };
2170                 };
2171
2172                 target-module@6000 {                    /* 0x4ae06000, ap 3 08.0 */
2173                         compatible = "ti,sysc-omap4", "ti,sysc";
2174                         reg = <0x6000 0x4>;
2175                         reg-names = "rev";
2176                         #address-cells = <1>;
2177                         #size-cells = <1>;
2178                         ranges = <0x0 0x6000 0x2000>;
2179
2180                         prm: prm@0 {
2181                                 compatible = "ti,omap5-prm", "simple-bus";
2182                                 reg = <0x0 0x2000>;
2183                                 interrupts = <GIC_SPI 11 IRQ_TYPE_LEVEL_HIGH>;
2184                                 #address-cells = <1>;
2185                                 #size-cells = <1>;
2186                                 ranges = <0 0 0x2000>;
2187
2188                                 prm_clocks: clocks {
2189                                         #address-cells = <1>;
2190                                         #size-cells = <0>;
2191                                 };
2192
2193                                 prm_clockdomains: clockdomains {
2194                                 };
2195                         };
2196                 };
2197
2198                 target-module@a000 {                    /* 0x4ae0a000, ap 15 2c.0 */
2199                         compatible = "ti,sysc-omap4", "ti,sysc";
2200                         reg = <0xa000 0x4>;
2201                         reg-names = "rev";
2202                         #address-cells = <1>;
2203                         #size-cells = <1>;
2204                         ranges = <0x0 0xa000 0x1000>;
2205
2206                         scrm: scrm@0 {
2207                                 compatible = "ti,omap5-scrm";
2208                                 reg = <0x0 0x1000>;
2209
2210                                 scrm_clocks: clocks {
2211                                         #address-cells = <1>;
2212                                         #size-cells = <0>;
2213                                 };
2214
2215                                 scrm_clockdomains: clockdomains {
2216                                 };
2217                         };
2218                 };
2219
2220                 target-module@c000 {                    /* 0x4ae0c000, ap 19 28.0 */
2221                         compatible = "ti,sysc-omap4", "ti,sysc";
2222                         reg = <0xc000 0x4>;
2223                         reg-names = "rev";
2224                         #address-cells = <1>;
2225                         #size-cells = <1>;
2226                         ranges = <0x0 0xc000 0x1000>;
2227
2228                         omap5_pmx_wkup: pinmux@840 {
2229                                 compatible = "ti,omap5-padconf",
2230                                              "pinctrl-single";
2231                                 reg = <0x840 0x003c>;
2232                                 #address-cells = <1>;
2233                                 #size-cells = <0>;
2234                                 #pinctrl-cells = <1>;
2235                                 #interrupt-cells = <1>;
2236                                 interrupt-controller;
2237                                 pinctrl-single,register-width = <16>;
2238                                 pinctrl-single,function-mask = <0x7fff>;
2239                         };
2240
2241                         omap5_scm_wkup_pad_conf: omap5_scm_wkup_pad_conf@da0 {
2242                                 compatible = "ti,omap5-scm-wkup-pad-conf",
2243                                              "simple-bus";
2244                                 reg = <0xda0 0x60>;
2245                                 #address-cells = <1>;
2246                                 #size-cells = <1>;
2247                                 ranges = <0 0 0x60>;
2248
2249                                 scm_wkup_pad_conf: scm_conf@0 {
2250                                         compatible = "syscon", "simple-bus";
2251                                         reg = <0x0 0x60>;
2252                                         #address-cells = <1>;
2253                                         #size-cells = <1>;
2254                                         ranges = <0 0x0 0x60>;
2255
2256                                         scm_wkup_pad_conf_clocks: clocks@0 {
2257                                                 #address-cells = <1>;
2258                                                 #size-cells = <0>;
2259                                         };
2260                                 };
2261                         };
2262                 };
2263         };
2264
2265         segment@10000 {                                 /* 0x4ae10000 */
2266                 compatible = "simple-bus";
2267                 #address-cells = <1>;
2268                 #size-cells = <1>;
2269                 ranges = <0x00000000 0x00010000 0x001000>,      /* ap 5 */
2270                          <0x00001000 0x00011000 0x001000>,      /* ap 6 */
2271                          <0x00004000 0x00014000 0x001000>,      /* ap 7 */
2272                          <0x00005000 0x00015000 0x001000>,      /* ap 8 */
2273                          <0x00008000 0x00018000 0x001000>,      /* ap 9 */
2274                          <0x00009000 0x00019000 0x001000>,      /* ap 10 */
2275                          <0x0000c000 0x0001c000 0x001000>,      /* ap 11 */
2276                          <0x0000d000 0x0001d000 0x001000>;      /* ap 12 */
2277
2278                 target-module@0 {                       /* 0x4ae10000, ap 5 10.0 */
2279                         compatible = "ti,sysc-omap2", "ti,sysc";
2280                         reg = <0x0 0x4>,
2281                               <0x10 0x4>,
2282                               <0x114 0x4>;
2283                         reg-names = "rev", "sysc", "syss";
2284                         ti,sysc-mask = <(SYSC_OMAP2_ENAWAKEUP |
2285                                          SYSC_OMAP2_SOFTRESET |
2286                                          SYSC_OMAP2_AUTOIDLE)>;
2287                         ti,sysc-sidle = <SYSC_IDLE_FORCE>,
2288                                         <SYSC_IDLE_NO>,
2289                                         <SYSC_IDLE_SMART>,
2290                                         <SYSC_IDLE_SMART_WKUP>;
2291                         ti,syss-mask = <1>;
2292                         /* Domains (V, P, C): wkup, wkupaon_pwrdm, wkupaon_clkdm */
2293                         clocks = <&wkupaon_clkctrl OMAP5_GPIO1_CLKCTRL 0>,
2294                                  <&wkupaon_clkctrl OMAP5_GPIO1_CLKCTRL 8>;
2295                         clock-names = "fck", "dbclk";
2296                         #address-cells = <1>;
2297                         #size-cells = <1>;
2298                         ranges = <0x0 0x0 0x1000>;
2299
2300                         gpio1: gpio@0 {
2301                                 compatible = "ti,omap4-gpio";
2302                                 reg = <0x0 0x200>;
2303                                 interrupts = <GIC_SPI 29 IRQ_TYPE_LEVEL_HIGH>;
2304                                 ti,gpio-always-on;
2305                                 gpio-controller;
2306                                 #gpio-cells = <2>;
2307                                 interrupt-controller;
2308                                 #interrupt-cells = <2>;
2309                         };
2310                 };
2311
2312                 target-module@4000 {                    /* 0x4ae14000, ap 7 14.0 */
2313                         compatible = "ti,sysc-omap2", "ti,sysc";
2314                         reg = <0x4000 0x4>,
2315                               <0x4010 0x4>,
2316                               <0x4014 0x4>;
2317                         reg-names = "rev", "sysc", "syss";
2318                         ti,sysc-mask = <(SYSC_OMAP2_EMUFREE |
2319                                          SYSC_OMAP2_SOFTRESET)>;
2320                         ti,sysc-sidle = <SYSC_IDLE_FORCE>,
2321                                         <SYSC_IDLE_NO>,
2322                                         <SYSC_IDLE_SMART>,
2323                                         <SYSC_IDLE_SMART_WKUP>;
2324                         ti,syss-mask = <1>;
2325                         /* Domains (V, P, C): wkup, wkupaon_pwrdm, wkupaon_clkdm */
2326                         clocks = <&wkupaon_clkctrl OMAP5_WD_TIMER2_CLKCTRL 0>;
2327                         clock-names = "fck";
2328                         #address-cells = <1>;
2329                         #size-cells = <1>;
2330                         ranges = <0x0 0x4000 0x1000>;
2331
2332                         wdt2: wdt@0 {
2333                                 compatible = "ti,omap5-wdt", "ti,omap3-wdt";
2334                                 reg = <0x0 0x80>;
2335                                 interrupts = <GIC_SPI 80 IRQ_TYPE_LEVEL_HIGH>;
2336                         };
2337                 };
2338
2339                 target-module@8000 {                    /* 0x4ae18000, ap 9 18.0 */
2340                         compatible = "ti,sysc-omap4-timer", "ti,sysc";
2341                         ti,hwmods = "timer1";
2342                         reg = <0x8000 0x4>,
2343                               <0x8010 0x4>;
2344                         reg-names = "rev", "sysc";
2345                         ti,sysc-mask = <(SYSC_OMAP4_FREEEMU |
2346                                          SYSC_OMAP4_SOFTRESET)>;
2347                         ti,sysc-sidle = <SYSC_IDLE_FORCE>,
2348                                         <SYSC_IDLE_NO>,
2349                                         <SYSC_IDLE_SMART>,
2350                                         <SYSC_IDLE_SMART_WKUP>;
2351                         /* Domains (V, P, C): wkup, wkupaon_pwrdm, wkupaon_clkdm */
2352                         clocks = <&wkupaon_clkctrl OMAP5_TIMER1_CLKCTRL 0>;
2353                         clock-names = "fck";
2354                         #address-cells = <1>;
2355                         #size-cells = <1>;
2356                         ranges = <0x0 0x8000 0x1000>;
2357
2358                         timer1: timer@0 {
2359                                 compatible = "ti,omap5430-timer";
2360                                 reg = <0x0 0x80>;
2361                                 clocks = <&wkupaon_clkctrl OMAP5_TIMER1_CLKCTRL 24>;
2362                                 clock-names = "fck";
2363                                 interrupts = <GIC_SPI 37 IRQ_TYPE_LEVEL_HIGH>;
2364                                 ti,timer-alwon;
2365                         };
2366                 };
2367
2368                 target-module@c000 {                    /* 0x4ae1c000, ap 11 1c.0 */
2369                         compatible = "ti,sysc-omap2", "ti,sysc";
2370                         reg = <0xc000 0x4>,
2371                               <0xc010 0x4>;
2372                         reg-names = "rev", "sysc";
2373                         ti,sysc-mask = <(SYSC_OMAP2_EMUFREE |
2374                                          SYSC_OMAP2_SOFTRESET)>;
2375                         ti,sysc-sidle = <SYSC_IDLE_FORCE>,
2376                                         <SYSC_IDLE_NO>,
2377                                         <SYSC_IDLE_SMART>;
2378                         /* Domains (V, P, C): wkup, wkupaon_pwrdm, wkupaon_clkdm */
2379                         clocks = <&wkupaon_clkctrl OMAP5_KBD_CLKCTRL 0>;
2380                         clock-names = "fck";
2381                         #address-cells = <1>;
2382                         #size-cells = <1>;
2383                         ranges = <0x0 0xc000 0x1000>;
2384
2385                         keypad: keypad@0 {
2386                                 compatible = "ti,omap4-keypad";
2387                                 reg = <0x0 0x400>;
2388                         };
2389                 };
2390         };
2391
2392         segment@20000 {                                 /* 0x4ae20000 */
2393                 compatible = "simple-bus";
2394                 #address-cells = <1>;
2395                 #size-cells = <1>;
2396                 ranges = <0x00006000 0x00026000 0x001000>,      /* ap 13 */
2397                          <0x0000a000 0x0002a000 0x001000>,      /* ap 14 */
2398                          <0x00000000 0x00020000 0x001000>,      /* ap 21 */
2399                          <0x00001000 0x00021000 0x001000>,      /* ap 22 */
2400                          <0x00002000 0x00022000 0x001000>,      /* ap 23 */
2401                          <0x00003000 0x00023000 0x001000>,      /* ap 24 */
2402                          <0x00007000 0x00027000 0x000400>,      /* ap 25 */
2403                          <0x00008000 0x00028000 0x000800>,      /* ap 26 */
2404                          <0x00009000 0x00029000 0x000100>,      /* ap 27 */
2405                          <0x00008800 0x00028800 0x000200>,      /* ap 28 */
2406                          <0x00008a00 0x00028a00 0x000100>;      /* ap 29 */
2407
2408                 target-module@0 {                       /* 0x4ae20000, ap 21 04.0 */
2409                         compatible = "ti,sysc";
2410                         status = "disabled";
2411                         #address-cells = <1>;
2412                         #size-cells = <1>;
2413                         ranges = <0x0 0x0 0x1000>;
2414                 };
2415
2416                 target-module@2000 {                    /* 0x4ae22000, ap 23 0c.0 */
2417                         compatible = "ti,sysc";
2418                         status = "disabled";
2419                         #address-cells = <1>;
2420                         #size-cells = <1>;
2421                         ranges = <0x0 0x2000 0x1000>;
2422                 };
2423
2424                 target-module@6000 {                    /* 0x4ae26000, ap 13 24.0 */
2425                         compatible = "ti,sysc";
2426                         status = "disabled";
2427                         #address-cells = <1>;
2428                         #size-cells = <1>;
2429                         ranges = <0x00000000 0x00006000 0x00001000>,
2430                                  <0x00001000 0x00007000 0x00000400>,
2431                                  <0x00002000 0x00008000 0x00000800>,
2432                                  <0x00002800 0x00008800 0x00000200>,
2433                                  <0x00002a00 0x00008a00 0x00000100>,
2434                                  <0x00003000 0x00009000 0x00000100>;
2435                 };
2436         };
2437 };
2438