arch/arm/boot/dts/omap5-l4.dtsi

   1 &l4_cfg {                                               /* 0x4a000000 */
   2         compatible = "ti,omap5-l4-cfg", "simple-bus";
   3         reg = <0x4a000000 0x800>,
   4               <0x4a000800 0x800>,
   5               <0x4a001000 0x1000>;
   6         reg-names = "ap", "la", "ia0";
   7         #address-cells = <1>;
   8         #size-cells = <1>;
   9         ranges = <0x00000000 0x4a000000 0x080000>,      /* segment 0 */
  10                  <0x00080000 0x4a080000 0x080000>,      /* segment 1 */
  11                  <0x00100000 0x4a100000 0x080000>,      /* segment 2 */
  12                  <0x00180000 0x4a180000 0x080000>,      /* segment 3 */
  13                  <0x00200000 0x4a200000 0x080000>,      /* segment 4 */
  14                  <0x00280000 0x4a280000 0x080000>,      /* segment 5 */
  15                  <0x00300000 0x4a300000 0x080000>;      /* segment 6 */
  16
  17         segment@0 {                                     /* 0x4a000000 */
  18                 compatible = "simple-bus";
  19                 #address-cells = <1>;
  20                 #size-cells = <1>;
  21                 ranges = <0x00000000 0x00000000 0x000800>,      /* ap 0 */
  22                          <0x00001000 0x00001000 0x001000>,      /* ap 1 */
  23                          <0x00000800 0x00000800 0x000800>,      /* ap 2 */
  24                          <0x00002000 0x00002000 0x001000>,      /* ap 3 */
  25                          <0x00003000 0x00003000 0x001000>,      /* ap 4 */
  26                          <0x00004000 0x00004000 0x001000>,      /* ap 5 */
  27                          <0x00005000 0x00005000 0x001000>,      /* ap 6 */
  28                          <0x00056000 0x00056000 0x001000>,      /* ap 7 */
  29                          <0x00057000 0x00057000 0x001000>,      /* ap 8 */
  30                          <0x0005c000 0x0005c000 0x001000>,      /* ap 9 */
  31                          <0x00058000 0x00058000 0x001000>,      /* ap 10 */
  32                          <0x00062000 0x00062000 0x001000>,      /* ap 11 */
  33                          <0x00063000 0x00063000 0x001000>,      /* ap 12 */
  34                          <0x00008000 0x00008000 0x002000>,      /* ap 21 */
  35                          <0x0000a000 0x0000a000 0x001000>,      /* ap 22 */
  36                          <0x00066000 0x00066000 0x001000>,      /* ap 23 */
  37                          <0x00067000 0x00067000 0x001000>,      /* ap 24 */
  38                          <0x0005e000 0x0005e000 0x002000>,      /* ap 69 */
  39                          <0x00060000 0x00060000 0x001000>,      /* ap 70 */
  40                          <0x00064000 0x00064000 0x001000>,      /* ap 71 */
  41                          <0x00065000 0x00065000 0x001000>,      /* ap 72 */
  42                          <0x0005a000 0x0005a000 0x001000>,      /* ap 77 */
  43                          <0x0005b000 0x0005b000 0x001000>,      /* ap 78 */
  44                          <0x00070000 0x00070000 0x004000>,      /* ap 79 */
  45                          <0x00074000 0x00074000 0x001000>,      /* ap 80 */
  46                          <0x00075000 0x00075000 0x001000>,      /* ap 81 */
  47                          <0x00076000 0x00076000 0x001000>,      /* ap 82 */
  48                          <0x00020000 0x00020000 0x020000>,      /* ap 109 */
  49                          <0x00040000 0x00040000 0x001000>,      /* ap 110 */
  50                          <0x00059000 0x00059000 0x001000>;      /* ap 111 */
  51
  52                 target-module@2000 {                    /* 0x4a002000, ap 3 44.0 */
  53                         compatible = "ti,sysc-omap4", "ti,sysc";
  54                         reg = <0x2000 0x4>;
  55                         reg-names = "rev";
  56                         #address-cells = <1>;
  57                         #size-cells = <1>;
  58                         ranges = <0x0 0x2000 0x1000>;
  59
  60                         scm_core: scm@0 {
  61                                 compatible = "ti,omap5-scm-core", "simple-bus";
  62                                 reg = <0x0 0x1000>;
  63                                 #address-cells = <1>;
  64                                 #size-cells = <1>;
  65                                 ranges = <0 0 0x800>;
  66
  67                                 scm_conf: scm_conf@0 {
  68                                         compatible = "syscon";
  69                                         reg = <0x0 0x800>;
  70                                         #address-cells = <1>;
  71                                         #size-cells = <1>;
  72                                 };
  73                         };
  74
  75                         scm_padconf_core: scm@800 {
  76                                 compatible = "ti,omap5-scm-padconf-core",
  77                                              "simple-bus";
  78                                 #address-cells = <1>;
  79                                 #size-cells = <1>;
  80                                 ranges = <0 0x800 0x800>;
  81
  82                                 omap5_pmx_core: pinmux@40 {
  83                                         compatible = "ti,omap5-padconf",
  84                                                      "pinctrl-single";
  85                                         reg = <0x40 0x01b6>;
  86                                         #address-cells = <1>;
  87                                         #size-cells = <0>;
  88                                         #pinctrl-cells = <1>;
  89                                         #interrupt-cells = <1>;
  90                                         interrupt-controller;
  91                                         pinctrl-single,register-width = <16>;
  92                                         pinctrl-single,function-mask = <0x7fff>;
  93                                 };
  94
  95                                 omap5_padconf_global: omap5_padconf_global@5a0 {
  96                                         compatible = "syscon",
  97                                                      "simple-bus";
  98                                         reg = <0x5a0 0xec>;
  99                                         #address-cells = <1>;
 100                                         #size-cells = <1>;
 101                                         ranges = <0 0x5a0 0xec>;
 102
 103                                         pbias_regulator: pbias_regulator@60 {
 104                                                 compatible = "ti,pbias-omap5", "ti,pbias-omap";
 105                                                 reg = <0x60 0x4>;
 106                                                 syscon = <&omap5_padconf_global>;
 107                                                 pbias_mmc_reg: pbias_mmc_omap5 {
 108                                                         regulator-name = "pbias_mmc_omap5";
 109                                                         regulator-min-microvolt = <1800000>;
 110                                                         regulator-max-microvolt = <3300000>;
 111                                                 };
 112                                         };
 113                                 };
 114                         };
 115                 };
 116
 117                 target-module@4000 {                    /* 0x4a004000, ap 5 5c.0 */
 118                         compatible = "ti,sysc-omap4", "ti,sysc";
 119                         reg = <0x4000 0x4>;
 120                         reg-names = "rev";
 121                         #address-cells = <1>;
 122                         #size-cells = <1>;
 123                         ranges = <0x0 0x4000 0x1000>;
 124
 125                         cm_core_aon: cm_core_aon@0 {
 126                                 compatible = "ti,omap5-cm-core-aon",
 127                                              "simple-bus";
 128                                 reg = <0x0 0x2000>;
 129                                 #address-cells = <1>;
 130                                 #size-cells = <1>;
 131                                 ranges = <0 0 0x1000>;
 132
 133                                 cm_core_aon_clocks: clocks {
 134                                         #address-cells = <1>;
 135                                         #size-cells = <0>;
 136                                 };
 137
 138                                 cm_core_aon_clockdomains: clockdomains {
 139                                 };
 140                         };
 141                 };
 142
 143                 target-module@8000 {                    /* 0x4a008000, ap 21 4c.0 */
 144                         compatible = "ti,sysc-omap4", "ti,sysc";
 145                         reg = <0x8000 0x4>;
 146                         reg-names = "rev";
 147                         #address-cells = <1>;
 148                         #size-cells = <1>;
 149                         ranges = <0x0 0x8000 0x2000>;
 150
 151                         cm_core: cm_core@0 {
 152                                 compatible = "ti,omap5-cm-core", "simple-bus";
 153                                 reg = <0x0 0x2000>;
 154                                 #address-cells = <1>;
 155                                 #size-cells = <1>;
 156                                 ranges = <0 0 0x2000>;
 157
 158                                 cm_core_clocks: clocks {
 159                                         #address-cells = <1>;
 160                                         #size-cells = <0>;
 161                                 };
 162
 163                                 cm_core_clockdomains: clockdomains {
 164                                 };
 165                         };
 166                 };
 167
 168                 target-module@20000 {                   /* 0x4a020000, ap 109 08.0 */
 169                         compatible = "ti,sysc-omap4", "ti,sysc";
 170                         ti,hwmods = "usb_otg_ss";
 171                         reg = <0x20000 0x4>,
 172                               <0x20010 0x4>;
 173                         reg-names = "rev", "sysc";
 174                         ti,sysc-mask = <SYSC_OMAP4_DMADISABLE>;
 175                         ti,sysc-midle = <SYSC_IDLE_FORCE>,
 176                                         <SYSC_IDLE_NO>,
 177                                         <SYSC_IDLE_SMART>,
 178                                         <SYSC_IDLE_SMART_WKUP>;
 179                         ti,sysc-sidle = <SYSC_IDLE_FORCE>,
 180                                         <SYSC_IDLE_NO>,
 181                                         <SYSC_IDLE_SMART>,
 182                                         <SYSC_IDLE_SMART_WKUP>;
 183                         /* Domains (V, P, C): core, l3init_pwrdm, l3init_clkdm */
 184                         clocks = <&l3init_clkctrl OMAP5_USB_OTG_SS_CLKCTRL 0>;
 185                         clock-names = "fck";
 186                         #address-cells = <1>;
 187                         #size-cells = <1>;
 188                         ranges = <0x0 0x20000 0x20000>;
 189
 190                         usb3: omap_dwc3@0 {
 191                                 compatible = "ti,dwc3";
 192                                 reg = <0x0 0x10000>;
 193                                 interrupts = <GIC_SPI 93 IRQ_TYPE_LEVEL_HIGH>;
 194                                 #address-cells = <1>;
 195                                 #size-cells = <1>;
 196                                 utmi-mode = <2>;
 197                                 ranges = <0 0 0x20000>;
 198                                 dwc3: dwc3@10000 {
 199                                         compatible = "snps,dwc3";
 200                                         reg = <0x10000 0x10000>;
 201                                         interrupts = <GIC_SPI 92 IRQ_TYPE_LEVEL_HIGH>,
 202                                                      <GIC_SPI 92 IRQ_TYPE_LEVEL_HIGH>,
 203                                                      <GIC_SPI 93 IRQ_TYPE_LEVEL_HIGH>;
 204                                         interrupt-names = "peripheral",
 205                                                           "host",
 206                                                           "otg";
 207                                         phys = <&usb2_phy>, <&usb3_phy>;
 208                                         phy-names = "usb2-phy", "usb3-phy";
 209                                         dr_mode = "peripheral";
 210                                 };
 211                         };
 212                 };
 213
 214                 target-module@56000 {                   /* 0x4a056000, ap 7 02.0 */
 215                         compatible = "ti,sysc-omap2", "ti,sysc";
 216                         reg = <0x56000 0x4>,
 217                               <0x5602c 0x4>,
 218                               <0x56028 0x4>;
 219                         reg-names = "rev", "sysc", "syss";
 220                         ti,sysc-mask = <(SYSC_OMAP2_CLOCKACTIVITY |
 221                                          SYSC_OMAP2_EMUFREE |
 222                                          SYSC_OMAP2_SOFTRESET |
 223                                          SYSC_OMAP2_AUTOIDLE)>;
 224                         ti,sysc-midle = <SYSC_IDLE_FORCE>,
 225                                         <SYSC_IDLE_NO>,
 226                                         <SYSC_IDLE_SMART>;
 227                         ti,sysc-sidle = <SYSC_IDLE_FORCE>,
 228                                         <SYSC_IDLE_NO>,
 229                                         <SYSC_IDLE_SMART>;
 230                         ti,syss-mask = <1>;
 231                         /* Domains (V, P, C): core, core_pwrdm, dma_clkdm */
 232                         clocks = <&dma_clkctrl OMAP5_DMA_SYSTEM_CLKCTRL 0>;
 233                         clock-names = "fck";
 234                         #address-cells = <1>;
 235                         #size-cells = <1>;
 236                         ranges = <0x0 0x56000 0x1000>;
 237
 238                         sdma: dma-controller@0 {
 239                                 compatible = "ti,omap4430-sdma", "ti,omap-sdma";
 240                                 reg = <0x0 0x1000>;
 241                                 interrupts = <GIC_SPI 12 IRQ_TYPE_LEVEL_HIGH>,
 242                                              <GIC_SPI 13 IRQ_TYPE_LEVEL_HIGH>,
 243                                              <GIC_SPI 14 IRQ_TYPE_LEVEL_HIGH>,
 244                                              <GIC_SPI 15 IRQ_TYPE_LEVEL_HIGH>;
 245                                 #dma-cells = <1>;
 246                                 dma-channels = <32>;
 247                                 dma-requests = <127>;
 248                         };
 249                 };
 250
 251                 target-module@58000 {                   /* 0x4a058000, ap 10 06.0 */
 252                         compatible = "ti,sysc";
 253                         status = "disabled";
 254                         #address-cells = <1>;
 255                         #size-cells = <1>;
 256                         ranges = <0x00000000 0x00058000 0x00001000>,
 257                                  <0x00001000 0x00059000 0x00001000>,
 258                                  <0x00002000 0x0005a000 0x00001000>,
 259                                  <0x00003000 0x0005b000 0x00001000>;
 260                 };
 261
 262                 target-module@5e000 {                   /* 0x4a05e000, ap 69 2a.0 */
 263                         compatible = "ti,sysc";
 264                         status = "disabled";
 265                         #address-cells = <1>;
 266                         #size-cells = <1>;
 267                         ranges = <0x0 0x5e000 0x2000>;
 268                 };
 269
 270                 target-module@62000 {                   /* 0x4a062000, ap 11 0e.0 */
 271                         compatible = "ti,sysc-omap2", "ti,sysc";
 272                         ti,hwmods = "usb_tll_hs";
 273                         reg = <0x62000 0x4>,
 274                               <0x62010 0x4>,
 275                               <0x62014 0x4>;
 276                         reg-names = "rev", "sysc", "syss";
 277                         ti,sysc-mask = <(SYSC_OMAP2_CLOCKACTIVITY |
 278                                          SYSC_OMAP2_ENAWAKEUP |
 279                                          SYSC_OMAP2_SOFTRESET |
 280                                          SYSC_OMAP2_AUTOIDLE)>;
 281                         ti,sysc-sidle = <SYSC_IDLE_FORCE>,
 282                                         <SYSC_IDLE_NO>,
 283                                         <SYSC_IDLE_SMART>;
 284                         ti,syss-mask = <1>;
 285                         /* Domains (V, P, C): core, l3init_pwrdm, l3init_clkdm */
 286                         clocks = <&l3init_clkctrl OMAP5_USB_TLL_HS_CLKCTRL 0>;
 287                         clock-names = "fck";
 288                         #address-cells = <1>;
 289                         #size-cells = <1>;
 290                         ranges = <0x0 0x62000 0x1000>;
 291
 292                         usbhstll: usbhstll@0 {
 293                                 compatible = "ti,usbhs-tll";
 294                                 reg = <0x0 0x1000>;
 295                                 interrupts = <GIC_SPI 78 IRQ_TYPE_LEVEL_HIGH>;
 296                         };
 297                 };
 298
 299                 target-module@64000 {                   /* 0x4a064000, ap 71 1e.0 */
 300                         compatible = "ti,sysc-omap4", "ti,sysc";
 301                         ti,hwmods = "usb_host_hs";
 302                         reg = <0x64000 0x4>,
 303                               <0x64010 0x4>;
 304                         reg-names = "rev", "sysc";
 305                         ti,sysc-mask = <SYSC_OMAP4_SOFTRESET>;
 306                         ti,sysc-midle = <SYSC_IDLE_FORCE>,
 307                                         <SYSC_IDLE_NO>,
 308                                         <SYSC_IDLE_SMART>,
 309                                         <SYSC_IDLE_SMART_WKUP>;
 310                         ti,sysc-sidle = <SYSC_IDLE_FORCE>,
 311                                         <SYSC_IDLE_NO>,
 312                                         <SYSC_IDLE_SMART>,
 313                                         <SYSC_IDLE_SMART_WKUP>;
 314                         /* Domains (V, P, C): core, l3init_pwrdm, l3init_clkdm */
 315                         clocks = <&l3init_clkctrl OMAP5_USB_HOST_HS_CLKCTRL 0>;
 316                         clock-names = "fck";
 317                         #address-cells = <1>;
 318                         #size-cells = <1>;
 319                         ranges = <0x0 0x64000 0x1000>;
 320
 321                         usbhshost: usbhshost@0 {
 322                                 compatible = "ti,usbhs-host";
 323                                 reg = <0x0 0x800>;
 324                                 #address-cells = <1>;
 325                                 #size-cells = <1>;
 326                                 ranges = <0 0 0x1000>;
 327                                 clocks = <&l3init_60m_fclk>,
 328                                          <&xclk60mhsp1_ck>,
 329                                          <&xclk60mhsp2_ck>;
 330                                 clock-names = "refclk_60m_int",
 331                                               "refclk_60m_ext_p1",
 332                                               "refclk_60m_ext_p2";
 333
 334                                 usbhsohci: ohci@800 {
 335                                         compatible = "ti,ohci-omap3";
 336                                         reg = <0x800 0x400>;
 337                                         interrupts = <GIC_SPI 76 IRQ_TYPE_LEVEL_HIGH>;
 338                                         remote-wakeup-connected;
 339                                 };
 340
 341                                 usbhsehci: ehci@c00 {
 342                                         compatible = "ti,ehci-omap";
 343                                         reg = <0xc00 0x400>;
 344                                         interrupts = <GIC_SPI 77 IRQ_TYPE_LEVEL_HIGH>;
 345                                 };
 346                         };
 347                 };
 348
 349                 target-module@66000 {                   /* 0x4a066000, ap 23 0a.0 */
 350                         compatible = "ti,sysc-omap2", "ti,sysc";
 351                         reg = <0x66000 0x4>,
 352                               <0x66010 0x4>,
 353                               <0x66014 0x4>;
 354                         reg-names = "rev", "sysc", "syss";
 355                         ti,sysc-mask = <(SYSC_OMAP2_CLOCKACTIVITY |
 356                                          SYSC_OMAP2_SOFTRESET |
 357                                          SYSC_OMAP2_AUTOIDLE)>;
 358                         ti,sysc-sidle = <SYSC_IDLE_FORCE>,
 359                                         <SYSC_IDLE_NO>,
 360                                         <SYSC_IDLE_SMART>;
 361                         ti,syss-mask = <1>;
 362                         /* Domains (V, P, C): mm, dsp_pwrdm, dsp_clkdm */
 363                         clocks = <&dsp_clkctrl OMAP5_MMU_DSP_CLKCTRL 0>;
 364                         clock-names = "fck";
 365                         resets = <&prm_dsp 1>;
 366                         reset-names = "rstctrl";
 367                         #address-cells = <1>;
 368                         #size-cells = <1>;
 369                         ranges = <0x0 0x66000 0x1000>;
 370
 371                         mmu_dsp: mmu@0 {
 372                                 compatible = "ti,omap4-iommu";
 373                                 reg = <0x0 0x100>;
 374                                 interrupts = <GIC_SPI 28 IRQ_TYPE_LEVEL_HIGH>;
 375                                 #iommu-cells = <0>;
 376                         };
 377                 };
 378
 379                 target-module@70000 {                   /* 0x4a070000, ap 79 2e.0 */
 380                         compatible = "ti,sysc";
 381                         status = "disabled";
 382                         #address-cells = <1>;
 383                         #size-cells = <1>;
 384                         ranges = <0x0 0x70000 0x4000>;
 385                 };
 386
 387                 target-module@75000 {                   /* 0x4a075000, ap 81 32.0 */
 388                         compatible = "ti,sysc";
 389                         status = "disabled";
 390                         #address-cells = <1>;
 391                         #size-cells = <1>;
 392                         ranges = <0x0 0x75000 0x1000>;
 393                 };
 394         };
 395
 396         segment@80000 {                                 /* 0x4a080000 */
 397                 compatible = "simple-bus";
 398                 #address-cells = <1>;
 399                 #size-cells = <1>;
 400                 ranges = <0x00059000 0x000d9000 0x001000>,      /* ap 13 */
 401                          <0x0005a000 0x000da000 0x001000>,      /* ap 14 */
 402                          <0x0005b000 0x000db000 0x001000>,      /* ap 15 */
 403                          <0x0005c000 0x000dc000 0x001000>,      /* ap 16 */
 404                          <0x0005d000 0x000dd000 0x001000>,      /* ap 17 */
 405                          <0x0005e000 0x000de000 0x001000>,      /* ap 18 */
 406                          <0x00060000 0x000e0000 0x001000>,      /* ap 19 */
 407                          <0x00061000 0x000e1000 0x001000>,      /* ap 20 */
 408                          <0x00074000 0x000f4000 0x001000>,      /* ap 25 */
 409                          <0x00075000 0x000f5000 0x001000>,      /* ap 26 */
 410                          <0x00076000 0x000f6000 0x001000>,      /* ap 27 */
 411                          <0x00077000 0x000f7000 0x001000>,      /* ap 28 */
 412                          <0x00036000 0x000b6000 0x001000>,      /* ap 65 */
 413                          <0x00037000 0x000b7000 0x001000>,      /* ap 66 */
 414                          <0x0004d000 0x000cd000 0x001000>,      /* ap 67 */
 415                          <0x0004e000 0x000ce000 0x001000>,      /* ap 68 */
 416                          <0x00000000 0x00080000 0x004000>,      /* ap 83 */
 417                          <0x00004000 0x00084000 0x001000>,      /* ap 84 */
 418                          <0x00005000 0x00085000 0x001000>,      /* ap 85 */
 419                          <0x00006000 0x00086000 0x001000>,      /* ap 86 */
 420                          <0x00007000 0x00087000 0x001000>,      /* ap 87 */
 421                          <0x00008000 0x00088000 0x001000>,      /* ap 88 */
 422                          <0x00010000 0x00090000 0x004000>,      /* ap 89 */
 423                          <0x00014000 0x00094000 0x001000>,      /* ap 90 */
 424                          <0x00015000 0x00095000 0x001000>,      /* ap 91 */
 425                          <0x00016000 0x00096000 0x001000>,      /* ap 92 */
 426                          <0x00017000 0x00097000 0x001000>,      /* ap 93 */
 427                          <0x00018000 0x00098000 0x001000>,      /* ap 94 */
 428                          <0x00020000 0x000a0000 0x004000>,      /* ap 95 */
 429                          <0x00024000 0x000a4000 0x001000>,      /* ap 96 */
 430                          <0x00025000 0x000a5000 0x001000>,      /* ap 97 */
 431                          <0x00026000 0x000a6000 0x001000>,      /* ap 98 */
 432                          <0x00027000 0x000a7000 0x001000>,      /* ap 99 */
 433                          <0x00028000 0x000a8000 0x001000>;      /* ap 100 */
 434
 435                 target-module@0 {                       /* 0x4a080000, ap 83 28.0 */
 436                         compatible = "ti,sysc-omap2", "ti,sysc";
 437                         reg = <0x0 0x4>,
 438                               <0x10 0x4>,
 439                               <0x14 0x4>;
 440                         reg-names = "rev", "sysc", "syss";
 441                         ti,sysc-mask = <(SYSC_OMAP2_SOFTRESET |
 442                                          SYSC_OMAP2_AUTOIDLE)>;
 443                         ti,sysc-sidle = <SYSC_IDLE_FORCE>,
 444                                         <SYSC_IDLE_NO>,
 445                                         <SYSC_IDLE_SMART>;
 446                         ti,syss-mask = <1>;
 447                         /* Domains (V, P, C): core, l3init_pwrdm, l3init_clkdm */
 448                         clocks = <&l3init_clkctrl OMAP5_OCP2SCP1_CLKCTRL 0>;
 449                         clock-names = "fck";
 450                         #address-cells = <1>;
 451                         #size-cells = <1>;
 452                         ranges = <0x00000000 0x00000000 0x00004000>,
 453                                  <0x00004000 0x00004000 0x00001000>,
 454                                  <0x00005000 0x00005000 0x00001000>,
 455                                  <0x00006000 0x00006000 0x00001000>,
 456                                  <0x00007000 0x00007000 0x00001000>;
 457
 458                         ocp2scp@0 {
 459                                 compatible = "ti,omap-ocp2scp";
 460                                 #address-cells = <1>;
 461                                 #size-cells = <1>;
 462                                 reg = <0 0x20>;
 463                         };
 464
 465                         usb2_phy: usb2phy@4000 {
 466                                 compatible = "ti,omap-usb2";
 467                                 reg = <0x4000 0x7c>;
 468                                 syscon-phy-power = <&scm_conf 0x300>;
 469                                 clocks = <&usb_phy_cm_clk32k>,
 470                                 <&l3init_clkctrl OMAP5_USB_OTG_SS_CLKCTRL 8>;
 471                                 clock-names = "wkupclk", "refclk";
 472                                 #phy-cells = <0>;
 473                         };
 474
 475                         usb3_phy: usb3phy@4400 {
 476                                 compatible = "ti,omap-usb3";
 477                                 reg = <0x4400 0x80>,
 478                                 <0x4800 0x64>,
 479                                 <0x4c00 0x40>;
 480                                 reg-names = "phy_rx", "phy_tx", "pll_ctrl";
 481                                 syscon-phy-power = <&scm_conf 0x370>;
 482                                 clocks = <&usb_phy_cm_clk32k>,
 483                                 <&sys_clkin>,
 484                                 <&l3init_clkctrl OMAP5_USB_OTG_SS_CLKCTRL 8>;
 485                                 clock-names =   "wkupclk",
 486                                 "sysclk",
 487                                 "refclk";
 488                                 #phy-cells = <0>;
 489                         };
 490                 };
 491
 492                 target-module@10000 {                   /* 0x4a090000, ap 89 36.0 */
 493                         compatible = "ti,sysc-omap2", "ti,sysc";
 494                         reg = <0x10000 0x4>,
 495                               <0x10010 0x4>,
 496                               <0x10014 0x4>;
 497                         reg-names = "rev", "sysc", "syss";
 498                         ti,sysc-mask = <(SYSC_OMAP2_SOFTRESET |
 499                                          SYSC_OMAP2_AUTOIDLE)>;
 500                         ti,sysc-sidle = <SYSC_IDLE_FORCE>,
 501                                         <SYSC_IDLE_NO>,
 502                                         <SYSC_IDLE_SMART>;
 503                         ti,syss-mask = <1>;
 504                         /* Domains (V, P, C): core, l3init_pwrdm, l3init_clkdm */
 505                         clocks = <&l3init_clkctrl OMAP5_OCP2SCP3_CLKCTRL 0>;
 506                         clock-names = "fck";
 507                         #address-cells = <1>;
 508                         #size-cells = <1>;
 509                         ranges = <0x00000000 0x00010000 0x00004000>,
 510                                  <0x00004000 0x00014000 0x00001000>,
 511                                  <0x00005000 0x00015000 0x00001000>,
 512                                  <0x00006000 0x00016000 0x00001000>,
 513                                  <0x00007000 0x00017000 0x00001000>;
 514
 515                                 ocp2scp@0 {
 516                                         compatible = "ti,omap-ocp2scp";
 517                                         #address-cells = <1>;
 518                                         #size-cells = <1>;
 519                                         reg = <0x0 0x20>;
 520                                 };
 521
 522                                 sata_phy: phy@6000 {
 523                                         compatible = "ti,phy-pipe3-sata";
 524                                         reg = <0x6000 0x80>, /* phy_rx */
 525                                               <0x6400 0x64>, /* phy_tx */
 526                                               <0x6800 0x40>; /* pll_ctrl */
 527                                         reg-names = "phy_rx", "phy_tx", "pll_ctrl";
 528                                         syscon-phy-power = <&scm_conf 0x374>;
 529                                         clocks = <&sys_clkin>,
 530                                                  <&l3init_clkctrl OMAP5_SATA_CLKCTRL 8>;
 531                                         clock-names = "sysclk", "refclk";
 532                                         #phy-cells = <0>;
 533                                 };
 534                 };
 535
 536                 target-module@20000 {                   /* 0x4a0a0000, ap 95 50.0 */
 537                         compatible = "ti,sysc";
 538                         status = "disabled";
 539                         #address-cells = <1>;
 540                         #size-cells = <1>;
 541                         ranges = <0x00000000 0x00020000 0x00004000>,
 542                                  <0x00004000 0x00024000 0x00001000>,
 543                                  <0x00005000 0x00025000 0x00001000>,
 544                                  <0x00006000 0x00026000 0x00001000>,
 545                                  <0x00007000 0x00027000 0x00001000>;
 546                 };
 547
 548                 target-module@36000 {                   /* 0x4a0b6000, ap 65 6c.0 */
 549                         compatible = "ti,sysc";
 550                         status = "disabled";
 551                         #address-cells = <1>;
 552                         #size-cells = <1>;
 553                         ranges = <0x0 0x36000 0x1000>;
 554                 };
 555
 556                 target-module@4d000 {                   /* 0x4a0cd000, ap 67 64.0 */
 557                         compatible = "ti,sysc";
 558                         status = "disabled";
 559                         #address-cells = <1>;
 560                         #size-cells = <1>;
 561                         ranges = <0x0 0x4d000 0x1000>;
 562                 };
 563
 564                 target-module@59000 {                   /* 0x4a0d9000, ap 13 20.0 */
 565                         compatible = "ti,sysc";
 566                         status = "disabled";
 567                         #address-cells = <1>;
 568                         #size-cells = <1>;
 569                         ranges = <0x0 0x59000 0x1000>;
 570                 };
 571
 572                 target-module@5b000 {                   /* 0x4a0db000, ap 15 10.0 */
 573                         compatible = "ti,sysc";
 574                         status = "disabled";
 575                         #address-cells = <1>;
 576                         #size-cells = <1>;
 577                         ranges = <0x0 0x5b000 0x1000>;
 578                 };
 579
 580                 target-module@5d000 {                   /* 0x4a0dd000, ap 17 18.0 */
 581                         compatible = "ti,sysc";
 582                         status = "disabled";
 583                         #address-cells = <1>;
 584                         #size-cells = <1>;
 585                         ranges = <0x0 0x5d000 0x1000>;
 586                 };
 587
 588                 target-module@60000 {                   /* 0x4a0e0000, ap 19 54.0 */
 589                         compatible = "ti,sysc";
 590                         status = "disabled";
 591                         #address-cells = <1>;
 592                         #size-cells = <1>;
 593                         ranges = <0x0 0x60000 0x1000>;
 594                 };
 595
 596                 target-module@74000 {                   /* 0x4a0f4000, ap 25 04.0 */
 597                         compatible = "ti,sysc-omap4", "ti,sysc";
 598                         reg = <0x74000 0x4>,
 599                               <0x74010 0x4>;
 600                         reg-names = "rev", "sysc";
 601                         ti,sysc-mask = <SYSC_OMAP4_SOFTRESET>;
 602                         ti,sysc-sidle = <SYSC_IDLE_FORCE>,
 603                                         <SYSC_IDLE_NO>,
 604                                         <SYSC_IDLE_SMART>;
 605                         /* Domains (V, P, C): core, core_pwrdm, l4cfg_clkdm */
 606                         clocks = <&l4cfg_clkctrl OMAP5_MAILBOX_CLKCTRL 0>;
 607                         clock-names = "fck";
 608                         #address-cells = <1>;
 609                         #size-cells = <1>;
 610                         ranges = <0x0 0x74000 0x1000>;
 611
 612                         mailbox: mailbox@0 {
 613                                 compatible = "ti,omap4-mailbox";
 614                                 reg = <0x0 0x200>;
 615                                 interrupts = <GIC_SPI 26 IRQ_TYPE_LEVEL_HIGH>;
 616                                 #mbox-cells = <1>;
 617                                 ti,mbox-num-users = <3>;
 618                                 ti,mbox-num-fifos = <8>;
 619                                 mbox_ipu: mbox_ipu {
 620                                         ti,mbox-tx = <0 0 0>;
 621                                         ti,mbox-rx = <1 0 0>;
 622                                 };
 623                                 mbox_dsp: mbox_dsp {
 624                                         ti,mbox-tx = <3 0 0>;
 625                                         ti,mbox-rx = <2 0 0>;
 626                                 };
 627                         };
 628                 };
 629
 630                 target-module@76000 {                   /* 0x4a0f6000, ap 27 0c.0 */
 631                         compatible = "ti,sysc-omap2", "ti,sysc";
 632                         reg = <0x76000 0x4>,
 633                               <0x76010 0x4>,
 634                               <0x76014 0x4>;
 635                         reg-names = "rev", "sysc", "syss";
 636                         ti,sysc-mask = <(SYSC_OMAP2_CLOCKACTIVITY |
 637                                          SYSC_OMAP2_ENAWAKEUP |
 638                                          SYSC_OMAP2_SOFTRESET |
 639                                          SYSC_OMAP2_AUTOIDLE)>;
 640                         ti,sysc-sidle = <SYSC_IDLE_FORCE>,
 641                                         <SYSC_IDLE_NO>,
 642                                         <SYSC_IDLE_SMART>;
 643                         ti,syss-mask = <1>;
 644                         /* Domains (V, P, C): core, core_pwrdm, l4cfg_clkdm */
 645                         clocks = <&l4cfg_clkctrl OMAP5_SPINLOCK_CLKCTRL 0>;
 646                         clock-names = "fck";
 647                         #address-cells = <1>;
 648                         #size-cells = <1>;
 649                         ranges = <0x0 0x76000 0x1000>;
 650
 651                         hwspinlock: spinlock@0 {
 652                                 compatible = "ti,omap4-hwspinlock";
 653                                 reg = <0x0 0x1000>;
 654                                 #hwlock-cells = <1>;
 655                         };
 656                 };
 657         };
 658
 659         segment@100000 {                                        /* 0x4a100000 */
 660                 compatible = "simple-bus";
 661                 #address-cells = <1>;
 662                 #size-cells = <1>;
 663                 ranges = <0x00002000 0x00102000 0x001000>,      /* ap 59 */
 664                          <0x00003000 0x00103000 0x001000>,      /* ap 60 */
 665                          <0x00008000 0x00108000 0x001000>,      /* ap 61 */
 666                          <0x00009000 0x00109000 0x001000>,      /* ap 62 */
 667                          <0x0000a000 0x0010a000 0x001000>,      /* ap 63 */
 668                          <0x0000b000 0x0010b000 0x001000>,      /* ap 64 */
 669                          <0x00040000 0x00140000 0x010000>,      /* ap 101 */
 670                          <0x00050000 0x00150000 0x001000>;      /* ap 102 */
 671
 672                 target-module@2000 {                    /* 0x4a102000, ap 59 2c.0 */
 673                         compatible = "ti,sysc";
 674                         status = "disabled";
 675                         #address-cells = <1>;
 676                         #size-cells = <1>;
 677                         ranges = <0x0 0x2000 0x1000>;
 678                 };
 679
 680                 target-module@8000 {                    /* 0x4a108000, ap 61 26.0 */
 681                         compatible = "ti,sysc";
 682                         status = "disabled";
 683                         #address-cells = <1>;
 684                         #size-cells = <1>;
 685                         ranges = <0x0 0x8000 0x1000>;
 686                 };
 687
 688                 target-module@a000 {                    /* 0x4a10a000, ap 63 22.0 */
 689                         compatible = "ti,sysc";
 690                         status = "disabled";
 691                         #address-cells = <1>;
 692                         #size-cells = <1>;
 693                         ranges = <0x0 0xa000 0x1000>;
 694                 };
 695
 696                 target-module@40000 {                   /* 0x4a140000, ap 101 16.0 */
 697                         compatible = "ti,sysc";
 698                         status = "disabled";
 699                         #address-cells = <1>;
 700                         #size-cells = <1>;
 701                         ranges = <0x0 0x40000 0x10000>;
 702                 };
 703         };
 704
 705         segment@180000 {                                        /* 0x4a180000 */
 706                 compatible = "simple-bus";
 707                 #address-cells = <1>;
 708                 #size-cells = <1>;
 709         };
 710
 711         segment@200000 {                                        /* 0x4a200000 */
 712                 compatible = "simple-bus";
 713                 #address-cells = <1>;
 714                 #size-cells = <1>;
 715                 ranges = <0x0001e000 0x0021e000 0x001000>,      /* ap 29 */
 716                          <0x0001f000 0x0021f000 0x001000>,      /* ap 30 */
 717                          <0x0000a000 0x0020a000 0x001000>,      /* ap 31 */
 718                          <0x0000b000 0x0020b000 0x001000>,      /* ap 32 */
 719                          <0x00006000 0x00206000 0x001000>,      /* ap 33 */
 720                          <0x00007000 0x00207000 0x001000>,      /* ap 34 */
 721                          <0x00004000 0x00204000 0x001000>,      /* ap 35 */
 722                          <0x00005000 0x00205000 0x001000>,      /* ap 36 */
 723                          <0x00012000 0x00212000 0x001000>,      /* ap 37 */
 724                          <0x00013000 0x00213000 0x001000>,      /* ap 38 */
 725                          <0x0000c000 0x0020c000 0x001000>,      /* ap 39 */
 726                          <0x0000d000 0x0020d000 0x001000>,      /* ap 40 */
 727                          <0x00010000 0x00210000 0x001000>,      /* ap 41 */
 728                          <0x00011000 0x00211000 0x001000>,      /* ap 42 */
 729                          <0x00016000 0x00216000 0x001000>,      /* ap 43 */
 730                          <0x00017000 0x00217000 0x001000>,      /* ap 44 */
 731                          <0x00014000 0x00214000 0x001000>,      /* ap 45 */
 732                          <0x00015000 0x00215000 0x001000>,      /* ap 46 */
 733                          <0x00018000 0x00218000 0x001000>,      /* ap 47 */
 734                          <0x00019000 0x00219000 0x001000>,      /* ap 48 */
 735                          <0x00020000 0x00220000 0x001000>,      /* ap 49 */
 736                          <0x00021000 0x00221000 0x001000>,      /* ap 50 */
 737                          <0x00026000 0x00226000 0x001000>,      /* ap 51 */
 738                          <0x00027000 0x00227000 0x001000>,      /* ap 52 */
 739                          <0x00028000 0x00228000 0x001000>,      /* ap 53 */
 740                          <0x00029000 0x00229000 0x001000>,      /* ap 54 */
 741                          <0x0002a000 0x0022a000 0x001000>,      /* ap 55 */
 742                          <0x0002b000 0x0022b000 0x001000>,      /* ap 56 */
 743                          <0x0001c000 0x0021c000 0x001000>,      /* ap 57 */
 744                          <0x0001d000 0x0021d000 0x001000>,      /* ap 58 */
 745                          <0x0001a000 0x0021a000 0x001000>,      /* ap 73 */
 746                          <0x0001b000 0x0021b000 0x001000>,      /* ap 74 */
 747                          <0x00024000 0x00224000 0x001000>,      /* ap 75 */
 748                          <0x00025000 0x00225000 0x001000>,      /* ap 76 */
 749                          <0x00002000 0x00202000 0x001000>,      /* ap 103 */
 750                          <0x00003000 0x00203000 0x001000>,      /* ap 104 */
 751                          <0x00008000 0x00208000 0x001000>,      /* ap 105 */
 752                          <0x00009000 0x00209000 0x001000>,      /* ap 106 */
 753                          <0x00022000 0x00222000 0x001000>,      /* ap 107 */
 754                          <0x00023000 0x00223000 0x001000>;      /* ap 108 */
 755
 756                 target-module@2000 {                    /* 0x4a202000, ap 103 3c.0 */
 757                         compatible = "ti,sysc";
 758                         status = "disabled";
 759                         #address-cells = <1>;
 760                         #size-cells = <1>;
 761                         ranges = <0x0 0x2000 0x1000>;
 762                 };
 763
 764                 target-module@4000 {                    /* 0x4a204000, ap 35 46.0 */
 765                         compatible = "ti,sysc";
 766                         status = "disabled";
 767                         #address-cells = <1>;
 768                         #size-cells = <1>;
 769                         ranges = <0x0 0x4000 0x1000>;
 770                 };
 771
 772                 target-module@6000 {                    /* 0x4a206000, ap 33 4e.0 */
 773                         compatible = "ti,sysc";
 774                         status = "disabled";
 775                         #address-cells = <1>;
 776                         #size-cells = <1>;
 777                         ranges = <0x0 0x6000 0x1000>;
 778                 };
 779
 780                 target-module@8000 {                    /* 0x4a208000, ap 105 34.0 */
 781                         compatible = "ti,sysc";
 782                         status = "disabled";
 783                         #address-cells = <1>;
 784                         #size-cells = <1>;
 785                         ranges = <0x0 0x8000 0x1000>;
 786                 };
 787
 788                 target-module@a000 {                    /* 0x4a20a000, ap 31 30.0 */
 789                         compatible = "ti,sysc";
 790                         status = "disabled";
 791                         #address-cells = <1>;
 792                         #size-cells = <1>;
 793                         ranges = <0x0 0xa000 0x1000>;
 794                 };
 795
 796                 target-module@c000 {                    /* 0x4a20c000, ap 39 14.0 */
 797                         compatible = "ti,sysc";
 798                         status = "disabled";
 799                         #address-cells = <1>;
 800                         #size-cells = <1>;
 801                         ranges = <0x0 0xc000 0x1000>;
 802                 };
 803
 804                 target-module@10000 {                   /* 0x4a210000, ap 41 56.0 */
 805                         compatible = "ti,sysc";
 806                         status = "disabled";
 807                         #address-cells = <1>;
 808                         #size-cells = <1>;
 809                         ranges = <0x0 0x10000 0x1000>;
 810                 };
 811
 812                 target-module@12000 {                   /* 0x4a212000, ap 37 52.0 */
 813                         compatible = "ti,sysc";
 814                         status = "disabled";
 815                         #address-cells = <1>;
 816                         #size-cells = <1>;
 817                         ranges = <0x0 0x12000 0x1000>;
 818                 };
 819
 820                 target-module@14000 {                   /* 0x4a214000, ap 45 1c.0 */
 821                         compatible = "ti,sysc";
 822                         status = "disabled";
 823                         #address-cells = <1>;
 824                         #size-cells = <1>;
 825                         ranges = <0x0 0x14000 0x1000>;
 826                 };
 827
 828                 target-module@16000 {                   /* 0x4a216000, ap 43 42.0 */
 829                         compatible = "ti,sysc";
 830                         status = "disabled";
 831                         #address-cells = <1>;
 832                         #size-cells = <1>;
 833                         ranges = <0x0 0x16000 0x1000>;
 834                 };
 835
 836                 target-module@18000 {                   /* 0x4a218000, ap 47 1a.0 */
 837                         compatible = "ti,sysc";
 838                         status = "disabled";
 839                         #address-cells = <1>;
 840                         #size-cells = <1>;
 841                         ranges = <0x0 0x18000 0x1000>;
 842                 };
 843
 844                 target-module@1a000 {                   /* 0x4a21a000, ap 73 3e.0 */
 845                         compatible = "ti,sysc";
 846                         status = "disabled";
 847                         #address-cells = <1>;
 848                         #size-cells = <1>;
 849                         ranges = <0x0 0x1a000 0x1000>;
 850                 };
 851
 852                 target-module@1c000 {                   /* 0x4a21c000, ap 57 40.0 */
 853                         compatible = "ti,sysc";
 854                         status = "disabled";
 855                         #address-cells = <1>;
 856                         #size-cells = <1>;
 857                         ranges = <0x0 0x1c000 0x1000>;
 858                 };
 859
 860                 target-module@1e000 {                   /* 0x4a21e000, ap 29 12.0 */
 861                         compatible = "ti,sysc";
 862                         status = "disabled";
 863                         #address-cells = <1>;
 864                         #size-cells = <1>;
 865                         ranges = <0x0 0x1e000 0x1000>;
 866                 };
 867
 868                 target-module@20000 {                   /* 0x4a220000, ap 49 4a.0 */
 869                         compatible = "ti,sysc";
 870                         status = "disabled";
 871                         #address-cells = <1>;
 872                         #size-cells = <1>;
 873                         ranges = <0x0 0x20000 0x1000>;
 874                 };
 875
 876                 target-module@22000 {                   /* 0x4a222000, ap 107 3a.0 */
 877                         compatible = "ti,sysc";
 878                         status = "disabled";
 879                         #address-cells = <1>;
 880                         #size-cells = <1>;
 881                         ranges = <0x0 0x22000 0x1000>;
 882                 };
 883
 884                 target-module@24000 {                   /* 0x4a224000, ap 75 48.0 */
 885                         compatible = "ti,sysc";
 886                         status = "disabled";
 887                         #address-cells = <1>;
 888                         #size-cells = <1>;
 889                         ranges = <0x0 0x24000 0x1000>;
 890                 };
 891
 892                 target-module@26000 {                   /* 0x4a226000, ap 51 24.0 */
 893                         compatible = "ti,sysc";
 894                         status = "disabled";
 895                         #address-cells = <1>;
 896                         #size-cells = <1>;
 897                         ranges = <0x0 0x26000 0x1000>;
 898                 };
 899
 900                 target-module@28000 {                   /* 0x4a228000, ap 53 38.0 */
 901                         compatible = "ti,sysc";
 902                         status = "disabled";
 903                         #address-cells = <1>;
 904                         #size-cells = <1>;
 905                         ranges = <0x0 0x28000 0x1000>;
 906                 };
 907
 908                 target-module@2a000 {                   /* 0x4a22a000, ap 55 5a.0 */
 909                         compatible = "ti,sysc";
 910                         status = "disabled";
 911                         #address-cells = <1>;
 912                         #size-cells = <1>;
 913                         ranges = <0x0 0x2a000 0x1000>;
 914                 };
 915         };
 916
 917         segment@280000 {                                        /* 0x4a280000 */
 918                 compatible = "simple-bus";
 919                 #address-cells = <1>;
 920                 #size-cells = <1>;
 921         };
 922
 923         segment@300000 {                                        /* 0x4a300000 */
 924                 compatible = "simple-bus";
 925                 #address-cells = <1>;
 926                 #size-cells = <1>;
 927         };
 928 };
 929
 930 &l4_per {                                               /* 0x48000000 */
 931         compatible = "ti,omap5-l4-per", "simple-bus";
 932         reg = <0x48000000 0x800>,
 933               <0x48000800 0x800>,
 934               <0x48001000 0x400>,
 935               <0x48001400 0x400>,
 936               <0x48001800 0x400>,
 937               <0x48001c00 0x400>;
 938         reg-names = "ap", "la", "ia0", "ia1", "ia2", "ia3";
 939         #address-cells = <1>;
 940         #size-cells = <1>;
 941         ranges = <0x00000000 0x48000000 0x200000>,      /* segment 0 */
 942                  <0x00200000 0x48200000 0x200000>;      /* segment 1 */
 943
 944         segment@0 {                                     /* 0x48000000 */
 945                 compatible = "simple-bus";
 946                 #address-cells = <1>;
 947                 #size-cells = <1>;
 948                 ranges = <0x00000000 0x00000000 0x000800>,      /* ap 0 */
 949                          <0x00001000 0x00001000 0x000400>,      /* ap 1 */
 950                          <0x00000800 0x00000800 0x000800>,      /* ap 2 */
 951                          <0x00020000 0x00020000 0x001000>,      /* ap 3 */
 952                          <0x00021000 0x00021000 0x001000>,      /* ap 4 */
 953                          <0x00032000 0x00032000 0x001000>,      /* ap 5 */
 954                          <0x00033000 0x00033000 0x001000>,      /* ap 6 */
 955                          <0x00034000 0x00034000 0x001000>,      /* ap 7 */
 956                          <0x00035000 0x00035000 0x001000>,      /* ap 8 */
 957                          <0x00036000 0x00036000 0x001000>,      /* ap 9 */
 958                          <0x00037000 0x00037000 0x001000>,      /* ap 10 */
 959                          <0x0003e000 0x0003e000 0x001000>,      /* ap 11 */
 960                          <0x0003f000 0x0003f000 0x001000>,      /* ap 12 */
 961                          <0x00055000 0x00055000 0x001000>,      /* ap 13 */
 962                          <0x00056000 0x00056000 0x001000>,      /* ap 14 */
 963                          <0x00057000 0x00057000 0x001000>,      /* ap 15 */
 964                          <0x00058000 0x00058000 0x001000>,      /* ap 16 */
 965                          <0x00059000 0x00059000 0x001000>,      /* ap 17 */
 966                          <0x0005a000 0x0005a000 0x001000>,      /* ap 18 */
 967                          <0x0005b000 0x0005b000 0x001000>,      /* ap 19 */
 968                          <0x0005c000 0x0005c000 0x001000>,      /* ap 20 */
 969                          <0x0005d000 0x0005d000 0x001000>,      /* ap 21 */
 970                          <0x0005e000 0x0005e000 0x001000>,      /* ap 22 */
 971                          <0x00060000 0x00060000 0x001000>,      /* ap 23 */
 972                          <0x0006a000 0x0006a000 0x001000>,      /* ap 24 */
 973                          <0x0006b000 0x0006b000 0x001000>,      /* ap 25 */
 974                          <0x0006c000 0x0006c000 0x001000>,      /* ap 26 */
 975                          <0x0006d000 0x0006d000 0x001000>,      /* ap 27 */
 976                          <0x0006e000 0x0006e000 0x001000>,      /* ap 28 */
 977                          <0x0006f000 0x0006f000 0x001000>,      /* ap 29 */
 978                          <0x00070000 0x00070000 0x001000>,      /* ap 30 */
 979                          <0x00071000 0x00071000 0x001000>,      /* ap 31 */
 980                          <0x00072000 0x00072000 0x001000>,      /* ap 32 */
 981                          <0x00073000 0x00073000 0x001000>,      /* ap 33 */
 982                          <0x00061000 0x00061000 0x001000>,      /* ap 34 */
 983                          <0x00053000 0x00053000 0x001000>,      /* ap 35 */
 984                          <0x00054000 0x00054000 0x001000>,      /* ap 36 */
 985                          <0x000b2000 0x000b2000 0x001000>,      /* ap 37 */
 986                          <0x000b3000 0x000b3000 0x001000>,      /* ap 38 */
 987                          <0x00078000 0x00078000 0x001000>,      /* ap 39 */
 988                          <0x00079000 0x00079000 0x001000>,      /* ap 40 */
 989                          <0x00086000 0x00086000 0x001000>,      /* ap 41 */
 990                          <0x00087000 0x00087000 0x001000>,      /* ap 42 */
 991                          <0x00088000 0x00088000 0x001000>,      /* ap 43 */
 992                          <0x00089000 0x00089000 0x001000>,      /* ap 44 */
 993                          <0x00051000 0x00051000 0x001000>,      /* ap 45 */
 994                          <0x00052000 0x00052000 0x001000>,      /* ap 46 */
 995                          <0x00098000 0x00098000 0x001000>,      /* ap 47 */
 996                          <0x00099000 0x00099000 0x001000>,      /* ap 48 */
 997                          <0x0009a000 0x0009a000 0x001000>,      /* ap 49 */
 998                          <0x0009b000 0x0009b000 0x001000>,      /* ap 50 */
 999                          <0x0009c000 0x0009c000 0x001000>,      /* ap 51 */
1000                          <0x0009d000 0x0009d000 0x001000>,      /* ap 52 */
1001                          <0x00068000 0x00068000 0x001000>,      /* ap 53 */
1002                          <0x00069000 0x00069000 0x001000>,      /* ap 54 */
1003                          <0x00090000 0x00090000 0x002000>,      /* ap 55 */
1004                          <0x00092000 0x00092000 0x001000>,      /* ap 56 */
1005                          <0x000a4000 0x000a4000 0x001000>,      /* ap 57 */
1006                          <0x000a5000 0x000a5000 0x001000>,
1007                          <0x000a6000 0x000a6000 0x001000>,      /* ap 58 */
1008                          <0x000a8000 0x000a8000 0x004000>,      /* ap 59 */
1009                          <0x000ac000 0x000ac000 0x001000>,      /* ap 60 */
1010                          <0x000ad000 0x000ad000 0x001000>,      /* ap 61 */
1011                          <0x000ae000 0x000ae000 0x001000>,      /* ap 62 */
1012                          <0x00066000 0x00066000 0x001000>,      /* ap 63 */
1013                          <0x00067000 0x00067000 0x001000>,      /* ap 64 */
1014                          <0x000b4000 0x000b4000 0x001000>,      /* ap 65 */
1015                          <0x000b5000 0x000b5000 0x001000>,      /* ap 66 */
1016                          <0x000b8000 0x000b8000 0x001000>,      /* ap 67 */
1017                          <0x000b9000 0x000b9000 0x001000>,      /* ap 68 */
1018                          <0x000ba000 0x000ba000 0x001000>,      /* ap 69 */
1019                          <0x000bb000 0x000bb000 0x001000>,      /* ap 70 */
1020                          <0x000d1000 0x000d1000 0x001000>,      /* ap 71 */
1021                          <0x000d2000 0x000d2000 0x001000>,      /* ap 72 */
1022                          <0x000d5000 0x000d5000 0x001000>,      /* ap 73 */
1023                          <0x000d6000 0x000d6000 0x001000>,      /* ap 74 */
1024                          <0x000a2000 0x000a2000 0x001000>,      /* ap 75 */
1025                          <0x000a3000 0x000a3000 0x001000>,      /* ap 76 */
1026                          <0x00001400 0x00001400 0x000400>,      /* ap 77 */
1027                          <0x00001800 0x00001800 0x000400>,      /* ap 78 */
1028                          <0x00001c00 0x00001c00 0x000400>,      /* ap 79 */
1029                          <0x000a5000 0x000a5000 0x001000>,      /* ap 80 */
1030                          <0x0007a000 0x0007a000 0x001000>,      /* ap 81 */
1031                          <0x0007b000 0x0007b000 0x001000>,      /* ap 82 */
1032                          <0x0007c000 0x0007c000 0x001000>,      /* ap 83 */
1033                          <0x0007d000 0x0007d000 0x001000>;      /* ap 84 */
1034
1035                 target-module@20000 {                   /* 0x48020000, ap 3 04.0 */
1036                         compatible = "ti,sysc-omap2", "ti,sysc";
1037                         reg = <0x20050 0x4>,
1038                               <0x20054 0x4>,
1039                               <0x20058 0x4>;
1040                         reg-names = "rev", "sysc", "syss";
1041                         ti,sysc-mask = <(SYSC_OMAP2_ENAWAKEUP |
1042                                          SYSC_OMAP2_SOFTRESET |
1043                                          SYSC_OMAP2_AUTOIDLE)>;
1044                         ti,sysc-sidle = <SYSC_IDLE_FORCE>,
1045                                         <SYSC_IDLE_NO>,
1046                                         <SYSC_IDLE_SMART>,
1047                                         <SYSC_IDLE_SMART_WKUP>;
1048                         ti,syss-mask = <1>;
1049                         /* Domains (V, P, C): core, core_pwrdm, l4per_clkdm */
1050                         clocks = <&l4per_clkctrl OMAP5_UART3_CLKCTRL 0>;
1051                         clock-names = "fck";
1052                         #address-cells = <1>;
1053                         #size-cells = <1>;
1054                         ranges = <0x0 0x20000 0x1000>;
1055
1056                         uart3: serial@0 {
1057                                 compatible = "ti,omap4-uart";
1058                                 reg = <0x0 0x100>;
1059                                 interrupts = <GIC_SPI 74 IRQ_TYPE_LEVEL_HIGH>;
1060                                 clock-frequency = <48000000>;
1061                         };
1062                 };
1063
1064                 target-module@32000 {                   /* 0x48032000, ap 5 3e.0 */
1065                         compatible = "ti,sysc-omap4-timer", "ti,sysc";
1066                         reg = <0x32000 0x4>,
1067                               <0x32010 0x4>;
1068                         reg-names = "rev", "sysc";
1069                         ti,sysc-mask = <(SYSC_OMAP4_FREEEMU |
1070                                          SYSC_OMAP4_SOFTRESET)>;
1071                         ti,sysc-sidle = <SYSC_IDLE_FORCE>,
1072                                         <SYSC_IDLE_NO>,
1073                                         <SYSC_IDLE_SMART>,
1074                                         <SYSC_IDLE_SMART_WKUP>;
1075                         /* Domains (V, P, C): core, core_pwrdm, l4per_clkdm */
1076                         clocks = <&l4per_clkctrl OMAP5_TIMER2_CLKCTRL 0>;
1077                         clock-names = "fck";
1078                         #address-cells = <1>;
1079                         #size-cells = <1>;
1080                         ranges = <0x0 0x32000 0x1000>;
1081
1082                         timer2: timer@0 {
1083                                 compatible = "ti,omap5430-timer";
1084                                 reg = <0x0 0x80>;
1085                                 clocks = <&l4per_clkctrl OMAP5_TIMER2_CLKCTRL 24>;
1086                                 clock-names = "fck";
1087                                 interrupts = <GIC_SPI 38 IRQ_TYPE_LEVEL_HIGH>;
1088                         };
1089                 };
1090
1091                 target-module@34000 {                   /* 0x48034000, ap 7 46.0 */
1092                         compatible = "ti,sysc-omap4-timer", "ti,sysc";
1093                         reg = <0x34000 0x4>,
1094                               <0x34010 0x4>;
1095                         reg-names = "rev", "sysc";
1096                         ti,sysc-mask = <(SYSC_OMAP4_FREEEMU |
1097                                          SYSC_OMAP4_SOFTRESET)>;
1098                         ti,sysc-sidle = <SYSC_IDLE_FORCE>,
1099                                         <SYSC_IDLE_NO>,
1100                                         <SYSC_IDLE_SMART>,
1101                                         <SYSC_IDLE_SMART_WKUP>;
1102                         /* Domains (V, P, C): core, core_pwrdm, l4per_clkdm */
1103                         clocks = <&l4per_clkctrl OMAP5_TIMER3_CLKCTRL 0>;
1104                         clock-names = "fck";
1105                         #address-cells = <1>;
1106                         #size-cells = <1>;
1107                         ranges = <0x0 0x34000 0x1000>;
1108
1109                         timer3: timer@0 {
1110                                 compatible = "ti,omap5430-timer";
1111                                 reg = <0x0 0x80>;
1112                                 clocks = <&l4per_clkctrl OMAP5_TIMER3_CLKCTRL 24>;
1113                                 clock-names = "fck";
1114                                 interrupts = <GIC_SPI 39 IRQ_TYPE_LEVEL_HIGH>;
1115                         };
1116                 };
1117
1118                 target-module@36000 {                   /* 0x48036000, ap 9 4e.0 */
1119                         compatible = "ti,sysc-omap4-timer", "ti,sysc";
1120                         reg = <0x36000 0x4>,
1121                               <0x36010 0x4>;
1122                         reg-names = "rev", "sysc";
1123                         ti,sysc-mask = <(SYSC_OMAP4_FREEEMU |
1124                                          SYSC_OMAP4_SOFTRESET)>;
1125                         ti,sysc-sidle = <SYSC_IDLE_FORCE>,
1126                                         <SYSC_IDLE_NO>,
1127                                         <SYSC_IDLE_SMART>,
1128                                         <SYSC_IDLE_SMART_WKUP>;
1129                         /* Domains (V, P, C): core, core_pwrdm, l4per_clkdm */
1130                         clocks = <&l4per_clkctrl OMAP5_TIMER4_CLKCTRL 0>;
1131                         clock-names = "fck";
1132                         #address-cells = <1>;
1133                         #size-cells = <1>;
1134                         ranges = <0x0 0x36000 0x1000>;
1135
1136                         timer4: timer@0 {
1137                                 compatible = "ti,omap5430-timer";
1138                                 reg = <0x0 0x80>;
1139                                 clocks = <&l4per_clkctrl OMAP5_TIMER4_CLKCTRL 24>;
1140                                 clock-names = "fck";
1141                                 interrupts = <GIC_SPI 40 IRQ_TYPE_LEVEL_HIGH>;
1142                         };
1143                 };
1144
1145                 target-module@3e000 {                   /* 0x4803e000, ap 11 56.0 */
1146                         compatible = "ti,sysc-omap4-timer", "ti,sysc";
1147                         reg = <0x3e000 0x4>,
1148                               <0x3e010 0x4>;
1149                         reg-names = "rev", "sysc";
1150                         ti,sysc-mask = <(SYSC_OMAP4_FREEEMU |
1151                                          SYSC_OMAP4_SOFTRESET)>;
1152                         ti,sysc-sidle = <SYSC_IDLE_FORCE>,
1153                                         <SYSC_IDLE_NO>,
1154                                         <SYSC_IDLE_SMART>,
1155                                         <SYSC_IDLE_SMART_WKUP>;
1156                         /* Domains (V, P, C): core, core_pwrdm, l4per_clkdm */
1157                         clocks = <&l4per_clkctrl OMAP5_TIMER9_CLKCTRL 0>;
1158                         clock-names = "fck";
1159                         #address-cells = <1>;
1160                         #size-cells = <1>;
1161                         ranges = <0x0 0x3e000 0x1000>;
1162
1163                         timer9: timer@0 {
1164                                 compatible = "ti,omap5430-timer";
1165                                 reg = <0x0 0x80>;
1166                                 clocks = <&l4per_clkctrl OMAP5_TIMER9_CLKCTRL 24>;
1167                                 clock-names = "fck";
1168                                 interrupts = <GIC_SPI 45 IRQ_TYPE_LEVEL_HIGH>;
1169                                 ti,timer-pwm;
1170                         };
1171                 };
1172
1173                 target-module@51000 {                   /* 0x48051000, ap 45 2e.0 */
1174                         compatible = "ti,sysc-omap2", "ti,sysc";
1175                         reg = <0x51000 0x4>,
1176                               <0x51010 0x4>,
1177                               <0x51114 0x4>;
1178                         reg-names = "rev", "sysc", "syss";
1179                         ti,sysc-mask = <(SYSC_OMAP2_ENAWAKEUP |
1180                                          SYSC_OMAP2_SOFTRESET |
1181                                          SYSC_OMAP2_AUTOIDLE)>;
1182                         ti,sysc-sidle = <SYSC_IDLE_FORCE>,
1183                                         <SYSC_IDLE_NO>,
1184                                         <SYSC_IDLE_SMART>,
1185                                         <SYSC_IDLE_SMART_WKUP>;
1186                         ti,syss-mask = <1>;
1187                         /* Domains (V, P, C): core, core_pwrdm, l4per_clkdm */
1188                         clocks = <&l4per_clkctrl OMAP5_GPIO7_CLKCTRL 0>,
1189                                  <&l4per_clkctrl OMAP5_GPIO7_CLKCTRL 8>;
1190                         clock-names = "fck", "dbclk";
1191                         #address-cells = <1>;
1192                         #size-cells = <1>;
1193                         ranges = <0x0 0x51000 0x1000>;
1194
1195                         gpio7: gpio@0 {
1196                                 compatible = "ti,omap4-gpio";
1197                                 reg = <0x0 0x200>;
1198                                 interrupts = <GIC_SPI 35 IRQ_TYPE_LEVEL_HIGH>;
1199                                 gpio-controller;
1200                                 #gpio-cells = <2>;
1201                                 interrupt-controller;
1202                                 #interrupt-cells = <2>;
1203                         };
1204                 };
1205
1206                 target-module@53000 {                   /* 0x48053000, ap 35 36.0 */
1207                         compatible = "ti,sysc-omap2", "ti,sysc";
1208                         reg = <0x53000 0x4>,
1209                               <0x53010 0x4>,
1210                               <0x53114 0x4>;
1211                         reg-names = "rev", "sysc", "syss";
1212                         ti,sysc-mask = <(SYSC_OMAP2_ENAWAKEUP |
1213                                          SYSC_OMAP2_SOFTRESET |
1214                                          SYSC_OMAP2_AUTOIDLE)>;
1215                         ti,sysc-sidle = <SYSC_IDLE_FORCE>,
1216                                         <SYSC_IDLE_NO>,
1217                                         <SYSC_IDLE_SMART>,
1218                                         <SYSC_IDLE_SMART_WKUP>;
1219                         ti,syss-mask = <1>;
1220                         /* Domains (V, P, C): core, core_pwrdm, l4per_clkdm */
1221                         clocks = <&l4per_clkctrl OMAP5_GPIO8_CLKCTRL 0>,
1222                                  <&l4per_clkctrl OMAP5_GPIO8_CLKCTRL 8>;
1223                         clock-names = "fck", "dbclk";
1224                         #address-cells = <1>;
1225                         #size-cells = <1>;
1226                         ranges = <0x0 0x53000 0x1000>;
1227
1228                         gpio8: gpio@0 {
1229                                 compatible = "ti,omap4-gpio";
1230                                 reg = <0x0 0x200>;
1231                                 interrupts = <GIC_SPI 121 IRQ_TYPE_LEVEL_HIGH>;
1232                                 gpio-controller;
1233                                 #gpio-cells = <2>;
1234                                 interrupt-controller;
1235                                 #interrupt-cells = <2>;
1236                         };
1237                 };
1238
1239                 target-module@55000 {                   /* 0x48055000, ap 13 0e.0 */
1240                         compatible = "ti,sysc-omap2", "ti,sysc";
1241                         reg = <0x55000 0x4>,
1242                               <0x55010 0x4>,
1243                               <0x55114 0x4>;
1244                         reg-names = "rev", "sysc", "syss";
1245                         ti,sysc-mask = <(SYSC_OMAP2_ENAWAKEUP |
1246                                          SYSC_OMAP2_SOFTRESET |
1247                                          SYSC_OMAP2_AUTOIDLE)>;
1248                         ti,sysc-sidle = <SYSC_IDLE_FORCE>,
1249                                         <SYSC_IDLE_NO>,
1250                                         <SYSC_IDLE_SMART>,
1251                                         <SYSC_IDLE_SMART_WKUP>;
1252                         ti,syss-mask = <1>;
1253                         /* Domains (V, P, C): core, core_pwrdm, l4per_clkdm */
1254                         clocks = <&l4per_clkctrl OMAP5_GPIO2_CLKCTRL 0>,
1255                                  <&l4per_clkctrl OMAP5_GPIO2_CLKCTRL 8>;
1256                         clock-names = "fck", "dbclk";
1257                         #address-cells = <1>;
1258                         #size-cells = <1>;
1259                         ranges = <0x0 0x55000 0x1000>;
1260
1261                         gpio2: gpio@0 {
1262                                 compatible = "ti,omap4-gpio";
1263                                 reg = <0x0 0x200>;
1264                                 interrupts = <GIC_SPI 30 IRQ_TYPE_LEVEL_HIGH>;
1265                                 gpio-controller;
1266                                 #gpio-cells = <2>;
1267                                 interrupt-controller;
1268                                 #interrupt-cells = <2>;
1269                         };
1270                 };
1271
1272                 target-module@57000 {                   /* 0x48057000, ap 15 06.0 */
1273                         compatible = "ti,sysc-omap2", "ti,sysc";
1274                         reg = <0x57000 0x4>,
1275                               <0x57010 0x4>,
1276                               <0x57114 0x4>;
1277                         reg-names = "rev", "sysc", "syss";
1278                         ti,sysc-mask = <(SYSC_OMAP2_ENAWAKEUP |
1279                                          SYSC_OMAP2_SOFTRESET |
1280                                          SYSC_OMAP2_AUTOIDLE)>;
1281                         ti,sysc-sidle = <SYSC_IDLE_FORCE>,
1282                                         <SYSC_IDLE_NO>,
1283                                         <SYSC_IDLE_SMART>,
1284                                         <SYSC_IDLE_SMART_WKUP>;
1285                         ti,syss-mask = <1>;
1286                         /* Domains (V, P, C): core, core_pwrdm, l4per_clkdm */
1287                         clocks = <&l4per_clkctrl OMAP5_GPIO3_CLKCTRL 0>,
1288                                  <&l4per_clkctrl OMAP5_GPIO3_CLKCTRL 8>;
1289                         clock-names = "fck", "dbclk";
1290                         #address-cells = <1>;
1291                         #size-cells = <1>;
1292                         ranges = <0x0 0x57000 0x1000>;
1293
1294                         gpio3: gpio@0 {
1295                                 compatible = "ti,omap4-gpio";
1296                                 reg = <0x0 0x200>;
1297                                 interrupts = <GIC_SPI 31 IRQ_TYPE_LEVEL_HIGH>;
1298                                 gpio-controller;
1299                                 #gpio-cells = <2>;
1300                                 interrupt-controller;
1301                                 #interrupt-cells = <2>;
1302                         };
1303                 };
1304
1305                 target-module@59000 {                   /* 0x48059000, ap 17 16.0 */
1306                         compatible = "ti,sysc-omap2", "ti,sysc";
1307                         reg = <0x59000 0x4>,
1308                               <0x59010 0x4>,
1309                               <0x59114 0x4>;
1310                         reg-names = "rev", "sysc", "syss";
1311                         ti,sysc-mask = <(SYSC_OMAP2_ENAWAKEUP |
1312                                          SYSC_OMAP2_SOFTRESET |
1313                                          SYSC_OMAP2_AUTOIDLE)>;
1314                         ti,sysc-sidle = <SYSC_IDLE_FORCE>,
1315                                         <SYSC_IDLE_NO>,
1316                                         <SYSC_IDLE_SMART>,
1317                                         <SYSC_IDLE_SMART_WKUP>;
1318                         ti,syss-mask = <1>;
1319                         /* Domains (V, P, C): core, core_pwrdm, l4per_clkdm */
1320                         clocks = <&l4per_clkctrl OMAP5_GPIO4_CLKCTRL 0>,
1321                                  <&l4per_clkctrl OMAP5_GPIO4_CLKCTRL 8>;
1322                         clock-names = "fck", "dbclk";
1323                         #address-cells = <1>;
1324                         #size-cells = <1>;
1325                         ranges = <0x0 0x59000 0x1000>;
1326
1327                         gpio4: gpio@0 {
1328                                 compatible = "ti,omap4-gpio";
1329                                 reg = <0x0 0x200>;
1330                                 interrupts = <GIC_SPI 32 IRQ_TYPE_LEVEL_HIGH>;
1331                                 gpio-controller;
1332                                 #gpio-cells = <2>;
1333                                 interrupt-controller;
1334                                 #interrupt-cells = <2>;
1335                         };
1336                 };
1337
1338                 target-module@5b000 {                   /* 0x4805b000, ap 19 1e.0 */
1339                         compatible = "ti,sysc-omap2", "ti,sysc";
1340                         reg = <0x5b000 0x4>,
1341                               <0x5b010 0x4>,
1342                               <0x5b114 0x4>;
1343                         reg-names = "rev", "sysc", "syss";
1344                         ti,sysc-mask = <(SYSC_OMAP2_ENAWAKEUP |
1345                                          SYSC_OMAP2_SOFTRESET |
1346                                          SYSC_OMAP2_AUTOIDLE)>;
1347                         ti,sysc-sidle = <SYSC_IDLE_FORCE>,
1348                                         <SYSC_IDLE_NO>,
1349                                         <SYSC_IDLE_SMART>,
1350                                         <SYSC_IDLE_SMART_WKUP>;
1351                         ti,syss-mask = <1>;
1352                         /* Domains (V, P, C): core, core_pwrdm, l4per_clkdm */
1353                         clocks = <&l4per_clkctrl OMAP5_GPIO5_CLKCTRL 0>,
1354                                  <&l4per_clkctrl OMAP5_GPIO5_CLKCTRL 8>;
1355                         clock-names = "fck", "dbclk";
1356                         #address-cells = <1>;
1357                         #size-cells = <1>;
1358                         ranges = <0x0 0x5b000 0x1000>;
1359
1360                         gpio5: gpio@0 {
1361                                 compatible = "ti,omap4-gpio";
1362                                 reg = <0x0 0x200>;
1363                                 interrupts = <GIC_SPI 33 IRQ_TYPE_LEVEL_HIGH>;
1364                                 gpio-controller;
1365                                 #gpio-cells = <2>;
1366                                 interrupt-controller;
1367                                 #interrupt-cells = <2>;
1368                         };
1369                 };
1370
1371                 target-module@5d000 {                   /* 0x4805d000, ap 21 26.0 */
1372                         compatible = "ti,sysc-omap2", "ti,sysc";
1373                         reg = <0x5d000 0x4>,
1374                               <0x5d010 0x4>,
1375                               <0x5d114 0x4>;
1376                         reg-names = "rev", "sysc", "syss";
1377                         ti,sysc-mask = <(SYSC_OMAP2_ENAWAKEUP |
1378                                          SYSC_OMAP2_SOFTRESET |
1379                                          SYSC_OMAP2_AUTOIDLE)>;
1380                         ti,sysc-sidle = <SYSC_IDLE_FORCE>,
1381                                         <SYSC_IDLE_NO>,
1382                                         <SYSC_IDLE_SMART>,
1383                                         <SYSC_IDLE_SMART_WKUP>;
1384                         ti,syss-mask = <1>;
1385                         /* Domains (V, P, C): core, core_pwrdm, l4per_clkdm */
1386                         clocks = <&l4per_clkctrl OMAP5_GPIO6_CLKCTRL 0>,
1387                                  <&l4per_clkctrl OMAP5_GPIO6_CLKCTRL 8>;
1388                         clock-names = "fck", "dbclk";
1389                         #address-cells = <1>;
1390                         #size-cells = <1>;
1391                         ranges = <0x0 0x5d000 0x1000>;
1392
1393                         gpio6: gpio@0 {
1394                                 compatible = "ti,omap4-gpio";
1395                                 reg = <0x0 0x200>;
1396                                 interrupts = <GIC_SPI 34 IRQ_TYPE_LEVEL_HIGH>;
1397                                 gpio-controller;
1398                                 #gpio-cells = <2>;
1399                                 interrupt-controller;
1400                                 #interrupt-cells = <2>;
1401                         };
1402                 };
1403
1404                 target-module@60000 {                   /* 0x48060000, ap 23 24.0 */
1405                         compatible = "ti,sysc-omap2", "ti,sysc";
1406                         reg = <0x60000 0x8>,
1407                               <0x60010 0x8>,
1408                               <0x60090 0x8>;
1409                         reg-names = "rev", "sysc", "syss";
1410                         ti,sysc-mask = <(SYSC_OMAP2_CLOCKACTIVITY |
1411                                          SYSC_OMAP2_ENAWAKEUP |
1412                                          SYSC_OMAP2_SOFTRESET |
1413                                          SYSC_OMAP2_AUTOIDLE)>;
1414                         ti,sysc-sidle = <SYSC_IDLE_FORCE>,
1415                                         <SYSC_IDLE_NO>,
1416                                         <SYSC_IDLE_SMART>,
1417                                         <SYSC_IDLE_SMART_WKUP>;
1418                         ti,syss-mask = <1>;
1419                         /* Domains (V, P, C): core, core_pwrdm, l4per_clkdm */
1420                         clocks = <&l4per_clkctrl OMAP5_I2C3_CLKCTRL 0>;
1421                         clock-names = "fck";
1422                         #address-cells = <1>;
1423                         #size-cells = <1>;
1424                         ranges = <0x0 0x60000 0x1000>;
1425
1426                         i2c3: i2c@0 {
1427                                 compatible = "ti,omap4-i2c";
1428                                 reg = <0x0 0x100>;
1429                                 interrupts = <GIC_SPI 61 IRQ_TYPE_LEVEL_HIGH>;
1430                                 #address-cells = <1>;
1431                                 #size-cells = <0>;
1432                         };
1433                 };
1434
1435                 target-module@66000 {                   /* 0x48066000, ap 63 4c.0 */
1436                         compatible = "ti,sysc-omap2", "ti,sysc";
1437                         reg = <0x66050 0x4>,
1438                               <0x66054 0x4>,
1439                               <0x66058 0x4>;
1440                         reg-names = "rev", "sysc", "syss";
1441                         ti,sysc-mask = <(SYSC_OMAP2_ENAWAKEUP |
1442                                          SYSC_OMAP2_SOFTRESET |
1443                                          SYSC_OMAP2_AUTOIDLE)>;
1444                         ti,sysc-sidle = <SYSC_IDLE_FORCE>,
1445                                         <SYSC_IDLE_NO>,
1446                                         <SYSC_IDLE_SMART>,
1447                                         <SYSC_IDLE_SMART_WKUP>;
1448                         ti,syss-mask = <1>;
1449                         /* Domains (V, P, C): core, core_pwrdm, l4per_clkdm */
1450                         clocks = <&l4per_clkctrl OMAP5_UART5_CLKCTRL 0>;
1451                         clock-names = "fck";
1452                         #address-cells = <1>;
1453                         #size-cells = <1>;
1454                         ranges = <0x0 0x66000 0x1000>;
1455
1456                         uart5: serial@0 {
1457                                 compatible = "ti,omap4-uart";
1458                                 reg = <0x0 0x100>;
1459                                 interrupts = <GIC_SPI 105 IRQ_TYPE_LEVEL_HIGH>;
1460                                 clock-frequency = <48000000>;
1461                         };
1462                 };
1463
1464                 target-module@68000 {                   /* 0x48068000, ap 53 54.0 */
1465                         compatible = "ti,sysc-omap2", "ti,sysc";
1466                         reg = <0x68050 0x4>,
1467                               <0x68054 0x4>,
1468                               <0x68058 0x4>;
1469                         reg-names = "rev", "sysc", "syss";
1470                         ti,sysc-mask = <(SYSC_OMAP2_ENAWAKEUP |
1471                                          SYSC_OMAP2_SOFTRESET |
1472                                          SYSC_OMAP2_AUTOIDLE)>;
1473                         ti,sysc-sidle = <SYSC_IDLE_FORCE>,
1474                                         <SYSC_IDLE_NO>,
1475                                         <SYSC_IDLE_SMART>,
1476                                         <SYSC_IDLE_SMART_WKUP>;
1477                         ti,syss-mask = <1>;
1478                         /* Domains (V, P, C): core, core_pwrdm, l4per_clkdm */
1479                         clocks = <&l4per_clkctrl OMAP5_UART6_CLKCTRL 0>;
1480                         clock-names = "fck";
1481                         #address-cells = <1>;
1482                         #size-cells = <1>;
1483                         ranges = <0x0 0x68000 0x1000>;
1484
1485                         uart6: serial@0 {
1486                                 compatible = "ti,omap4-uart";
1487                                 reg = <0x0 0x100>;
1488                                 interrupts = <GIC_SPI 106 IRQ_TYPE_LEVEL_HIGH>;
1489                                 clock-frequency = <48000000>;
1490                         };
1491                 };
1492
1493                 target-module@6a000 {                   /* 0x4806a000, ap 24 0a.0 */
1494                         compatible = "ti,sysc-omap2", "ti,sysc";
1495                         reg = <0x6a050 0x4>,
1496                               <0x6a054 0x4>,
1497                               <0x6a058 0x4>;
1498                         reg-names = "rev", "sysc", "syss";
1499                         ti,sysc-mask = <(SYSC_OMAP2_ENAWAKEUP |
1500                                          SYSC_OMAP2_SOFTRESET |
1501                                          SYSC_OMAP2_AUTOIDLE)>;
1502                         ti,sysc-sidle = <SYSC_IDLE_FORCE>,
1503                                         <SYSC_IDLE_NO>,
1504                                         <SYSC_IDLE_SMART>,
1505                                         <SYSC_IDLE_SMART_WKUP>;
1506                         ti,syss-mask = <1>;
1507                         /* Domains (V, P, C): core, core_pwrdm, l4per_clkdm */
1508                         clocks = <&l4per_clkctrl OMAP5_UART1_CLKCTRL 0>;
1509                         clock-names = "fck";
1510                         #address-cells = <1>;
1511                         #size-cells = <1>;
1512                         ranges = <0x0 0x6a000 0x1000>;
1513
1514                         uart1: serial@0 {
1515                                 compatible = "ti,omap4-uart";
1516                                 reg = <0x0 0x100>;
1517                                 interrupts = <GIC_SPI 72 IRQ_TYPE_LEVEL_HIGH>;
1518                                 clock-frequency = <48000000>;
1519                         };
1520                 };
1521
1522                 target-module@6c000 {                   /* 0x4806c000, ap 26 22.0 */
1523                         compatible = "ti,sysc-omap2", "ti,sysc";
1524                         reg = <0x6c050 0x4>,
1525                               <0x6c054 0x4>,
1526                               <0x6c058 0x4>;
1527                         reg-names = "rev", "sysc", "syss";
1528                         ti,sysc-mask = <(SYSC_OMAP2_ENAWAKEUP |
1529                                          SYSC_OMAP2_SOFTRESET |
1530                                          SYSC_OMAP2_AUTOIDLE)>;
1531                         ti,sysc-sidle = <SYSC_IDLE_FORCE>,
1532                                         <SYSC_IDLE_NO>,
1533                                         <SYSC_IDLE_SMART>,
1534                                         <SYSC_IDLE_SMART_WKUP>;
1535                         ti,syss-mask = <1>;
1536                         /* Domains (V, P, C): core, core_pwrdm, l4per_clkdm */
1537                         clocks = <&l4per_clkctrl OMAP5_UART2_CLKCTRL 0>;
1538                         clock-names = "fck";
1539                         #address-cells = <1>;
1540                         #size-cells = <1>;
1541                         ranges = <0x0 0x6c000 0x1000>;
1542
1543                         uart2: serial@0 {
1544                                 compatible = "ti,omap4-uart";
1545                                 reg = <0x0 0x100>;
1546                                 interrupts = <GIC_SPI 73 IRQ_TYPE_LEVEL_HIGH>;
1547                                 clock-frequency = <48000000>;
1548                         };
1549                 };
1550
1551                 target-module@6e000 {                   /* 0x4806e000, ap 28 44.1 */
1552                         compatible = "ti,sysc-omap2", "ti,sysc";
1553                         reg = <0x6e050 0x4>,
1554                               <0x6e054 0x4>,
1555                               <0x6e058 0x4>;
1556                         reg-names = "rev", "sysc", "syss";
1557                         ti,sysc-mask = <(SYSC_OMAP2_ENAWAKEUP |
1558                                          SYSC_OMAP2_SOFTRESET |
1559                                          SYSC_OMAP2_AUTOIDLE)>;
1560                         ti,sysc-sidle = <SYSC_IDLE_FORCE>,
1561                                         <SYSC_IDLE_NO>,
1562                                         <SYSC_IDLE_SMART>,
1563                                         <SYSC_IDLE_SMART_WKUP>;
1564                         ti,syss-mask = <1>;
1565                         /* Domains (V, P, C): core, core_pwrdm, l4per_clkdm */
1566                         clocks = <&l4per_clkctrl OMAP5_UART4_CLKCTRL 0>;
1567                         clock-names = "fck";
1568                         #address-cells = <1>;
1569                         #size-cells = <1>;
1570                         ranges = <0x0 0x6e000 0x1000>;
1571
1572                         uart4: serial@0 {
1573                                 compatible = "ti,omap4-uart";
1574                                 reg = <0x0 0x100>;
1575                                 interrupts = <GIC_SPI 70 IRQ_TYPE_LEVEL_HIGH>;
1576                                 clock-frequency = <48000000>;
1577                         };
1578                 };
1579
1580                 target-module@70000 {                   /* 0x48070000, ap 30 14.0 */
1581                         compatible = "ti,sysc-omap2", "ti,sysc";
1582                         reg = <0x70000 0x8>,
1583                               <0x70010 0x8>,
1584                               <0x70090 0x8>;
1585                         reg-names = "rev", "sysc", "syss";
1586                         ti,sysc-mask = <(SYSC_OMAP2_CLOCKACTIVITY |
1587                                          SYSC_OMAP2_ENAWAKEUP |
1588                                          SYSC_OMAP2_SOFTRESET |
1589                                          SYSC_OMAP2_AUTOIDLE)>;
1590                         ti,sysc-sidle = <SYSC_IDLE_FORCE>,
1591                                         <SYSC_IDLE_NO>,
1592                                         <SYSC_IDLE_SMART>,
1593                                         <SYSC_IDLE_SMART_WKUP>;
1594                         ti,syss-mask = <1>;
1595                         /* Domains (V, P, C): core, core_pwrdm, l4per_clkdm */
1596                         clocks = <&l4per_clkctrl OMAP5_I2C1_CLKCTRL 0>;
1597                         clock-names = "fck";
1598                         #address-cells = <1>;
1599                         #size-cells = <1>;
1600                         ranges = <0x0 0x70000 0x1000>;
1601
1602                         i2c1: i2c@0 {
1603                                 compatible = "ti,omap4-i2c";
1604                                 reg = <0x0 0x100>;
1605                                 interrupts = <GIC_SPI 56 IRQ_TYPE_LEVEL_HIGH>;
1606                                 #address-cells = <1>;
1607                                 #size-cells = <0>;
1608                         };
1609                 };
1610
1611                 target-module@72000 {                   /* 0x48072000, ap 32 1c.0 */
1612                         compatible = "ti,sysc-omap2", "ti,sysc";
1613                         reg = <0x72000 0x8>,
1614                               <0x72010 0x8>,
1615                               <0x72090 0x8>;
1616                         reg-names = "rev", "sysc", "syss";
1617                         ti,sysc-mask = <(SYSC_OMAP2_CLOCKACTIVITY |
1618                                          SYSC_OMAP2_ENAWAKEUP |
1619                                          SYSC_OMAP2_SOFTRESET |
1620                                          SYSC_OMAP2_AUTOIDLE)>;
1621                         ti,sysc-sidle = <SYSC_IDLE_FORCE>,
1622                                         <SYSC_IDLE_NO>,
1623                                         <SYSC_IDLE_SMART>,
1624                                         <SYSC_IDLE_SMART_WKUP>;
1625                         ti,syss-mask = <1>;
1626                         /* Domains (V, P, C): core, core_pwrdm, l4per_clkdm */
1627                         clocks = <&l4per_clkctrl OMAP5_I2C2_CLKCTRL 0>;
1628                         clock-names = "fck";
1629                         #address-cells = <1>;
1630                         #size-cells = <1>;
1631                         ranges = <0x0 0x72000 0x1000>;
1632
1633                         i2c2: i2c@0 {
1634                                 compatible = "ti,omap4-i2c";
1635                                 reg = <0x0 0x100>;
1636                                 interrupts = <GIC_SPI 57 IRQ_TYPE_LEVEL_HIGH>;
1637                                 #address-cells = <1>;
1638                                 #size-cells = <0>;
1639                         };
1640                 };
1641
1642                 target-module@78000 {                   /* 0x48078000, ap 39 12.0 */
1643                         compatible = "ti,sysc";
1644                         status = "disabled";
1645                         #address-cells = <1>;
1646                         #size-cells = <1>;
1647                         ranges = <0x0 0x78000 0x1000>;
1648                 };
1649
1650                 target-module@7a000 {                   /* 0x4807a000, ap 81 2c.0 */
1651                         compatible = "ti,sysc-omap2", "ti,sysc";
1652                         reg = <0x7a000 0x8>,
1653                               <0x7a010 0x8>,
1654                               <0x7a090 0x8>;
1655                         reg-names = "rev", "sysc", "syss";
1656                         ti,sysc-mask = <(SYSC_OMAP2_CLOCKACTIVITY |
1657                                          SYSC_OMAP2_ENAWAKEUP |
1658                                          SYSC_OMAP2_SOFTRESET |
1659                                          SYSC_OMAP2_AUTOIDLE)>;
1660                         ti,sysc-sidle = <SYSC_IDLE_FORCE>,
1661                                         <SYSC_IDLE_NO>,
1662                                         <SYSC_IDLE_SMART>,
1663                                         <SYSC_IDLE_SMART_WKUP>;
1664                         ti,syss-mask = <1>;
1665                         /* Domains (V, P, C): core, core_pwrdm, l4per_clkdm */
1666                         clocks = <&l4per_clkctrl OMAP5_I2C4_CLKCTRL 0>;
1667                         clock-names = "fck";
1668                         #address-cells = <1>;
1669                         #size-cells = <1>;
1670                         ranges = <0x0 0x7a000 0x1000>;
1671
1672                         i2c4: i2c@0 {
1673                                 compatible = "ti,omap4-i2c";
1674                                 reg = <0x0 0x100>;
1675                                 interrupts = <GIC_SPI 62 IRQ_TYPE_LEVEL_HIGH>;
1676                                 #address-cells = <1>;
1677                                 #size-cells = <0>;
1678                         };
1679                 };
1680
1681                 target-module@7c000 {                   /* 0x4807c000, ap 83 34.0 */
1682                         compatible = "ti,sysc-omap2", "ti,sysc";
1683                         reg = <0x7c000 0x8>,
1684                               <0x7c010 0x8>,
1685                               <0x7c090 0x8>;
1686                         reg-names = "rev", "sysc", "syss";
1687                         ti,sysc-mask = <(SYSC_OMAP2_CLOCKACTIVITY |
1688                                          SYSC_OMAP2_ENAWAKEUP |
1689                                          SYSC_OMAP2_SOFTRESET |
1690                                          SYSC_OMAP2_AUTOIDLE)>;
1691                         ti,sysc-sidle = <SYSC_IDLE_FORCE>,
1692                                         <SYSC_IDLE_NO>,
1693                                         <SYSC_IDLE_SMART>,
1694                                         <SYSC_IDLE_SMART_WKUP>;
1695                         ti,syss-mask = <1>;
1696                         /* Domains (V, P, C): core, core_pwrdm, l4per_clkdm */
1697                         clocks = <&l4per_clkctrl OMAP5_I2C5_CLKCTRL 0>;
1698                         clock-names = "fck";
1699                         #address-cells = <1>;
1700                         #size-cells = <1>;
1701                         ranges = <0x0 0x7c000 0x1000>;
1702
1703                         i2c5: i2c@0 {
1704                                 compatible = "ti,omap4-i2c";
1705                                 reg = <0x0 0x100>;
1706                                 interrupts = <GIC_SPI 60 IRQ_TYPE_LEVEL_HIGH>;
1707                                 #address-cells = <1>;
1708                                 #size-cells = <0>;
1709                         };
1710                 };
1711
1712                 target-module@86000 {                   /* 0x48086000, ap 41 5e.0 */
1713                         compatible = "ti,sysc-omap4-timer", "ti,sysc";
1714                         reg = <0x86000 0x4>,
1715                               <0x86010 0x4>;
1716                         reg-names = "rev", "sysc";
1717                         ti,sysc-mask = <(SYSC_OMAP4_FREEEMU |
1718                                          SYSC_OMAP4_SOFTRESET)>;
1719                         ti,sysc-sidle = <SYSC_IDLE_FORCE>,
1720                                         <SYSC_IDLE_NO>,
1721                                         <SYSC_IDLE_SMART>,
1722                                         <SYSC_IDLE_SMART_WKUP>;
1723                         /* Domains (V, P, C): core, core_pwrdm, l4per_clkdm */
1724                         clocks = <&l4per_clkctrl OMAP5_TIMER10_CLKCTRL 0>;
1725                         clock-names = "fck";
1726                         #address-cells = <1>;
1727                         #size-cells = <1>;
1728                         ranges = <0x0 0x86000 0x1000>;
1729
1730                         timer10: timer@0 {
1731                                 compatible = "ti,omap5430-timer";
1732                                 reg = <0x0 0x80>;
1733                                 clocks = <&l4per_clkctrl OMAP5_TIMER10_CLKCTRL 24>;
1734                                 clock-names = "fck";
1735                                 interrupts = <GIC_SPI 46 IRQ_TYPE_LEVEL_HIGH>;
1736                                 ti,timer-pwm;
1737                         };
1738                 };
1739
1740                 target-module@88000 {                   /* 0x48088000, ap 43 66.0 */
1741                         compatible = "ti,sysc-omap4-timer", "ti,sysc";
1742                         reg = <0x88000 0x4>,
1743                               <0x88010 0x4>;
1744                         reg-names = "rev", "sysc";
1745                         ti,sysc-mask = <(SYSC_OMAP4_FREEEMU |
1746                                          SYSC_OMAP4_SOFTRESET)>;
1747                         ti,sysc-sidle = <SYSC_IDLE_FORCE>,
1748                                         <SYSC_IDLE_NO>,
1749                                         <SYSC_IDLE_SMART>,
1750                                         <SYSC_IDLE_SMART_WKUP>;
1751                         /* Domains (V, P, C): core, core_pwrdm, l4per_clkdm */
1752                         clocks = <&l4per_clkctrl OMAP5_TIMER11_CLKCTRL 0>;
1753                         clock-names = "fck";
1754                         #address-cells = <1>;
1755                         #size-cells = <1>;
1756                         ranges = <0x0 0x88000 0x1000>;
1757
1758                         timer11: timer@0 {
1759                                 compatible = "ti,omap5430-timer";
1760                                 reg = <0x0 0x80>;
1761                                 clocks = <&l4per_clkctrl OMAP5_TIMER11_CLKCTRL 24>;
1762                                 clock-names = "fck";
1763                                 interrupts = <GIC_SPI 47 IRQ_TYPE_LEVEL_HIGH>;
1764                                 ti,timer-pwm;
1765                         };
1766                 };
1767
1768                 rng_target: target-module@90000 {       /* 0x48090000, ap 55 1a.0 */
1769                         compatible = "ti,sysc-omap2", "ti,sysc";
1770                         reg = <0x91fe0 0x4>,
1771                               <0x91fe4 0x4>;
1772                         reg-names = "rev", "sysc";
1773                         ti,sysc-mask = <(SYSC_OMAP2_AUTOIDLE)>;
1774                         ti,sysc-sidle = <SYSC_IDLE_FORCE>,
1775                                         <SYSC_IDLE_NO>;
1776                         /* Domains (P, C): l4per_pwrdm, l4sec_clkdm */
1777                         clocks = <&l4sec_clkctrl OMAP5_RNG_CLKCTRL 0>;
1778                         clock-names = "fck";
1779                         #address-cells = <1>;
1780                         #size-cells = <1>;
1781                         ranges = <0x0 0x90000 0x2000>;
1782
1783                         rng: rng@0 {
1784                                 compatible = "ti,omap4-rng";
1785                                 reg = <0x0 0x2000>;
1786                                 interrupts = <GIC_SPI 52 IRQ_TYPE_LEVEL_HIGH>;
1787                         };
1788                 };
1789
1790                 target-module@98000 {                   /* 0x48098000, ap 47 08.0 */
1791                         compatible = "ti,sysc-omap4", "ti,sysc";
1792                         reg = <0x98000 0x4>,
1793                               <0x98010 0x4>;
1794                         reg-names = "rev", "sysc";
1795                         ti,sysc-mask = <(SYSC_OMAP4_FREEEMU |
1796                                          SYSC_OMAP4_SOFTRESET)>;
1797                         ti,sysc-sidle = <SYSC_IDLE_FORCE>,
1798                                         <SYSC_IDLE_NO>,
1799                                         <SYSC_IDLE_SMART>,
1800                                         <SYSC_IDLE_SMART_WKUP>;
1801                         /* Domains (V, P, C): core, core_pwrdm, l4per_clkdm */
1802                         clocks = <&l4per_clkctrl OMAP5_MCSPI1_CLKCTRL 0>;
1803                         clock-names = "fck";
1804                         #address-cells = <1>;
1805                         #size-cells = <1>;
1806                         ranges = <0x0 0x98000 0x1000>;
1807
1808                         mcspi1: spi@0 {
1809                                 compatible = "ti,omap4-mcspi";
1810                                 reg = <0x0 0x200>;
1811                                 interrupts = <GIC_SPI 65 IRQ_TYPE_LEVEL_HIGH>;
1812                                 #address-cells = <1>;
1813                                 #size-cells = <0>;
1814                                 ti,spi-num-cs = <4>;
1815                                 dmas = <&sdma 35>,
1816                                        <&sdma 36>,
1817                                        <&sdma 37>,
1818                                        <&sdma 38>,
1819                                        <&sdma 39>,
1820                                        <&sdma 40>,
1821                                        <&sdma 41>,
1822                                        <&sdma 42>;
1823                                 dma-names = "tx0", "rx0", "tx1", "rx1",
1824                                             "tx2", "rx2", "tx3", "rx3";
1825                         };
1826                 };
1827
1828                 target-module@9a000 {                   /* 0x4809a000, ap 49 10.0 */
1829                         compatible = "ti,sysc-omap4", "ti,sysc";
1830                         reg = <0x9a000 0x4>,
1831                               <0x9a010 0x4>;
1832                         reg-names = "rev", "sysc";
1833                         ti,sysc-mask = <(SYSC_OMAP4_FREEEMU |
1834                                          SYSC_OMAP4_SOFTRESET)>;
1835                         ti,sysc-sidle = <SYSC_IDLE_FORCE>,
1836                                         <SYSC_IDLE_NO>,
1837                                         <SYSC_IDLE_SMART>,
1838                                         <SYSC_IDLE_SMART_WKUP>;
1839                         /* Domains (V, P, C): core, core_pwrdm, l4per_clkdm */
1840                         clocks = <&l4per_clkctrl OMAP5_MCSPI2_CLKCTRL 0>;
1841                         clock-names = "fck";
1842                         #address-cells = <1>;
1843                         #size-cells = <1>;
1844                         ranges = <0x0 0x9a000 0x1000>;
1845
1846                         mcspi2: spi@0 {
1847                                 compatible = "ti,omap4-mcspi";
1848                                 reg = <0x0 0x200>;
1849                                 interrupts = <GIC_SPI 66 IRQ_TYPE_LEVEL_HIGH>;
1850                                 #address-cells = <1>;
1851                                 #size-cells = <0>;
1852                                 ti,spi-num-cs = <2>;
1853                                 dmas = <&sdma 43>,
1854                                        <&sdma 44>,
1855                                        <&sdma 45>,
1856                                        <&sdma 46>;
1857                                 dma-names = "tx0", "rx0", "tx1", "rx1";
1858                         };
1859                 };
1860
1861                 target-module@9c000 {                   /* 0x4809c000, ap 51 3a.0 */
1862                         compatible = "ti,sysc-omap4", "ti,sysc";
1863                         reg = <0x9c000 0x4>,
1864                               <0x9c010 0x4>;
1865                         reg-names = "rev", "sysc";
1866                         ti,sysc-mask = <(SYSC_OMAP4_FREEEMU |
1867                                          SYSC_OMAP4_SOFTRESET)>;
1868                         ti,sysc-midle = <SYSC_IDLE_FORCE>,
1869                                         <SYSC_IDLE_NO>,
1870                                         <SYSC_IDLE_SMART>,
1871                                         <SYSC_IDLE_SMART_WKUP>;
1872                         ti,sysc-sidle = <SYSC_IDLE_FORCE>,
1873                                         <SYSC_IDLE_NO>,
1874                                         <SYSC_IDLE_SMART>,
1875                                         <SYSC_IDLE_SMART_WKUP>;
1876                         /* Domains (V, P, C): core, l3init_pwrdm, l3init_clkdm */
1877                         clocks = <&l3init_clkctrl OMAP5_MMC1_CLKCTRL 0>;
1878                         clock-names = "fck";
1879                         #address-cells = <1>;
1880                         #size-cells = <1>;
1881                         ranges = <0x0 0x9c000 0x1000>;
1882
1883                         mmc1: mmc@0 {
1884                                 compatible = "ti,omap4-hsmmc";
1885                                 reg = <0x0 0x400>;
1886                                 interrupts = <GIC_SPI 83 IRQ_TYPE_LEVEL_HIGH>;
1887                                 ti,dual-volt;
1888                                 ti,needs-special-reset;
1889                                 dmas = <&sdma 61>, <&sdma 62>;
1890                                 dma-names = "tx", "rx";
1891                                 pbias-supply = <&pbias_mmc_reg>;
1892                         };
1893                 };
1894
1895                 target-module@a2000 {                   /* 0x480a2000, ap 75 02.0 */
1896                         compatible = "ti,sysc";
1897                         status = "disabled";
1898                         #address-cells = <1>;
1899                         #size-cells = <1>;
1900                         ranges = <0x0 0xa2000 0x1000>;
1901                 };
1902
1903                 target-module@a4000 {                   /* 0x480a4000, ap 57 3c.0 */
1904                         compatible = "ti,sysc";
1905                         status = "disabled";
1906                         #address-cells = <1>;
1907                         #size-cells = <1>;
1908                         ranges = <0x00000000 0x000a4000 0x00001000>,
1909                                  <0x00001000 0x000a5000 0x00001000>;
1910                 };
1911
1912                 des_target: target-module@a5000 {       /* 0x480a5000 */
1913                         compatible = "ti,sysc-omap2", "ti,sysc";
1914                         reg = <0xa5030 0x4>,
1915                               <0xa5034 0x4>,
1916                               <0xa5038 0x4>;
1917                         reg-names = "rev", "sysc", "syss";
1918                         ti,sysc-mask = <(SYSC_OMAP2_SOFTRESET |
1919                                          SYSC_OMAP2_AUTOIDLE)>;
1920                         ti,sysc-sidle = <SYSC_IDLE_FORCE>,
1921                                         <SYSC_IDLE_NO>,
1922                                         <SYSC_IDLE_SMART>,
1923                                         <SYSC_IDLE_SMART_WKUP>;
1924                         ti,syss-mask = <1>;
1925                         /* Domains (P, C): l4per_pwrdm, l4sec_clkdm */
1926                         clocks = <&l4sec_clkctrl OMAP5_DES3DES_CLKCTRL 0>;
1927                         clock-names = "fck";
1928                         #address-cells = <1>;
1929                         #size-cells = <1>;
1930                         ranges = <0 0xa5000 0x00001000>;
1931                         status = "disabled";
1932
1933                         des: des@0 {
1934                                 compatible = "ti,omap4-des";
1935                                 reg = <0 0xa0>;
1936                                 interrupts = <GIC_SPI 82 IRQ_TYPE_LEVEL_HIGH>;
1937                                 dmas = <&sdma 117>, <&sdma 116>;
1938                                 dma-names = "tx", "rx";
1939                         };
1940                 };
1941
1942                 target-module@a8000 {                   /* 0x480a8000, ap 59 2a.0 */
1943                         compatible = "ti,sysc";
1944                         status = "disabled";
1945                         #address-cells = <1>;
1946                         #size-cells = <1>;
1947                         ranges = <0x0 0xa8000 0x4000>;
1948                 };
1949
1950                 target-module@ad000 {                   /* 0x480ad000, ap 61 20.0 */
1951                         compatible = "ti,sysc-omap4", "ti,sysc";
1952                         reg = <0xad000 0x4>,
1953                               <0xad010 0x4>;
1954                         reg-names = "rev", "sysc";
1955                         ti,sysc-mask = <(SYSC_OMAP4_FREEEMU |
1956                                          SYSC_OMAP4_SOFTRESET)>;
1957                         ti,sysc-midle = <SYSC_IDLE_FORCE>,
1958                                         <SYSC_IDLE_NO>,
1959                                         <SYSC_IDLE_SMART>,
1960                                         <SYSC_IDLE_SMART_WKUP>;
1961                         ti,sysc-sidle = <SYSC_IDLE_FORCE>,
1962                                         <SYSC_IDLE_NO>,
1963                                         <SYSC_IDLE_SMART>,
1964                                         <SYSC_IDLE_SMART_WKUP>;
1965                         /* Domains (V, P, C): core, core_pwrdm, l4per_clkdm */
1966                         clocks = <&l4per_clkctrl OMAP5_MMC3_CLKCTRL 0>;
1967                         clock-names = "fck";
1968                         #address-cells = <1>;
1969                         #size-cells = <1>;
1970                         ranges = <0x0 0xad000 0x1000>;
1971
1972                         mmc3: mmc@0 {
1973                                 compatible = "ti,omap4-hsmmc";
1974                                 reg = <0x0 0x400>;
1975                                 interrupts = <GIC_SPI 94 IRQ_TYPE_LEVEL_HIGH>;
1976                                 ti,needs-special-reset;
1977                                 dmas = <&sdma 77>, <&sdma 78>;
1978                                 dma-names = "tx", "rx";
1979                         };
1980                 };
1981
1982                 target-module@b2000 {                   /* 0x480b2000, ap 37 0c.0 */
1983                         compatible = "ti,sysc";
1984                         status = "disabled";
1985                         #address-cells = <1>;
1986                         #size-cells = <1>;
1987                         ranges = <0x0 0xb2000 0x1000>;
1988                 };
1989
1990                 target-module@b4000 {                   /* 0x480b4000, ap 65 42.0 */
1991                         compatible = "ti,sysc-omap4", "ti,sysc";
1992                         reg = <0xb4000 0x4>,
1993                               <0xb4010 0x4>;
1994                         reg-names = "rev", "sysc";
1995                         ti,sysc-mask = <(SYSC_OMAP4_FREEEMU |
1996                                          SYSC_OMAP4_SOFTRESET)>;
1997                         ti,sysc-midle = <SYSC_IDLE_FORCE>,
1998                                         <SYSC_IDLE_NO>,
1999                                         <SYSC_IDLE_SMART>,
2000                                         <SYSC_IDLE_SMART_WKUP>;
2001                         ti,sysc-sidle = <SYSC_IDLE_FORCE>,
2002                                         <SYSC_IDLE_NO>,
2003                                         <SYSC_IDLE_SMART>,
2004                                         <SYSC_IDLE_SMART_WKUP>;
2005                         /* Domains (V, P, C): core, l3init_pwrdm, l3init_clkdm */
2006                         clocks = <&l3init_clkctrl OMAP5_MMC2_CLKCTRL 0>;
2007                         clock-names = "fck";
2008                         #address-cells = <1>;
2009                         #size-cells = <1>;
2010                         ranges = <0x0 0xb4000 0x1000>;
2011
2012                         mmc2: mmc@0 {
2013                                 compatible = "ti,omap4-hsmmc";
2014                                 reg = <0x0 0x400>;
2015                                 interrupts = <GIC_SPI 86 IRQ_TYPE_LEVEL_HIGH>;
2016                                 ti,needs-special-reset;
2017                                 dmas = <&sdma 47>, <&sdma 48>;
2018                                 dma-names = "tx", "rx";
2019                         };
2020                 };
2021
2022                 target-module@b8000 {                   /* 0x480b8000, ap 67 32.0 */
2023                         compatible = "ti,sysc-omap4", "ti,sysc";
2024                         reg = <0xb8000 0x4>,
2025                               <0xb8010 0x4>;
2026                         reg-names = "rev", "sysc";
2027                         ti,sysc-mask = <(SYSC_OMAP4_FREEEMU |
2028                                          SYSC_OMAP4_SOFTRESET)>;
2029                         ti,sysc-sidle = <SYSC_IDLE_FORCE>,
2030                                         <SYSC_IDLE_NO>,
2031                                         <SYSC_IDLE_SMART>,
2032                                         <SYSC_IDLE_SMART_WKUP>;
2033                         /* Domains (V, P, C): core, core_pwrdm, l4per_clkdm */
2034                         clocks = <&l4per_clkctrl OMAP5_MCSPI3_CLKCTRL 0>;
2035                         clock-names = "fck";
2036                         #address-cells = <1>;
2037                         #size-cells = <1>;
2038                         ranges = <0x0 0xb8000 0x1000>;
2039
2040                         mcspi3: spi@0 {
2041                                 compatible = "ti,omap4-mcspi";
2042                                 reg = <0x0 0x200>;
2043                                 interrupts = <GIC_SPI 91 IRQ_TYPE_LEVEL_HIGH>;
2044                                 #address-cells = <1>;
2045                                 #size-cells = <0>;
2046                                 ti,spi-num-cs = <2>;
2047                                 dmas = <&sdma 15>, <&sdma 16>;
2048                                 dma-names = "tx0", "rx0";
2049                         };
2050                 };
2051
2052                 target-module@ba000 {                   /* 0x480ba000, ap 69 18.0 */
2053                         compatible = "ti,sysc-omap4", "ti,sysc";
2054                         reg = <0xba000 0x4>,
2055                               <0xba010 0x4>;
2056                         reg-names = "rev", "sysc";
2057                         ti,sysc-mask = <(SYSC_OMAP4_FREEEMU |
2058                                          SYSC_OMAP4_SOFTRESET)>;
2059                         ti,sysc-sidle = <SYSC_IDLE_FORCE>,
2060                                         <SYSC_IDLE_NO>,
2061                                         <SYSC_IDLE_SMART>,
2062                                         <SYSC_IDLE_SMART_WKUP>;
2063                         /* Domains (V, P, C): core, core_pwrdm, l4per_clkdm */
2064                         clocks = <&l4per_clkctrl OMAP5_MCSPI4_CLKCTRL 0>;
2065                         clock-names = "fck";
2066                         #address-cells = <1>;
2067                         #size-cells = <1>;
2068                         ranges = <0x0 0xba000 0x1000>;
2069
2070                         mcspi4: spi@0 {
2071                                 compatible = "ti,omap4-mcspi";
2072                                 reg = <0x0 0x200>;
2073                                 interrupts = <GIC_SPI 48 IRQ_TYPE_LEVEL_HIGH>;
2074                                 #address-cells = <1>;
2075                                 #size-cells = <0>;
2076                                 ti,spi-num-cs = <1>;
2077                                 dmas = <&sdma 70>, <&sdma 71>;
2078                                 dma-names = "tx0", "rx0";
2079                         };
2080                 };
2081
2082                 target-module@d1000 {                   /* 0x480d1000, ap 71 28.0 */
2083                         compatible = "ti,sysc-omap4", "ti,sysc";
2084                         reg = <0xd1000 0x4>,
2085                               <0xd1010 0x4>;
2086                         reg-names = "rev", "sysc";
2087                         ti,sysc-mask = <(SYSC_OMAP4_FREEEMU |
2088                                          SYSC_OMAP4_SOFTRESET)>;
2089                         ti,sysc-midle = <SYSC_IDLE_FORCE>,
2090                                         <SYSC_IDLE_NO>,
2091                                         <SYSC_IDLE_SMART>,
2092                                         <SYSC_IDLE_SMART_WKUP>;
2093                         ti,sysc-sidle = <SYSC_IDLE_FORCE>,
2094                                         <SYSC_IDLE_NO>,
2095                                         <SYSC_IDLE_SMART>,
2096                                         <SYSC_IDLE_SMART_WKUP>;
2097                         /* Domains (V, P, C): core, core_pwrdm, l4per_clkdm */
2098                         clocks = <&l4per_clkctrl OMAP5_MMC4_CLKCTRL 0>;
2099                         clock-names = "fck";
2100                         #address-cells = <1>;
2101                         #size-cells = <1>;
2102                         ranges = <0x0 0xd1000 0x1000>;
2103
2104                         mmc4: mmc@0 {
2105                                 compatible = "ti,omap4-hsmmc";
2106                                 reg = <0x0 0x400>;
2107                                 interrupts = <GIC_SPI 96 IRQ_TYPE_LEVEL_HIGH>;
2108                                 ti,needs-special-reset;
2109                                 dmas = <&sdma 57>, <&sdma 58>;
2110                                 dma-names = "tx", "rx";
2111                         };
2112                 };
2113
2114                 target-module@d5000 {                   /* 0x480d5000, ap 73 30.0 */
2115                         compatible = "ti,sysc-omap4", "ti,sysc";
2116                         reg = <0xd5000 0x4>,
2117                               <0xd5010 0x4>;
2118                         reg-names = "rev", "sysc";
2119                         ti,sysc-mask = <(SYSC_OMAP4_FREEEMU |
2120                                          SYSC_OMAP4_SOFTRESET)>;
2121                         ti,sysc-midle = <SYSC_IDLE_FORCE>,
2122                                         <SYSC_IDLE_NO>,
2123                                         <SYSC_IDLE_SMART>,
2124                                         <SYSC_IDLE_SMART_WKUP>;
2125                         ti,sysc-sidle = <SYSC_IDLE_FORCE>,
2126                                         <SYSC_IDLE_NO>,
2127                                         <SYSC_IDLE_SMART>,
2128                                         <SYSC_IDLE_SMART_WKUP>;
2129                         /* Domains (V, P, C): core, core_pwrdm, l4per_clkdm */
2130                         clocks = <&l4per_clkctrl OMAP5_MMC5_CLKCTRL 0>;
2131                         clock-names = "fck";
2132                         #address-cells = <1>;
2133                         #size-cells = <1>;
2134                         ranges = <0x0 0xd5000 0x1000>;
2135
2136                         mmc5: mmc@0 {
2137                                 compatible = "ti,omap4-hsmmc";
2138                                 reg = <0x0 0x400>;
2139                                 interrupts = <GIC_SPI 59 IRQ_TYPE_LEVEL_HIGH>;
2140                                 ti,needs-special-reset;
2141                                 dmas = <&sdma 59>, <&sdma 60>;
2142                                 dma-names = "tx", "rx";
2143                         };
2144                 };
2145         };
2146
2147         segment@200000 {                                        /* 0x48200000 */
2148                 compatible = "simple-bus";
2149                 #address-cells = <1>;
2150                 #size-cells = <1>;
2151         };
2152 };
2153
2154 &l4_wkup {                                              /* 0x4ae00000 */
2155         compatible = "ti,omap5-l4-wkup", "simple-bus";
2156         reg = <0x4ae00000 0x800>,
2157               <0x4ae00800 0x800>,
2158               <0x4ae01000 0x1000>;
2159         reg-names = "ap", "la", "ia0";
2160         #address-cells = <1>;
2161         #size-cells = <1>;
2162         ranges = <0x00000000 0x4ae00000 0x010000>,      /* segment 0 */
2163                  <0x00010000 0x4ae10000 0x010000>,      /* segment 1 */
2164                  <0x00020000 0x4ae20000 0x010000>;      /* segment 2 */
2165
2166         segment@0 {                                     /* 0x4ae00000 */
2167                 compatible = "simple-bus";
2168                 #address-cells = <1>;
2169                 #size-cells = <1>;
2170                 ranges = <0x00000000 0x00000000 0x000800>,      /* ap 0 */
2171                          <0x00001000 0x00001000 0x001000>,      /* ap 1 */
2172                          <0x00000800 0x00000800 0x000800>,      /* ap 2 */
2173                          <0x00006000 0x00006000 0x002000>,      /* ap 3 */
2174                          <0x00008000 0x00008000 0x001000>,      /* ap 4 */
2175                          <0x0000a000 0x0000a000 0x001000>,      /* ap 15 */
2176                          <0x0000b000 0x0000b000 0x001000>,      /* ap 16 */
2177                          <0x00004000 0x00004000 0x001000>,      /* ap 17 */
2178                          <0x00005000 0x00005000 0x001000>,      /* ap 18 */
2179                          <0x0000c000 0x0000c000 0x001000>,      /* ap 19 */
2180                          <0x0000d000 0x0000d000 0x001000>;      /* ap 20 */
2181
2182                 target-module@4000 {                    /* 0x4ae04000, ap 17 20.0 */
2183                         compatible = "ti,sysc-omap2", "ti,sysc";
2184                         reg = <0x4000 0x4>,
2185                               <0x4010 0x4>;
2186                         reg-names = "rev", "sysc";
2187                         ti,sysc-sidle = <SYSC_IDLE_FORCE>,
2188                                         <SYSC_IDLE_NO>;
2189                         /* Domains (V, P, C): wkup, wkupaon_pwrdm, wkupaon_clkdm */
2190                         clocks = <&wkupaon_clkctrl OMAP5_COUNTER_32K_CLKCTRL 0>;
2191                         clock-names = "fck";
2192                         #address-cells = <1>;
2193                         #size-cells = <1>;
2194                         ranges = <0x0 0x4000 0x1000>;
2195
2196                         counter32k: counter@0 {
2197                                 compatible = "ti,omap-counter32k";
2198                                 reg = <0x0 0x40>;
2199                         };
2200                 };
2201
2202                 target-module@6000 {                    /* 0x4ae06000, ap 3 08.0 */
2203                         compatible = "ti,sysc-omap4", "ti,sysc";
2204                         reg = <0x6000 0x4>;
2205                         reg-names = "rev";
2206                         #address-cells = <1>;
2207                         #size-cells = <1>;
2208                         ranges = <0x0 0x6000 0x2000>;
2209
2210                         prm: prm@0 {
2211                                 compatible = "ti,omap5-prm", "simple-bus";
2212                                 reg = <0x0 0x2000>;
2213                                 interrupts = <GIC_SPI 11 IRQ_TYPE_LEVEL_HIGH>;
2214                                 #address-cells = <1>;
2215                                 #size-cells = <1>;
2216                                 ranges = <0 0 0x2000>;
2217
2218                                 prm_clocks: clocks {
2219                                         #address-cells = <1>;
2220                                         #size-cells = <0>;
2221                                 };
2222
2223                                 prm_clockdomains: clockdomains {
2224                                 };
2225                         };
2226                 };
2227
2228                 target-module@a000 {                    /* 0x4ae0a000, ap 15 2c.0 */
2229                         compatible = "ti,sysc-omap4", "ti,sysc";
2230                         reg = <0xa000 0x4>;
2231                         reg-names = "rev";
2232                         #address-cells = <1>;
2233                         #size-cells = <1>;
2234                         ranges = <0x0 0xa000 0x1000>;
2235
2236                         scrm: scrm@0 {
2237                                 compatible = "ti,omap5-scrm";
2238                                 reg = <0x0 0x1000>;
2239
2240                                 scrm_clocks: clocks {
2241                                         #address-cells = <1>;
2242                                         #size-cells = <0>;
2243                                 };
2244
2245                                 scrm_clockdomains: clockdomains {
2246                                 };
2247                         };
2248                 };
2249
2250                 target-module@c000 {                    /* 0x4ae0c000, ap 19 28.0 */
2251                         compatible = "ti,sysc-omap4", "ti,sysc";
2252                         reg = <0xc000 0x4>;
2253                         reg-names = "rev";
2254                         #address-cells = <1>;
2255                         #size-cells = <1>;
2256                         ranges = <0x0 0xc000 0x1000>;
2257
2258                         omap5_pmx_wkup: pinmux@840 {
2259                                 compatible = "ti,omap5-padconf",
2260                                              "pinctrl-single";
2261                                 reg = <0x840 0x003c>;
2262                                 #address-cells = <1>;
2263                                 #size-cells = <0>;
2264                                 #pinctrl-cells = <1>;
2265                                 #interrupt-cells = <1>;
2266                                 interrupt-controller;
2267                                 pinctrl-single,register-width = <16>;
2268                                 pinctrl-single,function-mask = <0x7fff>;
2269                         };
2270
2271                         omap5_scm_wkup_pad_conf: omap5_scm_wkup_pad_conf@da0 {
2272                                 compatible = "ti,omap5-scm-wkup-pad-conf",
2273                                              "simple-bus";
2274                                 reg = <0xda0 0x60>;
2275                                 #address-cells = <1>;
2276                                 #size-cells = <1>;
2277                                 ranges = <0 0 0x60>;
2278
2279                                 scm_wkup_pad_conf: scm_conf@0 {
2280                                         compatible = "syscon", "simple-bus";
2281                                         reg = <0x0 0x60>;
2282                                         #address-cells = <1>;
2283                                         #size-cells = <1>;
2284                                         ranges = <0 0x0 0x60>;
2285
2286                                         scm_wkup_pad_conf_clocks: clocks@0 {
2287                                                 #address-cells = <1>;
2288                                                 #size-cells = <0>;
2289                                         };
2290                                 };
2291                         };
2292                 };
2293         };
2294
2295         segment@10000 {                                 /* 0x4ae10000 */
2296                 compatible = "simple-bus";
2297                 #address-cells = <1>;
2298                 #size-cells = <1>;
2299                 ranges = <0x00000000 0x00010000 0x001000>,      /* ap 5 */
2300                          <0x00001000 0x00011000 0x001000>,      /* ap 6 */
2301                          <0x00004000 0x00014000 0x001000>,      /* ap 7 */
2302                          <0x00005000 0x00015000 0x001000>,      /* ap 8 */
2303                          <0x00008000 0x00018000 0x001000>,      /* ap 9 */
2304                          <0x00009000 0x00019000 0x001000>,      /* ap 10 */
2305                          <0x0000c000 0x0001c000 0x001000>,      /* ap 11 */
2306                          <0x0000d000 0x0001d000 0x001000>;      /* ap 12 */
2307
2308                 target-module@0 {                       /* 0x4ae10000, ap 5 10.0 */
2309                         compatible = "ti,sysc-omap2", "ti,sysc";
2310                         reg = <0x0 0x4>,
2311                               <0x10 0x4>,
2312                               <0x114 0x4>;
2313                         reg-names = "rev", "sysc", "syss";
2314                         ti,sysc-mask = <(SYSC_OMAP2_ENAWAKEUP |
2315                                          SYSC_OMAP2_SOFTRESET |
2316                                          SYSC_OMAP2_AUTOIDLE)>;
2317                         ti,sysc-sidle = <SYSC_IDLE_FORCE>,
2318                                         <SYSC_IDLE_NO>,
2319                                         <SYSC_IDLE_SMART>,
2320                                         <SYSC_IDLE_SMART_WKUP>;
2321                         ti,syss-mask = <1>;
2322                         /* Domains (V, P, C): wkup, wkupaon_pwrdm, wkupaon_clkdm */
2323                         clocks = <&wkupaon_clkctrl OMAP5_GPIO1_CLKCTRL 0>,
2324                                  <&wkupaon_clkctrl OMAP5_GPIO1_CLKCTRL 8>;
2325                         clock-names = "fck", "dbclk";
2326                         #address-cells = <1>;
2327                         #size-cells = <1>;
2328                         ranges = <0x0 0x0 0x1000>;
2329
2330                         gpio1: gpio@0 {
2331                                 compatible = "ti,omap4-gpio";
2332                                 reg = <0x0 0x200>;
2333                                 interrupts = <GIC_SPI 29 IRQ_TYPE_LEVEL_HIGH>;
2334                                 ti,gpio-always-on;
2335                                 gpio-controller;
2336                                 #gpio-cells = <2>;
2337                                 interrupt-controller;
2338                                 #interrupt-cells = <2>;
2339                         };
2340                 };
2341
2342                 target-module@4000 {                    /* 0x4ae14000, ap 7 14.0 */
2343                         compatible = "ti,sysc-omap2", "ti,sysc";
2344                         reg = <0x4000 0x4>,
2345                               <0x4010 0x4>,
2346                               <0x4014 0x4>;
2347                         reg-names = "rev", "sysc", "syss";
2348                         ti,sysc-mask = <(SYSC_OMAP2_EMUFREE |
2349                                          SYSC_OMAP2_SOFTRESET)>;
2350                         ti,sysc-sidle = <SYSC_IDLE_FORCE>,
2351                                         <SYSC_IDLE_NO>,
2352                                         <SYSC_IDLE_SMART>,
2353                                         <SYSC_IDLE_SMART_WKUP>;
2354                         ti,syss-mask = <1>;
2355                         /* Domains (V, P, C): wkup, wkupaon_pwrdm, wkupaon_clkdm */
2356                         clocks = <&wkupaon_clkctrl OMAP5_WD_TIMER2_CLKCTRL 0>;
2357                         clock-names = "fck";
2358                         #address-cells = <1>;
2359                         #size-cells = <1>;
2360                         ranges = <0x0 0x4000 0x1000>;
2361
2362                         wdt2: wdt@0 {
2363                                 compatible = "ti,omap5-wdt", "ti,omap3-wdt";
2364                                 reg = <0x0 0x80>;
2365                                 interrupts = <GIC_SPI 80 IRQ_TYPE_LEVEL_HIGH>;
2366                         };
2367                 };
2368
2369                 timer1_target: target-module@8000 {     /* 0x4ae18000, ap 9 18.0 */
2370                         compatible = "ti,sysc-omap4-timer", "ti,sysc";
2371                         reg = <0x8000 0x4>,
2372                               <0x8010 0x4>;
2373                         reg-names = "rev", "sysc";
2374                         ti,sysc-mask = <(SYSC_OMAP4_FREEEMU |
2375                                          SYSC_OMAP4_SOFTRESET)>;
2376                         ti,sysc-sidle = <SYSC_IDLE_FORCE>,
2377                                         <SYSC_IDLE_NO>,
2378                                         <SYSC_IDLE_SMART>,
2379                                         <SYSC_IDLE_SMART_WKUP>;
2380                         /* Domains (V, P, C): wkup, wkupaon_pwrdm, wkupaon_clkdm */
2381                         clocks = <&wkupaon_clkctrl OMAP5_TIMER1_CLKCTRL 0>;
2382                         clock-names = "fck";
2383                         #address-cells = <1>;
2384                         #size-cells = <1>;
2385                         ranges = <0x0 0x8000 0x1000>;
2386
2387                         timer1: timer@0 {
2388                                 compatible = "ti,omap5430-timer";
2389                                 reg = <0x0 0x80>;
2390                                 clocks = <&wkupaon_clkctrl OMAP5_TIMER1_CLKCTRL 24>;
2391                                 clock-names = "fck";
2392                                 interrupts = <GIC_SPI 37 IRQ_TYPE_LEVEL_HIGH>;
2393                                 ti,timer-alwon;
2394                         };
2395                 };
2396
2397                 target-module@c000 {                    /* 0x4ae1c000, ap 11 1c.0 */
2398                         compatible = "ti,sysc-omap2", "ti,sysc";
2399                         reg = <0xc000 0x4>,
2400                               <0xc010 0x4>;
2401                         reg-names = "rev", "sysc";
2402                         ti,sysc-mask = <(SYSC_OMAP2_EMUFREE |
2403                                          SYSC_OMAP2_SOFTRESET)>;
2404                         ti,sysc-sidle = <SYSC_IDLE_FORCE>,
2405                                         <SYSC_IDLE_NO>,
2406                                         <SYSC_IDLE_SMART>;
2407                         /* Domains (V, P, C): wkup, wkupaon_pwrdm, wkupaon_clkdm */
2408                         clocks = <&wkupaon_clkctrl OMAP5_KBD_CLKCTRL 0>;
2409                         clock-names = "fck";
2410                         #address-cells = <1>;
2411                         #size-cells = <1>;
2412                         ranges = <0x0 0xc000 0x1000>;
2413
2414                         keypad: keypad@0 {
2415                                 compatible = "ti,omap4-keypad";
2416                                 reg = <0x0 0x400>;
2417                         };
2418                 };
2419         };
2420
2421         segment@20000 {                                 /* 0x4ae20000 */
2422                 compatible = "simple-bus";
2423                 #address-cells = <1>;
2424                 #size-cells = <1>;
2425                 ranges = <0x00006000 0x00026000 0x001000>,      /* ap 13 */
2426                          <0x0000a000 0x0002a000 0x001000>,      /* ap 14 */
2427                          <0x00000000 0x00020000 0x001000>,      /* ap 21 */
2428                          <0x00001000 0x00021000 0x001000>,      /* ap 22 */
2429                          <0x00002000 0x00022000 0x001000>,      /* ap 23 */
2430                          <0x00003000 0x00023000 0x001000>,      /* ap 24 */
2431                          <0x00007000 0x00027000 0x000400>,      /* ap 25 */
2432                          <0x00008000 0x00028000 0x000800>,      /* ap 26 */
2433                          <0x00009000 0x00029000 0x000100>,      /* ap 27 */
2434                          <0x00008800 0x00028800 0x000200>,      /* ap 28 */
2435                          <0x00008a00 0x00028a00 0x000100>;      /* ap 29 */
2436
2437                 target-module@0 {                       /* 0x4ae20000, ap 21 04.0 */
2438                         compatible = "ti,sysc";
2439                         status = "disabled";
2440                         #address-cells = <1>;
2441                         #size-cells = <1>;
2442                         ranges = <0x0 0x0 0x1000>;
2443                 };
2444
2445                 target-module@2000 {                    /* 0x4ae22000, ap 23 0c.0 */
2446                         compatible = "ti,sysc";
2447                         status = "disabled";
2448                         #address-cells = <1>;
2449                         #size-cells = <1>;
2450                         ranges = <0x0 0x2000 0x1000>;
2451                 };
2452
2453                 target-module@6000 {                    /* 0x4ae26000, ap 13 24.0 */
2454                         compatible = "ti,sysc";
2455                         status = "disabled";
2456                         #address-cells = <1>;
2457                         #size-cells = <1>;
2458                         ranges = <0x00000000 0x00006000 0x00001000>,
2459                                  <0x00001000 0x00007000 0x00000400>,
2460                                  <0x00002000 0x00008000 0x00000800>,
2461                                  <0x00002800 0x00008800 0x00000200>,
2462                                  <0x00002a00 0x00008a00 0x00000100>,
2463                                  <0x00003000 0x00009000 0x00000100>;
2464                 };
2465         };
2466 };
2467