arch/arm/boot/dts/omap3.dtsi

   1 /*
   2  * Device Tree Source for OMAP3 SoC
   3  *
   4  * Copyright (C) 2011 Texas Instruments Incorporated - http://www.ti.com/
   5  *
   6  * This file is licensed under the terms of the GNU General Public License
   7  * version 2.  This program is licensed "as is" without any warranty of any
   8  * kind, whether express or implied.
   9  */
  10
  11 #include <dt-bindings/bus/ti-sysc.h>
  12 #include <dt-bindings/gpio/gpio.h>
  13 #include <dt-bindings/interrupt-controller/irq.h>
  14 #include <dt-bindings/pinctrl/omap.h>
  15
  16 / {
  17         compatible = "ti,omap3430", "ti,omap3";
  18         interrupt-parent = <&intc>;
  19         #address-cells = <1>;
  20         #size-cells = <1>;
  21         chosen { };
  22
  23         aliases {
  24                 i2c0 = &i2c1;
  25                 i2c1 = &i2c2;
  26                 i2c2 = &i2c3;
  27                 serial0 = &uart1;
  28                 serial1 = &uart2;
  29                 serial2 = &uart3;
  30         };
  31
  32         cpus {
  33                 #address-cells = <1>;
  34                 #size-cells = <0>;
  35
  36                 cpu@0 {
  37                         compatible = "arm,cortex-a8";
  38                         device_type = "cpu";
  39                         reg = <0x0>;
  40
  41                         clocks = <&dpll1_ck>;
  42                         clock-names = "cpu";
  43
  44                         clock-latency = <300000>; /* From omap-cpufreq driver */
  45                 };
  46         };
  47
  48         pmu@54000000 {
  49                 compatible = "arm,cortex-a8-pmu";
  50                 reg = <0x54000000 0x800000>;
  51                 interrupts = <3>;
  52                 ti,hwmods = "debugss";
  53         };
  54
  55         /*
  56          * The soc node represents the soc top level view. It is used for IPs
  57          * that are not memory mapped in the MPU view or for the MPU itself.
  58          */
  59         soc {
  60                 compatible = "ti,omap-infra";
  61                 mpu {
  62                         compatible = "ti,omap3-mpu";
  63                         ti,hwmods = "mpu";
  64                 };
  65
  66                 iva: iva {
  67                         compatible = "ti,iva2.2";
  68                         ti,hwmods = "iva";
  69
  70                         dsp {
  71                                 compatible = "ti,omap3-c64";
  72                         };
  73                 };
  74         };
  75
  76         /*
  77          * XXX: Use a flat representation of the OMAP3 interconnect.
  78          * The real OMAP interconnect network is quite complex.
  79          * Since it will not bring real advantage to represent that in DT for
  80          * the moment, just use a fake OCP bus entry to represent the whole bus
  81          * hierarchy.
  82          */
  83         ocp@68000000 {
  84                 compatible = "ti,omap3-l3-smx", "simple-bus";
  85                 reg = <0x68000000 0x10000>;
  86                 interrupts = <9 10>;
  87                 #address-cells = <1>;
  88                 #size-cells = <1>;
  89                 ranges;
  90                 ti,hwmods = "l3_main";
  91
  92                 l4_core: l4@48000000 {
  93                         compatible = "ti,omap3-l4-core", "simple-bus";
  94                         #address-cells = <1>;
  95                         #size-cells = <1>;
  96                         ranges = <0 0x48000000 0x1000000>;
  97
  98                         scm: scm@2000 {
  99                                 compatible = "ti,omap3-scm", "simple-bus";
 100                                 reg = <0x2000 0x2000>;
 101                                 #address-cells = <1>;
 102                                 #size-cells = <1>;
 103                                 ranges = <0 0x2000 0x2000>;
 104
 105                                 omap3_pmx_core: pinmux@30 {
 106                                         compatible = "ti,omap3-padconf",
 107                                                      "pinctrl-single";
 108                                         reg = <0x30 0x238>;
 109                                         #address-cells = <1>;
 110                                         #size-cells = <0>;
 111                                         #pinctrl-cells = <1>;
 112                                         #interrupt-cells = <1>;
 113                                         interrupt-controller;
 114                                         pinctrl-single,register-width = <16>;
 115                                         pinctrl-single,function-mask = <0xff1f>;
 116                                 };
 117
 118                                 scm_conf: scm_conf@270 {
 119                                         compatible = "syscon", "simple-bus";
 120                                         reg = <0x270 0x330>;
 121                                         #address-cells = <1>;
 122                                         #size-cells = <1>;
 123                                         ranges = <0 0x270 0x330>;
 124
 125                                         pbias_regulator: pbias_regulator@2b0 {
 126                                                 compatible = "ti,pbias-omap3", "ti,pbias-omap";
 127                                                 reg = <0x2b0 0x4>;
 128                                                 syscon = <&scm_conf>;
 129                                                 pbias_mmc_reg: pbias_mmc_omap2430 {
 130                                                         regulator-name = "pbias_mmc_omap2430";
 131                                                         regulator-min-microvolt = <1800000>;
 132                                                         regulator-max-microvolt = <3000000>;
 133                                                 };
 134                                         };
 135
 136                                         scm_clocks: clocks {
 137                                                 #address-cells = <1>;
 138                                                 #size-cells = <0>;
 139                                         };
 140                                 };
 141
 142                                 scm_clockdomains: clockdomains {
 143                                 };
 144
 145                                 omap3_pmx_wkup: pinmux@a00 {
 146                                         compatible = "ti,omap3-padconf",
 147                                                      "pinctrl-single";
 148                                         reg = <0xa00 0x5c>;
 149                                         #address-cells = <1>;
 150                                         #size-cells = <0>;
 151                                         #pinctrl-cells = <1>;
 152                                         #interrupt-cells = <1>;
 153                                         interrupt-controller;
 154                                         pinctrl-single,register-width = <16>;
 155                                         pinctrl-single,function-mask = <0xff1f>;
 156                                 };
 157                         };
 158                 };
 159
 160                 aes: aes@480c5000 {
 161                         compatible = "ti,omap3-aes";
 162                         ti,hwmods = "aes";
 163                         reg = <0x480c5000 0x50>;
 164                         interrupts = <0>;
 165                         dmas = <&sdma 65 &sdma 66>;
 166                         dma-names = "tx", "rx";
 167                 };
 168
 169                 prm: prm@48306000 {
 170                         compatible = "ti,omap3-prm";
 171                         reg = <0x48306000 0x4000>;
 172                         interrupts = <11>;
 173
 174                         prm_clocks: clocks {
 175                                 #address-cells = <1>;
 176                                 #size-cells = <0>;
 177                         };
 178
 179                         prm_clockdomains: clockdomains {
 180                         };
 181                 };
 182
 183                 cm: cm@48004000 {
 184                         compatible = "ti,omap3-cm";
 185                         reg = <0x48004000 0x4000>;
 186
 187                         cm_clocks: clocks {
 188                                 #address-cells = <1>;
 189                                 #size-cells = <0>;
 190                         };
 191
 192                         cm_clockdomains: clockdomains {
 193                         };
 194                 };
 195
 196                 counter32k: counter@48320000 {
 197                         compatible = "ti,omap-counter32k";
 198                         reg = <0x48320000 0x20>;
 199                         ti,hwmods = "counter_32k";
 200                 };
 201
 202                 intc: interrupt-controller@48200000 {
 203                         compatible = "ti,omap3-intc";
 204                         interrupt-controller;
 205                         #interrupt-cells = <1>;
 206                         reg = <0x48200000 0x1000>;
 207                 };
 208
 209                 target-module@48056000 {
 210                         compatible = "ti,sysc-omap2", "ti,sysc";
 211                         reg = <0x48056000 0x4>,
 212                               <0x4805602c 0x4>,
 213                               <0x48056028 0x4>;
 214                         reg-names = "rev", "sysc", "syss";
 215                         ti,sysc-mask = <(SYSC_OMAP2_CLOCKACTIVITY |
 216                                          SYSC_OMAP2_EMUFREE |
 217                                          SYSC_OMAP2_SOFTRESET |
 218                                          SYSC_OMAP2_AUTOIDLE)>;
 219                         ti,sysc-midle = <SYSC_IDLE_FORCE>,
 220                                         <SYSC_IDLE_NO>,
 221                                         <SYSC_IDLE_SMART>;
 222                         ti,sysc-sidle = <SYSC_IDLE_FORCE>,
 223                                         <SYSC_IDLE_NO>,
 224                                         <SYSC_IDLE_SMART>;
 225                         ti,syss-mask = <1>;
 226                         /* Domains (V, P, C): core, core_pwrdm, core_l3_clkdm */
 227                         clocks = <&core_l3_ick>;
 228                         clock-names = "ick";
 229                         #address-cells = <1>;
 230                         #size-cells = <1>;
 231                         ranges = <0 0x48056000 0x1000>;
 232
 233                         sdma: dma-controller@0 {
 234                                 compatible = "ti,omap3430-sdma", "ti,omap-sdma";
 235                                 reg = <0x0 0x1000>;
 236                                 interrupts = <12>,
 237                                              <13>,
 238                                              <14>,
 239                                              <15>;
 240                                 #dma-cells = <1>;
 241                                 dma-channels = <32>;
 242                                 dma-requests = <96>;
 243                         };
 244                 };
 245
 246                 gpio1: gpio@48310000 {
 247                         compatible = "ti,omap3-gpio";
 248                         reg = <0x48310000 0x200>;
 249                         interrupts = <29>;
 250                         ti,hwmods = "gpio1";
 251                         ti,gpio-always-on;
 252                         gpio-controller;
 253                         #gpio-cells = <2>;
 254                         interrupt-controller;
 255                         #interrupt-cells = <2>;
 256                 };
 257
 258                 gpio2: gpio@49050000 {
 259                         compatible = "ti,omap3-gpio";
 260                         reg = <0x49050000 0x200>;
 261                         interrupts = <30>;
 262                         ti,hwmods = "gpio2";
 263                         gpio-controller;
 264                         #gpio-cells = <2>;
 265                         interrupt-controller;
 266                         #interrupt-cells = <2>;
 267                 };
 268
 269                 gpio3: gpio@49052000 {
 270                         compatible = "ti,omap3-gpio";
 271                         reg = <0x49052000 0x200>;
 272                         interrupts = <31>;
 273                         ti,hwmods = "gpio3";
 274                         gpio-controller;
 275                         #gpio-cells = <2>;
 276                         interrupt-controller;
 277                         #interrupt-cells = <2>;
 278                 };
 279
 280                 gpio4: gpio@49054000 {
 281                         compatible = "ti,omap3-gpio";
 282                         reg = <0x49054000 0x200>;
 283                         interrupts = <32>;
 284                         ti,hwmods = "gpio4";
 285                         gpio-controller;
 286                         #gpio-cells = <2>;
 287                         interrupt-controller;
 288                         #interrupt-cells = <2>;
 289                 };
 290
 291                 gpio5: gpio@49056000 {
 292                         compatible = "ti,omap3-gpio";
 293                         reg = <0x49056000 0x200>;
 294                         interrupts = <33>;
 295                         ti,hwmods = "gpio5";
 296                         gpio-controller;
 297                         #gpio-cells = <2>;
 298                         interrupt-controller;
 299                         #interrupt-cells = <2>;
 300                 };
 301
 302                 gpio6: gpio@49058000 {
 303                         compatible = "ti,omap3-gpio";
 304                         reg = <0x49058000 0x200>;
 305                         interrupts = <34>;
 306                         ti,hwmods = "gpio6";
 307                         gpio-controller;
 308                         #gpio-cells = <2>;
 309                         interrupt-controller;
 310                         #interrupt-cells = <2>;
 311                 };
 312
 313                 uart1: serial@4806a000 {
 314                         compatible = "ti,omap3-uart";
 315                         reg = <0x4806a000 0x2000>;
 316                         interrupts-extended = <&intc 72>;
 317                         dmas = <&sdma 49 &sdma 50>;
 318                         dma-names = "tx", "rx";
 319                         ti,hwmods = "uart1";
 320                         clock-frequency = <48000000>;
 321                 };
 322
 323                 uart2: serial@4806c000 {
 324                         compatible = "ti,omap3-uart";
 325                         reg = <0x4806c000 0x400>;
 326                         interrupts-extended = <&intc 73>;
 327                         dmas = <&sdma 51 &sdma 52>;
 328                         dma-names = "tx", "rx";
 329                         ti,hwmods = "uart2";
 330                         clock-frequency = <48000000>;
 331                 };
 332
 333                 uart3: serial@49020000 {
 334                         compatible = "ti,omap3-uart";
 335                         reg = <0x49020000 0x400>;
 336                         interrupts-extended = <&intc 74>;
 337                         dmas = <&sdma 53 &sdma 54>;
 338                         dma-names = "tx", "rx";
 339                         ti,hwmods = "uart3";
 340                         clock-frequency = <48000000>;
 341                 };
 342
 343                 i2c1: i2c@48070000 {
 344                         compatible = "ti,omap3-i2c";
 345                         reg = <0x48070000 0x80>;
 346                         interrupts = <56>;
 347                         dmas = <&sdma 27 &sdma 28>;
 348                         dma-names = "tx", "rx";
 349                         #address-cells = <1>;
 350                         #size-cells = <0>;
 351                         ti,hwmods = "i2c1";
 352                 };
 353
 354                 i2c2: i2c@48072000 {
 355                         compatible = "ti,omap3-i2c";
 356                         reg = <0x48072000 0x80>;
 357                         interrupts = <57>;
 358                         dmas = <&sdma 29 &sdma 30>;
 359                         dma-names = "tx", "rx";
 360                         #address-cells = <1>;
 361                         #size-cells = <0>;
 362                         ti,hwmods = "i2c2";
 363                 };
 364
 365                 i2c3: i2c@48060000 {
 366                         compatible = "ti,omap3-i2c";
 367                         reg = <0x48060000 0x80>;
 368                         interrupts = <61>;
 369                         dmas = <&sdma 25 &sdma 26>;
 370                         dma-names = "tx", "rx";
 371                         #address-cells = <1>;
 372                         #size-cells = <0>;
 373                         ti,hwmods = "i2c3";
 374                 };
 375
 376                 mailbox: mailbox@48094000 {
 377                         compatible = "ti,omap3-mailbox";
 378                         ti,hwmods = "mailbox";
 379                         reg = <0x48094000 0x200>;
 380                         interrupts = <26>;
 381                         #mbox-cells = <1>;
 382                         ti,mbox-num-users = <2>;
 383                         ti,mbox-num-fifos = <2>;
 384                         mbox_dsp: dsp {
 385                                 ti,mbox-tx = <0 0 0>;
 386                                 ti,mbox-rx = <1 0 0>;
 387                         };
 388                 };
 389
 390                 mcspi1: spi@48098000 {
 391                         compatible = "ti,omap2-mcspi";
 392                         reg = <0x48098000 0x100>;
 393                         interrupts = <65>;
 394                         #address-cells = <1>;
 395                         #size-cells = <0>;
 396                         ti,hwmods = "mcspi1";
 397                         ti,spi-num-cs = <4>;
 398                         dmas = <&sdma 35>,
 399                                <&sdma 36>,
 400                                <&sdma 37>,
 401                                <&sdma 38>,
 402                                <&sdma 39>,
 403                                <&sdma 40>,
 404                                <&sdma 41>,
 405                                <&sdma 42>;
 406                         dma-names = "tx0", "rx0", "tx1", "rx1",
 407                                     "tx2", "rx2", "tx3", "rx3";
 408                 };
 409
 410                 mcspi2: spi@4809a000 {
 411                         compatible = "ti,omap2-mcspi";
 412                         reg = <0x4809a000 0x100>;
 413                         interrupts = <66>;
 414                         #address-cells = <1>;
 415                         #size-cells = <0>;
 416                         ti,hwmods = "mcspi2";
 417                         ti,spi-num-cs = <2>;
 418                         dmas = <&sdma 43>,
 419                                <&sdma 44>,
 420                                <&sdma 45>,
 421                                <&sdma 46>;
 422                         dma-names = "tx0", "rx0", "tx1", "rx1";
 423                 };
 424
 425                 mcspi3: spi@480b8000 {
 426                         compatible = "ti,omap2-mcspi";
 427                         reg = <0x480b8000 0x100>;
 428                         interrupts = <91>;
 429                         #address-cells = <1>;
 430                         #size-cells = <0>;
 431                         ti,hwmods = "mcspi3";
 432                         ti,spi-num-cs = <2>;
 433                         dmas = <&sdma 15>,
 434                                <&sdma 16>,
 435                                <&sdma 23>,
 436                                <&sdma 24>;
 437                         dma-names = "tx0", "rx0", "tx1", "rx1";
 438                 };
 439
 440                 mcspi4: spi@480ba000 {
 441                         compatible = "ti,omap2-mcspi";
 442                         reg = <0x480ba000 0x100>;
 443                         interrupts = <48>;
 444                         #address-cells = <1>;
 445                         #size-cells = <0>;
 446                         ti,hwmods = "mcspi4";
 447                         ti,spi-num-cs = <1>;
 448                         dmas = <&sdma 70>, <&sdma 71>;
 449                         dma-names = "tx0", "rx0";
 450                 };
 451
 452                 hdqw1w: 1w@480b2000 {
 453                         compatible = "ti,omap3-1w";
 454                         reg = <0x480b2000 0x1000>;
 455                         interrupts = <58>;
 456                         ti,hwmods = "hdq1w";
 457                 };
 458
 459                 mmc1: mmc@4809c000 {
 460                         compatible = "ti,omap3-hsmmc";
 461                         reg = <0x4809c000 0x200>;
 462                         interrupts = <83>;
 463                         ti,hwmods = "mmc1";
 464                         ti,dual-volt;
 465                         dmas = <&sdma 61>, <&sdma 62>;
 466                         dma-names = "tx", "rx";
 467                         pbias-supply = <&pbias_mmc_reg>;
 468                 };
 469
 470                 mmc2: mmc@480b4000 {
 471                         compatible = "ti,omap3-hsmmc";
 472                         reg = <0x480b4000 0x200>;
 473                         interrupts = <86>;
 474                         ti,hwmods = "mmc2";
 475                         dmas = <&sdma 47>, <&sdma 48>;
 476                         dma-names = "tx", "rx";
 477                 };
 478
 479                 mmc3: mmc@480ad000 {
 480                         compatible = "ti,omap3-hsmmc";
 481                         reg = <0x480ad000 0x200>;
 482                         interrupts = <94>;
 483                         ti,hwmods = "mmc3";
 484                         dmas = <&sdma 77>, <&sdma 78>;
 485                         dma-names = "tx", "rx";
 486                 };
 487
 488                 mmu_isp: mmu@480bd400 {
 489                         #iommu-cells = <0>;
 490                         compatible = "ti,omap2-iommu";
 491                         reg = <0x480bd400 0x80>;
 492                         interrupts = <24>;
 493                         ti,hwmods = "mmu_isp";
 494                         ti,#tlb-entries = <8>;
 495                 };
 496
 497                 mmu_iva: mmu@5d000000 {
 498                         #iommu-cells = <0>;
 499                         compatible = "ti,omap2-iommu";
 500                         reg = <0x5d000000 0x80>;
 501                         interrupts = <28>;
 502                         ti,hwmods = "mmu_iva";
 503                         status = "disabled";
 504                 };
 505
 506                 wdt2: wdt@48314000 {
 507                         compatible = "ti,omap3-wdt";
 508                         reg = <0x48314000 0x80>;
 509                         ti,hwmods = "wd_timer2";
 510                 };
 511
 512                 mcbsp1: mcbsp@48074000 {
 513                         compatible = "ti,omap3-mcbsp";
 514                         reg = <0x48074000 0xff>;
 515                         reg-names = "mpu";
 516                         interrupts = <16>, /* OCP compliant interrupt */
 517                                      <59>, /* TX interrupt */
 518                                      <60>; /* RX interrupt */
 519                         interrupt-names = "common", "tx", "rx";
 520                         ti,buffer-size = <128>;
 521                         ti,hwmods = "mcbsp1";
 522                         dmas = <&sdma 31>,
 523                                <&sdma 32>;
 524                         dma-names = "tx", "rx";
 525                         clocks = <&mcbsp1_fck>;
 526                         clock-names = "fck";
 527                         status = "disabled";
 528                 };
 529
 530                 /* Likely needs to be tagged disabled on HS devices */
 531                 rng_target: target-module@480a0000 {
 532                         compatible = "ti,sysc-omap2", "ti,sysc";
 533                         reg = <0x480a003c 0x4>,
 534                               <0x480a0040 0x4>,
 535                               <0x480a0044 0x4>;
 536                         reg-names = "rev", "sysc", "syss";
 537                         ti,sysc-mask = <(SYSC_OMAP2_AUTOIDLE)>;
 538                         ti,sysc-sidle = <SYSC_IDLE_FORCE>,
 539                                         <SYSC_IDLE_NO>;
 540                         ti,syss-mask = <1>;
 541                         clocks = <&rng_ick>;
 542                         clock-names = "ick";
 543                         #address-cells = <1>;
 544                         #size-cells = <1>;
 545                         ranges = <0 0x480a0000 0x2000>;
 546
 547                         rng: rng@0 {
 548                                 compatible = "ti,omap2-rng";
 549                                 reg = <0x0 0x2000>;
 550                                 interrupts = <52>;
 551                         };
 552                 };
 553
 554                 mcbsp2: mcbsp@49022000 {
 555                         compatible = "ti,omap3-mcbsp";
 556                         reg = <0x49022000 0xff>,
 557                               <0x49028000 0xff>;
 558                         reg-names = "mpu", "sidetone";
 559                         interrupts = <17>, /* OCP compliant interrupt */
 560                                      <62>, /* TX interrupt */
 561                                      <63>, /* RX interrupt */
 562                                      <4>;  /* Sidetone */
 563                         interrupt-names = "common", "tx", "rx", "sidetone";
 564                         ti,buffer-size = <1280>;
 565                         ti,hwmods = "mcbsp2", "mcbsp2_sidetone";
 566                         dmas = <&sdma 33>,
 567                                <&sdma 34>;
 568                         dma-names = "tx", "rx";
 569                         clocks = <&mcbsp2_fck>, <&mcbsp2_ick>;
 570                         clock-names = "fck", "ick";
 571                         status = "disabled";
 572                 };
 573
 574                 mcbsp3: mcbsp@49024000 {
 575                         compatible = "ti,omap3-mcbsp";
 576                         reg = <0x49024000 0xff>,
 577                               <0x4902a000 0xff>;
 578                         reg-names = "mpu", "sidetone";
 579                         interrupts = <22>, /* OCP compliant interrupt */
 580                                      <89>, /* TX interrupt */
 581                                      <90>, /* RX interrupt */
 582                                      <5>;  /* Sidetone */
 583                         interrupt-names = "common", "tx", "rx", "sidetone";
 584                         ti,buffer-size = <128>;
 585                         ti,hwmods = "mcbsp3", "mcbsp3_sidetone";
 586                         dmas = <&sdma 17>,
 587                                <&sdma 18>;
 588                         dma-names = "tx", "rx";
 589                         clocks = <&mcbsp3_fck>, <&mcbsp3_ick>;
 590                         clock-names = "fck", "ick";
 591                         status = "disabled";
 592                 };
 593
 594                 mcbsp4: mcbsp@49026000 {
 595                         compatible = "ti,omap3-mcbsp";
 596                         reg = <0x49026000 0xff>;
 597                         reg-names = "mpu";
 598                         interrupts = <23>, /* OCP compliant interrupt */
 599                                      <54>, /* TX interrupt */
 600                                      <55>; /* RX interrupt */
 601                         interrupt-names = "common", "tx", "rx";
 602                         ti,buffer-size = <128>;
 603                         ti,hwmods = "mcbsp4";
 604                         dmas = <&sdma 19>,
 605                                <&sdma 20>;
 606                         dma-names = "tx", "rx";
 607                         clocks = <&mcbsp4_fck>;
 608                         clock-names = "fck";
 609                         #sound-dai-cells = <0>;
 610                         status = "disabled";
 611                 };
 612
 613                 mcbsp5: mcbsp@48096000 {
 614                         compatible = "ti,omap3-mcbsp";
 615                         reg = <0x48096000 0xff>;
 616                         reg-names = "mpu";
 617                         interrupts = <27>, /* OCP compliant interrupt */
 618                                      <81>, /* TX interrupt */
 619                                      <82>; /* RX interrupt */
 620                         interrupt-names = "common", "tx", "rx";
 621                         ti,buffer-size = <128>;
 622                         ti,hwmods = "mcbsp5";
 623                         dmas = <&sdma 21>,
 624                                <&sdma 22>;
 625                         dma-names = "tx", "rx";
 626                         clocks = <&mcbsp5_fck>;
 627                         clock-names = "fck";
 628                         status = "disabled";
 629                 };
 630
 631                 sham: sham@480c3000 {
 632                         compatible = "ti,omap3-sham";
 633                         ti,hwmods = "sham";
 634                         reg = <0x480c3000 0x64>;
 635                         interrupts = <49>;
 636                         dmas = <&sdma 69>;
 637                         dma-names = "rx";
 638                 };
 639
 640                 timer1: timer@48318000 {
 641                         compatible = "ti,omap3430-timer";
 642                         reg = <0x48318000 0x400>;
 643                         interrupts = <37>;
 644                         ti,hwmods = "timer1";
 645                         ti,timer-alwon;
 646                 };
 647
 648                 timer2: timer@49032000 {
 649                         compatible = "ti,omap3430-timer";
 650                         reg = <0x49032000 0x400>;
 651                         interrupts = <38>;
 652                         ti,hwmods = "timer2";
 653                 };
 654
 655                 timer3: timer@49034000 {
 656                         compatible = "ti,omap3430-timer";
 657                         reg = <0x49034000 0x400>;
 658                         interrupts = <39>;
 659                         ti,hwmods = "timer3";
 660                 };
 661
 662                 timer4: timer@49036000 {
 663                         compatible = "ti,omap3430-timer";
 664                         reg = <0x49036000 0x400>;
 665                         interrupts = <40>;
 666                         ti,hwmods = "timer4";
 667                 };
 668
 669                 timer5: timer@49038000 {
 670                         compatible = "ti,omap3430-timer";
 671                         reg = <0x49038000 0x400>;
 672                         interrupts = <41>;
 673                         ti,hwmods = "timer5";
 674                         ti,timer-dsp;
 675                 };
 676
 677                 timer6: timer@4903a000 {
 678                         compatible = "ti,omap3430-timer";
 679                         reg = <0x4903a000 0x400>;
 680                         interrupts = <42>;
 681                         ti,hwmods = "timer6";
 682                         ti,timer-dsp;
 683                 };
 684
 685                 timer7: timer@4903c000 {
 686                         compatible = "ti,omap3430-timer";
 687                         reg = <0x4903c000 0x400>;
 688                         interrupts = <43>;
 689                         ti,hwmods = "timer7";
 690                         ti,timer-dsp;
 691                 };
 692
 693                 timer8: timer@4903e000 {
 694                         compatible = "ti,omap3430-timer";
 695                         reg = <0x4903e000 0x400>;
 696                         interrupts = <44>;
 697                         ti,hwmods = "timer8";
 698                         ti,timer-pwm;
 699                         ti,timer-dsp;
 700                 };
 701
 702                 timer9: timer@49040000 {
 703                         compatible = "ti,omap3430-timer";
 704                         reg = <0x49040000 0x400>;
 705                         interrupts = <45>;
 706                         ti,hwmods = "timer9";
 707                         ti,timer-pwm;
 708                 };
 709
 710                 timer10: timer@48086000 {
 711                         compatible = "ti,omap3430-timer";
 712                         reg = <0x48086000 0x400>;
 713                         interrupts = <46>;
 714                         ti,hwmods = "timer10";
 715                         ti,timer-pwm;
 716                 };
 717
 718                 timer11: timer@48088000 {
 719                         compatible = "ti,omap3430-timer";
 720                         reg = <0x48088000 0x400>;
 721                         interrupts = <47>;
 722                         ti,hwmods = "timer11";
 723                         ti,timer-pwm;
 724                 };
 725
 726                 timer12: timer@48304000 {
 727                         compatible = "ti,omap3430-timer";
 728                         reg = <0x48304000 0x400>;
 729                         interrupts = <95>;
 730                         ti,hwmods = "timer12";
 731                         ti,timer-alwon;
 732                         ti,timer-secure;
 733                 };
 734
 735                 usbhstll: usbhstll@48062000 {
 736                         compatible = "ti,usbhs-tll";
 737                         reg = <0x48062000 0x1000>;
 738                         interrupts = <78>;
 739                         ti,hwmods = "usb_tll_hs";
 740                 };
 741
 742                 usbhshost: usbhshost@48064000 {
 743                         compatible = "ti,usbhs-host";
 744                         reg = <0x48064000 0x400>;
 745                         ti,hwmods = "usb_host_hs";
 746                         #address-cells = <1>;
 747                         #size-cells = <1>;
 748                         ranges;
 749
 750                         usbhsohci: ohci@48064400 {
 751                                 compatible = "ti,ohci-omap3";
 752                                 reg = <0x48064400 0x400>;
 753                                 interrupts = <76>;
 754                                 remote-wakeup-connected;
 755                         };
 756
 757                         usbhsehci: ehci@48064800 {
 758                                 compatible = "ti,ehci-omap";
 759                                 reg = <0x48064800 0x400>;
 760                                 interrupts = <77>;
 761                         };
 762                 };
 763
 764                 gpmc: gpmc@6e000000 {
 765                         compatible = "ti,omap3430-gpmc";
 766                         ti,hwmods = "gpmc";
 767                         reg = <0x6e000000 0x02d0>;
 768                         interrupts = <20>;
 769                         dmas = <&sdma 4>;
 770                         dma-names = "rxtx";
 771                         gpmc,num-cs = <8>;
 772                         gpmc,num-waitpins = <4>;
 773                         #address-cells = <2>;
 774                         #size-cells = <1>;
 775                         interrupt-controller;
 776                         #interrupt-cells = <2>;
 777                         gpio-controller;
 778                         #gpio-cells = <2>;
 779                 };
 780
 781                 usb_otg_hs: usb_otg_hs@480ab000 {
 782                         compatible = "ti,omap3-musb";
 783                         reg = <0x480ab000 0x1000>;
 784                         interrupts = <92>, <93>;
 785                         interrupt-names = "mc", "dma";
 786                         ti,hwmods = "usb_otg_hs";
 787                         multipoint = <1>;
 788                         num-eps = <16>;
 789                         ram-bits = <12>;
 790                 };
 791
 792                 dss: dss@48050000 {
 793                         compatible = "ti,omap3-dss";
 794                         reg = <0x48050000 0x200>;
 795                         status = "disabled";
 796                         ti,hwmods = "dss_core";
 797                         clocks = <&dss1_alwon_fck>;
 798                         clock-names = "fck";
 799                         #address-cells = <1>;
 800                         #size-cells = <1>;
 801                         ranges;
 802
 803                         dispc@48050400 {
 804                                 compatible = "ti,omap3-dispc";
 805                                 reg = <0x48050400 0x400>;
 806                                 interrupts = <25>;
 807                                 ti,hwmods = "dss_dispc";
 808                                 clocks = <&dss1_alwon_fck>;
 809                                 clock-names = "fck";
 810                         };
 811
 812                         dsi: encoder@4804fc00 {
 813                                 compatible = "ti,omap3-dsi";
 814                                 reg = <0x4804fc00 0x200>,
 815                                       <0x4804fe00 0x40>,
 816                                       <0x4804ff00 0x20>;
 817                                 reg-names = "proto", "phy", "pll";
 818                                 interrupts = <25>;
 819                                 status = "disabled";
 820                                 ti,hwmods = "dss_dsi1";
 821                                 clocks = <&dss1_alwon_fck>, <&dss2_alwon_fck>;
 822                                 clock-names = "fck", "sys_clk";
 823                         };
 824
 825                         rfbi: encoder@48050800 {
 826                                 compatible = "ti,omap3-rfbi";
 827                                 reg = <0x48050800 0x100>;
 828                                 status = "disabled";
 829                                 ti,hwmods = "dss_rfbi";
 830                                 clocks = <&dss1_alwon_fck>, <&dss_ick>;
 831                                 clock-names = "fck", "ick";
 832                         };
 833
 834                         venc: encoder@48050c00 {
 835                                 compatible = "ti,omap3-venc";
 836                                 reg = <0x48050c00 0x100>;
 837                                 status = "disabled";
 838                                 ti,hwmods = "dss_venc";
 839                                 clocks = <&dss_tv_fck>;
 840                                 clock-names = "fck";
 841                         };
 842                 };
 843
 844                 ssi: ssi-controller@48058000 {
 845                         compatible = "ti,omap3-ssi";
 846                         ti,hwmods = "ssi";
 847
 848                         status = "disabled";
 849
 850                         reg = <0x48058000 0x1000>,
 851                               <0x48059000 0x1000>;
 852                         reg-names = "sys",
 853                                     "gdd";
 854
 855                         interrupts = <71>;
 856                         interrupt-names = "gdd_mpu";
 857
 858                         #address-cells = <1>;
 859                         #size-cells = <1>;
 860                         ranges;
 861
 862                         ssi_port1: ssi-port@4805a000 {
 863                                 compatible = "ti,omap3-ssi-port";
 864
 865                                 reg = <0x4805a000 0x800>,
 866                                       <0x4805a800 0x800>;
 867                                 reg-names = "tx",
 868                                             "rx";
 869
 870                                 interrupts = <67>,
 871                                              <68>;
 872                         };
 873
 874                         ssi_port2: ssi-port@4805b000 {
 875                                 compatible = "ti,omap3-ssi-port";
 876
 877                                 reg = <0x4805b000 0x800>,
 878                                       <0x4805b800 0x800>;
 879                                 reg-names = "tx",
 880                                             "rx";
 881
 882                                 interrupts = <69>,
 883                                              <70>;
 884                         };
 885                 };
 886         };
 887 };
 888
 889 /include/ "omap3xxx-clocks.dtsi"