2 * Device Tree Source for OMAP3 SoC
4 * Copyright (C) 2011 Texas Instruments Incorporated - http://www.ti.com/
6 * This file is licensed under the terms of the GNU General Public License
7 * version 2. This program is licensed "as is" without any warranty of any
8 * kind, whether express or implied.
11 /include/ "skeleton.dtsi"
14 compatible = "ti,omap3430", "ti,omap3";
15 interrupt-parent = <&intc>;
25 compatible = "arm,cortex-a8";
30 compatible = "arm,cortex-a8-pmu";
32 ti,hwmods = "debugss";
36 * The soc node represents the soc top level view. It is uses for IPs
37 * that are not memory mapped in the MPU view or for the MPU itself.
40 compatible = "ti,omap-infra";
42 compatible = "ti,omap3-mpu";
47 compatible = "ti,iva2.2";
51 compatible = "ti,omap3-c64";
57 * XXX: Use a flat representation of the OMAP3 interconnect.
58 * The real OMAP interconnect network is quite complex.
59 * Since that will not bring real advantage to represent that in DT for
60 * the moment, just use a fake OCP bus entry to represent the whole bus
64 compatible = "simple-bus";
68 ti,hwmods = "l3_main";
70 counter32k: counter@48320000 {
71 compatible = "ti,omap-counter32k";
72 reg = <0x48320000 0x20>;
73 ti,hwmods = "counter_32k";
76 intc: interrupt-controller@48200000 {
77 compatible = "ti,omap2-intc";
79 #interrupt-cells = <1>;
81 reg = <0x48200000 0x1000>;
84 sdma: dma-controller@48056000 {
85 compatible = "ti,omap3630-sdma", "ti,omap3430-sdma";
86 reg = <0x48056000 0x1000>;
96 omap3_pmx_core: pinmux@48002030 {
97 compatible = "ti,omap3-padconf", "pinctrl-single";
98 reg = <0x48002030 0x05cc>;
101 pinctrl-single,register-width = <16>;
102 pinctrl-single,function-mask = <0x7fff>;
105 omap3_pmx_wkup: pinmux@0x48002a58 {
106 compatible = "ti,omap3-padconf", "pinctrl-single";
107 reg = <0x48002a58 0x5c>;
108 #address-cells = <1>;
110 pinctrl-single,register-width = <16>;
111 pinctrl-single,function-mask = <0x7fff>;
114 gpio1: gpio@48310000 {
115 compatible = "ti,omap3-gpio";
116 reg = <0x48310000 0x200>;
121 interrupt-controller;
122 #interrupt-cells = <2>;
125 gpio2: gpio@49050000 {
126 compatible = "ti,omap3-gpio";
127 reg = <0x49050000 0x200>;
132 interrupt-controller;
133 #interrupt-cells = <2>;
136 gpio3: gpio@49052000 {
137 compatible = "ti,omap3-gpio";
138 reg = <0x49052000 0x200>;
143 interrupt-controller;
144 #interrupt-cells = <2>;
147 gpio4: gpio@49054000 {
148 compatible = "ti,omap3-gpio";
149 reg = <0x49054000 0x200>;
154 interrupt-controller;
155 #interrupt-cells = <2>;
158 gpio5: gpio@49056000 {
159 compatible = "ti,omap3-gpio";
160 reg = <0x49056000 0x200>;
165 interrupt-controller;
166 #interrupt-cells = <2>;
169 gpio6: gpio@49058000 {
170 compatible = "ti,omap3-gpio";
171 reg = <0x49058000 0x200>;
176 interrupt-controller;
177 #interrupt-cells = <2>;
180 uart1: serial@4806a000 {
181 compatible = "ti,omap3-uart";
183 clock-frequency = <48000000>;
186 uart2: serial@4806c000 {
187 compatible = "ti,omap3-uart";
189 clock-frequency = <48000000>;
192 uart3: serial@49020000 {
193 compatible = "ti,omap3-uart";
195 clock-frequency = <48000000>;
199 compatible = "ti,omap3-i2c";
200 #address-cells = <1>;
206 compatible = "ti,omap3-i2c";
207 #address-cells = <1>;
213 compatible = "ti,omap3-i2c";
214 #address-cells = <1>;
219 mcspi1: spi@48098000 {
220 compatible = "ti,omap2-mcspi";
221 #address-cells = <1>;
223 ti,hwmods = "mcspi1";
233 dma-names = "tx0", "rx0", "tx1", "rx1",
234 "tx2", "rx2", "tx3", "rx3";
237 mcspi2: spi@4809a000 {
238 compatible = "ti,omap2-mcspi";
239 #address-cells = <1>;
241 ti,hwmods = "mcspi2";
247 dma-names = "tx0", "rx0", "tx1", "rx1";
250 mcspi3: spi@480b8000 {
251 compatible = "ti,omap2-mcspi";
252 #address-cells = <1>;
254 ti,hwmods = "mcspi3";
260 dma-names = "tx0", "rx0", "tx1", "rx1";
263 mcspi4: spi@480ba000 {
264 compatible = "ti,omap2-mcspi";
265 #address-cells = <1>;
267 ti,hwmods = "mcspi4";
269 dmas = <&sdma 70>, <&sdma 71>;
270 dma-names = "tx0", "rx0";
274 compatible = "ti,omap3-hsmmc";
277 dmas = <&sdma 61>, <&sdma 62>;
278 dma-names = "tx", "rx";
282 compatible = "ti,omap3-hsmmc";
284 dmas = <&sdma 47>, <&sdma 48>;
285 dma-names = "tx", "rx";
289 compatible = "ti,omap3-hsmmc";
291 dmas = <&sdma 77>, <&sdma 78>;
292 dma-names = "tx", "rx";
296 compatible = "ti,omap3-wdt";
297 ti,hwmods = "wd_timer2";
300 mcbsp1: mcbsp@48074000 {
301 compatible = "ti,omap3-mcbsp";
302 reg = <0x48074000 0xff>;
304 interrupts = <16>, /* OCP compliant interrupt */
305 <59>, /* TX interrupt */
306 <60>; /* RX interrupt */
307 interrupt-names = "common", "tx", "rx";
308 ti,buffer-size = <128>;
309 ti,hwmods = "mcbsp1";
312 dma-names = "tx", "rx";
315 mcbsp2: mcbsp@49022000 {
316 compatible = "ti,omap3-mcbsp";
317 reg = <0x49022000 0xff>,
319 reg-names = "mpu", "sidetone";
320 interrupts = <17>, /* OCP compliant interrupt */
321 <62>, /* TX interrupt */
322 <63>, /* RX interrupt */
324 interrupt-names = "common", "tx", "rx", "sidetone";
325 ti,buffer-size = <1280>;
326 ti,hwmods = "mcbsp2", "mcbsp2_sidetone";
329 dma-names = "tx", "rx";
332 mcbsp3: mcbsp@49024000 {
333 compatible = "ti,omap3-mcbsp";
334 reg = <0x49024000 0xff>,
336 reg-names = "mpu", "sidetone";
337 interrupts = <22>, /* OCP compliant interrupt */
338 <89>, /* TX interrupt */
339 <90>, /* RX interrupt */
341 interrupt-names = "common", "tx", "rx", "sidetone";
342 ti,buffer-size = <128>;
343 ti,hwmods = "mcbsp3", "mcbsp3_sidetone";
346 dma-names = "tx", "rx";
349 mcbsp4: mcbsp@49026000 {
350 compatible = "ti,omap3-mcbsp";
351 reg = <0x49026000 0xff>;
353 interrupts = <23>, /* OCP compliant interrupt */
354 <54>, /* TX interrupt */
355 <55>; /* RX interrupt */
356 interrupt-names = "common", "tx", "rx";
357 ti,buffer-size = <128>;
358 ti,hwmods = "mcbsp4";
361 dma-names = "tx", "rx";
364 mcbsp5: mcbsp@48096000 {
365 compatible = "ti,omap3-mcbsp";
366 reg = <0x48096000 0xff>;
368 interrupts = <27>, /* OCP compliant interrupt */
369 <81>, /* TX interrupt */
370 <82>; /* RX interrupt */
371 interrupt-names = "common", "tx", "rx";
372 ti,buffer-size = <128>;
373 ti,hwmods = "mcbsp5";
376 dma-names = "tx", "rx";
379 timer1: timer@48318000 {
380 compatible = "ti,omap3430-timer";
381 reg = <0x48318000 0x400>;
383 ti,hwmods = "timer1";
387 timer2: timer@49032000 {
388 compatible = "ti,omap3430-timer";
389 reg = <0x49032000 0x400>;
391 ti,hwmods = "timer2";
394 timer3: timer@49034000 {
395 compatible = "ti,omap3430-timer";
396 reg = <0x49034000 0x400>;
398 ti,hwmods = "timer3";
401 timer4: timer@49036000 {
402 compatible = "ti,omap3430-timer";
403 reg = <0x49036000 0x400>;
405 ti,hwmods = "timer4";
408 timer5: timer@49038000 {
409 compatible = "ti,omap3430-timer";
410 reg = <0x49038000 0x400>;
412 ti,hwmods = "timer5";
416 timer6: timer@4903a000 {
417 compatible = "ti,omap3430-timer";
418 reg = <0x4903a000 0x400>;
420 ti,hwmods = "timer6";
424 timer7: timer@4903c000 {
425 compatible = "ti,omap3430-timer";
426 reg = <0x4903c000 0x400>;
428 ti,hwmods = "timer7";
432 timer8: timer@4903e000 {
433 compatible = "ti,omap3430-timer";
434 reg = <0x4903e000 0x400>;
436 ti,hwmods = "timer8";
441 timer9: timer@49040000 {
442 compatible = "ti,omap3430-timer";
443 reg = <0x49040000 0x400>;
445 ti,hwmods = "timer9";
449 timer10: timer@48086000 {
450 compatible = "ti,omap3430-timer";
451 reg = <0x48086000 0x400>;
453 ti,hwmods = "timer10";
457 timer11: timer@48088000 {
458 compatible = "ti,omap3430-timer";
459 reg = <0x48088000 0x400>;
461 ti,hwmods = "timer11";
465 timer12: timer@48304000 {
466 compatible = "ti,omap3430-timer";
467 reg = <0x48304000 0x400>;
469 ti,hwmods = "timer12";
474 usbhstll: usbhstll@48062000 {
475 compatible = "ti,usbhs-tll";
476 reg = <0x48062000 0x1000>;
478 ti,hwmods = "usb_tll_hs";
481 usbhshost: usbhshost@48064000 {
482 compatible = "ti,usbhs-host";
483 reg = <0x48064000 0x400>;
484 ti,hwmods = "usb_host_hs";
485 #address-cells = <1>;
489 usbhsohci: ohci@48064400 {
490 compatible = "ti,ohci-omap3", "usb-ohci";
491 reg = <0x48064400 0x400>;
492 interrupt-parent = <&intc>;
496 usbhsehci: ehci@48064800 {
497 compatible = "ti,ehci-omap", "usb-ehci";
498 reg = <0x48064800 0x400>;
499 interrupt-parent = <&intc>;
504 gpmc: gpmc@6e000000 {
505 compatible = "ti,omap3430-gpmc";
507 reg = <0x6e000000 0x02d0>;
510 gpmc,num-waitpins = <4>;
511 #address-cells = <2>;
515 usb_otg_hs: usb_otg_hs@480ab000 {
516 compatible = "ti,omap3-musb";
517 reg = <0x480ab000 0x1000>;
518 interrupts = <0 92 0x4>, <0 93 0x4>;
519 interrupt-names = "mc", "dma";
520 ti,hwmods = "usb_otg_hs";
521 usb-phy = <&usb2_phy>;