arch/arm/boot/dts/omap3.dtsi

   1 /*
   2  * Device Tree Source for OMAP3 SoC
   3  *
   4  * Copyright (C) 2011 Texas Instruments Incorporated - http://www.ti.com/
   5  *
   6  * This file is licensed under the terms of the GNU General Public License
   7  * version 2.  This program is licensed "as is" without any warranty of any
   8  * kind, whether express or implied.
   9  */
  10
  11 #include <dt-bindings/bus/ti-sysc.h>
  12 #include <dt-bindings/gpio/gpio.h>
  13 #include <dt-bindings/interrupt-controller/irq.h>
  14 #include <dt-bindings/pinctrl/omap.h>
  15
  16 / {
  17         compatible = "ti,omap3430", "ti,omap3";
  18         interrupt-parent = <&intc>;
  19         #address-cells = <1>;
  20         #size-cells = <1>;
  21         chosen { };
  22
  23         aliases {
  24                 i2c0 = &i2c1;
  25                 i2c1 = &i2c2;
  26                 i2c2 = &i2c3;
  27                 serial0 = &uart1;
  28                 serial1 = &uart2;
  29                 serial2 = &uart3;
  30         };
  31
  32         cpus {
  33                 #address-cells = <1>;
  34                 #size-cells = <0>;
  35
  36                 cpu@0 {
  37                         compatible = "arm,cortex-a8";
  38                         device_type = "cpu";
  39                         reg = <0x0>;
  40
  41                         clocks = <&dpll1_ck>;
  42                         clock-names = "cpu";
  43
  44                         clock-latency = <300000>; /* From omap-cpufreq driver */
  45                 };
  46         };
  47
  48         pmu@54000000 {
  49                 compatible = "arm,cortex-a8-pmu";
  50                 reg = <0x54000000 0x800000>;
  51                 interrupts = <3>;
  52                 ti,hwmods = "debugss";
  53         };
  54
  55         /*
  56          * The soc node represents the soc top level view. It is used for IPs
  57          * that are not memory mapped in the MPU view or for the MPU itself.
  58          */
  59         soc {
  60                 compatible = "ti,omap-infra";
  61                 mpu {
  62                         compatible = "ti,omap3-mpu";
  63                         ti,hwmods = "mpu";
  64                 };
  65
  66                 iva: iva {
  67                         compatible = "ti,iva2.2";
  68                         ti,hwmods = "iva";
  69
  70                         dsp {
  71                                 compatible = "ti,omap3-c64";
  72                         };
  73                 };
  74         };
  75
  76         /*
  77          * XXX: Use a flat representation of the OMAP3 interconnect.
  78          * The real OMAP interconnect network is quite complex.
  79          * Since it will not bring real advantage to represent that in DT for
  80          * the moment, just use a fake OCP bus entry to represent the whole bus
  81          * hierarchy.
  82          */
  83         ocp@68000000 {
  84                 compatible = "ti,omap3-l3-smx", "simple-bus";
  85                 reg = <0x68000000 0x10000>;
  86                 interrupts = <9 10>;
  87                 #address-cells = <1>;
  88                 #size-cells = <1>;
  89                 ranges;
  90                 ti,hwmods = "l3_main";
  91
  92                 l4_core: l4@48000000 {
  93                         compatible = "ti,omap3-l4-core", "simple-bus";
  94                         #address-cells = <1>;
  95                         #size-cells = <1>;
  96                         ranges = <0 0x48000000 0x1000000>;
  97
  98                         scm: scm@2000 {
  99                                 compatible = "ti,omap3-scm", "simple-bus";
 100                                 reg = <0x2000 0x2000>;
 101                                 #address-cells = <1>;
 102                                 #size-cells = <1>;
 103                                 ranges = <0 0x2000 0x2000>;
 104
 105                                 omap3_pmx_core: pinmux@30 {
 106                                         compatible = "ti,omap3-padconf",
 107                                                      "pinctrl-single";
 108                                         reg = <0x30 0x238>;
 109                                         #address-cells = <1>;
 110                                         #size-cells = <0>;
 111                                         #pinctrl-cells = <1>;
 112                                         #interrupt-cells = <1>;
 113                                         interrupt-controller;
 114                                         pinctrl-single,register-width = <16>;
 115                                         pinctrl-single,function-mask = <0xff1f>;
 116                                 };
 117
 118                                 scm_conf: scm_conf@270 {
 119                                         compatible = "syscon", "simple-bus";
 120                                         reg = <0x270 0x330>;
 121                                         #address-cells = <1>;
 122                                         #size-cells = <1>;
 123                                         ranges = <0 0x270 0x330>;
 124
 125                                         pbias_regulator: pbias_regulator@2b0 {
 126                                                 compatible = "ti,pbias-omap3", "ti,pbias-omap";
 127                                                 reg = <0x2b0 0x4>;
 128                                                 syscon = <&scm_conf>;
 129                                                 pbias_mmc_reg: pbias_mmc_omap2430 {
 130                                                         regulator-name = "pbias_mmc_omap2430";
 131                                                         regulator-min-microvolt = <1800000>;
 132                                                         regulator-max-microvolt = <3000000>;
 133                                                 };
 134                                         };
 135
 136                                         scm_clocks: clocks {
 137                                                 #address-cells = <1>;
 138                                                 #size-cells = <0>;
 139                                         };
 140                                 };
 141
 142                                 scm_clockdomains: clockdomains {
 143                                 };
 144
 145                                 omap3_pmx_wkup: pinmux@a00 {
 146                                         compatible = "ti,omap3-padconf",
 147                                                      "pinctrl-single";
 148                                         reg = <0xa00 0x5c>;
 149                                         #address-cells = <1>;
 150                                         #size-cells = <0>;
 151                                         #pinctrl-cells = <1>;
 152                                         #interrupt-cells = <1>;
 153                                         interrupt-controller;
 154                                         pinctrl-single,register-width = <16>;
 155                                         pinctrl-single,function-mask = <0xff1f>;
 156                                 };
 157                         };
 158                 };
 159
 160                 aes: aes@480c5000 {
 161                         compatible = "ti,omap3-aes";
 162                         ti,hwmods = "aes";
 163                         reg = <0x480c5000 0x50>;
 164                         interrupts = <0>;
 165                         dmas = <&sdma 65 &sdma 66>;
 166                         dma-names = "tx", "rx";
 167                 };
 168
 169                 prm: prm@48306000 {
 170                         compatible = "ti,omap3-prm";
 171                         reg = <0x48306000 0x4000>;
 172                         interrupts = <11>;
 173
 174                         prm_clocks: clocks {
 175                                 #address-cells = <1>;
 176                                 #size-cells = <0>;
 177                         };
 178
 179                         prm_clockdomains: clockdomains {
 180                         };
 181                 };
 182
 183                 cm: cm@48004000 {
 184                         compatible = "ti,omap3-cm";
 185                         reg = <0x48004000 0x4000>;
 186
 187                         cm_clocks: clocks {
 188                                 #address-cells = <1>;
 189                                 #size-cells = <0>;
 190                         };
 191
 192                         cm_clockdomains: clockdomains {
 193                         };
 194                 };
 195
 196                 target-module@48320000 {
 197                         compatible = "ti,sysc-omap2", "ti,sysc";
 198                         reg = <0x48320000 0x4>,
 199                               <0x48320004 0x4>;
 200                         reg-names = "rev", "sysc";
 201                         ti,sysc-sidle = <SYSC_IDLE_FORCE>,
 202                                         <SYSC_IDLE_NO>;
 203                         clocks = <&wkup_32k_fck>, <&omap_32ksync_ick>;
 204                         clock-names = "fck", "ick";
 205                         #address-cells = <1>;
 206                         #size-cells = <1>;
 207                         ranges = <0x0 0x48320000 0x1000>;
 208
 209                         counter32k: counter@0 {
 210                                 compatible = "ti,omap-counter32k";
 211                                 reg = <0x0 0x20>;
 212                         };
 213                 };
 214
 215                 intc: interrupt-controller@48200000 {
 216                         compatible = "ti,omap3-intc";
 217                         interrupt-controller;
 218                         #interrupt-cells = <1>;
 219                         reg = <0x48200000 0x1000>;
 220                 };
 221
 222                 target-module@48056000 {
 223                         compatible = "ti,sysc-omap2", "ti,sysc";
 224                         reg = <0x48056000 0x4>,
 225                               <0x4805602c 0x4>,
 226                               <0x48056028 0x4>;
 227                         reg-names = "rev", "sysc", "syss";
 228                         ti,sysc-mask = <(SYSC_OMAP2_CLOCKACTIVITY |
 229                                          SYSC_OMAP2_EMUFREE |
 230                                          SYSC_OMAP2_SOFTRESET |
 231                                          SYSC_OMAP2_AUTOIDLE)>;
 232                         ti,sysc-midle = <SYSC_IDLE_FORCE>,
 233                                         <SYSC_IDLE_NO>,
 234                                         <SYSC_IDLE_SMART>;
 235                         ti,sysc-sidle = <SYSC_IDLE_FORCE>,
 236                                         <SYSC_IDLE_NO>,
 237                                         <SYSC_IDLE_SMART>;
 238                         ti,syss-mask = <1>;
 239                         /* Domains (V, P, C): core, core_pwrdm, core_l3_clkdm */
 240                         clocks = <&core_l3_ick>;
 241                         clock-names = "ick";
 242                         #address-cells = <1>;
 243                         #size-cells = <1>;
 244                         ranges = <0 0x48056000 0x1000>;
 245
 246                         sdma: dma-controller@0 {
 247                                 compatible = "ti,omap3430-sdma", "ti,omap-sdma";
 248                                 reg = <0x0 0x1000>;
 249                                 interrupts = <12>,
 250                                              <13>,
 251                                              <14>,
 252                                              <15>;
 253                                 #dma-cells = <1>;
 254                                 dma-channels = <32>;
 255                                 dma-requests = <96>;
 256                         };
 257                 };
 258
 259                 gpio1: gpio@48310000 {
 260                         compatible = "ti,omap3-gpio";
 261                         reg = <0x48310000 0x200>;
 262                         interrupts = <29>;
 263                         ti,hwmods = "gpio1";
 264                         ti,gpio-always-on;
 265                         gpio-controller;
 266                         #gpio-cells = <2>;
 267                         interrupt-controller;
 268                         #interrupt-cells = <2>;
 269                 };
 270
 271                 gpio2: gpio@49050000 {
 272                         compatible = "ti,omap3-gpio";
 273                         reg = <0x49050000 0x200>;
 274                         interrupts = <30>;
 275                         ti,hwmods = "gpio2";
 276                         gpio-controller;
 277                         #gpio-cells = <2>;
 278                         interrupt-controller;
 279                         #interrupt-cells = <2>;
 280                 };
 281
 282                 gpio3: gpio@49052000 {
 283                         compatible = "ti,omap3-gpio";
 284                         reg = <0x49052000 0x200>;
 285                         interrupts = <31>;
 286                         ti,hwmods = "gpio3";
 287                         gpio-controller;
 288                         #gpio-cells = <2>;
 289                         interrupt-controller;
 290                         #interrupt-cells = <2>;
 291                 };
 292
 293                 gpio4: gpio@49054000 {
 294                         compatible = "ti,omap3-gpio";
 295                         reg = <0x49054000 0x200>;
 296                         interrupts = <32>;
 297                         ti,hwmods = "gpio4";
 298                         gpio-controller;
 299                         #gpio-cells = <2>;
 300                         interrupt-controller;
 301                         #interrupt-cells = <2>;
 302                 };
 303
 304                 gpio5: gpio@49056000 {
 305                         compatible = "ti,omap3-gpio";
 306                         reg = <0x49056000 0x200>;
 307                         interrupts = <33>;
 308                         ti,hwmods = "gpio5";
 309                         gpio-controller;
 310                         #gpio-cells = <2>;
 311                         interrupt-controller;
 312                         #interrupt-cells = <2>;
 313                 };
 314
 315                 gpio6: gpio@49058000 {
 316                         compatible = "ti,omap3-gpio";
 317                         reg = <0x49058000 0x200>;
 318                         interrupts = <34>;
 319                         ti,hwmods = "gpio6";
 320                         gpio-controller;
 321                         #gpio-cells = <2>;
 322                         interrupt-controller;
 323                         #interrupt-cells = <2>;
 324                 };
 325
 326                 uart1: serial@4806a000 {
 327                         compatible = "ti,omap3-uart";
 328                         reg = <0x4806a000 0x2000>;
 329                         interrupts-extended = <&intc 72>;
 330                         dmas = <&sdma 49 &sdma 50>;
 331                         dma-names = "tx", "rx";
 332                         ti,hwmods = "uart1";
 333                         clock-frequency = <48000000>;
 334                 };
 335
 336                 uart2: serial@4806c000 {
 337                         compatible = "ti,omap3-uart";
 338                         reg = <0x4806c000 0x400>;
 339                         interrupts-extended = <&intc 73>;
 340                         dmas = <&sdma 51 &sdma 52>;
 341                         dma-names = "tx", "rx";
 342                         ti,hwmods = "uart2";
 343                         clock-frequency = <48000000>;
 344                 };
 345
 346                 uart3: serial@49020000 {
 347                         compatible = "ti,omap3-uart";
 348                         reg = <0x49020000 0x400>;
 349                         interrupts-extended = <&intc 74>;
 350                         dmas = <&sdma 53 &sdma 54>;
 351                         dma-names = "tx", "rx";
 352                         ti,hwmods = "uart3";
 353                         clock-frequency = <48000000>;
 354                 };
 355
 356                 i2c1: i2c@48070000 {
 357                         compatible = "ti,omap3-i2c";
 358                         reg = <0x48070000 0x80>;
 359                         interrupts = <56>;
 360                         dmas = <&sdma 27 &sdma 28>;
 361                         dma-names = "tx", "rx";
 362                         #address-cells = <1>;
 363                         #size-cells = <0>;
 364                         ti,hwmods = "i2c1";
 365                 };
 366
 367                 i2c2: i2c@48072000 {
 368                         compatible = "ti,omap3-i2c";
 369                         reg = <0x48072000 0x80>;
 370                         interrupts = <57>;
 371                         dmas = <&sdma 29 &sdma 30>;
 372                         dma-names = "tx", "rx";
 373                         #address-cells = <1>;
 374                         #size-cells = <0>;
 375                         ti,hwmods = "i2c2";
 376                 };
 377
 378                 i2c3: i2c@48060000 {
 379                         compatible = "ti,omap3-i2c";
 380                         reg = <0x48060000 0x80>;
 381                         interrupts = <61>;
 382                         dmas = <&sdma 25 &sdma 26>;
 383                         dma-names = "tx", "rx";
 384                         #address-cells = <1>;
 385                         #size-cells = <0>;
 386                         ti,hwmods = "i2c3";
 387                 };
 388
 389                 mailbox: mailbox@48094000 {
 390                         compatible = "ti,omap3-mailbox";
 391                         ti,hwmods = "mailbox";
 392                         reg = <0x48094000 0x200>;
 393                         interrupts = <26>;
 394                         #mbox-cells = <1>;
 395                         ti,mbox-num-users = <2>;
 396                         ti,mbox-num-fifos = <2>;
 397                         mbox_dsp: dsp {
 398                                 ti,mbox-tx = <0 0 0>;
 399                                 ti,mbox-rx = <1 0 0>;
 400                         };
 401                 };
 402
 403                 mcspi1: spi@48098000 {
 404                         compatible = "ti,omap2-mcspi";
 405                         reg = <0x48098000 0x100>;
 406                         interrupts = <65>;
 407                         #address-cells = <1>;
 408                         #size-cells = <0>;
 409                         ti,hwmods = "mcspi1";
 410                         ti,spi-num-cs = <4>;
 411                         dmas = <&sdma 35>,
 412                                <&sdma 36>,
 413                                <&sdma 37>,
 414                                <&sdma 38>,
 415                                <&sdma 39>,
 416                                <&sdma 40>,
 417                                <&sdma 41>,
 418                                <&sdma 42>;
 419                         dma-names = "tx0", "rx0", "tx1", "rx1",
 420                                     "tx2", "rx2", "tx3", "rx3";
 421                 };
 422
 423                 mcspi2: spi@4809a000 {
 424                         compatible = "ti,omap2-mcspi";
 425                         reg = <0x4809a000 0x100>;
 426                         interrupts = <66>;
 427                         #address-cells = <1>;
 428                         #size-cells = <0>;
 429                         ti,hwmods = "mcspi2";
 430                         ti,spi-num-cs = <2>;
 431                         dmas = <&sdma 43>,
 432                                <&sdma 44>,
 433                                <&sdma 45>,
 434                                <&sdma 46>;
 435                         dma-names = "tx0", "rx0", "tx1", "rx1";
 436                 };
 437
 438                 mcspi3: spi@480b8000 {
 439                         compatible = "ti,omap2-mcspi";
 440                         reg = <0x480b8000 0x100>;
 441                         interrupts = <91>;
 442                         #address-cells = <1>;
 443                         #size-cells = <0>;
 444                         ti,hwmods = "mcspi3";
 445                         ti,spi-num-cs = <2>;
 446                         dmas = <&sdma 15>,
 447                                <&sdma 16>,
 448                                <&sdma 23>,
 449                                <&sdma 24>;
 450                         dma-names = "tx0", "rx0", "tx1", "rx1";
 451                 };
 452
 453                 mcspi4: spi@480ba000 {
 454                         compatible = "ti,omap2-mcspi";
 455                         reg = <0x480ba000 0x100>;
 456                         interrupts = <48>;
 457                         #address-cells = <1>;
 458                         #size-cells = <0>;
 459                         ti,hwmods = "mcspi4";
 460                         ti,spi-num-cs = <1>;
 461                         dmas = <&sdma 70>, <&sdma 71>;
 462                         dma-names = "tx0", "rx0";
 463                 };
 464
 465                 hdqw1w: 1w@480b2000 {
 466                         compatible = "ti,omap3-1w";
 467                         reg = <0x480b2000 0x1000>;
 468                         interrupts = <58>;
 469                         ti,hwmods = "hdq1w";
 470                 };
 471
 472                 mmc1: mmc@4809c000 {
 473                         compatible = "ti,omap3-hsmmc";
 474                         reg = <0x4809c000 0x200>;
 475                         interrupts = <83>;
 476                         ti,hwmods = "mmc1";
 477                         ti,dual-volt;
 478                         dmas = <&sdma 61>, <&sdma 62>;
 479                         dma-names = "tx", "rx";
 480                         pbias-supply = <&pbias_mmc_reg>;
 481                 };
 482
 483                 mmc2: mmc@480b4000 {
 484                         compatible = "ti,omap3-hsmmc";
 485                         reg = <0x480b4000 0x200>;
 486                         interrupts = <86>;
 487                         ti,hwmods = "mmc2";
 488                         dmas = <&sdma 47>, <&sdma 48>;
 489                         dma-names = "tx", "rx";
 490                 };
 491
 492                 mmc3: mmc@480ad000 {
 493                         compatible = "ti,omap3-hsmmc";
 494                         reg = <0x480ad000 0x200>;
 495                         interrupts = <94>;
 496                         ti,hwmods = "mmc3";
 497                         dmas = <&sdma 77>, <&sdma 78>;
 498                         dma-names = "tx", "rx";
 499                 };
 500
 501                 mmu_isp: mmu@480bd400 {
 502                         #iommu-cells = <0>;
 503                         compatible = "ti,omap2-iommu";
 504                         reg = <0x480bd400 0x80>;
 505                         interrupts = <24>;
 506                         ti,hwmods = "mmu_isp";
 507                         ti,#tlb-entries = <8>;
 508                 };
 509
 510                 mmu_iva: mmu@5d000000 {
 511                         #iommu-cells = <0>;
 512                         compatible = "ti,omap2-iommu";
 513                         reg = <0x5d000000 0x80>;
 514                         interrupts = <28>;
 515                         ti,hwmods = "mmu_iva";
 516                         status = "disabled";
 517                 };
 518
 519                 wdt2: wdt@48314000 {
 520                         compatible = "ti,omap3-wdt";
 521                         reg = <0x48314000 0x80>;
 522                         ti,hwmods = "wd_timer2";
 523                 };
 524
 525                 mcbsp1: mcbsp@48074000 {
 526                         compatible = "ti,omap3-mcbsp";
 527                         reg = <0x48074000 0xff>;
 528                         reg-names = "mpu";
 529                         interrupts = <16>, /* OCP compliant interrupt */
 530                                      <59>, /* TX interrupt */
 531                                      <60>; /* RX interrupt */
 532                         interrupt-names = "common", "tx", "rx";
 533                         ti,buffer-size = <128>;
 534                         ti,hwmods = "mcbsp1";
 535                         dmas = <&sdma 31>,
 536                                <&sdma 32>;
 537                         dma-names = "tx", "rx";
 538                         clocks = <&mcbsp1_fck>;
 539                         clock-names = "fck";
 540                         status = "disabled";
 541                 };
 542
 543                 /* Likely needs to be tagged disabled on HS devices */
 544                 rng_target: target-module@480a0000 {
 545                         compatible = "ti,sysc-omap2", "ti,sysc";
 546                         reg = <0x480a003c 0x4>,
 547                               <0x480a0040 0x4>,
 548                               <0x480a0044 0x4>;
 549                         reg-names = "rev", "sysc", "syss";
 550                         ti,sysc-mask = <(SYSC_OMAP2_AUTOIDLE)>;
 551                         ti,sysc-sidle = <SYSC_IDLE_FORCE>,
 552                                         <SYSC_IDLE_NO>;
 553                         ti,syss-mask = <1>;
 554                         clocks = <&rng_ick>;
 555                         clock-names = "ick";
 556                         #address-cells = <1>;
 557                         #size-cells = <1>;
 558                         ranges = <0 0x480a0000 0x2000>;
 559
 560                         rng: rng@0 {
 561                                 compatible = "ti,omap2-rng";
 562                                 reg = <0x0 0x2000>;
 563                                 interrupts = <52>;
 564                         };
 565                 };
 566
 567                 mcbsp2: mcbsp@49022000 {
 568                         compatible = "ti,omap3-mcbsp";
 569                         reg = <0x49022000 0xff>,
 570                               <0x49028000 0xff>;
 571                         reg-names = "mpu", "sidetone";
 572                         interrupts = <17>, /* OCP compliant interrupt */
 573                                      <62>, /* TX interrupt */
 574                                      <63>, /* RX interrupt */
 575                                      <4>;  /* Sidetone */
 576                         interrupt-names = "common", "tx", "rx", "sidetone";
 577                         ti,buffer-size = <1280>;
 578                         ti,hwmods = "mcbsp2", "mcbsp2_sidetone";
 579                         dmas = <&sdma 33>,
 580                                <&sdma 34>;
 581                         dma-names = "tx", "rx";
 582                         clocks = <&mcbsp2_fck>, <&mcbsp2_ick>;
 583                         clock-names = "fck", "ick";
 584                         status = "disabled";
 585                 };
 586
 587                 mcbsp3: mcbsp@49024000 {
 588                         compatible = "ti,omap3-mcbsp";
 589                         reg = <0x49024000 0xff>,
 590                               <0x4902a000 0xff>;
 591                         reg-names = "mpu", "sidetone";
 592                         interrupts = <22>, /* OCP compliant interrupt */
 593                                      <89>, /* TX interrupt */
 594                                      <90>, /* RX interrupt */
 595                                      <5>;  /* Sidetone */
 596                         interrupt-names = "common", "tx", "rx", "sidetone";
 597                         ti,buffer-size = <128>;
 598                         ti,hwmods = "mcbsp3", "mcbsp3_sidetone";
 599                         dmas = <&sdma 17>,
 600                                <&sdma 18>;
 601                         dma-names = "tx", "rx";
 602                         clocks = <&mcbsp3_fck>, <&mcbsp3_ick>;
 603                         clock-names = "fck", "ick";
 604                         status = "disabled";
 605                 };
 606
 607                 mcbsp4: mcbsp@49026000 {
 608                         compatible = "ti,omap3-mcbsp";
 609                         reg = <0x49026000 0xff>;
 610                         reg-names = "mpu";
 611                         interrupts = <23>, /* OCP compliant interrupt */
 612                                      <54>, /* TX interrupt */
 613                                      <55>; /* RX interrupt */
 614                         interrupt-names = "common", "tx", "rx";
 615                         ti,buffer-size = <128>;
 616                         ti,hwmods = "mcbsp4";
 617                         dmas = <&sdma 19>,
 618                                <&sdma 20>;
 619                         dma-names = "tx", "rx";
 620                         clocks = <&mcbsp4_fck>;
 621                         clock-names = "fck";
 622                         #sound-dai-cells = <0>;
 623                         status = "disabled";
 624                 };
 625
 626                 mcbsp5: mcbsp@48096000 {
 627                         compatible = "ti,omap3-mcbsp";
 628                         reg = <0x48096000 0xff>;
 629                         reg-names = "mpu";
 630                         interrupts = <27>, /* OCP compliant interrupt */
 631                                      <81>, /* TX interrupt */
 632                                      <82>; /* RX interrupt */
 633                         interrupt-names = "common", "tx", "rx";
 634                         ti,buffer-size = <128>;
 635                         ti,hwmods = "mcbsp5";
 636                         dmas = <&sdma 21>,
 637                                <&sdma 22>;
 638                         dma-names = "tx", "rx";
 639                         clocks = <&mcbsp5_fck>;
 640                         clock-names = "fck";
 641                         status = "disabled";
 642                 };
 643
 644                 sham: sham@480c3000 {
 645                         compatible = "ti,omap3-sham";
 646                         ti,hwmods = "sham";
 647                         reg = <0x480c3000 0x64>;
 648                         interrupts = <49>;
 649                         dmas = <&sdma 69>;
 650                         dma-names = "rx";
 651                 };
 652
 653                 timer1_target: target-module@48318000 {
 654                         compatible = "ti,sysc-omap2-timer", "ti,sysc";
 655                         reg = <0x48318000 0x4>,
 656                               <0x48318010 0x4>,
 657                               <0x48318014 0x4>;
 658                         reg-names = "rev", "sysc", "syss";
 659                         ti,sysc-mask = <(SYSC_OMAP2_CLOCKACTIVITY |
 660                                          SYSC_OMAP2_EMUFREE |
 661                                          SYSC_OMAP2_ENAWAKEUP |
 662                                          SYSC_OMAP2_SOFTRESET |
 663                                          SYSC_OMAP2_AUTOIDLE)>;
 664                         ti,sysc-sidle = <SYSC_IDLE_FORCE>,
 665                                         <SYSC_IDLE_NO>,
 666                                         <SYSC_IDLE_SMART>;
 667                         ti,syss-mask = <1>;
 668                         clocks = <&gpt1_fck>, <&gpt1_ick>;
 669                         clock-names = "fck", "ick";
 670                         #address-cells = <1>;
 671                         #size-cells = <1>;
 672                         ranges = <0x0 0x48318000 0x1000>;
 673
 674                         timer1: timer@0 {
 675                                 compatible = "ti,omap3430-timer";
 676                                 reg = <0x0 0x80>;
 677                                 clocks = <&gpt1_fck>;
 678                                 clock-names = "fck";
 679                                 interrupts = <37>;
 680                                 ti,timer-alwon;
 681                         };
 682                 };
 683
 684                 timer2_target: target-module@49032000 {
 685                         compatible = "ti,sysc-omap2-timer", "ti,sysc";
 686                         reg = <0x49032000 0x4>,
 687                               <0x49032010 0x4>,
 688                               <0x49032014 0x4>;
 689                         reg-names = "rev", "sysc", "syss";
 690                         ti,sysc-mask = <(SYSC_OMAP2_CLOCKACTIVITY |
 691                                          SYSC_OMAP2_EMUFREE |
 692                                          SYSC_OMAP2_ENAWAKEUP |
 693                                          SYSC_OMAP2_SOFTRESET |
 694                                          SYSC_OMAP2_AUTOIDLE)>;
 695                         ti,sysc-sidle = <SYSC_IDLE_FORCE>,
 696                                         <SYSC_IDLE_NO>,
 697                                         <SYSC_IDLE_SMART>;
 698                         ti,syss-mask = <1>;
 699                         clocks = <&gpt2_fck>, <&gpt2_ick>;
 700                         clock-names = "fck", "ick";
 701                         #address-cells = <1>;
 702                         #size-cells = <1>;
 703                         ranges = <0x0 0x49032000 0x1000>;
 704
 705                         timer2: timer@0 {
 706                                 compatible = "ti,omap3430-timer";
 707                                 reg = <0 0x400>;
 708                                 interrupts = <38>;
 709                         };
 710                 };
 711
 712                 timer3: timer@49034000 {
 713                         compatible = "ti,omap3430-timer";
 714                         reg = <0x49034000 0x400>;
 715                         interrupts = <39>;
 716                         ti,hwmods = "timer3";
 717                 };
 718
 719                 timer4: timer@49036000 {
 720                         compatible = "ti,omap3430-timer";
 721                         reg = <0x49036000 0x400>;
 722                         interrupts = <40>;
 723                         ti,hwmods = "timer4";
 724                 };
 725
 726                 timer5: timer@49038000 {
 727                         compatible = "ti,omap3430-timer";
 728                         reg = <0x49038000 0x400>;
 729                         interrupts = <41>;
 730                         ti,hwmods = "timer5";
 731                         ti,timer-dsp;
 732                 };
 733
 734                 timer6: timer@4903a000 {
 735                         compatible = "ti,omap3430-timer";
 736                         reg = <0x4903a000 0x400>;
 737                         interrupts = <42>;
 738                         ti,hwmods = "timer6";
 739                         ti,timer-dsp;
 740                 };
 741
 742                 timer7: timer@4903c000 {
 743                         compatible = "ti,omap3430-timer";
 744                         reg = <0x4903c000 0x400>;
 745                         interrupts = <43>;
 746                         ti,hwmods = "timer7";
 747                         ti,timer-dsp;
 748                 };
 749
 750                 timer8: timer@4903e000 {
 751                         compatible = "ti,omap3430-timer";
 752                         reg = <0x4903e000 0x400>;
 753                         interrupts = <44>;
 754                         ti,hwmods = "timer8";
 755                         ti,timer-pwm;
 756                         ti,timer-dsp;
 757                 };
 758
 759                 timer9: timer@49040000 {
 760                         compatible = "ti,omap3430-timer";
 761                         reg = <0x49040000 0x400>;
 762                         interrupts = <45>;
 763                         ti,hwmods = "timer9";
 764                         ti,timer-pwm;
 765                 };
 766
 767                 timer10: timer@48086000 {
 768                         compatible = "ti,omap3430-timer";
 769                         reg = <0x48086000 0x400>;
 770                         interrupts = <46>;
 771                         ti,hwmods = "timer10";
 772                         ti,timer-pwm;
 773                 };
 774
 775                 timer11: timer@48088000 {
 776                         compatible = "ti,omap3430-timer";
 777                         reg = <0x48088000 0x400>;
 778                         interrupts = <47>;
 779                         ti,hwmods = "timer11";
 780                         ti,timer-pwm;
 781                 };
 782
 783                 timer12_target: target-module@48304000 {
 784                         compatible = "ti,sysc-omap2-timer", "ti,sysc";
 785                         reg = <0x48304000 0x4>,
 786                               <0x48304010 0x4>,
 787                               <0x48304014 0x4>;
 788                         reg-names = "rev", "sysc", "syss";
 789                         ti,sysc-mask = <(SYSC_OMAP2_CLOCKACTIVITY |
 790                                          SYSC_OMAP2_EMUFREE |
 791                                          SYSC_OMAP2_ENAWAKEUP |
 792                                          SYSC_OMAP2_SOFTRESET |
 793                                          SYSC_OMAP2_AUTOIDLE)>;
 794                         ti,sysc-sidle = <SYSC_IDLE_FORCE>,
 795                                         <SYSC_IDLE_NO>,
 796                                         <SYSC_IDLE_SMART>;
 797                         ti,syss-mask = <1>;
 798                         clocks = <&gpt12_fck>, <&gpt12_ick>;
 799                         clock-names = "fck", "ick";
 800                         #address-cells = <1>;
 801                         #size-cells = <1>;
 802                         ranges = <0x0 0x48304000 0x1000>;
 803
 804                         timer12: timer@0 {
 805                                 compatible = "ti,omap3430-timer";
 806                                 reg = <0 0x400>;
 807                                 interrupts = <95>;
 808                                 ti,timer-alwon;
 809                                 ti,timer-secure;
 810                         };
 811                 };
 812
 813                 usbhstll: usbhstll@48062000 {
 814                         compatible = "ti,usbhs-tll";
 815                         reg = <0x48062000 0x1000>;
 816                         interrupts = <78>;
 817                         ti,hwmods = "usb_tll_hs";
 818                 };
 819
 820                 usbhshost: usbhshost@48064000 {
 821                         compatible = "ti,usbhs-host";
 822                         reg = <0x48064000 0x400>;
 823                         ti,hwmods = "usb_host_hs";
 824                         #address-cells = <1>;
 825                         #size-cells = <1>;
 826                         ranges;
 827
 828                         usbhsohci: ohci@48064400 {
 829                                 compatible = "ti,ohci-omap3";
 830                                 reg = <0x48064400 0x400>;
 831                                 interrupts = <76>;
 832                                 remote-wakeup-connected;
 833                         };
 834
 835                         usbhsehci: ehci@48064800 {
 836                                 compatible = "ti,ehci-omap";
 837                                 reg = <0x48064800 0x400>;
 838                                 interrupts = <77>;
 839                         };
 840                 };
 841
 842                 gpmc: gpmc@6e000000 {
 843                         compatible = "ti,omap3430-gpmc";
 844                         ti,hwmods = "gpmc";
 845                         reg = <0x6e000000 0x02d0>;
 846                         interrupts = <20>;
 847                         dmas = <&sdma 4>;
 848                         dma-names = "rxtx";
 849                         gpmc,num-cs = <8>;
 850                         gpmc,num-waitpins = <4>;
 851                         #address-cells = <2>;
 852                         #size-cells = <1>;
 853                         interrupt-controller;
 854                         #interrupt-cells = <2>;
 855                         gpio-controller;
 856                         #gpio-cells = <2>;
 857                 };
 858
 859                 usb_otg_hs: usb_otg_hs@480ab000 {
 860                         compatible = "ti,omap3-musb";
 861                         reg = <0x480ab000 0x1000>;
 862                         interrupts = <92>, <93>;
 863                         interrupt-names = "mc", "dma";
 864                         ti,hwmods = "usb_otg_hs";
 865                         multipoint = <1>;
 866                         num-eps = <16>;
 867                         ram-bits = <12>;
 868                 };
 869
 870                 dss: dss@48050000 {
 871                         compatible = "ti,omap3-dss";
 872                         reg = <0x48050000 0x200>;
 873                         status = "disabled";
 874                         ti,hwmods = "dss_core";
 875                         clocks = <&dss1_alwon_fck>;
 876                         clock-names = "fck";
 877                         #address-cells = <1>;
 878                         #size-cells = <1>;
 879                         ranges;
 880
 881                         dispc@48050400 {
 882                                 compatible = "ti,omap3-dispc";
 883                                 reg = <0x48050400 0x400>;
 884                                 interrupts = <25>;
 885                                 ti,hwmods = "dss_dispc";
 886                                 clocks = <&dss1_alwon_fck>;
 887                                 clock-names = "fck";
 888                         };
 889
 890                         dsi: encoder@4804fc00 {
 891                                 compatible = "ti,omap3-dsi";
 892                                 reg = <0x4804fc00 0x200>,
 893                                       <0x4804fe00 0x40>,
 894                                       <0x4804ff00 0x20>;
 895                                 reg-names = "proto", "phy", "pll";
 896                                 interrupts = <25>;
 897                                 status = "disabled";
 898                                 ti,hwmods = "dss_dsi1";
 899                                 clocks = <&dss1_alwon_fck>, <&dss2_alwon_fck>;
 900                                 clock-names = "fck", "sys_clk";
 901                         };
 902
 903                         rfbi: encoder@48050800 {
 904                                 compatible = "ti,omap3-rfbi";
 905                                 reg = <0x48050800 0x100>;
 906                                 status = "disabled";
 907                                 ti,hwmods = "dss_rfbi";
 908                                 clocks = <&dss1_alwon_fck>, <&dss_ick>;
 909                                 clock-names = "fck", "ick";
 910                         };
 911
 912                         venc: encoder@48050c00 {
 913                                 compatible = "ti,omap3-venc";
 914                                 reg = <0x48050c00 0x100>;
 915                                 status = "disabled";
 916                                 ti,hwmods = "dss_venc";
 917                                 clocks = <&dss_tv_fck>;
 918                                 clock-names = "fck";
 919                         };
 920                 };
 921
 922                 ssi: ssi-controller@48058000 {
 923                         compatible = "ti,omap3-ssi";
 924                         ti,hwmods = "ssi";
 925
 926                         status = "disabled";
 927
 928                         reg = <0x48058000 0x1000>,
 929                               <0x48059000 0x1000>;
 930                         reg-names = "sys",
 931                                     "gdd";
 932
 933                         interrupts = <71>;
 934                         interrupt-names = "gdd_mpu";
 935
 936                         #address-cells = <1>;
 937                         #size-cells = <1>;
 938                         ranges;
 939
 940                         ssi_port1: ssi-port@4805a000 {
 941                                 compatible = "ti,omap3-ssi-port";
 942
 943                                 reg = <0x4805a000 0x800>,
 944                                       <0x4805a800 0x800>;
 945                                 reg-names = "tx",
 946                                             "rx";
 947
 948                                 interrupts = <67>,
 949                                              <68>;
 950                         };
 951
 952                         ssi_port2: ssi-port@4805b000 {
 953                                 compatible = "ti,omap3-ssi-port";
 954
 955                                 reg = <0x4805b000 0x800>,
 956                                       <0x4805b800 0x800>;
 957                                 reg-names = "tx",
 958                                             "rx";
 959
 960                                 interrupts = <69>,
 961                                              <70>;
 962                         };
 963                 };
 964         };
 965 };
 966
 967 #include "omap3xxx-clocks.dtsi"
 968
 969 /* Preferred always-on timer for clockevent. Some boards must use dmtimer12 */
 970 &timer1_target {
 971         ti,no-reset-on-init;
 972         ti,no-idle;
 973         timer@0 {
 974                 assigned-clocks = <&gpt1_fck>;
 975                 assigned-clock-parents = <&omap_32k_fck>;
 976         };
 977 };