Merge tag 'iio-fixes-for-5.6a' of git://git.kernel.org/pub/scm/linux/kernel/git/jic23...
[linux-2.6-microblaze.git] / arch / arm / boot / dts / omap3-tao3530.dtsi
1 // SPDX-License-Identifier: GPL-2.0-only
2 /*
3  * Copyright (C) 2012 Texas Instruments Incorporated - http://www.ti.com/
4  * Copyright (C) 2014 Stefan Roese <sr@denx.de>
5  */
6 /dts-v1/;
7
8 #include "omap34xx.dtsi"
9
10 /* Secure omaps have some devices inaccessible depending on the firmware */
11 &aes {
12         status = "disabled";
13 };
14
15 &sham {
16         status = "disabled";
17 };
18
19 / {
20         cpus {
21                 cpu@0 {
22                         cpu0-supply = <&vcc>;
23                 };
24         };
25
26         memory@80000000 {
27                 device_type = "memory";
28                 reg = <0x80000000 0x10000000>; /* 256 MB */
29         };
30
31         /* HS USB Port 2 Power */
32         hsusb2_power: hsusb2_power_reg {
33                 compatible = "regulator-fixed";
34                 regulator-name = "hsusb2_vbus";
35                 regulator-min-microvolt = <3300000>;
36                 regulator-max-microvolt = <3300000>;
37                 gpio = <&twl_gpio 18 GPIO_ACTIVE_HIGH>; /* GPIO LEDA */
38                 startup-delay-us = <70000>;
39         };
40
41         /* HS USB Host PHY on PORT 2 */
42         hsusb2_phy: hsusb2_phy {
43                 compatible = "usb-nop-xceiv";
44                 reset-gpios = <&gpio6 2 GPIO_ACTIVE_LOW>;       /* gpio_162 */
45                 vcc-supply = <&hsusb2_power>;
46                 #phy-cells = <0>;
47         };
48
49         sound {
50                 compatible = "ti,omap-twl4030";
51                 ti,model = "omap3beagle";
52
53                 /* McBSP2 is used for onboard sound, same as on beagle */
54                 ti,mcbsp = <&mcbsp2>;
55         };
56
57         /* Regulator to enable/switch the vcc of the Wifi module */
58         mmc2_sdio_poweron: regulator-mmc2-sdio-poweron {
59                 compatible = "regulator-fixed";
60                 regulator-name = "regulator-mmc2-sdio-poweron";
61                 regulator-min-microvolt = <3150000>;
62                 regulator-max-microvolt = <3150000>;
63                 gpio = <&gpio5 29 GPIO_ACTIVE_LOW>;             /* gpio_157 */
64                 startup-delay-us = <10000>;
65         };
66 };
67
68 &omap3_pmx_core {
69         hsusbb2_pins: pinmux_hsusbb2_pins {
70                 pinctrl-single,pins = <
71                         OMAP3_CORE1_IOPAD(0x25f0, PIN_OUTPUT | MUX_MODE3)               /* etk_d10.hsusb2_clk */
72                         OMAP3_CORE1_IOPAD(0x25f2, PIN_OUTPUT | MUX_MODE3)               /* etk_d11.hsusb2_stp */
73                         OMAP3_CORE1_IOPAD(0x25f4, PIN_INPUT_PULLDOWN | MUX_MODE3)       /* etk_d12.hsusb2_dir */
74                         OMAP3_CORE1_IOPAD(0x25f6, PIN_INPUT_PULLDOWN | MUX_MODE3)       /* etk_d13.hsusb2_nxt */
75                         OMAP3_CORE1_IOPAD(0x25f8, PIN_INPUT_PULLDOWN | MUX_MODE3)       /* etk_d14.hsusb2_data0 */
76                         OMAP3_CORE1_IOPAD(0x25fa, PIN_INPUT_PULLDOWN | MUX_MODE3)       /* etk_d15.hsusb2_data1 */
77                         OMAP3_CORE1_IOPAD(0x21d4, PIN_INPUT_PULLDOWN | MUX_MODE3)       /* mcspi1_cs3.hsusb2_data2 */
78                         OMAP3_CORE1_IOPAD(0x21d6, PIN_INPUT_PULLDOWN | MUX_MODE3)       /* mcspi2_clk.hsusb2_data7 */
79                         OMAP3_CORE1_IOPAD(0x21d8, PIN_INPUT_PULLDOWN | MUX_MODE3)       /* mcspi2_simo.hsusb2_data4 */
80                         OMAP3_CORE1_IOPAD(0x21da, PIN_INPUT_PULLDOWN | MUX_MODE3)       /* mcspi2_somi.hsusb2_data5 */
81                         OMAP3_CORE1_IOPAD(0x21dc, PIN_INPUT_PULLDOWN | MUX_MODE3)       /* mcspi2_cs0.hsusb2_data6 */
82                         OMAP3_CORE1_IOPAD(0x21de, PIN_INPUT_PULLDOWN | MUX_MODE3)       /* mcspi2_cs1.hsusb2_data3 */
83                 >;
84         };
85
86         mmc1_pins: pinmux_mmc1_pins {
87                 pinctrl-single,pins = <
88                         OMAP3_CORE1_IOPAD(0x2144, PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc1_clk.sdmmc1_clk */
89                         OMAP3_CORE1_IOPAD(0x2146, PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc1_cmd.sdmmc1_cmd */
90                         OMAP3_CORE1_IOPAD(0x2148, PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc1_dat0.sdmmc1_dat0 */
91                         OMAP3_CORE1_IOPAD(0x214a, PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc1_dat1.sdmmc1_dat1 */
92                         OMAP3_CORE1_IOPAD(0x214c, PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc1_dat2.sdmmc1_dat2 */
93                         OMAP3_CORE1_IOPAD(0x214e, PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc1_dat3.sdmmc1_dat3 */
94                         OMAP3_CORE1_IOPAD(0x2150, PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc1_dat4.sdmmc1_dat4 */
95                         OMAP3_CORE1_IOPAD(0x2152, PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc1_dat5.sdmmc1_dat5 */
96                         OMAP3_CORE1_IOPAD(0x2154, PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc1_dat6.sdmmc1_dat6 */
97                         OMAP3_CORE1_IOPAD(0x2156, PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc1_dat7.sdmmc1_dat7 */
98                 >;
99         };
100
101         mmc2_pins: pinmux_mmc2_pins {
102                 pinctrl-single,pins = <
103                         OMAP3_CORE1_IOPAD(0x2158, PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc2_clk.sdmmc2_clk */
104                         OMAP3_CORE1_IOPAD(0x215a, PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc2_cmd.sdmmc2_cmd */
105                         OMAP3_CORE1_IOPAD(0x215c, PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc2_dat0.sdmmc2_dat0 */
106                         OMAP3_CORE1_IOPAD(0x215e, PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc2_dat1.sdmmc2_dat1 */
107                         OMAP3_CORE1_IOPAD(0x2160, PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc2_dat2.sdmmc2_dat2 */
108                         OMAP3_CORE1_IOPAD(0x2162, PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc2_dat3.sdmmc2_dat3 */
109                 >;
110         };
111
112         /* wlan GPIO output for WLAN_EN */
113         wlan_gpio: pinmux_wlan_gpio {
114                 pinctrl-single,pins = <
115                         OMAP3_CORE1_IOPAD(0x218e, PIN_OUTPUT | MUX_MODE4)       /* mcbsp1_fsr gpio_157 */
116                 >;
117         };
118
119         uart3_pins: pinmux_uart3_pins {
120                 pinctrl-single,pins = <
121                         OMAP3_CORE1_IOPAD(0x219e, PIN_INPUT | PIN_OFF_WAKEUPENABLE | MUX_MODE0) /* uart3_rx_irrx.uart3_rx_irrx */
122                         OMAP3_CORE1_IOPAD(0x21a0, PIN_OUTPUT | MUX_MODE0)       /* uart3_tx_irtx.uart3_tx_irtx */
123                 >;
124         };
125
126         i2c3_pins: pinmux_i2c3_pins {
127                 pinctrl-single,pins = <
128                         OMAP3_CORE1_IOPAD(0x21c2, PIN_INPUT_PULLUP | MUX_MODE0) /* i2c3_scl.i2c3_scl */
129                         OMAP3_CORE1_IOPAD(0x21c4, PIN_INPUT_PULLUP | MUX_MODE0) /* i2c3_sda.i2c3_sda */
130                 >;
131         };
132
133         mcspi1_pins: pinmux_mcspi1_pins {
134                 pinctrl-single,pins = <
135                         OMAP3_CORE1_IOPAD(0x21c8, PIN_INPUT | MUX_MODE0)        /* mcspi1_clk.mcspi1_clk */
136                         OMAP3_CORE1_IOPAD(0x21ca, PIN_OUTPUT | MUX_MODE0)       /* mcspi1_simo.mcspi1_simo */
137                         OMAP3_CORE1_IOPAD(0x21cc, PIN_INPUT_PULLUP | MUX_MODE0) /* mcspi1_somi.mcspi1_somi */
138                         OMAP3_CORE1_IOPAD(0x21ce, PIN_OUTPUT | MUX_MODE0)       /* mcspi1_cs0.mcspi1_cs0 */
139                 >;
140         };
141
142         mcspi3_pins: pinmux_mcspi3_pins {
143                 pinctrl-single,pins = <
144                         OMAP3_CORE1_IOPAD(0x25dc, PIN_OUTPUT | MUX_MODE1)       /* etk_d0.mcspi3_simo gpio14 INPUT | MODE1 */
145                         OMAP3_CORE1_IOPAD(0x25de, PIN_INPUT_PULLUP | MUX_MODE1) /* etk_d1.mcspi3_somi gpio15 INPUT | MODE1 */
146                         OMAP3_CORE1_IOPAD(0x25e0, PIN_OUTPUT | MUX_MODE1)       /* etk_d2.mcspi3_cs0 gpio16 INPUT | MODE1 */
147                         OMAP3_CORE1_IOPAD(0x25e2, PIN_INPUT | MUX_MODE1)        /* etk_d3.mcspi3_clk gpio17 INPUT | MODE1 */
148                 >;
149         };
150
151         mcbsp3_pins: pinmux_mcbsp3_pins {
152                 pinctrl-single,pins = <
153                         OMAP3_CORE1_IOPAD(0x216c, PIN_OUTPUT | MUX_MODE0)       /* mcbsp3_dx.uart2_cts */
154                         OMAP3_CORE1_IOPAD(0x216e, PIN_INPUT | MUX_MODE0)        /* mcbsp3_dr.uart2_rts */
155                         OMAP3_CORE1_IOPAD(0x2170, PIN_INPUT | MUX_MODE0)        /* mcbsp3_clk.uart2_tx */
156                         OMAP3_CORE1_IOPAD(0x2172, PIN_INPUT | MUX_MODE0)        /* mcbsp3_fsx.uart2_rx */
157                 >;
158         };
159 };
160
161 /* McBSP1: mux'ed with GPIO158 as clock for HA-DSP */
162 &mcbsp1 {
163         status = "disabled";
164 };
165
166 &mcbsp2 {
167         status = "okay";
168 };
169
170 &i2c1 {
171         clock-frequency = <2600000>;
172
173         twl: twl@48 {
174                 reg = <0x48>;
175                 interrupts = <7>; /* SYS_NIRQ cascaded to intc */
176                 interrupt-parent = <&intc>;
177
178                 twl_audio: audio {
179                         compatible = "ti,twl4030-audio";
180                         codec {
181                         };
182                 };
183         };
184 };
185
186 &i2c3 {
187         clock-frequency = <100000>;
188
189         pinctrl-names = "default";
190         pinctrl-0 = <&i2c3_pins>;
191 };
192
193 &mcspi1 {
194         pinctrl-names = "default";
195         pinctrl-0 = <&mcspi1_pins>;
196
197         spidev@0 {
198                 compatible = "spidev";
199                 spi-max-frequency = <48000000>;
200                 reg = <0>;
201                 spi-cpha;
202         };
203 };
204
205 &mcspi3 {
206         pinctrl-names = "default";
207         pinctrl-0 = <&mcspi3_pins>;
208
209         spidev@0 {
210                 compatible = "spidev";
211                 spi-max-frequency = <48000000>;
212                 reg = <0>;
213                 spi-cpha;
214         };
215 };
216
217 #include "twl4030.dtsi"
218 #include "twl4030_omap3.dtsi"
219
220 &mmc1 {
221         pinctrl-names = "default";
222         pinctrl-0 = <&mmc1_pins>;
223         vmmc-supply = <&vmmc1>;
224         vqmmc-supply = <&vsim>;
225         cd-gpios = <&twl_gpio 0 GPIO_ACTIVE_LOW>;
226         bus-width = <8>;
227 };
228
229 // WiFi (Marvell 88W8686) on MMC2/SDIO
230 &mmc2 {
231         pinctrl-names = "default";
232         pinctrl-0 = <&mmc2_pins>;
233         vmmc-supply = <&mmc2_sdio_poweron>;
234         non-removable;
235         bus-width = <4>;
236         cap-power-off-card;
237 };
238
239 &mmc3 {
240         status = "disabled";
241 };
242
243 &usbhshost {
244         port2-mode = "ehci-phy";
245 };
246
247 &usbhsehci {
248         phys = <0 &hsusb2_phy>;
249 };
250
251 &twl_gpio {
252         ti,use-leds;
253         /* pullups: BIT(1) */
254         ti,pullups = <0x000002>;
255         /*
256          * pulldowns:
257          * BIT(2), BIT(6), BIT(7), BIT(8), BIT(13)
258          * BIT(15), BIT(16), BIT(17)
259          */
260         ti,pulldowns = <0x03a1c4>;
261 };
262
263 &uart3 {
264         pinctrl-names = "default";
265         pinctrl-0 = <&uart3_pins>;
266 };
267
268 &mcbsp3 {
269         status = "okay";
270         pinctrl-names = "default";
271         pinctrl-0 = <&mcbsp3_pins>;
272 };
273
274 &gpmc {
275         ranges = <0 0 0x30000000 0x01000000>;   /* CS0: 16MB for NAND */
276
277         nand@0,0 {
278                 compatible = "ti,omap2-nand";
279                 reg = <0 0 4>; /* CS0, offset 0, IO size 4 */
280                 interrupt-parent = <&gpmc>;
281                 interrupts = <0 IRQ_TYPE_NONE>, /* fifoevent */
282                              <1 IRQ_TYPE_NONE>; /* termcount */
283                 nand-bus-width = <16>;
284                 gpmc,device-width = <2>;        /* GPMC_DEVWIDTH_16BIT */
285                 ti,nand-ecc-opt = "sw";
286
287                 gpmc,cs-on-ns = <0>;
288                 gpmc,cs-rd-off-ns = <36>;
289                 gpmc,cs-wr-off-ns = <36>;
290                 gpmc,adv-on-ns = <6>;
291                 gpmc,adv-rd-off-ns = <24>;
292                 gpmc,adv-wr-off-ns = <36>;
293                 gpmc,oe-on-ns = <6>;
294                 gpmc,oe-off-ns = <48>;
295                 gpmc,we-on-ns = <6>;
296                 gpmc,we-off-ns = <30>;
297                 gpmc,rd-cycle-ns = <72>;
298                 gpmc,wr-cycle-ns = <72>;
299                 gpmc,access-ns = <54>;
300                 gpmc,wr-access-ns = <30>;
301
302                 #address-cells = <1>;
303                 #size-cells = <1>;
304
305                 x-loader@0 {
306                         label = "X-Loader";
307                         reg = <0 0x80000>;
308                 };
309
310                 bootloaders@80000 {
311                         label = "U-Boot";
312                         reg = <0x80000 0x1e0000>;
313                 };
314
315                 bootloaders_env@260000 {
316                         label = "U-Boot Env";
317                         reg = <0x260000 0x20000>;
318                 };
319
320                 kernel@280000 {
321                         label = "Kernel";
322                         reg = <0x280000 0x400000>;
323                 };
324
325                 filesystem@680000 {
326                         label = "File System";
327                         reg = <0x680000 0xf980000>;
328                 };
329         };
330 };
331
332 &usb_otg_hs {
333         interface-type = <0>;
334         usb-phy = <&usb2_phy>;
335         phys = <&usb2_phy>;
336         phy-names = "usb2-phy";
337         mode = <3>;
338         power = <50>;
339 };
340
341 &vaux2 {
342         regulator-name = "vdd_ehci";
343         regulator-min-microvolt = <1800000>;
344         regulator-max-microvolt = <1800000>;
345         regulator-always-on;
346 };