arch/arm/boot/dts/omap3-n950-n9.dtsi

   1 // SPDX-License-Identifier: GPL-2.0-only
   2 /*
   3  * omap3-n950-n9.dtsi - Device Tree file for Nokia N950 & N9 (common stuff)
   4  *
   5  * Written by: Aaro Koskinen <aaro.koskinen@iki.fi>
   6  */
   7
   8 #include "omap36xx.dtsi"
   9
  10 / {
  11         cpus {
  12                 cpu@0 {
  13                         cpu0-supply = <&vcc>;
  14                         operating-points = <
  15                                 /* kHz    uV */
  16                                 300000  1012500
  17                                 600000  1200000
  18                                 800000  1325000
  19                                 1000000 1375000
  20                         >;
  21                 };
  22         };
  23
  24         memory@80000000 {
  25                 device_type = "memory";
  26                 reg = <0x80000000 0x40000000>; /* 1 GB */
  27         };
  28
  29         vemmc: fixedregulator0 {
  30                 compatible = "regulator-fixed";
  31                 regulator-name = "VEMMC";
  32                 regulator-min-microvolt = <2900000>;
  33                 regulator-max-microvolt = <2900000>;
  34                 gpio = <&gpio5 29 GPIO_ACTIVE_HIGH>; /* gpio line 157 */
  35                 startup-delay-us = <150>;
  36                 enable-active-high;
  37         };
  38
  39         vwlan_fixed: fixedregulator2 {
  40                 compatible = "regulator-fixed";
  41                 regulator-name = "VWLAN";
  42                 gpio = <&gpio2 3 GPIO_ACTIVE_HIGH>; /* gpio 35 */
  43                 enable-active-high;
  44                 regulator-boot-off;
  45         };
  46
  47         leds {
  48                 compatible = "gpio-leds";
  49
  50                 heartbeat {
  51                         label = "debug::sleep";
  52                         gpios = <&gpio3 28 GPIO_ACTIVE_HIGH>;  /* gpio92 */
  53                         linux,default-trigger = "default-on";
  54                         pinctrl-names = "default";
  55                         pinctrl-0 = <&debug_leds>;
  56                 };
  57         };
  58
  59         /* controlled (enabled/disabled) directly by wl1271 */
  60         vctcxo: vctcxo {
  61                 compatible = "fixed-clock";
  62                 #clock-cells = <0>;
  63                 clock-frequency = <38400000>;
  64         };
  65 };
  66
  67 &omap3_pmx_core {
  68         accelerator_pins: pinmux_accelerator_pins {
  69                 pinctrl-single,pins = <
  70                         OMAP3_CORE1_IOPAD(0x21da, PIN_INPUT | MUX_MODE4)        /* mcspi2_somi.gpio_180 -> LIS302 INT1 */
  71                         OMAP3_CORE1_IOPAD(0x21dc, PIN_INPUT | MUX_MODE4)        /* mcspi2_cs0.gpio_181 -> LIS302 INT2 */
  72                 >;
  73         };
  74
  75         debug_leds: pinmux_debug_led_pins {
  76                 pinctrl-single,pins = <
  77                         OMAP3_CORE1_IOPAD(0x2108, PIN_OUTPUT | MUX_MODE4)       /* dss_data22.gpio_92 */
  78                 >;
  79         };
  80
  81         mmc2_pins: pinmux_mmc2_pins {
  82                 pinctrl-single,pins = <
  83                         OMAP3_CORE1_IOPAD(0x2158, PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc2_clk */
  84                         OMAP3_CORE1_IOPAD(0x215a, PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc2_cmd */
  85                         OMAP3_CORE1_IOPAD(0x215c, PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc2_dat0 */
  86                         OMAP3_CORE1_IOPAD(0x215e, PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc2_dat1 */
  87                         OMAP3_CORE1_IOPAD(0x2160, PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc2_dat2 */
  88                         OMAP3_CORE1_IOPAD(0x2162, PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc2_dat3 */
  89                 >;
  90         };
  91
  92         wlan_pins: pinmux_wlan_pins {
  93                 pinctrl-single,pins = <
  94                         OMAP3_CORE1_IOPAD(0x207c, PIN_OUTPUT | MUX_MODE4) /* gpio 35 - wlan enable */
  95                         OMAP3_CORE1_IOPAD(0x208a, PIN_INPUT | MUX_MODE4) /* gpio 42 - wlan irq */
  96                 >;
  97         };
  98
  99         ssi_pins: pinmux_ssi_pins {
 100                 pinctrl-single,pins = <
 101                         OMAP3_CORE1_IOPAD(0x217c, PIN_OUTPUT | MUX_MODE1)            /* ssi1_dat_tx */
 102                         OMAP3_CORE1_IOPAD(0x217e, PIN_OUTPUT | MUX_MODE1)            /* ssi1_flag_tx */
 103                         OMAP3_CORE1_IOPAD(0x2180, PIN_INPUT_PULLUP | MUX_MODE1)      /* ssi1_rdy_tx */
 104                         OMAP3_CORE1_IOPAD(0x2182, PIN_INPUT | MUX_MODE4)        /* ssi1_wake_tx (cawake) */
 105                         OMAP3_CORE1_IOPAD(0x2184, PIN_INPUT | MUX_MODE1)             /* ssi1_dat_rx */
 106                         OMAP3_CORE1_IOPAD(0x2186, PIN_INPUT | MUX_MODE1)             /* ssi1_flag_rx */
 107                         OMAP3_CORE1_IOPAD(0x2188, PIN_OUTPUT | MUX_MODE1)            /* ssi1_rdy_rx */
 108                         OMAP3_CORE1_IOPAD(0x218a, PIN_OUTPUT | MUX_MODE1)            /* ssi1_wake */
 109                 >;
 110         };
 111
 112         ssi_pins_idle: pinmux_ssi_pins_idle {
 113                 pinctrl-single,pins = <
 114                         OMAP3_CORE1_IOPAD(0x217c, PIN_OUTPUT | MUX_MODE7)            /* ssi1_dat_tx */
 115                         OMAP3_CORE1_IOPAD(0x217e, PIN_OUTPUT | MUX_MODE7)            /* ssi1_flag_tx */
 116                         OMAP3_CORE1_IOPAD(0x2180, PIN_INPUT_PULLDOWN | MUX_MODE7)    /* ssi1_rdy_tx */
 117                         OMAP3_CORE1_IOPAD(0x2182, PIN_INPUT | MUX_MODE4)        /* ssi1_wake_tx (cawake) */
 118                         OMAP3_CORE1_IOPAD(0x2184, PIN_INPUT | MUX_MODE7)             /* ssi1_dat_rx */
 119                         OMAP3_CORE1_IOPAD(0x2186, PIN_INPUT | MUX_MODE7)             /* ssi1_flag_rx */
 120                         OMAP3_CORE1_IOPAD(0x2188, PIN_OUTPUT | MUX_MODE4)            /* ssi1_rdy_rx */
 121                         OMAP3_CORE1_IOPAD(0x218a, PIN_OUTPUT | MUX_MODE7)            /* ssi1_wake */
 122                 >;
 123         };
 124
 125         modem_pins1: pinmux_modem_core1_pins {
 126                 pinctrl-single,pins = <
 127                         OMAP3_CORE1_IOPAD(0x207a, PIN_INPUT | MUX_MODE4)        /* gpio_34 (ape_rst_rq) */
 128                         OMAP3_CORE1_IOPAD(0x2100, PIN_OUTPUT | MUX_MODE4)            /* gpio_88 (cmt_rst_rq) */
 129                         OMAP3_CORE1_IOPAD(0x210a, PIN_OUTPUT | MUX_MODE4)            /* gpio_93 (cmt_apeslpx) */
 130                 >;
 131         };
 132
 133         uart2_pins: pinmux_uart2_pins {
 134                 pinctrl-single,pins = <
 135                         OMAP3_CORE1_IOPAD(0x2174, PIN_INPUT_PULLUP | MUX_MODE0)         /* uart2_cts */
 136                         OMAP3_CORE1_IOPAD(0x2176, PIN_OUTPUT | MUX_MODE0)               /* uart2_rts */
 137                         OMAP3_CORE1_IOPAD(0x2178, PIN_OUTPUT | MUX_MODE0)               /* uart2_tx */
 138                         OMAP3_CORE1_IOPAD(0x217a, PIN_INPUT | MUX_MODE0)                /* uart2_rx */
 139                 >;
 140         };
 141 };
 142
 143 &omap3_pmx_core2 {
 144         modem_pins2: pinmux_modem_core2_pins {
 145                 pinctrl-single,pins = <
 146                         OMAP3630_CORE2_IOPAD(0x25ec, PIN_OUTPUT | MUX_MODE4)         /* gpio_23 (cmt_en) */
 147                 >;
 148         };
 149 };
 150
 151 &i2c1 {
 152         clock-frequency = <2900000>;
 153
 154         twl: twl@48 {
 155                 reg = <0x48>;
 156                 interrupts = <7>; /* SYS_NIRQ cascaded to intc */
 157                 interrupt-parent = <&intc>;
 158         };
 159 };
 160
 161 /include/ "twl4030.dtsi"
 162
 163 &twl {
 164         compatible = "ti,twl5031";
 165
 166         twl_power: power {
 167                 compatible = "ti,twl4030-power";
 168                 ti,use_poweroff;
 169         };
 170 };
 171
 172 &twl_gpio {
 173         ti,pullups      = <0x000001>; /* BIT(0) */
 174         ti,pulldowns    = <0x008106>; /* BIT(1) | BIT(2) | BIT(8) | BIT(15) */
 175 };
 176
 177 &vdac {
 178         regulator-name = "vdac";
 179         regulator-min-microvolt = <1800000>;
 180         regulator-max-microvolt = <1800000>;
 181 };
 182
 183 &vpll1 {
 184         regulator-name = "vpll1";
 185         regulator-min-microvolt = <1800000>;
 186         regulator-max-microvolt = <1800000>;
 187 };
 188
 189 &vpll2 {
 190         regulator-name = "vpll2";
 191         regulator-min-microvolt = <1800000>;
 192         regulator-max-microvolt = <1800000>;
 193 };
 194
 195 &vaux1 {
 196         regulator-name = "vaux1";
 197         regulator-min-microvolt = <2800000>;
 198         regulator-max-microvolt = <2800000>;
 199 };
 200
 201 /* CSI-2 receiver */
 202 &vaux2 {
 203         regulator-name = "vaux2";
 204         regulator-min-microvolt = <1800000>;
 205         regulator-max-microvolt = <1800000>;
 206 };
 207
 208 /* Cameras */
 209 &vaux3 {
 210         regulator-name = "vaux3";
 211         regulator-min-microvolt = <2800000>;
 212         regulator-max-microvolt = <2800000>;
 213 };
 214
 215 &vaux4 {
 216         regulator-name = "vaux4";
 217         regulator-min-microvolt = <2800000>;
 218         regulator-max-microvolt = <2800000>;
 219 };
 220
 221 &vmmc1 {
 222         regulator-name = "vmmc1";
 223         regulator-min-microvolt = <1850000>;
 224         regulator-max-microvolt = <3150000>;
 225 };
 226
 227 &vmmc2 {
 228         regulator-name = "vmmc2";
 229         regulator-min-microvolt = <3000000>;
 230         regulator-max-microvolt = <3000000>;
 231 };
 232
 233 &vintana1 {
 234         regulator-name = "vintana1";
 235         regulator-min-microvolt = <1500000>;
 236         regulator-max-microvolt = <1500000>;
 237 };
 238
 239 &vintana2 {
 240         regulator-name = "vintana2";
 241         regulator-min-microvolt = <2750000>;
 242         regulator-max-microvolt = <2750000>;
 243 };
 244
 245 &vintdig {
 246         regulator-name = "vintdig";
 247         regulator-min-microvolt = <1500000>;
 248         regulator-max-microvolt = <1500000>;
 249 };
 250
 251 &vsim {
 252         regulator-name = "vsim";
 253         regulator-min-microvolt = <1800000>;
 254         regulator-max-microvolt = <1800000>;
 255 };
 256
 257 &vio {
 258         regulator-name = "vio";
 259         regulator-min-microvolt = <1800000>;
 260         regulator-max-microvolt = <1800000>;
 261 };
 262
 263 &i2c2 {
 264         clock-frequency = <400000>;
 265
 266         as3645a@30 {
 267                 #address-cells = <1>;
 268                 #size-cells = <0>;
 269                 reg = <0x30>;
 270                 compatible = "ams,as3645a";
 271                 as3645a_flash: flash@0 {
 272                         reg = <0x0>;
 273                         flash-timeout-us = <150000>;
 274                         flash-max-microamp = <320000>;
 275                         led-max-microamp = <60000>;
 276                         ams,input-max-microamp = <1750000>;
 277                 };
 278                 as3645a_indicator: indicator@1 {
 279                         reg = <0x1>;
 280                         led-max-microamp = <10000>;
 281                 };
 282         };
 283 };
 284
 285 &i2c3 {
 286         clock-frequency = <400000>;
 287
 288         lis302: lis302@1d {
 289                 compatible = "st,lis3lv02d";
 290                 reg = <0x1d>;
 291
 292                 Vdd-supply = <&vaux1>;
 293                 Vdd_IO-supply = <&vio>;
 294
 295                 pinctrl-names = "default";
 296                 pinctrl-0 = <&accelerator_pins>;
 297
 298                 interrupts-extended = <&gpio6 20 IRQ_TYPE_EDGE_FALLING>, <&gpio6 21 IRQ_TYPE_EDGE_FALLING>; /* 180, 181 */
 299
 300                 /* click flags */
 301                 st,click-single-x;
 302                 st,click-single-y;
 303                 st,click-single-z;
 304
 305                 /* Limits are 0.5g * value */
 306                 st,click-threshold-x = <8>;
 307                 st,click-threshold-y = <8>;
 308                 st,click-threshold-z = <10>;
 309
 310                 /* Click must be longer than time limit */
 311                 st,click-time-limit = <9>;
 312
 313                 /* Kind of debounce filter */
 314                 st,click-latency = <50>;
 315
 316                 st,wakeup-x-hi;
 317                 st,wakeup-y-hi;
 318                 st,wakeup-threshold = <(800/18)>; /* millig-value / 18 to get HW values */
 319
 320                 st,wakeup2-z-hi;
 321                 st,wakeup2-threshold = <(1000/18)>; /* millig-value / 18 to get HW values */
 322
 323                 st,highpass-cutoff-hz = <2>;
 324
 325                 /* Interrupt line 1 for thresholds */
 326                 st,irq1-ff-wu-1;
 327                 st,irq1-ff-wu-2;
 328                 /* Interrupt line 2 for click detection */
 329                 st,irq2-click;
 330
 331                 st,wu-duration-1 = <8>;
 332                 st,wu-duration-2 = <8>;
 333         };
 334 };
 335
 336 &mmc1 {
 337         status = "disabled";
 338 };
 339
 340 &mmc2 {
 341         pinctrl-names = "default";
 342         pinctrl-0 = <&mmc2_pins>;
 343         vmmc-supply = <&vemmc>;
 344         bus-width = <4>;
 345         ti,non-removable;
 346 };
 347
 348 &mmc3 {
 349         status = "disabled";
 350 };
 351
 352 &usb_otg_hs {
 353         interface-type = <0>;
 354         usb-phy = <&usb2_phy>;
 355         phys = <&usb2_phy>;
 356         phy-names = "usb2-phy";
 357         mode = <3>;
 358         power = <50>;
 359 };
 360
 361 &gpmc {
 362         ranges = <0 0 0x04000000 0x1000000>;    /* CS0: 16MB for OneNAND */
 363
 364         onenand@0,0 {
 365                 #address-cells = <1>;
 366                 #size-cells = <1>;
 367                 compatible = "ti,omap2-onenand";
 368                 reg = <0 0 0x20000>;    /* CS0, offset 0, IO size 128K */
 369
 370                 /*
 371                  * These timings are based on CONFIG_OMAP_GPMC_DEBUG=y reported
 372                  * bootloader set values when booted with v4.19 using both N950
 373                  * and N9 devices (OneNAND Manufacturer: Samsung):
 374                  *
 375                  *   gpmc cs0 before gpmc_cs_program_settings:
 376                  *   cs0 GPMC_CS_CONFIG1: 0xfd001202
 377                  *   cs0 GPMC_CS_CONFIG2: 0x00181800
 378                  *   cs0 GPMC_CS_CONFIG3: 0x00030300
 379                  *   cs0 GPMC_CS_CONFIG4: 0x18001804
 380                  *   cs0 GPMC_CS_CONFIG5: 0x03171d1d
 381                  *   cs0 GPMC_CS_CONFIG6: 0x97080000
 382                  */
 383                 gpmc,sync-read;
 384                 gpmc,sync-write;
 385                 gpmc,burst-length = <16>;
 386                 gpmc,burst-read;
 387                 gpmc,burst-wrap;
 388                 gpmc,burst-write;
 389                 gpmc,device-width = <2>;
 390                 gpmc,mux-add-data = <2>;
 391                 gpmc,cs-on-ns = <0>;
 392                 gpmc,cs-rd-off-ns = <122>;
 393                 gpmc,cs-wr-off-ns = <122>;
 394                 gpmc,adv-on-ns = <0>;
 395                 gpmc,adv-rd-off-ns = <15>;
 396                 gpmc,adv-wr-off-ns = <15>;
 397                 gpmc,oe-on-ns = <20>;
 398                 gpmc,oe-off-ns = <122>;
 399                 gpmc,we-on-ns = <0>;
 400                 gpmc,we-off-ns = <122>;
 401                 gpmc,rd-cycle-ns = <148>;
 402                 gpmc,wr-cycle-ns = <148>;
 403                 gpmc,access-ns = <117>;
 404                 gpmc,page-burst-access-ns = <15>;
 405                 gpmc,bus-turnaround-ns = <0>;
 406                 gpmc,cycle2cycle-delay-ns = <0>;
 407                 gpmc,wait-monitoring-ns = <0>;
 408                 gpmc,clk-activation-ns = <10>;
 409                 gpmc,wr-data-mux-bus-ns = <40>;
 410                 gpmc,wr-access-ns = <117>;
 411
 412                 gpmc,sync-clk-ps = <15000>; /* TBC; Where this value came? */
 413
 414                 /*
 415                  * MTD partition table corresponding to Nokia's MeeGo 1.2
 416                  * Harmattan release.
 417                  */
 418                 partition@0 {
 419                         label = "bootloader";
 420                         reg = <0x00000000 0x00100000>;
 421                 };
 422                 partition@1 {
 423                         label = "config";
 424                         reg = <0x00100000 0x002c0000>;
 425                 };
 426                 partition@2 {
 427                         label = "kernel";
 428                         reg = <0x003c0000 0x01000000>;
 429                 };
 430                 partition@3 {
 431                         label = "log";
 432                         reg = <0x013c0000 0x00200000>;
 433                 };
 434                 partition@4 {
 435                         label = "var";
 436                         reg = <0x015c0000 0x1ca40000>;
 437                 };
 438                 partition@5 {
 439                         label = "moslo";
 440                         reg = <0x1e000000 0x02000000>;
 441                 };
 442                 partition@6 {
 443                         label = "omap2-onenand";
 444                         reg = <0x00000000 0x20000000>;
 445                 };
 446         };
 447 };
 448
 449 &ssi_port1 {
 450         pinctrl-names = "default", "idle";
 451         pinctrl-0 = <&ssi_pins>;
 452         pinctrl-1 = <&ssi_pins_idle>;
 453
 454         ti,ssi-cawake-gpio = <&gpio5 23 GPIO_ACTIVE_HIGH>; /* 151 */
 455
 456         modem: hsi-client {
 457                 pinctrl-names = "default";
 458                 pinctrl-0 = <&modem_pins1 &modem_pins2>;
 459
 460                 hsi-channel-ids = <0>, <1>, <2>, <3>;
 461                 hsi-channel-names = "mcsaab-control",
 462                                     "speech-control",
 463                                     "speech-data",
 464                                     "mcsaab-data";
 465                 hsi-speed-kbps = <96000>;
 466                 hsi-mode = "frame";
 467                 hsi-flow = "synchronized";
 468                 hsi-arb-mode = "round-robin";
 469
 470                 interrupts-extended = <&gpio2 2 IRQ_TYPE_EDGE_RISING>; /* gpio 34 */
 471
 472                 gpios = <&gpio3 29 GPIO_ACTIVE_HIGH>, /* gpio 93 */
 473                         <&gpio3 24 GPIO_ACTIVE_HIGH>, /* gpio 88 */
 474                         <&gpio1 23 GPIO_ACTIVE_HIGH>; /* gpio 23 */
 475                 gpio-names = "cmt_apeslpx",
 476                              "cmt_rst_rq",
 477                              "cmt_en";
 478         };
 479 };
 480
 481 &ssi_port2 {
 482         status = "disabled";
 483 };
 484
 485 &uart2 {
 486         pinctrl-names = "default";
 487         pinctrl-0 = <&uart2_pins>;
 488
 489         bluetooth {
 490                 compatible = "ti,wl1271-bluetooth-nokia", "nokia,h4p-bluetooth";
 491
 492                 reset-gpios = <&gpio1 26 GPIO_ACTIVE_LOW>; /* 26 */
 493                 host-wakeup-gpios = <&gpio4 5 GPIO_ACTIVE_HIGH>; /* 101 */
 494                 bluetooth-wakeup-gpios = <&gpio2 5 GPIO_ACTIVE_HIGH>; /* 37 */
 495
 496                 clocks = <&vctcxo>;
 497                 clock-names = "sysclk";
 498         };
 499 };