Merge tag 'armsoc-dt' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc
[linux-2.6-microblaze.git] / arch / arm / boot / dts / omap3-n900.dts
1 /*
2  * Copyright (C) 2013 Pavel Machek <pavel@ucw.cz>
3  * Copyright (C) 2013-2014 Aaro Koskinen <aaro.koskinen@iki.fi>
4  *
5  * This program is free software; you can redistribute it and/or modify
6  * it under the terms of the GNU General Public License version 2 (or later) as
7  * published by the Free Software Foundation.
8  */
9
10 /dts-v1/;
11
12 #include "omap34xx.dtsi"
13 #include <dt-bindings/input/input.h>
14
15 /*
16  * Default secure signed bootloader (Nokia X-Loader) does not enable L3 firewall
17  * for omap AES HW crypto support. When linux kernel try to access memory of AES
18  * blocks then kernel receive "Unhandled fault: external abort on non-linefetch"
19  * and crash. Until somebody fix omap-aes.c and omap_hwmod_3xxx_data.c code (no
20  * crash anymore) omap AES support will be disabled for all Nokia N900 devices.
21  * There is "unofficial" version of bootloader which enables AES in L3 firewall
22  * but it is not widely used and to prevent kernel crash rather AES is disabled.
23  * There is also no runtime detection code if AES is disabled in L3 firewall...
24  */
25 &aes {
26         status = "disabled";
27 };
28
29 / {
30         model = "Nokia N900";
31         compatible = "nokia,omap3-n900", "ti,omap3430", "ti,omap3";
32
33         aliases {
34                 i2c0;
35                 i2c1 = &i2c1;
36                 i2c2 = &i2c2;
37                 i2c3 = &i2c3;
38                 display0 = &lcd;
39                 display1 = &tv;
40         };
41
42         cpus {
43                 cpu@0 {
44                         cpu0-supply = <&vcc>;
45                 };
46         };
47
48         leds {
49                 compatible = "gpio-leds";
50                 heartbeat {
51                         label = "debug::sleep";
52                         gpios = <&gpio6 2 GPIO_ACTIVE_HIGH>;  /* 162 */
53                         linux,default-trigger = "default-on";
54                         pinctrl-names = "default";
55                         pinctrl-0 = <&debug_leds>;
56                 };
57         };
58
59         memory@80000000 {
60                 device_type = "memory";
61                 reg = <0x80000000 0x10000000>; /* 256 MB */
62         };
63
64         gpio_keys {
65                 compatible = "gpio-keys";
66
67                 camera_lens_cover {
68                         label = "Camera Lens Cover";
69                         gpios = <&gpio4 14 GPIO_ACTIVE_LOW>; /* 110 */
70                         linux,input-type = <EV_SW>;
71                         linux,code = <SW_CAMERA_LENS_COVER>;
72                         linux,can-disable;
73                 };
74
75                 camera_focus {
76                         label = "Camera Focus";
77                         gpios = <&gpio3 4 GPIO_ACTIVE_LOW>; /* 68 */
78                         linux,code = <KEY_CAMERA_FOCUS>;
79                         linux,can-disable;
80                 };
81
82                 camera_capture {
83                         label = "Camera Capture";
84                         gpios = <&gpio3 5 GPIO_ACTIVE_LOW>; /* 69 */
85                         linux,code = <KEY_CAMERA>;
86                         linux,can-disable;
87                 };
88
89                 lock_button {
90                         label = "Lock Button";
91                         gpios = <&gpio4 17 GPIO_ACTIVE_LOW>; /* 113 */
92                         linux,code = <KEY_SCREENLOCK>;
93                         linux,can-disable;
94                 };
95
96                 keypad_slide {
97                         label = "Keypad Slide";
98                         gpios = <&gpio3 7 GPIO_ACTIVE_LOW>; /* 71 */
99                         linux,input-type = <EV_SW>;
100                         linux,code = <SW_KEYPAD_SLIDE>;
101                         linux,can-disable;
102                 };
103
104                 proximity_sensor {
105                         label = "Proximity Sensor";
106                         gpios = <&gpio3 25 GPIO_ACTIVE_HIGH>; /* 89 */
107                         linux,input-type = <EV_SW>;
108                         linux,code = <SW_FRONT_PROXIMITY>;
109                         linux,can-disable;
110                 };
111         };
112
113         isp1707: isp1707 {
114                 compatible = "nxp,isp1707";
115                 nxp,enable-gpio = <&gpio3 3 GPIO_ACTIVE_HIGH>;
116                 usb-phy = <&usb2_phy>;
117         };
118
119         tv: connector {
120                 compatible = "composite-video-connector";
121                 label = "tv";
122
123                 port {
124                         tv_connector_in: endpoint {
125                                 remote-endpoint = <&venc_out>;
126                         };
127                 };
128         };
129
130         sound: n900-audio {
131                 compatible = "nokia,n900-audio";
132
133                 nokia,cpu-dai = <&mcbsp2>;
134                 nokia,audio-codec = <&tlv320aic3x>, <&tlv320aic3x_aux>;
135                 nokia,headphone-amplifier = <&tpa6130a2>;
136
137                 tvout-selection-gpios = <&gpio2 8 GPIO_ACTIVE_HIGH>; /* 40 */
138                 jack-detection-gpios = <&gpio6 17 GPIO_ACTIVE_HIGH>; /* 177 */
139                 eci-switch-gpios = <&gpio6 22 GPIO_ACTIVE_HIGH>; /* 182 */
140                 speaker-amplifier-gpios = <&twl_gpio 7 GPIO_ACTIVE_HIGH>;
141         };
142
143         battery: n900-battery {
144                 compatible = "nokia,n900-battery";
145                 io-channels = <&twl_madc 0>, <&twl_madc 4>, <&twl_madc 12>;
146                 io-channel-names = "temp", "bsi", "vbat";
147         };
148
149         pwm9: dmtimer-pwm {
150                 compatible = "ti,omap-dmtimer-pwm";
151                 #pwm-cells = <3>;
152                 ti,timers = <&timer9>;
153                 ti,clock-source = <0x00>; /* timer_sys_ck */
154         };
155
156         ir: n900-ir {
157                 compatible = "nokia,n900-ir";
158                 pwms = <&pwm9 0 26316 0>; /* 38000 Hz */
159         };
160
161         /* controlled (enabled/disabled) directly by bcm2048 and wl1251 */
162         vctcxo: vctcxo {
163                 compatible = "fixed-clock";
164                 #clock-cells = <0>;
165                 clock-frequency = <38400000>;
166         };
167 };
168
169 &isp {
170         vdds_csib-supply = <&vaux2>;
171
172         pinctrl-names = "default";
173         pinctrl-0 = <&camera_pins>;
174
175         ports {
176                 port@1 {
177                         reg = <1>;
178
179                         csi_isp: endpoint {
180                                 remote-endpoint = <&csi_cam1>;
181                                 bus-type = <3>; /* CCP2 */
182                                 clock-lanes = <1>;
183                                 data-lanes = <0>;
184                                 lane-polarity = <0 0>;
185                                 /* Select strobe = <1> for back camera, <0> for front camera */
186                                 strobe = <1>;
187                         };
188                 };
189         };
190 };
191
192 &omap3_pmx_core {
193         pinctrl-names = "default";
194
195         uart2_pins: pinmux_uart2_pins {
196                 pinctrl-single,pins = <
197                         OMAP3_CORE1_IOPAD(0x2174, PIN_INPUT_PULLUP | MUX_MODE0)         /* uart2_cts */
198                         OMAP3_CORE1_IOPAD(0x2176, PIN_OUTPUT | MUX_MODE0)               /* uart2_rts */
199                         OMAP3_CORE1_IOPAD(0x2178, PIN_OUTPUT | MUX_MODE0)               /* uart2_tx */
200                         OMAP3_CORE1_IOPAD(0x217a, PIN_INPUT | MUX_MODE0)                /* uart2_rx */
201                 >;
202         };
203
204         uart3_pins: pinmux_uart3_pins {
205                 pinctrl-single,pins = <
206                         OMAP3_CORE1_IOPAD(0x219e, PIN_INPUT | MUX_MODE0)                /* uart3_rx */
207                         OMAP3_CORE1_IOPAD(0x21a0, PIN_OUTPUT | MUX_MODE0)               /* uart3_tx */
208                 >;
209         };
210
211         ethernet_pins: pinmux_ethernet_pins {
212                 pinctrl-single,pins = <
213                         OMAP3_CORE1_IOPAD(0x20b4, PIN_INPUT_PULLDOWN | MUX_MODE4)       /* gpmc_ncs3.gpio_54 */
214                         OMAP3_CORE1_IOPAD(0x20fc, PIN_OUTPUT | MUX_MODE4)               /* dss_data16.gpio_86 */
215                         OMAP3_CORE1_IOPAD(0x219c, PIN_OUTPUT | MUX_MODE4)               /* uart3_rts_sd.gpio_164 */
216                 >;
217         };
218
219         gpmc_pins: pinmux_gpmc_pins {
220                 pinctrl-single,pins = <
221
222                         /* address lines */
223                         OMAP3_CORE1_IOPAD(0x207a, PIN_OUTPUT | MUX_MODE0)       /* gpmc_a1.gpmc_a1 */
224                         OMAP3_CORE1_IOPAD(0x207c, PIN_OUTPUT | MUX_MODE0)       /* gpmc_a2.gpmc_a2 */
225                         OMAP3_CORE1_IOPAD(0x207e, PIN_OUTPUT | MUX_MODE0)       /* gpmc_a3.gpmc_a3 */
226
227                         /* data lines, gpmc_d0..d7 not muxable according to TRM */
228                         OMAP3_CORE1_IOPAD(0x209e, PIN_INPUT | MUX_MODE0)        /* gpmc_d8.gpmc_d8 */
229                         OMAP3_CORE1_IOPAD(0x20a0, PIN_INPUT | MUX_MODE0)        /* gpmc_d9.gpmc_d9 */
230                         OMAP3_CORE1_IOPAD(0x20a2, PIN_INPUT | MUX_MODE0)        /* gpmc_d10.gpmc_d10 */
231                         OMAP3_CORE1_IOPAD(0x20a4, PIN_INPUT | MUX_MODE0)        /* gpmc_d11.gpmc_d11 */
232                         OMAP3_CORE1_IOPAD(0x20a6, PIN_INPUT | MUX_MODE0)        /* gpmc_d12.gpmc_d12 */
233                         OMAP3_CORE1_IOPAD(0x20a8, PIN_INPUT | MUX_MODE0)        /* gpmc_d13.gpmc_d13 */
234                         OMAP3_CORE1_IOPAD(0x20aa, PIN_INPUT | MUX_MODE0)        /* gpmc_d14.gpmc_d14 */
235                         OMAP3_CORE1_IOPAD(0x20ac, PIN_INPUT | MUX_MODE0)        /* gpmc_d15.gpmc_d15 */
236
237                         /*
238                          * gpmc_ncs0, gpmc_nadv_ale, gpmc_noe, gpmc_nwe, gpmc_wait0 not muxable
239                          * according to TRM. OneNAND seems to require PIN_INPUT on clock.
240                          */
241                         OMAP3_CORE1_IOPAD(0x20b0, PIN_OUTPUT | MUX_MODE0)       /* gpmc_ncs1.gpmc_ncs1 */
242                         OMAP3_CORE1_IOPAD(0x20be, PIN_INPUT | MUX_MODE0)        /* gpmc_clk.gpmc_clk */
243                 >;
244         };
245
246         i2c1_pins: pinmux_i2c1_pins {
247                 pinctrl-single,pins = <
248                         OMAP3_CORE1_IOPAD(0x21ba, PIN_INPUT | MUX_MODE0)                /* i2c1_scl */
249                         OMAP3_CORE1_IOPAD(0x21bc, PIN_INPUT | MUX_MODE0)                /* i2c1_sda */
250                 >;
251         };
252
253         i2c2_pins: pinmux_i2c2_pins {
254                 pinctrl-single,pins = <
255                         OMAP3_CORE1_IOPAD(0x21be, PIN_INPUT | MUX_MODE0)                /* i2c2_scl */
256                         OMAP3_CORE1_IOPAD(0x21c0, PIN_INPUT | MUX_MODE0)                /* i2c2_sda */
257                 >;
258         };
259
260         i2c3_pins: pinmux_i2c3_pins {
261                 pinctrl-single,pins = <
262                         OMAP3_CORE1_IOPAD(0x21c2, PIN_INPUT | MUX_MODE0)                /* i2c3_scl */
263                         OMAP3_CORE1_IOPAD(0x21c4, PIN_INPUT | MUX_MODE0)                /* i2c3_sda */
264                 >;
265         };
266
267         debug_leds: pinmux_debug_led_pins {
268                 pinctrl-single,pins = <
269                         OMAP3_CORE1_IOPAD(0x2198, PIN_OUTPUT | MUX_MODE4)       /* mcbsp1_clkx.gpio_162 */
270                 >;
271         };
272
273         mcspi4_pins: pinmux_mcspi4_pins {
274                 pinctrl-single,pins = <
275                         OMAP3_CORE1_IOPAD(0x218c, PIN_INPUT_PULLDOWN | MUX_MODE1) /* mcspi4_clk */
276                         OMAP3_CORE1_IOPAD(0x2192, PIN_INPUT_PULLDOWN | MUX_MODE1) /* mcspi4_somi */
277                         OMAP3_CORE1_IOPAD(0x2190, PIN_OUTPUT | MUX_MODE1) /* mcspi4_simo */
278                         OMAP3_CORE1_IOPAD(0x2196, PIN_OUTPUT | MUX_MODE1) /* mcspi4_cs0 */
279                 >;
280         };
281
282         mmc1_pins: pinmux_mmc1_pins {
283                 pinctrl-single,pins = <
284                         OMAP3_CORE1_IOPAD(0x2144, PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc1_clk */
285                         OMAP3_CORE1_IOPAD(0x2146, PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc1_cmd */
286                         OMAP3_CORE1_IOPAD(0x2148, PIN_INPUT_PULLUP | MUX_MODE0)         /* sdmmc1_dat0 */
287                         OMAP3_CORE1_IOPAD(0x214a, PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc1_dat1 */
288                         OMAP3_CORE1_IOPAD(0x214c, PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc1_dat2 */
289                         OMAP3_CORE1_IOPAD(0x214e, PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc1_dat3 */
290                 >;
291         };
292
293         mmc2_pins: pinmux_mmc2_pins {
294                 pinctrl-single,pins = <
295                         OMAP3_CORE1_IOPAD(0x2158, PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc2_clk */
296                         OMAP3_CORE1_IOPAD(0x215a, PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc2_cmd */
297                         OMAP3_CORE1_IOPAD(0x215c, PIN_INPUT_PULLUP | MUX_MODE0)         /* sdmmc2_dat0 */
298                         OMAP3_CORE1_IOPAD(0x215e, PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc2_dat1 */
299                         OMAP3_CORE1_IOPAD(0x2160, PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc2_dat2 */
300                         OMAP3_CORE1_IOPAD(0x2162, PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc2_dat3 */
301                         OMAP3_CORE1_IOPAD(0x2164, PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc2_dat4 */
302                         OMAP3_CORE1_IOPAD(0x2166, PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc2_dat5 */
303                         OMAP3_CORE1_IOPAD(0x2168, PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc2_dat6 */
304                         OMAP3_CORE1_IOPAD(0x216a, PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc2_dat7 */
305                 >;
306         };
307
308         acx565akm_pins: pinmux_acx565akm_pins {
309                 pinctrl-single,pins = <
310                         OMAP3_CORE1_IOPAD(0x2104, PIN_OUTPUT | MUX_MODE4)               /* RX51_LCD_RESET_GPIO */
311                 >;
312         };
313
314         dss_sdi_pins: pinmux_dss_sdi_pins {
315                 pinctrl-single,pins = <
316                         OMAP3_CORE1_IOPAD(0x20f0, PIN_OUTPUT | MUX_MODE1)   /* dss_data10.sdi_dat1n */
317                         OMAP3_CORE1_IOPAD(0x20f2, PIN_OUTPUT | MUX_MODE1)   /* dss_data11.sdi_dat1p */
318                         OMAP3_CORE1_IOPAD(0x20f4, PIN_OUTPUT | MUX_MODE1)   /* dss_data12.sdi_dat2n */
319                         OMAP3_CORE1_IOPAD(0x20f6, PIN_OUTPUT | MUX_MODE1)   /* dss_data13.sdi_dat2p */
320
321                         OMAP3_CORE1_IOPAD(0x2108, PIN_OUTPUT | MUX_MODE1)   /* dss_data22.sdi_clkp */
322                         OMAP3_CORE1_IOPAD(0x210a, PIN_OUTPUT | MUX_MODE1)   /* dss_data23.sdi_clkn */
323                 >;
324         };
325
326         wl1251_pins: pinmux_wl1251 {
327                 pinctrl-single,pins = <
328                         OMAP3_CORE1_IOPAD(0x20fe, PIN_OUTPUT | MUX_MODE4)               /* gpio 87 => wl1251 enable */
329                         OMAP3_CORE1_IOPAD(0x208a, PIN_INPUT | MUX_MODE4)                /* gpio 42 => wl1251 irq */
330                 >;
331         };
332
333         ssi_pins: pinmux_ssi {
334                 pinctrl-single,pins = <
335                         OMAP3_CORE1_IOPAD(0x2180, PIN_INPUT_PULLUP | MUX_MODE1) /* ssi1_rdy_tx */
336                         OMAP3_CORE1_IOPAD(0x217e, PIN_OUTPUT | MUX_MODE1)               /* ssi1_flag_tx */
337                         OMAP3_CORE1_IOPAD(0x2182, PIN_INPUT | MUX_MODE4)                /* ssi1_wake_tx (cawake) */
338                         OMAP3_CORE1_IOPAD(0x217c, PIN_OUTPUT | MUX_MODE1)               /* ssi1_dat_tx */
339                         OMAP3_CORE1_IOPAD(0x2184, PIN_INPUT | MUX_MODE1)                /* ssi1_dat_rx */
340                         OMAP3_CORE1_IOPAD(0x2186, PIN_INPUT | MUX_MODE1)                /* ssi1_flag_rx */
341                         OMAP3_CORE1_IOPAD(0x2188, PIN_OUTPUT | MUX_MODE1)               /* ssi1_rdy_rx */
342                         OMAP3_CORE1_IOPAD(0x218a, PIN_OUTPUT | MUX_MODE1)               /* ssi1_wake */
343                 >;
344         };
345
346         modem_pins: pinmux_modem {
347                 pinctrl-single,pins = <
348                         OMAP3_CORE1_IOPAD(0x20dc, PIN_OUTPUT | MUX_MODE4)               /* gpio 70 => cmt_apeslpx */
349                         OMAP3_CORE1_IOPAD(0x20e0, PIN_INPUT | MUX_MODE4)                /* gpio 72 => ape_rst_rq */
350                         OMAP3_CORE1_IOPAD(0x20e2, PIN_OUTPUT | MUX_MODE4)               /* gpio 73 => cmt_rst_rq */
351                         OMAP3_CORE1_IOPAD(0x20e4, PIN_OUTPUT | MUX_MODE4)               /* gpio 74 => cmt_en */
352                         OMAP3_CORE1_IOPAD(0x20e6, PIN_OUTPUT | MUX_MODE4)               /* gpio 75 => cmt_rst */
353                         OMAP3_CORE1_IOPAD(0x218e, PIN_OUTPUT | MUX_MODE4)               /* gpio 157 => cmt_bsi */
354                 >;
355         };
356
357         camera_pins: pinmux_camera {
358                 pinctrl-single,pins = <
359                         OMAP3_CORE1_IOPAD(0x210c, PIN_OUTPUT | MUX_MODE7)       /* cam_hs */
360                         OMAP3_CORE1_IOPAD(0x210e, PIN_OUTPUT | MUX_MODE7)       /* cam_vs */
361                         OMAP3_CORE1_IOPAD(0x2110, PIN_OUTPUT | MUX_MODE0)       /* cam_xclka */
362                         OMAP3_CORE1_IOPAD(0x211e, PIN_OUTPUT | MUX_MODE7)       /* cam_d4 */
363                         OMAP3_CORE1_IOPAD(0x2122, PIN_INPUT | MUX_MODE0)        /* cam_d6 */
364                         OMAP3_CORE1_IOPAD(0x2124, PIN_INPUT | MUX_MODE0)        /* cam_d7 */
365                         OMAP3_CORE1_IOPAD(0x2126, PIN_INPUT | MUX_MODE0)        /* cam_d8 */
366                         OMAP3_CORE1_IOPAD(0x2128, PIN_INPUT | MUX_MODE0)        /* cam_d9 */
367                         OMAP3_CORE1_IOPAD(0x212a, PIN_OUTPUT | MUX_MODE7)       /* cam_d10 */
368                         OMAP3_CORE1_IOPAD(0x212e, PIN_OUTPUT | MUX_MODE7)       /* cam_xclkb */
369                         OMAP3_CORE1_IOPAD(0x2132, PIN_OUTPUT | MUX_MODE0)       /* cam_strobe */
370                 >;
371         };
372 };
373
374 &i2c1 {
375         pinctrl-names = "default";
376         pinctrl-0 = <&i2c1_pins>;
377
378         clock-frequency = <2200000>;
379
380         twl: twl@48 {
381                 reg = <0x48>;
382                 interrupts = <7>; /* SYS_NIRQ cascaded to intc */
383                 interrupt-parent = <&intc>;
384         };
385 };
386
387 #include "twl4030.dtsi"
388 #include "twl4030_omap3.dtsi"
389
390 &vaux1 {
391         regulator-name = "V28";
392         regulator-min-microvolt = <2800000>;
393         regulator-max-microvolt = <2800000>;
394         regulator-initial-mode = <0x0e>; /* RES_STATE_ACTIVE */
395         regulator-always-on; /* due to battery cover sensor */
396 };
397
398 &vaux2 {
399         regulator-name = "VCSI";
400         regulator-min-microvolt = <1800000>;
401         regulator-max-microvolt = <1800000>;
402         regulator-initial-mode = <0x0e>; /* RES_STATE_ACTIVE */
403 };
404
405 &vaux3 {
406         regulator-name = "VMMC2_30";
407         regulator-min-microvolt = <2800000>;
408         regulator-max-microvolt = <3000000>;
409         regulator-initial-mode = <0x0e>; /* RES_STATE_ACTIVE */
410 };
411
412 &vaux4 {
413         regulator-name = "VCAM_ANA_28";
414         regulator-min-microvolt = <2800000>;
415         regulator-max-microvolt = <2800000>;
416         regulator-initial-mode = <0x0e>; /* RES_STATE_ACTIVE */
417 };
418
419 &vmmc1 {
420         regulator-name = "VMMC1";
421         regulator-min-microvolt = <1850000>;
422         regulator-max-microvolt = <3150000>;
423         regulator-initial-mode = <0x0e>; /* RES_STATE_ACTIVE */
424 };
425
426 &vmmc2 {
427         regulator-name = "V28_A";
428         regulator-min-microvolt = <2800000>;
429         regulator-max-microvolt = <3000000>;
430         regulator-initial-mode = <0x0e>; /* RES_STATE_ACTIVE */
431         regulator-always-on; /* due VIO leak to AIC34 VDDs */
432 };
433
434 &vpll1 {
435         regulator-name = "VPLL";
436         regulator-min-microvolt = <1800000>;
437         regulator-max-microvolt = <1800000>;
438         regulator-initial-mode = <0x0e>; /* RES_STATE_ACTIVE */
439         regulator-always-on;
440 };
441
442 &vpll2 {
443         regulator-name = "VSDI_CSI";
444         regulator-min-microvolt = <1800000>;
445         regulator-max-microvolt = <1800000>;
446         regulator-initial-mode = <0x0e>; /* RES_STATE_ACTIVE */
447         regulator-always-on;
448 };
449
450 &vsim {
451         regulator-name = "VMMC2_IO_18";
452         regulator-min-microvolt = <1800000>;
453         regulator-max-microvolt = <1800000>;
454         regulator-initial-mode = <0x0e>; /* RES_STATE_ACTIVE */
455 };
456
457 &vio {
458         regulator-name = "VIO";
459         regulator-min-microvolt = <1800000>;
460         regulator-max-microvolt = <1800000>;
461 };
462
463 &vintana1 {
464         regulator-name = "VINTANA1";
465         /* fixed to 1500000 */
466         regulator-always-on;
467 };
468
469 &vintana2 {
470         regulator-name = "VINTANA2";
471         regulator-min-microvolt = <2750000>;
472         regulator-max-microvolt = <2750000>;
473         regulator-always-on;
474 };
475
476 &vintdig {
477         regulator-name = "VINTDIG";
478         /* fixed to 1500000 */
479         regulator-always-on;
480 };
481
482 &twl {
483         twl_audio: audio {
484                 compatible = "ti,twl4030-audio";
485                 ti,enable-vibra = <1>;
486         };
487
488         twl_power: power {
489                 compatible = "ti,twl4030-power-n900", "ti,twl4030-power-idle-osc-off";
490                 ti,use_poweroff;
491         };
492 };
493
494 &twl_keypad {
495         linux,keymap = < MATRIX_KEY(0x00, 0x00, KEY_Q)
496                          MATRIX_KEY(0x00, 0x01, KEY_O)
497                          MATRIX_KEY(0x00, 0x02, KEY_P)
498                          MATRIX_KEY(0x00, 0x03, KEY_COMMA)
499                          MATRIX_KEY(0x00, 0x04, KEY_BACKSPACE)
500                          MATRIX_KEY(0x00, 0x06, KEY_A)
501                          MATRIX_KEY(0x00, 0x07, KEY_S)
502
503                          MATRIX_KEY(0x01, 0x00, KEY_W)
504                          MATRIX_KEY(0x01, 0x01, KEY_D)
505                          MATRIX_KEY(0x01, 0x02, KEY_F)
506                          MATRIX_KEY(0x01, 0x03, KEY_G)
507                          MATRIX_KEY(0x01, 0x04, KEY_H)
508                          MATRIX_KEY(0x01, 0x05, KEY_J)
509                          MATRIX_KEY(0x01, 0x06, KEY_K)
510                          MATRIX_KEY(0x01, 0x07, KEY_L)
511
512                          MATRIX_KEY(0x02, 0x00, KEY_E)
513                          MATRIX_KEY(0x02, 0x01, KEY_DOT)
514                          MATRIX_KEY(0x02, 0x02, KEY_UP)
515                          MATRIX_KEY(0x02, 0x03, KEY_ENTER)
516                          MATRIX_KEY(0x02, 0x05, KEY_Z)
517                          MATRIX_KEY(0x02, 0x06, KEY_X)
518                          MATRIX_KEY(0x02, 0x07, KEY_C)
519                          MATRIX_KEY(0x02, 0x08, KEY_F9)
520
521                          MATRIX_KEY(0x03, 0x00, KEY_R)
522                          MATRIX_KEY(0x03, 0x01, KEY_V)
523                          MATRIX_KEY(0x03, 0x02, KEY_B)
524                          MATRIX_KEY(0x03, 0x03, KEY_N)
525                          MATRIX_KEY(0x03, 0x04, KEY_M)
526                          MATRIX_KEY(0x03, 0x05, KEY_SPACE)
527                          MATRIX_KEY(0x03, 0x06, KEY_SPACE)
528                          MATRIX_KEY(0x03, 0x07, KEY_LEFT)
529
530                          MATRIX_KEY(0x04, 0x00, KEY_T)
531                          MATRIX_KEY(0x04, 0x01, KEY_DOWN)
532                          MATRIX_KEY(0x04, 0x02, KEY_RIGHT)
533                          MATRIX_KEY(0x04, 0x04, KEY_LEFTCTRL)
534                          MATRIX_KEY(0x04, 0x05, KEY_RIGHTALT)
535                          MATRIX_KEY(0x04, 0x06, KEY_LEFTSHIFT)
536                          MATRIX_KEY(0x04, 0x08, KEY_F10)
537
538                          MATRIX_KEY(0x05, 0x00, KEY_Y)
539                          MATRIX_KEY(0x05, 0x08, KEY_F11)
540
541                          MATRIX_KEY(0x06, 0x00, KEY_U)
542
543                          MATRIX_KEY(0x07, 0x00, KEY_I)
544                          MATRIX_KEY(0x07, 0x01, KEY_F7)
545                          MATRIX_KEY(0x07, 0x02, KEY_F8)
546                          >;
547 };
548
549 &twl_gpio {
550         ti,pullups      = <0x0>;
551         ti,pulldowns    = <0x03ff3f>; /* BIT(0..5) | BIT(8..17) */
552 };
553
554 &i2c2 {
555         pinctrl-names = "default";
556         pinctrl-0 = <&i2c2_pins>;
557
558         clock-frequency = <100000>;
559
560         tlv320aic3x: tlv320aic3x@18 {
561                 compatible = "ti,tlv320aic3x";
562                 reg = <0x18>;
563                 reset-gpios = <&gpio2 28 GPIO_ACTIVE_LOW>; /* 60 */
564                 ai3x-gpio-func = <
565                         0 /* AIC3X_GPIO1_FUNC_DISABLED */
566                         5 /* AIC3X_GPIO2_FUNC_DIGITAL_MIC_INPUT */
567                 >;
568
569                 AVDD-supply = <&vmmc2>;
570                 DRVDD-supply = <&vmmc2>;
571                 IOVDD-supply = <&vio>;
572                 DVDD-supply = <&vio>;
573
574                 ai3x-micbias-vg = <1>;
575         };
576
577         tlv320aic3x_aux: tlv320aic3x@19 {
578                 compatible = "ti,tlv320aic3x";
579                 reg = <0x19>;
580                 reset-gpios = <&gpio2 28 GPIO_ACTIVE_LOW>; /* 60 */
581
582                 AVDD-supply = <&vmmc2>;
583                 DRVDD-supply = <&vmmc2>;
584                 IOVDD-supply = <&vio>;
585                 DVDD-supply = <&vio>;
586
587                 ai3x-micbias-vg = <2>;
588         };
589
590         tsl2563: tsl2563@29 {
591                 compatible = "amstaos,tsl2563";
592                 reg = <0x29>;
593
594                 amstaos,cover-comp-gain = <16>;
595         };
596
597         adp1653: led-controller@30 {
598                 compatible = "adi,adp1653";
599                 reg = <0x30>;
600                 enable-gpios = <&gpio3 24 GPIO_ACTIVE_HIGH>; /* 88 */
601
602                 flash {
603                         flash-timeout-us = <500000>;
604                         flash-max-microamp = <320000>;
605                         led-max-microamp = <50000>;
606                 };
607                 indicator {
608                         led-max-microamp = <17500>;
609                 };
610         };
611
612         lp5523: lp5523@32 {
613                 compatible = "national,lp5523";
614                 reg = <0x32>;
615                 clock-mode = /bits/ 8 <0>; /* LP55XX_CLOCK_AUTO */
616                 enable-gpio = <&gpio2 9 GPIO_ACTIVE_HIGH>; /* 41 */
617
618                 chan0 {
619                         chan-name = "lp5523:kb1";
620                         led-cur = /bits/ 8 <50>;
621                         max-cur = /bits/ 8 <100>;
622                 };
623
624                 chan1 {
625                         chan-name = "lp5523:kb2";
626                         led-cur = /bits/ 8 <50>;
627                         max-cur = /bits/ 8 <100>;
628                 };
629
630                 chan2 {
631                         chan-name = "lp5523:kb3";
632                         led-cur = /bits/ 8 <50>;
633                         max-cur = /bits/ 8 <100>;
634                 };
635
636                 chan3 {
637                         chan-name = "lp5523:kb4";
638                         led-cur = /bits/ 8 <50>;
639                         max-cur = /bits/ 8 <100>;
640                 };
641
642                 chan4 {
643                         chan-name = "lp5523:b";
644                         led-cur = /bits/ 8 <50>;
645                         max-cur = /bits/ 8 <100>;
646                 };
647
648                 chan5 {
649                         chan-name = "lp5523:g";
650                         led-cur = /bits/ 8 <50>;
651                         max-cur = /bits/ 8 <100>;
652                 };
653
654                 chan6 {
655                         chan-name = "lp5523:r";
656                         led-cur = /bits/ 8 <50>;
657                         max-cur = /bits/ 8 <100>;
658                 };
659
660                 chan7 {
661                         chan-name = "lp5523:kb5";
662                         led-cur = /bits/ 8 <50>;
663                         max-cur = /bits/ 8 <100>;
664                 };
665
666                 chan8 {
667                         chan-name = "lp5523:kb6";
668                         led-cur = /bits/ 8 <50>;
669                         max-cur = /bits/ 8 <100>;
670                 };
671         };
672
673         bq27200: bq27200@55 {
674                 compatible = "ti,bq27200";
675                 reg = <0x55>;
676         };
677
678         /* Stereo headphone amplifier */
679         tpa6130a2: tpa6130a2@60 {
680                 compatible = "ti,tpa6130a2";
681                 reg = <0x60>;
682
683                 Vdd-supply = <&vmmc2>;
684
685                 power-gpio = <&gpio4 2 GPIO_ACTIVE_HIGH>; /* 98 */
686         };
687
688         si4713: si4713@63 {
689                 compatible = "silabs,si4713";
690                 reg = <0x63>;
691
692                 interrupts-extended = <&gpio2 21 IRQ_TYPE_EDGE_FALLING>; /* 53 */
693                 reset-gpios = <&gpio6 3 GPIO_ACTIVE_HIGH>; /* 163 */
694                 vio-supply = <&vio>;
695                 vdd-supply = <&vaux1>;
696         };
697
698         bq24150a: bq24150a@6b {
699                 compatible = "ti,bq24150a";
700                 reg = <0x6b>;
701
702                 ti,current-limit = <100>;
703                 ti,weak-battery-voltage = <3400>;
704                 ti,battery-regulation-voltage = <4200>;
705                 ti,charge-current = <650>;
706                 ti,termination-current = <100>;
707                 ti,resistor-sense = <68>;
708
709                 ti,usb-charger-detection = <&isp1707>;
710         };
711 };
712
713 &i2c3 {
714         pinctrl-names = "default";
715         pinctrl-0 = <&i2c3_pins>;
716
717         clock-frequency = <400000>;
718
719         lis302dl: lis3lv02d@1d {
720                 compatible = "st,lis3lv02d";
721                 reg = <0x1d>;
722
723                 Vdd-supply = <&vaux1>;
724                 Vdd_IO-supply = <&vio>;
725
726                 interrupt-parent = <&gpio6>;
727                 interrupts = <21 20>; /* 181 and 180 */
728
729                 /* click flags */
730                 st,click-single-x;
731                 st,click-single-y;
732                 st,click-single-z;
733
734                 /* Limits are 0.5g * value */
735                 st,click-threshold-x = <8>;
736                 st,click-threshold-y = <8>;
737                 st,click-threshold-z = <10>;
738
739                 /* Click must be longer than time limit */
740                 st,click-time-limit = <9>;
741
742                 /* Kind of debounce filter */
743                 st,click-latency = <50>;
744
745                 /* Interrupt line 2 for click detection */
746                 st,irq2-click;
747
748                 st,wakeup-x-hi;
749                 st,wakeup-y-hi;
750                 st,wakeup-threshold = <(800/18)>; /* millig-value / 18 to get HW values */
751
752                 st,wakeup2-z-hi;
753                 st,wakeup2-threshold = <(900/18)>; /* millig-value / 18 to get HW values */
754
755                 st,hipass1-disable;
756                 st,hipass2-disable;
757
758                 st,axis-x = <1>;    /* LIS3_DEV_X */
759                 st,axis-y = <(-2)>; /* LIS3_INV_DEV_Y */
760                 st,axis-z = <(-3)>; /* LIS3_INV_DEV_Z */
761
762                 st,min-limit-x = <(-32)>;
763                 st,min-limit-y = <3>;
764                 st,min-limit-z = <3>;
765
766                 st,max-limit-x = <(-3)>;
767                 st,max-limit-y = <32>;
768                 st,max-limit-z = <32>;
769         };
770
771         cam1: camera@3e {
772                 compatible = "toshiba,et8ek8";
773                 reg = <0x3e>;
774
775                 vana-supply = <&vaux4>;
776
777                 clocks = <&isp 0>;
778                 clock-names = "extclk";
779                 clock-frequency = <9600000>;
780
781                 reset-gpio = <&gpio4 6 GPIO_ACTIVE_HIGH>; /* 102 */
782
783                 port {
784                         csi_cam1: endpoint {
785                                 bus-type = <3>; /* CCP2 */
786                                 strobe = <1>;
787                                 clock-inv = <0>;
788                                 crc = <1>;
789
790                                 remote-endpoint = <&csi_isp>;
791                         };
792                 };
793         };
794
795         /* D/A converter for auto-focus */
796         ad5820: dac@c {
797                 compatible = "adi,ad5820";
798                 reg = <0x0c>;
799
800                 VANA-supply = <&vaux4>;
801
802                 #io-channel-cells = <0>;
803         };
804 };
805
806 &mmc1 {
807         pinctrl-names = "default";
808         pinctrl-0 = <&mmc1_pins>;
809         vmmc-supply = <&vmmc1>;
810         bus-width = <4>;
811         /* For debugging, it is often good idea to remove this GPIO.
812            It means you can remove back cover (to reboot by removing
813            battery) and still use the MMC card. */
814         cd-gpios = <&gpio6 0 GPIO_ACTIVE_HIGH>; /* 160 */
815 };
816
817 /* most boards use vaux3, only some old versions use vmmc2 instead */
818 &mmc2 {
819         pinctrl-names = "default";
820         pinctrl-0 = <&mmc2_pins>;
821         vmmc-supply = <&vaux3>;
822         vqmmc-supply = <&vsim>;
823         bus-width = <8>;
824         non-removable;
825         no-sdio;
826         no-sd;
827 };
828
829 &mmc3 {
830         status = "disabled";
831 };
832
833 &gpmc {
834         ranges = <0 0 0x01000000 0x01000000>,   /* 16 MB for OneNAND */
835                  <1 0 0x02000000 0x01000000>;   /* 16 MB for smc91c96 */
836         pinctrl-names = "default";
837         pinctrl-0 = <&gpmc_pins>;
838
839         /* sys_ndmareq1 could be used by the driver, not as gpio65 though */
840         onenand@0,0 {
841                 #address-cells = <1>;
842                 #size-cells = <1>;
843                 compatible = "ti,omap2-onenand";
844                 reg = <0 0 0x20000>;    /* CS0, offset 0, IO size 128K */
845
846                 gpmc,sync-read;
847                 gpmc,sync-write;
848                 gpmc,burst-length = <16>;
849                 gpmc,burst-read;
850                 gpmc,burst-wrap;
851                 gpmc,burst-write;
852                 gpmc,device-width = <2>; /* GPMC_DEVWIDTH_16BIT */
853                 gpmc,mux-add-data = <2>; /* GPMC_MUX_AD */
854                 gpmc,cs-on-ns = <0>;
855                 gpmc,cs-rd-off-ns = <87>;
856                 gpmc,cs-wr-off-ns = <87>;
857                 gpmc,adv-on-ns = <0>;
858                 gpmc,adv-rd-off-ns = <10>;
859                 gpmc,adv-wr-off-ns = <10>;
860                 gpmc,oe-on-ns = <15>;
861                 gpmc,oe-off-ns = <87>;
862                 gpmc,we-on-ns = <0>;
863                 gpmc,we-off-ns = <87>;
864                 gpmc,rd-cycle-ns = <112>;
865                 gpmc,wr-cycle-ns = <112>;
866                 gpmc,access-ns = <81>;
867                 gpmc,page-burst-access-ns = <15>;
868                 gpmc,bus-turnaround-ns = <0>;
869                 gpmc,cycle2cycle-delay-ns = <0>;
870                 gpmc,wait-monitoring-ns = <0>;
871                 gpmc,clk-activation-ns = <5>;
872                 gpmc,wr-data-mux-bus-ns = <30>;
873                 gpmc,wr-access-ns = <81>;
874                 gpmc,sync-clk-ps = <15000>;
875
876                 /*
877                  * MTD partition table corresponding to Nokia's
878                  * Maemo 5 (Fremantle) release.
879                  */
880                 partition@0 {
881                         label = "bootloader";
882                         reg = <0x00000000 0x00020000>;
883                         read-only;
884                 };
885                 partition@1 {
886                         label = "config";
887                         reg = <0x00020000 0x00060000>;
888                 };
889                 partition@2 {
890                         label = "log";
891                         reg = <0x00080000 0x00040000>;
892                 };
893                 partition@3 {
894                         label = "kernel";
895                         reg = <0x000c0000 0x00200000>;
896                 };
897                 partition@4 {
898                         label = "initfs";
899                         reg = <0x002c0000 0x00200000>;
900                 };
901                 partition@5 {
902                         label = "rootfs";
903                         reg = <0x004c0000 0x0fb40000>;
904                 };
905         };
906
907         /* Ethernet is on some early development boards and qemu */
908         ethernet@gpmc {
909                 compatible = "smsc,lan91c94";
910                 interrupt-parent = <&gpio2>;
911                 interrupts = <22 IRQ_TYPE_LEVEL_HIGH>;  /* gpio54 */
912                 reg = <1 0 0xf>;                /* 16 byte IO range */
913                 bank-width = <2>;
914                 pinctrl-names = "default";
915                 pinctrl-0 = <&ethernet_pins>;
916                 power-gpios = <&gpio3 22 GPIO_ACTIVE_HIGH>;     /* gpio86 */
917                 reset-gpios = <&gpio6 4 GPIO_ACTIVE_HIGH>;      /* gpio164 */
918                 gpmc,device-width = <2>;
919                 gpmc,sync-clk-ps = <0>;
920                 gpmc,cs-on-ns = <0>;
921                 gpmc,cs-rd-off-ns = <48>;
922                 gpmc,cs-wr-off-ns = <24>;
923                 gpmc,adv-on-ns = <0>;
924                 gpmc,adv-rd-off-ns = <0>;
925                 gpmc,adv-wr-off-ns = <0>;
926                 gpmc,we-on-ns = <12>;
927                 gpmc,we-off-ns = <18>;
928                 gpmc,oe-on-ns = <12>;
929                 gpmc,oe-off-ns = <48>;
930                 gpmc,page-burst-access-ns = <0>;
931                 gpmc,access-ns = <42>;
932                 gpmc,rd-cycle-ns = <180>;
933                 gpmc,wr-cycle-ns = <180>;
934                 gpmc,bus-turnaround-ns = <0>;
935                 gpmc,cycle2cycle-delay-ns = <0>;
936                 gpmc,wait-monitoring-ns = <0>;
937                 gpmc,clk-activation-ns = <0>;
938                 gpmc,wr-access-ns = <0>;
939                 gpmc,wr-data-mux-bus-ns = <12>;
940         };
941 };
942
943 &mcspi1 {
944         /*
945          * For some reason, touchscreen is necessary for screen to work at
946          * all on real hw. It works well without it on emulator.
947          *
948          * Also... order in the device tree actually matters here.
949          */
950         tsc2005@0 {
951                 compatible = "ti,tsc2005";
952                 spi-max-frequency = <6000000>;
953                 reg = <0>;
954
955                 vio-supply = <&vio>;
956
957                 reset-gpios = <&gpio4 8 GPIO_ACTIVE_HIGH>; /* 104 */
958                 interrupts-extended = <&gpio4 4 IRQ_TYPE_EDGE_RISING>; /* 100 */
959
960                 touchscreen-fuzz-x = <4>;
961                 touchscreen-fuzz-y = <7>;
962                 touchscreen-fuzz-pressure = <2>;
963                 touchscreen-size-x = <4096>;
964                 touchscreen-size-y = <4096>;
965                 touchscreen-max-pressure = <2048>;
966
967                 ti,x-plate-ohms = <280>;
968                 ti,esd-recovery-timeout-ms = <8000>;
969         };
970
971         lcd: acx565akm@2 {
972                 compatible = "sony,acx565akm";
973                 spi-max-frequency = <6000000>;
974                 reg = <2>;
975
976                 pinctrl-names = "default";
977                 pinctrl-0 = <&acx565akm_pins>;
978
979                 label = "lcd";
980                 reset-gpios = <&gpio3 26 GPIO_ACTIVE_HIGH>; /* 90 */
981
982                 port {
983                         lcd_in: endpoint {
984                                 remote-endpoint = <&sdi_out>;
985                         };
986                 };
987         };
988 };
989
990 &mcspi4 {
991         pinctrl-names = "default";
992         pinctrl-0 = <&mcspi4_pins>;
993
994         wl1251@0 {
995                 pinctrl-names = "default";
996                 pinctrl-0 = <&wl1251_pins>;
997
998                 vio-supply = <&vio>;
999
1000                 compatible = "ti,wl1251";
1001                 reg = <0>;
1002                 spi-max-frequency = <48000000>;
1003
1004                 spi-cpol;
1005                 spi-cpha;
1006
1007                 ti,power-gpio = <&gpio3 23 GPIO_ACTIVE_HIGH>; /* 87 */
1008
1009                 interrupt-parent = <&gpio2>;
1010                 interrupts = <10 IRQ_TYPE_NONE>; /* gpio line 42 */
1011
1012                 clocks = <&vctcxo>;
1013         };
1014 };
1015
1016 &usb_otg_hs {
1017         interface-type = <0>;
1018         usb-phy = <&usb2_phy>;
1019         phys = <&usb2_phy>;
1020         phy-names = "usb2-phy";
1021         mode = <2>;
1022         power = <50>;
1023 };
1024
1025 &uart1 {
1026         status = "disabled";
1027 };
1028
1029 &uart2 {
1030         pinctrl-names = "default";
1031         pinctrl-0 = <&uart2_pins>;
1032
1033         bcm2048: bluetooth {
1034                 compatible = "brcm,bcm2048-nokia", "nokia,h4p-bluetooth";
1035                 reset-gpios = <&gpio3 27 GPIO_ACTIVE_LOW>; /* 91 */
1036                 host-wakeup-gpios = <&gpio4 5 GPIO_ACTIVE_HIGH>; /* 101 */
1037                 bluetooth-wakeup-gpios = <&gpio2 5 GPIO_ACTIVE_HIGH>; /* 37 */
1038                 clocks = <&vctcxo>;
1039                 clock-names = "sysclk";
1040         };
1041 };
1042
1043 &uart3 {
1044         interrupts-extended = <&intc 74 &omap3_pmx_core OMAP3_UART3_RX>;
1045         pinctrl-names = "default";
1046         pinctrl-0 = <&uart3_pins>;
1047 };
1048
1049 &dss {
1050         status = "ok";
1051
1052         pinctrl-names = "default";
1053         pinctrl-0 = <&dss_sdi_pins>;
1054
1055         vdds_sdi-supply = <&vaux1>;
1056
1057         ports {
1058                 #address-cells = <1>;
1059                 #size-cells = <0>;
1060
1061                 port@1 {
1062                         reg = <1>;
1063
1064                         sdi_out: endpoint {
1065                                 remote-endpoint = <&lcd_in>;
1066                                 datapairs = <2>;
1067                         };
1068                 };
1069         };
1070 };
1071
1072 &venc {
1073         status = "ok";
1074
1075         vdda-supply = <&vdac>;
1076
1077         port {
1078                 venc_out: endpoint {
1079                         remote-endpoint = <&tv_connector_in>;
1080                         ti,channels = <1>;
1081                 };
1082         };
1083 };
1084
1085 &mcbsp2 {
1086         status = "ok";
1087 };
1088
1089 &ssi_port1 {
1090         pinctrl-names = "default";
1091         pinctrl-0 = <&ssi_pins>;
1092
1093         ti,ssi-cawake-gpio = <&gpio5 23 GPIO_ACTIVE_HIGH>; /* 151 */
1094
1095         modem: hsi-client {
1096                 compatible = "nokia,n900-modem";
1097
1098                 pinctrl-names = "default";
1099                 pinctrl-0 = <&modem_pins>;
1100
1101                 hsi-channel-ids = <0>, <1>, <2>, <3>;
1102                 hsi-channel-names = "mcsaab-control",
1103                                     "speech-control",
1104                                     "speech-data",
1105                                     "mcsaab-data";
1106                 hsi-speed-kbps = <55000>;
1107                 hsi-mode = "frame";
1108                 hsi-flow = "synchronized";
1109                 hsi-arb-mode = "round-robin";
1110
1111                 interrupts-extended = <&gpio3 8 IRQ_TYPE_EDGE_FALLING>; /* 72 */
1112
1113                 gpios = <&gpio3  6 GPIO_ACTIVE_HIGH>, /* 70 */
1114                         <&gpio3  9 GPIO_ACTIVE_HIGH>, /* 73 */
1115                         <&gpio3 10 GPIO_ACTIVE_HIGH>, /* 74 */
1116                         <&gpio3 11 GPIO_ACTIVE_HIGH>, /* 75 */
1117                         <&gpio5 29 GPIO_ACTIVE_HIGH>; /* 157 */
1118                 gpio-names = "cmt_apeslpx",
1119                              "cmt_rst_rq",
1120                              "cmt_en",
1121                              "cmt_rst",
1122                              "cmt_bsi";
1123         };
1124 };
1125
1126 &ssi_port2 {
1127         status = "disabled";
1128 };