2 * Copyright 2013-2014 Freescale Semiconductor, Inc.
4 * This file is dual-licensed: you can use it either under the terms
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6 * licensing only applies to this file, and not this project as a
9 * a) This file is free software; you can redistribute it and/or
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17 * GNU General Public License for more details.
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48 #include "skeleton64.dtsi"
49 #include <dt-bindings/interrupt-controller/arm-gic.h>
50 #include <dt-bindings/thermal/thermal.h>
53 compatible = "fsl,ls1021a";
54 interrupt-parent = <&gic>;
75 compatible = "arm,cortex-a7";
78 clocks = <&clockgen 1 0>;
83 compatible = "arm,cortex-a7";
86 clocks = <&clockgen 1 0>;
91 compatible = "fixed-clock";
93 clock-frequency = <100000000>;
94 clock-output-names = "sysclk";
98 compatible = "arm,armv7-timer";
99 interrupts = <GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>,
100 <GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>,
101 <GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>,
102 <GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>;
106 compatible = "arm,cortex-a7-pmu";
107 interrupts = <GIC_SPI 138 IRQ_TYPE_LEVEL_HIGH>,
108 <GIC_SPI 139 IRQ_TYPE_LEVEL_HIGH>;
112 compatible = "simple-bus";
113 #address-cells = <2>;
116 interrupt-parent = <&gic>;
119 gic: interrupt-controller@1400000 {
120 compatible = "arm,gic-400", "arm,cortex-a7-gic";
121 #interrupt-cells = <3>;
122 interrupt-controller;
123 reg = <0x0 0x1401000 0x0 0x1000>,
124 <0x0 0x1402000 0x0 0x2000>,
125 <0x0 0x1404000 0x0 0x2000>,
126 <0x0 0x1406000 0x0 0x2000>;
127 interrupts = <GIC_PPI 9 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_HIGH)>;
131 msi1: msi-controller@1570e00 {
132 compatible = "fsl,ls1021a-msi";
133 reg = <0x0 0x1570e00 0x0 0x8>;
135 interrupts = <GIC_SPI 179 IRQ_TYPE_LEVEL_HIGH>;
138 msi2: msi-controller@1570e08 {
139 compatible = "fsl,ls1021a-msi";
140 reg = <0x0 0x1570e08 0x0 0x8>;
142 interrupts = <GIC_SPI 180 IRQ_TYPE_LEVEL_HIGH>;
146 compatible = "fsl,ifc", "simple-bus";
147 reg = <0x0 0x1530000 0x0 0x10000>;
148 interrupts = <GIC_SPI 75 IRQ_TYPE_LEVEL_HIGH>;
152 compatible = "fsl,ls1021a-dcfg", "syscon";
153 reg = <0x0 0x1ee0000 0x0 0x10000>;
157 esdhc: esdhc@1560000 {
158 compatible = "fsl,esdhc";
159 reg = <0x0 0x1560000 0x0 0x10000>;
160 interrupts = <GIC_SPI 94 IRQ_TYPE_LEVEL_HIGH>;
161 clock-frequency = <0>;
162 voltage-ranges = <1800 1800 3300 3300>;
170 compatible = "fsl,ls1021a-ahci";
171 reg = <0x0 0x3200000 0x0 0x10000>,
172 <0x0 0x20220520 0x0 0x4>;
173 reg-names = "ahci", "sata-ecc";
174 interrupts = <GIC_SPI 101 IRQ_TYPE_LEVEL_HIGH>;
175 clocks = <&clockgen 4 1>;
181 compatible = "fsl,ls1021a-scfg", "syscon";
182 reg = <0x0 0x1570000 0x0 0x10000>;
186 crypto: crypto@1700000 {
187 compatible = "fsl,sec-v5.0", "fsl,sec-v4.0";
189 #address-cells = <1>;
191 reg = <0x0 0x1700000 0x0 0x100000>;
192 ranges = <0x0 0x0 0x1700000 0x100000>;
193 interrupts = <GIC_SPI 107 IRQ_TYPE_LEVEL_HIGH>;
196 compatible = "fsl,sec-v5.0-job-ring",
197 "fsl,sec-v4.0-job-ring";
198 reg = <0x10000 0x10000>;
199 interrupts = <GIC_SPI 103 IRQ_TYPE_LEVEL_HIGH>;
203 compatible = "fsl,sec-v5.0-job-ring",
204 "fsl,sec-v4.0-job-ring";
205 reg = <0x20000 0x10000>;
206 interrupts = <GIC_SPI 104 IRQ_TYPE_LEVEL_HIGH>;
210 compatible = "fsl,sec-v5.0-job-ring",
211 "fsl,sec-v4.0-job-ring";
212 reg = <0x30000 0x10000>;
213 interrupts = <GIC_SPI 105 IRQ_TYPE_LEVEL_HIGH>;
217 compatible = "fsl,sec-v5.0-job-ring",
218 "fsl,sec-v4.0-job-ring";
219 reg = <0x40000 0x10000>;
220 interrupts = <GIC_SPI 106 IRQ_TYPE_LEVEL_HIGH>;
225 clockgen: clocking@1ee1000 {
226 compatible = "fsl,ls1021a-clockgen";
227 reg = <0x0 0x1ee1000 0x0 0x1000>;
233 compatible = "fsl,qoriq-tmu";
234 reg = <0x0 0x1f00000 0x0 0x10000>;
235 interrupts = <GIC_SPI 61 IRQ_TYPE_LEVEL_HIGH>;
236 fsl,tmu-range = <0xb0000 0xa0026 0x80048 0x30061>;
237 fsl,tmu-calibration = <0x00000000 0x0000000f
238 0x00000001 0x00000017
239 0x00000002 0x0000001e
240 0x00000003 0x00000026
241 0x00000004 0x0000002e
242 0x00000005 0x00000035
243 0x00000006 0x0000003d
244 0x00000007 0x00000044
245 0x00000008 0x0000004c
246 0x00000009 0x00000053
247 0x0000000a 0x0000005b
248 0x0000000b 0x00000064
250 0x00010000 0x00000011
251 0x00010001 0x0000001c
252 0x00010002 0x00000024
253 0x00010003 0x0000002b
254 0x00010004 0x00000034
255 0x00010005 0x00000039
256 0x00010006 0x00000042
257 0x00010007 0x0000004c
258 0x00010008 0x00000051
259 0x00010009 0x0000005a
260 0x0001000a 0x00000063
262 0x00020000 0x00000013
263 0x00020001 0x00000019
264 0x00020002 0x00000024
265 0x00020003 0x0000002c
266 0x00020004 0x00000035
267 0x00020005 0x0000003d
268 0x00020006 0x00000046
269 0x00020007 0x00000050
270 0x00020008 0x00000059
272 0x00030000 0x00000002
273 0x00030001 0x0000000d
274 0x00030002 0x00000019
275 0x00030003 0x00000024>;
276 #thermal-sensor-cells = <1>;
280 cpu_thermal: cpu-thermal {
281 polling-delay-passive = <1000>;
282 polling-delay = <5000>;
284 thermal-sensors = <&tmu 0>;
287 cpu_alert: cpu-alert {
288 temperature = <85000>;
293 temperature = <95000>;
303 <&cpu0 THERMAL_NO_LIMIT
310 dspi0: dspi@2100000 {
311 compatible = "fsl,ls1021a-v1.0-dspi";
312 #address-cells = <1>;
314 reg = <0x0 0x2100000 0x0 0x10000>;
315 interrupts = <GIC_SPI 96 IRQ_TYPE_LEVEL_HIGH>;
316 clock-names = "dspi";
317 clocks = <&clockgen 4 1>;
318 spi-num-chipselects = <6>;
323 dspi1: dspi@2110000 {
324 compatible = "fsl,ls1021a-v1.0-dspi";
325 #address-cells = <1>;
327 reg = <0x0 0x2110000 0x0 0x10000>;
328 interrupts = <GIC_SPI 97 IRQ_TYPE_LEVEL_HIGH>;
329 clock-names = "dspi";
330 clocks = <&clockgen 4 1>;
331 spi-num-chipselects = <6>;
337 compatible = "fsl,vf610-i2c";
338 #address-cells = <1>;
340 reg = <0x0 0x2180000 0x0 0x10000>;
341 interrupts = <GIC_SPI 88 IRQ_TYPE_LEVEL_HIGH>;
343 clocks = <&clockgen 4 1>;
348 compatible = "fsl,vf610-i2c";
349 #address-cells = <1>;
351 reg = <0x0 0x2190000 0x0 0x10000>;
352 interrupts = <GIC_SPI 89 IRQ_TYPE_LEVEL_HIGH>;
354 clocks = <&clockgen 4 1>;
359 compatible = "fsl,vf610-i2c";
360 #address-cells = <1>;
362 reg = <0x0 0x21a0000 0x0 0x10000>;
363 interrupts = <GIC_SPI 90 IRQ_TYPE_LEVEL_HIGH>;
365 clocks = <&clockgen 4 1>;
369 uart0: serial@21c0500 {
370 compatible = "fsl,16550-FIFO64", "ns16550a";
371 reg = <0x0 0x21c0500 0x0 0x100>;
372 interrupts = <GIC_SPI 86 IRQ_TYPE_LEVEL_HIGH>;
373 clock-frequency = <0>;
378 uart1: serial@21c0600 {
379 compatible = "fsl,16550-FIFO64", "ns16550a";
380 reg = <0x0 0x21c0600 0x0 0x100>;
381 interrupts = <GIC_SPI 86 IRQ_TYPE_LEVEL_HIGH>;
382 clock-frequency = <0>;
387 uart2: serial@21d0500 {
388 compatible = "fsl,16550-FIFO64", "ns16550a";
389 reg = <0x0 0x21d0500 0x0 0x100>;
390 interrupts = <GIC_SPI 87 IRQ_TYPE_LEVEL_HIGH>;
391 clock-frequency = <0>;
396 uart3: serial@21d0600 {
397 compatible = "fsl,16550-FIFO64", "ns16550a";
398 reg = <0x0 0x21d0600 0x0 0x100>;
399 interrupts = <GIC_SPI 87 IRQ_TYPE_LEVEL_HIGH>;
400 clock-frequency = <0>;
405 gpio0: gpio@2300000 {
406 compatible = "fsl,ls1021a-gpio", "fsl,qoriq-gpio";
407 reg = <0x0 0x2300000 0x0 0x10000>;
408 interrupts = <GIC_SPI 98 IRQ_TYPE_LEVEL_HIGH>;
411 interrupt-controller;
412 #interrupt-cells = <2>;
415 gpio1: gpio@2310000 {
416 compatible = "fsl,ls1021a-gpio", "fsl,qoriq-gpio";
417 reg = <0x0 0x2310000 0x0 0x10000>;
418 interrupts = <GIC_SPI 99 IRQ_TYPE_LEVEL_HIGH>;
421 interrupt-controller;
422 #interrupt-cells = <2>;
425 gpio2: gpio@2320000 {
426 compatible = "fsl,ls1021a-gpio", "fsl,qoriq-gpio";
427 reg = <0x0 0x2320000 0x0 0x10000>;
428 interrupts = <GIC_SPI 100 IRQ_TYPE_LEVEL_HIGH>;
431 interrupt-controller;
432 #interrupt-cells = <2>;
435 gpio3: gpio@2330000 {
436 compatible = "fsl,ls1021a-gpio", "fsl,qoriq-gpio";
437 reg = <0x0 0x2330000 0x0 0x10000>;
438 interrupts = <GIC_SPI 166 IRQ_TYPE_LEVEL_HIGH>;
441 interrupt-controller;
442 #interrupt-cells = <2>;
445 lpuart0: serial@2950000 {
446 compatible = "fsl,ls1021a-lpuart";
447 reg = <0x0 0x2950000 0x0 0x1000>;
448 interrupts = <GIC_SPI 80 IRQ_TYPE_LEVEL_HIGH>;
454 lpuart1: serial@2960000 {
455 compatible = "fsl,ls1021a-lpuart";
456 reg = <0x0 0x2960000 0x0 0x1000>;
457 interrupts = <GIC_SPI 81 IRQ_TYPE_LEVEL_HIGH>;
458 clocks = <&clockgen 4 1>;
463 lpuart2: serial@2970000 {
464 compatible = "fsl,ls1021a-lpuart";
465 reg = <0x0 0x2970000 0x0 0x1000>;
466 interrupts = <GIC_SPI 82 IRQ_TYPE_LEVEL_HIGH>;
467 clocks = <&clockgen 4 1>;
472 lpuart3: serial@2980000 {
473 compatible = "fsl,ls1021a-lpuart";
474 reg = <0x0 0x2980000 0x0 0x1000>;
475 interrupts = <GIC_SPI 83 IRQ_TYPE_LEVEL_HIGH>;
476 clocks = <&clockgen 4 1>;
481 lpuart4: serial@2990000 {
482 compatible = "fsl,ls1021a-lpuart";
483 reg = <0x0 0x2990000 0x0 0x1000>;
484 interrupts = <GIC_SPI 84 IRQ_TYPE_LEVEL_HIGH>;
485 clocks = <&clockgen 4 1>;
490 lpuart5: serial@29a0000 {
491 compatible = "fsl,ls1021a-lpuart";
492 reg = <0x0 0x29a0000 0x0 0x1000>;
493 interrupts = <GIC_SPI 85 IRQ_TYPE_LEVEL_HIGH>;
494 clocks = <&clockgen 4 1>;
499 wdog0: watchdog@2ad0000 {
500 compatible = "fsl,imx21-wdt";
501 reg = <0x0 0x2ad0000 0x0 0x10000>;
502 interrupts = <GIC_SPI 115 IRQ_TYPE_LEVEL_HIGH>;
503 clocks = <&clockgen 4 1>;
504 clock-names = "wdog-en";
509 #sound-dai-cells = <0>;
510 compatible = "fsl,vf610-sai";
511 reg = <0x0 0x2b50000 0x0 0x10000>;
512 interrupts = <GIC_SPI 132 IRQ_TYPE_LEVEL_HIGH>;
513 clocks = <&clockgen 4 1>, <&clockgen 4 1>,
514 <&clockgen 4 1>, <&clockgen 4 1>;
515 clock-names = "bus", "mclk1", "mclk2", "mclk3";
516 dma-names = "tx", "rx";
517 dmas = <&edma0 1 47>,
523 #sound-dai-cells = <0>;
524 compatible = "fsl,vf610-sai";
525 reg = <0x0 0x2b60000 0x0 0x10000>;
526 interrupts = <GIC_SPI 133 IRQ_TYPE_LEVEL_HIGH>;
527 clocks = <&clockgen 4 1>, <&clockgen 4 1>,
528 <&clockgen 4 1>, <&clockgen 4 1>;
529 clock-names = "bus", "mclk1", "mclk2", "mclk3";
530 dma-names = "tx", "rx";
531 dmas = <&edma0 1 45>,
536 edma0: edma@2c00000 {
538 compatible = "fsl,vf610-edma";
539 reg = <0x0 0x2c00000 0x0 0x10000>,
540 <0x0 0x2c10000 0x0 0x10000>,
541 <0x0 0x2c20000 0x0 0x10000>;
542 interrupts = <GIC_SPI 135 IRQ_TYPE_LEVEL_HIGH>,
543 <GIC_SPI 135 IRQ_TYPE_LEVEL_HIGH>;
544 interrupt-names = "edma-tx", "edma-err";
547 clock-names = "dmamux0", "dmamux1";
548 clocks = <&clockgen 4 1>,
553 compatible = "fsl,ls1021a-dcu";
554 reg = <0x0 0x2ce0000 0x0 0x10000>;
555 interrupts = <GIC_SPI 172 IRQ_TYPE_LEVEL_HIGH>;
556 clocks = <&clockgen 4 0>,
558 clock-names = "dcu", "pix";
563 mdio0: mdio@2d24000 {
564 compatible = "gianfar";
565 device_type = "mdio";
566 #address-cells = <1>;
568 reg = <0x0 0x2d24000 0x0 0x4000>;
572 compatible = "fsl,etsec-ptp";
573 reg = <0x0 0x2d10e00 0x0 0xb0>;
574 interrupts = <GIC_SPI 173 IRQ_TYPE_LEVEL_HIGH>;
575 fsl,tclk-period = <5>;
577 fsl,tmr-add = <0xaaaaaaab>;
578 fsl,tmr-fiper1 = <999999990>;
579 fsl,tmr-fiper2 = <99990>;
580 fsl,max-adj = <499999999>;
583 enet0: ethernet@2d10000 {
584 compatible = "fsl,etsec2";
585 device_type = "network";
586 #address-cells = <2>;
588 interrupt-parent = <&gic>;
594 queue-group@2d10000 {
595 #address-cells = <2>;
597 reg = <0x0 0x2d10000 0x0 0x1000>;
598 interrupts = <GIC_SPI 144 IRQ_TYPE_LEVEL_HIGH>,
599 <GIC_SPI 145 IRQ_TYPE_LEVEL_HIGH>,
600 <GIC_SPI 146 IRQ_TYPE_LEVEL_HIGH>;
603 queue-group@2d14000 {
604 #address-cells = <2>;
606 reg = <0x0 0x2d14000 0x0 0x1000>;
607 interrupts = <GIC_SPI 147 IRQ_TYPE_LEVEL_HIGH>,
608 <GIC_SPI 148 IRQ_TYPE_LEVEL_HIGH>,
609 <GIC_SPI 149 IRQ_TYPE_LEVEL_HIGH>;
613 enet1: ethernet@2d50000 {
614 compatible = "fsl,etsec2";
615 device_type = "network";
616 #address-cells = <2>;
618 interrupt-parent = <&gic>;
623 queue-group@2d50000 {
624 #address-cells = <2>;
626 reg = <0x0 0x2d50000 0x0 0x1000>;
627 interrupts = <GIC_SPI 150 IRQ_TYPE_LEVEL_HIGH>,
628 <GIC_SPI 152 IRQ_TYPE_LEVEL_HIGH>,
629 <GIC_SPI 153 IRQ_TYPE_LEVEL_HIGH>;
632 queue-group@2d54000 {
633 #address-cells = <2>;
635 reg = <0x0 0x2d54000 0x0 0x1000>;
636 interrupts = <GIC_SPI 154 IRQ_TYPE_LEVEL_HIGH>,
637 <GIC_SPI 155 IRQ_TYPE_LEVEL_HIGH>,
638 <GIC_SPI 156 IRQ_TYPE_LEVEL_HIGH>;
642 enet2: ethernet@2d90000 {
643 compatible = "fsl,etsec2";
644 device_type = "network";
645 #address-cells = <2>;
647 interrupt-parent = <&gic>;
652 queue-group@2d90000 {
653 #address-cells = <2>;
655 reg = <0x0 0x2d90000 0x0 0x1000>;
656 interrupts = <GIC_SPI 157 IRQ_TYPE_LEVEL_HIGH>,
657 <GIC_SPI 158 IRQ_TYPE_LEVEL_HIGH>,
658 <GIC_SPI 159 IRQ_TYPE_LEVEL_HIGH>;
661 queue-group@2d94000 {
662 #address-cells = <2>;
664 reg = <0x0 0x2d94000 0x0 0x1000>;
665 interrupts = <GIC_SPI 160 IRQ_TYPE_LEVEL_HIGH>,
666 <GIC_SPI 161 IRQ_TYPE_LEVEL_HIGH>,
667 <GIC_SPI 162 IRQ_TYPE_LEVEL_HIGH>;
672 compatible = "fsl-usb2-dr-v2.5", "fsl-usb2-dr";
673 reg = <0x0 0x8600000 0x0 0x1000>;
674 interrupts = <GIC_SPI 171 IRQ_TYPE_LEVEL_HIGH>;
680 compatible = "snps,dwc3";
681 reg = <0x0 0x3100000 0x0 0x10000>;
682 interrupts = <GIC_SPI 93 IRQ_TYPE_LEVEL_HIGH>;
684 snps,quirk-frame-length-adjustment = <0x20>;
685 snps,dis_rxdet_inp3_quirk;
689 compatible = "fsl,ls1021a-pcie", "snps,dw-pcie";
690 reg = <0x00 0x03400000 0x0 0x00010000 /* controller registers */
691 0x40 0x00000000 0x0 0x00002000>; /* configuration space */
692 reg-names = "regs", "config";
693 interrupts = <GIC_SPI 177 IRQ_TYPE_LEVEL_HIGH>; /* controller interrupt */
694 fsl,pcie-scfg = <&scfg 0>;
695 #address-cells = <3>;
699 bus-range = <0x0 0xff>;
700 ranges = <0x81000000 0x0 0x00000000 0x40 0x00010000 0x0 0x00010000 /* downstream I/O */
701 0x82000000 0x0 0x40000000 0x40 0x40000000 0x0 0x40000000>; /* non-prefetchable memory */
702 msi-parent = <&msi1>, <&msi2>;
703 #interrupt-cells = <1>;
704 interrupt-map-mask = <0 0 0 7>;
705 interrupt-map = <0000 0 0 1 &gic GIC_SPI 91 IRQ_TYPE_LEVEL_HIGH>,
706 <0000 0 0 2 &gic GIC_SPI 188 IRQ_TYPE_LEVEL_HIGH>,
707 <0000 0 0 3 &gic GIC_SPI 190 IRQ_TYPE_LEVEL_HIGH>,
708 <0000 0 0 4 &gic GIC_SPI 192 IRQ_TYPE_LEVEL_HIGH>;
712 compatible = "fsl,ls1021a-pcie", "snps,dw-pcie";
713 reg = <0x00 0x03500000 0x0 0x00010000 /* controller registers */
714 0x48 0x00000000 0x0 0x00002000>; /* configuration space */
715 reg-names = "regs", "config";
716 interrupts = <GIC_SPI 178 IRQ_TYPE_LEVEL_HIGH>;
717 fsl,pcie-scfg = <&scfg 1>;
718 #address-cells = <3>;
722 bus-range = <0x0 0xff>;
723 ranges = <0x81000000 0x0 0x00000000 0x48 0x00010000 0x0 0x00010000 /* downstream I/O */
724 0x82000000 0x0 0x40000000 0x48 0x40000000 0x0 0x40000000>; /* non-prefetchable memory */
725 msi-parent = <&msi1>, <&msi2>;
726 #interrupt-cells = <1>;
727 interrupt-map-mask = <0 0 0 7>;
728 interrupt-map = <0000 0 0 1 &gic GIC_SPI 92 IRQ_TYPE_LEVEL_HIGH>,
729 <0000 0 0 2 &gic GIC_SPI 189 IRQ_TYPE_LEVEL_HIGH>,
730 <0000 0 0 3 &gic GIC_SPI 191 IRQ_TYPE_LEVEL_HIGH>,
731 <0000 0 0 4 &gic GIC_SPI 193 IRQ_TYPE_LEVEL_HIGH>;