arch/arm/boot/dts/keystone-k2e.dtsi

   1 // SPDX-License-Identifier: GPL-2.0
   2 /*
   3  * Keystone 2 Edison soc device tree
   4  *
   5  * Copyright (C) 2013-2017 Texas Instruments Incorporated - http://www.ti.com/
   6  */
   7
   8 #include <dt-bindings/reset/ti-syscon.h>
   9
  10 / {
  11         compatible = "ti,k2e", "ti,keystone";
  12         model = "Texas Instruments Keystone 2 Edison SoC";
  13
  14         cpus {
  15                 #address-cells = <1>;
  16                 #size-cells = <0>;
  17
  18                 interrupt-parent = <&gic>;
  19
  20                 cpu@0 {
  21                         compatible = "arm,cortex-a15";
  22                         device_type = "cpu";
  23                         reg = <0>;
  24                 };
  25
  26                 cpu@1 {
  27                         compatible = "arm,cortex-a15";
  28                         device_type = "cpu";
  29                         reg = <1>;
  30                 };
  31
  32                 cpu@2 {
  33                         compatible = "arm,cortex-a15";
  34                         device_type = "cpu";
  35                         reg = <2>;
  36                 };
  37
  38                 cpu@3 {
  39                         compatible = "arm,cortex-a15";
  40                         device_type = "cpu";
  41                         reg = <3>;
  42                 };
  43         };
  44
  45         aliases {
  46                 rproc0 = &dsp0;
  47         };
  48
  49         soc {
  50                 /include/ "keystone-k2e-clocks.dtsi"
  51
  52                 usb: usb@2680000 {
  53                         interrupts = <GIC_SPI 152 IRQ_TYPE_EDGE_RISING>;
  54                         dwc3@2690000 {
  55                                 interrupts = <GIC_SPI 152 IRQ_TYPE_EDGE_RISING>;
  56                         };
  57                 };
  58
  59                 usb1_phy: usb_phy@2620750 {
  60                         compatible = "ti,keystone-usbphy";
  61                         #address-cells = <1>;
  62                         #size-cells = <1>;
  63                         reg = <0x2620750 24>;
  64                         status = "disabled";
  65                 };
  66
  67                 keystone_usb1: usb@25000000 {
  68                         compatible = "ti,keystone-dwc3";
  69                         #address-cells = <1>;
  70                         #size-cells = <1>;
  71                         reg = <0x25000000 0x10000>;
  72                         clocks = <&clkusb1>;
  73                         clock-names = "usb";
  74                         interrupts = <GIC_SPI 414 IRQ_TYPE_EDGE_RISING>;
  75                         ranges;
  76                         dma-coherent;
  77                         dma-ranges;
  78                         status = "disabled";
  79
  80                         usb1: dwc3@25010000 {
  81                                 compatible = "synopsys,dwc3";
  82                                 reg = <0x25010000 0x70000>;
  83                                 interrupts = <GIC_SPI 414 IRQ_TYPE_EDGE_RISING>;
  84                                 usb-phy = <&usb1_phy>, <&usb1_phy>;
  85                         };
  86                 };
  87
  88                 msm_ram: msmram@c000000 {
  89                         compatible = "mmio-sram";
  90                         reg = <0x0c000000 0x200000>;
  91                         ranges = <0x0 0x0c000000 0x200000>;
  92                         #address-cells = <1>;
  93                         #size-cells = <1>;
  94
  95                         sram-bm@1f0000 {
  96                                 reg = <0x001f0000 0x8000>;
  97                         };
  98                 };
  99
 100                 psc: power-sleep-controller@2350000 {
 101                         pscrst: reset-controller {
 102                                 compatible = "ti,k2e-pscrst", "ti,syscon-reset";
 103                                 #reset-cells = <1>;
 104
 105                                 ti,reset-bits = <
 106                                         0xa3c 8 0xa3c 8 0x83c 8 (ASSERT_CLEAR | DEASSERT_SET | STATUS_CLEAR) /* 0: dsp0 */
 107                                 >;
 108                         };
 109                 };
 110
 111                 dspgpio0: keystone_dsp_gpio@2620240 {
 112                         compatible = "ti,keystone-dsp-gpio";
 113                         gpio-controller;
 114                         #gpio-cells = <2>;
 115                         gpio,syscon-dev = <&devctrl 0x240>;
 116                 };
 117
 118                 dsp0: dsp@10800000 {
 119                         compatible = "ti,k2e-dsp";
 120                         reg = <0x10800000 0x00080000>,
 121                               <0x10e00000 0x00008000>,
 122                               <0x10f00000 0x00008000>;
 123                         reg-names = "l2sram", "l1pram", "l1dram";
 124                         clocks = <&clkgem0>;
 125                         ti,syscon-dev = <&devctrl 0x844>;
 126                         resets = <&pscrst 0>;
 127                         interrupt-parent = <&kirq0>;
 128                         interrupts = <0 8>;
 129                         interrupt-names = "vring", "exception";
 130                         kick-gpios = <&dspgpio0 27 0>;
 131                         status = "disabled";
 132                 };
 133
 134                 pcie1: pcie@21020000 {
 135                         compatible = "ti,keystone-pcie","snps,dw-pcie";
 136                         clocks = <&clkpcie1>;
 137                         clock-names = "pcie";
 138                         #address-cells = <3>;
 139                         #size-cells = <2>;
 140                         reg =  <0x21021000 0x2000>, <0x21020000 0x1000>, <0x02620128 4>;
 141                         ranges = <0x82000000 0 0x60000000 0x60000000
 142                                   0 0x10000000>;
 143
 144                         status = "disabled";
 145                         device_type = "pci";
 146                         num-lanes = <2>;
 147                         bus-range = <0x00 0xff>;
 148
 149                         /* error interrupt */
 150                         interrupts = <GIC_SPI 385 IRQ_TYPE_EDGE_RISING>;
 151                         #interrupt-cells = <1>;
 152                         interrupt-map-mask = <0 0 0 7>;
 153                         interrupt-map = <0 0 0 1 &pcie_intc1 0>, /* INT A */
 154                                         <0 0 0 2 &pcie_intc1 1>, /* INT B */
 155                                         <0 0 0 3 &pcie_intc1 2>, /* INT C */
 156                                         <0 0 0 4 &pcie_intc1 3>; /* INT D */
 157
 158                         pcie_msi_intc1: msi-interrupt-controller {
 159                                 interrupt-controller;
 160                                 #interrupt-cells = <1>;
 161                                 interrupt-parent = <&gic>;
 162                                 interrupts = <GIC_SPI 377 IRQ_TYPE_EDGE_RISING>,
 163                                         <GIC_SPI 378 IRQ_TYPE_EDGE_RISING>,
 164                                         <GIC_SPI 379 IRQ_TYPE_EDGE_RISING>,
 165                                         <GIC_SPI 380 IRQ_TYPE_EDGE_RISING>,
 166                                         <GIC_SPI 381 IRQ_TYPE_EDGE_RISING>,
 167                                         <GIC_SPI 382 IRQ_TYPE_EDGE_RISING>,
 168                                         <GIC_SPI 383 IRQ_TYPE_EDGE_RISING>,
 169                                         <GIC_SPI 384 IRQ_TYPE_EDGE_RISING>;
 170                         };
 171
 172                         pcie_intc1: legacy-interrupt-controller {
 173                                 interrupt-controller;
 174                                 #interrupt-cells = <1>;
 175                                 interrupt-parent = <&gic>;
 176                                 interrupts = <GIC_SPI 373 IRQ_TYPE_EDGE_RISING>,
 177                                         <GIC_SPI 374 IRQ_TYPE_EDGE_RISING>,
 178                                         <GIC_SPI 375 IRQ_TYPE_EDGE_RISING>,
 179                                         <GIC_SPI 376 IRQ_TYPE_EDGE_RISING>;
 180                         };
 181                 };
 182
 183                 mdio: mdio@24200f00 {
 184                         compatible      = "ti,keystone_mdio", "ti,davinci_mdio";
 185                         #address-cells = <1>;
 186                         #size-cells = <0>;
 187                         reg = <0x24200f00 0x100>;
 188                         status = "disabled";
 189                         clocks = <&clkcpgmac>;
 190                         clock-names = "fck";
 191                         bus_freq        = <2500000>;
 192                 };
 193                 /include/ "keystone-k2e-netcp.dtsi"
 194         };
 195 };