2 * Copyright 2015 Freescale Semiconductor, Inc.
3 * Copyright 2016 Toradex AG
5 * This file is dual-licensed: you can use it either under the terms
6 * of the GPL or the X11 license, at your option. Note that this dual
7 * licensing only applies to this file, and not this project as a
10 * a) This file is free software; you can redistribute it and/or
11 * modify it under the terms of the GNU General Public License as
12 * published by the Free Software Foundation; either version 2 of the
13 * License, or (at your option) any later version.
15 * This file is distributed in the hope that it will be useful,
16 * but WITHOUT ANY WARRANTY; without even the implied warranty of
17 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
18 * GNU General Public License for more details.
22 * b) Permission is hereby granted, free of charge, to any person
23 * obtaining a copy of this software and associated documentation
24 * files (the "Software"), to deal in the Software without
25 * restriction, including without limitation the rights to use,
26 * copy, modify, merge, publish, distribute, sublicense, and/or
27 * sell copies of the Software, and to permit persons to whom the
28 * Software is furnished to do so, subject to the following
31 * The above copyright notice and this permission notice shall be
32 * included in all copies or substantial portions of the Software.
34 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
35 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
36 * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
37 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
38 * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
39 * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
40 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
41 * OTHER DEALINGS IN THE SOFTWARE.
44 #include <dt-bindings/clock/imx7d-clock.h>
45 #include <dt-bindings/power/imx7-power.h>
46 #include <dt-bindings/gpio/gpio.h>
47 #include <dt-bindings/input/input.h>
48 #include <dt-bindings/interrupt-controller/arm-gic.h>
49 #include "imx7d-pinfunc.h"
55 * The decompressor and also some bootloaders rely on a
56 * pre-existing /chosen node to be available to insert the
57 * command line and merge other ATAGS info.
58 * Also for U-Boot there must be a pre-existing /memory node.
61 memory { device_type = "memory"; };
96 compatible = "arm,cortex-a7";
99 clock-frequency = <792000000>;
100 clock-latency = <61036>; /* two CLK32 periods */
101 clocks = <&clks IMX7D_CLK_ARM>;
106 compatible = "fixed-clock";
108 clock-frequency = <32768>;
109 clock-output-names = "ckil";
113 compatible = "fixed-clock";
115 clock-frequency = <24000000>;
116 clock-output-names = "osc";
119 usbphynop1: usbphynop1 {
120 compatible = "usb-nop-xceiv";
121 clocks = <&clks IMX7D_USB_PHY1_CLK>;
122 clock-names = "main_clk";
126 usbphynop3: usbphynop3 {
127 compatible = "usb-nop-xceiv";
128 clocks = <&clks IMX7D_USB_HSIC_ROOT_CLK>;
129 clock-names = "main_clk";
134 compatible = "arm,cortex-a7-pmu";
135 interrupt-parent = <&gpc>;
136 interrupts = <GIC_SPI 92 IRQ_TYPE_LEVEL_HIGH>;
137 interrupt-affinity = <&cpu0>;
142 * non-configurable replicators don't show up on the
143 * AMBA bus. As such no need to add "arm,primecell"
145 compatible = "arm,coresight-replicator";
148 #address-cells = <1>;
150 /* replicator output ports */
153 replicator_out_port0: endpoint {
154 remote-endpoint = <&tpiu_in_port>;
160 replicator_out_port1: endpoint {
161 remote-endpoint = <&etr_in_port>;
165 /* replicator input port */
168 replicator_in_port0: endpoint {
170 remote-endpoint = <&etf_out_port>;
177 compatible = "fsl,imx7d-tempmon";
178 interrupt-parent = <&gpc>;
179 interrupts = <GIC_SPI 49 IRQ_TYPE_LEVEL_HIGH>;
180 fsl,tempmon =<&anatop>;
181 nvmem-cells = <&tempmon_calib>,
182 <&tempmon_temp_grade>;
183 nvmem-cell-names = "calib", "temp_grade";
184 clocks = <&clks IMX7D_PLL_SYS_MAIN_CLK>;
188 compatible = "arm,armv7-timer";
189 interrupt-parent = <&intc>;
190 interrupts = <GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>,
191 <GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>,
192 <GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>,
193 <GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>;
197 #address-cells = <1>;
199 compatible = "simple-bus";
200 interrupt-parent = <&gpc>;
204 compatible = "arm,coresight-funnel", "arm,primecell";
205 reg = <0x30041000 0x1000>;
206 clocks = <&clks IMX7D_MAIN_AXI_ROOT_CLK>;
207 clock-names = "apb_pclk";
209 ca_funnel_ports: ports {
210 #address-cells = <1>;
213 /* funnel input ports */
216 ca_funnel_in_port0: endpoint {
218 remote-endpoint = <&etm0_out_port>;
222 /* funnel output port */
225 ca_funnel_out_port0: endpoint {
226 remote-endpoint = <&hugo_funnel_in_port0>;
230 /* the other input ports are not connect to anything */
235 compatible = "arm,coresight-etm3x", "arm,primecell";
236 reg = <0x3007c000 0x1000>;
238 clocks = <&clks IMX7D_MAIN_AXI_ROOT_CLK>;
239 clock-names = "apb_pclk";
242 etm0_out_port: endpoint {
243 remote-endpoint = <&ca_funnel_in_port0>;
249 compatible = "arm,coresight-funnel", "arm,primecell";
250 reg = <0x30083000 0x1000>;
251 clocks = <&clks IMX7D_MAIN_AXI_ROOT_CLK>;
252 clock-names = "apb_pclk";
255 #address-cells = <1>;
258 /* funnel input ports */
261 hugo_funnel_in_port0: endpoint {
263 remote-endpoint = <&ca_funnel_out_port0>;
269 hugo_funnel_in_port1: endpoint {
270 slave-mode; /* M4 input */
276 hugo_funnel_out_port0: endpoint {
277 remote-endpoint = <&etf_in_port>;
281 /* the other input ports are not connect to anything */
286 compatible = "arm,coresight-tmc", "arm,primecell";
287 reg = <0x30084000 0x1000>;
288 clocks = <&clks IMX7D_MAIN_AXI_ROOT_CLK>;
289 clock-names = "apb_pclk";
292 #address-cells = <1>;
297 etf_in_port: endpoint {
299 remote-endpoint = <&hugo_funnel_out_port0>;
305 etf_out_port: endpoint {
306 remote-endpoint = <&replicator_in_port0>;
313 compatible = "arm,coresight-tmc", "arm,primecell";
314 reg = <0x30086000 0x1000>;
315 clocks = <&clks IMX7D_MAIN_AXI_ROOT_CLK>;
316 clock-names = "apb_pclk";
319 etr_in_port: endpoint {
321 remote-endpoint = <&replicator_out_port1>;
327 compatible = "arm,coresight-tpiu", "arm,primecell";
328 reg = <0x30087000 0x1000>;
329 clocks = <&clks IMX7D_MAIN_AXI_ROOT_CLK>;
330 clock-names = "apb_pclk";
333 tpiu_in_port: endpoint {
335 remote-endpoint = <&replicator_out_port1>;
340 intc: interrupt-controller@31001000 {
341 compatible = "arm,cortex-a7-gic";
342 interrupts = <GIC_PPI 9 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_HIGH)>;
343 #interrupt-cells = <3>;
344 interrupt-controller;
345 interrupt-parent = <&intc>;
346 reg = <0x31001000 0x1000>,
352 aips1: aips-bus@30000000 {
353 compatible = "fsl,aips-bus", "simple-bus";
354 #address-cells = <1>;
356 reg = <0x30000000 0x400000>;
359 gpio1: gpio@30200000 {
360 compatible = "fsl,imx7d-gpio", "fsl,imx35-gpio";
361 reg = <0x30200000 0x10000>;
362 interrupts = <GIC_SPI 64 IRQ_TYPE_LEVEL_HIGH>, /* GPIO1_INT15_0 */
363 <GIC_SPI 65 IRQ_TYPE_LEVEL_HIGH>; /* GPIO1_INT31_16 */
366 interrupt-controller;
367 #interrupt-cells = <2>;
368 gpio-ranges = <&iomuxc_lpsr 0 0 8>, <&iomuxc 8 5 8>;
371 gpio2: gpio@30210000 {
372 compatible = "fsl,imx7d-gpio", "fsl,imx35-gpio";
373 reg = <0x30210000 0x10000>;
374 interrupts = <GIC_SPI 66 IRQ_TYPE_LEVEL_HIGH>,
375 <GIC_SPI 67 IRQ_TYPE_LEVEL_HIGH>;
378 interrupt-controller;
379 #interrupt-cells = <2>;
380 gpio-ranges = <&iomuxc 0 13 32>;
383 gpio3: gpio@30220000 {
384 compatible = "fsl,imx7d-gpio", "fsl,imx35-gpio";
385 reg = <0x30220000 0x10000>;
386 interrupts = <GIC_SPI 68 IRQ_TYPE_LEVEL_HIGH>,
387 <GIC_SPI 69 IRQ_TYPE_LEVEL_HIGH>;
390 interrupt-controller;
391 #interrupt-cells = <2>;
392 gpio-ranges = <&iomuxc 0 45 29>;
395 gpio4: gpio@30230000 {
396 compatible = "fsl,imx7d-gpio", "fsl,imx35-gpio";
397 reg = <0x30230000 0x10000>;
398 interrupts = <GIC_SPI 70 IRQ_TYPE_LEVEL_HIGH>,
399 <GIC_SPI 71 IRQ_TYPE_LEVEL_HIGH>;
402 interrupt-controller;
403 #interrupt-cells = <2>;
404 gpio-ranges = <&iomuxc 0 74 24>;
407 gpio5: gpio@30240000 {
408 compatible = "fsl,imx7d-gpio", "fsl,imx35-gpio";
409 reg = <0x30240000 0x10000>;
410 interrupts = <GIC_SPI 72 IRQ_TYPE_LEVEL_HIGH>,
411 <GIC_SPI 73 IRQ_TYPE_LEVEL_HIGH>;
414 interrupt-controller;
415 #interrupt-cells = <2>;
416 gpio-ranges = <&iomuxc 0 98 18>;
419 gpio6: gpio@30250000 {
420 compatible = "fsl,imx7d-gpio", "fsl,imx35-gpio";
421 reg = <0x30250000 0x10000>;
422 interrupts = <GIC_SPI 74 IRQ_TYPE_LEVEL_HIGH>,
423 <GIC_SPI 75 IRQ_TYPE_LEVEL_HIGH>;
426 interrupt-controller;
427 #interrupt-cells = <2>;
428 gpio-ranges = <&iomuxc 0 116 23>;
431 gpio7: gpio@30260000 {
432 compatible = "fsl,imx7d-gpio", "fsl,imx35-gpio";
433 reg = <0x30260000 0x10000>;
434 interrupts = <GIC_SPI 76 IRQ_TYPE_LEVEL_HIGH>,
435 <GIC_SPI 77 IRQ_TYPE_LEVEL_HIGH>;
438 interrupt-controller;
439 #interrupt-cells = <2>;
440 gpio-ranges = <&iomuxc 0 139 16>;
443 wdog1: wdog@30280000 {
444 compatible = "fsl,imx7d-wdt", "fsl,imx21-wdt";
445 reg = <0x30280000 0x10000>;
446 interrupts = <GIC_SPI 78 IRQ_TYPE_LEVEL_HIGH>;
447 clocks = <&clks IMX7D_WDOG1_ROOT_CLK>;
450 wdog2: wdog@30290000 {
451 compatible = "fsl,imx7d-wdt", "fsl,imx21-wdt";
452 reg = <0x30290000 0x10000>;
453 interrupts = <GIC_SPI 79 IRQ_TYPE_LEVEL_HIGH>;
454 clocks = <&clks IMX7D_WDOG2_ROOT_CLK>;
458 wdog3: wdog@302a0000 {
459 compatible = "fsl,imx7d-wdt", "fsl,imx21-wdt";
460 reg = <0x302a0000 0x10000>;
461 interrupts = <GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH>;
462 clocks = <&clks IMX7D_WDOG3_ROOT_CLK>;
466 wdog4: wdog@302b0000 {
467 compatible = "fsl,imx7d-wdt", "fsl,imx21-wdt";
468 reg = <0x302b0000 0x10000>;
469 interrupts = <GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH>;
470 clocks = <&clks IMX7D_WDOG4_ROOT_CLK>;
474 iomuxc_lpsr: iomuxc-lpsr@302c0000 {
475 compatible = "fsl,imx7d-iomuxc-lpsr";
476 reg = <0x302c0000 0x10000>;
477 fsl,input-sel = <&iomuxc>;
481 compatible = "fsl,imx7d-gpt", "fsl,imx6sx-gpt";
482 reg = <0x302d0000 0x10000>;
483 interrupts = <GIC_SPI 55 IRQ_TYPE_LEVEL_HIGH>;
484 clocks = <&clks IMX7D_CLK_DUMMY>,
485 <&clks IMX7D_GPT1_ROOT_CLK>;
486 clock-names = "ipg", "per";
490 compatible = "fsl,imx7d-gpt", "fsl,imx6sx-gpt";
491 reg = <0x302e0000 0x10000>;
492 interrupts = <GIC_SPI 54 IRQ_TYPE_LEVEL_HIGH>;
493 clocks = <&clks IMX7D_CLK_DUMMY>,
494 <&clks IMX7D_GPT2_ROOT_CLK>;
495 clock-names = "ipg", "per";
500 compatible = "fsl,imx7d-gpt", "fsl,imx6sx-gpt";
501 reg = <0x302f0000 0x10000>;
502 interrupts = <GIC_SPI 53 IRQ_TYPE_LEVEL_HIGH>;
503 clocks = <&clks IMX7D_CLK_DUMMY>,
504 <&clks IMX7D_GPT3_ROOT_CLK>;
505 clock-names = "ipg", "per";
510 compatible = "fsl,imx7d-gpt", "fsl,imx6sx-gpt";
511 reg = <0x30300000 0x10000>;
512 interrupts = <GIC_SPI 52 IRQ_TYPE_LEVEL_HIGH>;
513 clocks = <&clks IMX7D_CLK_DUMMY>,
514 <&clks IMX7D_GPT4_ROOT_CLK>;
515 clock-names = "ipg", "per";
520 compatible = "fsl,imx7d-kpp", "fsl,imx21-kpp";
521 reg = <0x30320000 0x10000>;
522 interrupts = <GIC_SPI 80 IRQ_TYPE_LEVEL_HIGH>;
523 clocks = <&clks IMX7D_KPP_ROOT_CLK>;
527 iomuxc: iomuxc@30330000 {
528 compatible = "fsl,imx7d-iomuxc";
529 reg = <0x30330000 0x10000>;
532 gpr: iomuxc-gpr@30340000 {
533 compatible = "fsl,imx7d-iomuxc-gpr",
534 "fsl,imx6q-iomuxc-gpr", "syscon";
535 reg = <0x30340000 0x10000>;
538 ocotp: ocotp-ctrl@30350000 {
539 #address-cells = <1>;
541 compatible = "fsl,imx7d-ocotp", "syscon";
542 reg = <0x30350000 0x10000>;
543 clocks = <&clks IMX7D_OCOTP_CLK>;
545 tempmon_calib: calib@3c {
549 tempmon_temp_grade: temp-grade@10 {
554 anatop: anatop@30360000 {
555 compatible = "fsl,imx7d-anatop", "fsl,imx6q-anatop",
556 "syscon", "simple-bus";
557 reg = <0x30360000 0x10000>;
558 interrupts = <GIC_SPI 49 IRQ_TYPE_LEVEL_HIGH>,
559 <GIC_SPI 51 IRQ_TYPE_LEVEL_HIGH>;
560 #address-cells = <1>;
563 reg_1p0d: regulator-vdd1p0d@30360210 {
565 compatible = "fsl,anatop-regulator";
566 regulator-name = "vdd1p0d";
567 regulator-min-microvolt = <800000>;
568 regulator-max-microvolt = <1200000>;
569 anatop-reg-offset = <0x210>;
570 anatop-vol-bit-shift = <8>;
571 anatop-vol-bit-width = <5>;
572 anatop-min-bit-val = <8>;
573 anatop-min-voltage = <800000>;
574 anatop-max-voltage = <1200000>;
575 anatop-enable-bit = <0>;
579 snvs: snvs@30370000 {
580 compatible = "fsl,sec-v4.0-mon", "syscon", "simple-mfd";
581 reg = <0x30370000 0x10000>;
583 snvs_rtc: snvs-rtc-lp {
584 compatible = "fsl,sec-v4.0-mon-rtc-lp";
587 interrupts = <GIC_SPI 19 IRQ_TYPE_LEVEL_HIGH>,
588 <GIC_SPI 20 IRQ_TYPE_LEVEL_HIGH>;
589 clocks = <&clks IMX7D_SNVS_CLK>;
590 clock-names = "snvs-rtc";
593 snvs_poweroff: snvs-poweroff {
594 compatible = "syscon-poweroff";
601 snvs_pwrkey: snvs-powerkey {
602 compatible = "fsl,sec-v4.0-pwrkey";
604 interrupts = <GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH>;
605 linux,keycode = <KEY_POWER>;
611 compatible = "fsl,imx7d-ccm";
612 reg = <0x30380000 0x10000>;
613 interrupts = <GIC_SPI 85 IRQ_TYPE_LEVEL_HIGH>,
614 <GIC_SPI 86 IRQ_TYPE_LEVEL_HIGH>;
616 clocks = <&ckil>, <&osc>;
617 clock-names = "ckil", "osc";
621 compatible = "fsl,imx7d-src", "syscon";
622 reg = <0x30390000 0x10000>;
623 interrupts = <GIC_SPI 89 IRQ_TYPE_LEVEL_HIGH>;
628 compatible = "fsl,imx7d-gpc";
629 reg = <0x303a0000 0x10000>;
630 interrupt-controller;
631 interrupts = <GIC_SPI 87 IRQ_TYPE_LEVEL_HIGH>;
632 #interrupt-cells = <3>;
633 interrupt-parent = <&intc>;
634 #power-domain-cells = <1>;
637 #address-cells = <1>;
640 pgc_pcie_phy: pgc-power-domain@1 {
641 #power-domain-cells = <0>;
643 power-supply = <®_1p0d>;
649 aips2: aips-bus@30400000 {
650 compatible = "fsl,aips-bus", "simple-bus";
651 #address-cells = <1>;
653 reg = <0x30400000 0x400000>;
657 compatible = "fsl,imx7d-adc";
658 reg = <0x30610000 0x10000>;
659 interrupts = <GIC_SPI 98 IRQ_TYPE_LEVEL_HIGH>;
660 clocks = <&clks IMX7D_ADC_ROOT_CLK>;
666 compatible = "fsl,imx7d-adc";
667 reg = <0x30620000 0x10000>;
668 interrupts = <GIC_SPI 99 IRQ_TYPE_LEVEL_HIGH>;
669 clocks = <&clks IMX7D_ADC_ROOT_CLK>;
674 ecspi4: ecspi@30630000 {
675 #address-cells = <1>;
677 compatible = "fsl,imx7d-ecspi", "fsl,imx51-ecspi";
678 reg = <0x30630000 0x10000>;
679 interrupts = <GIC_SPI 34 IRQ_TYPE_LEVEL_HIGH>;
680 clocks = <&clks IMX7D_ECSPI4_ROOT_CLK>,
681 <&clks IMX7D_ECSPI4_ROOT_CLK>;
682 clock-names = "ipg", "per";
687 compatible = "fsl,imx7d-pwm", "fsl,imx27-pwm";
688 reg = <0x30660000 0x10000>;
689 interrupts = <GIC_SPI 81 IRQ_TYPE_LEVEL_HIGH>;
690 clocks = <&clks IMX7D_PWM1_ROOT_CLK>,
691 <&clks IMX7D_PWM1_ROOT_CLK>;
692 clock-names = "ipg", "per";
698 compatible = "fsl,imx7d-pwm", "fsl,imx27-pwm";
699 reg = <0x30670000 0x10000>;
700 interrupts = <GIC_SPI 82 IRQ_TYPE_LEVEL_HIGH>;
701 clocks = <&clks IMX7D_PWM2_ROOT_CLK>,
702 <&clks IMX7D_PWM2_ROOT_CLK>;
703 clock-names = "ipg", "per";
709 compatible = "fsl,imx7d-pwm", "fsl,imx27-pwm";
710 reg = <0x30680000 0x10000>;
711 interrupts = <GIC_SPI 83 IRQ_TYPE_LEVEL_HIGH>;
712 clocks = <&clks IMX7D_PWM3_ROOT_CLK>,
713 <&clks IMX7D_PWM3_ROOT_CLK>;
714 clock-names = "ipg", "per";
720 compatible = "fsl,imx7d-pwm", "fsl,imx27-pwm";
721 reg = <0x30690000 0x10000>;
722 interrupts = <GIC_SPI 84 IRQ_TYPE_LEVEL_HIGH>;
723 clocks = <&clks IMX7D_PWM4_ROOT_CLK>,
724 <&clks IMX7D_PWM4_ROOT_CLK>;
725 clock-names = "ipg", "per";
730 lcdif: lcdif@30730000 {
731 compatible = "fsl,imx7d-lcdif", "fsl,imx28-lcdif";
732 reg = <0x30730000 0x10000>;
733 interrupts = <GIC_SPI 5 IRQ_TYPE_LEVEL_HIGH>;
734 clocks = <&clks IMX7D_LCDIF_PIXEL_ROOT_CLK>,
735 <&clks IMX7D_LCDIF_PIXEL_ROOT_CLK>;
736 clock-names = "pix", "axi";
741 aips3: aips-bus@30800000 {
742 compatible = "fsl,aips-bus", "simple-bus";
743 #address-cells = <1>;
745 reg = <0x30800000 0x400000>;
749 compatible = "fsl,spba-bus", "simple-bus";
750 #address-cells = <1>;
752 reg = <0x30800000 0x100000>;
755 ecspi1: ecspi@30820000 {
756 #address-cells = <1>;
758 compatible = "fsl,imx7d-ecspi", "fsl,imx51-ecspi";
759 reg = <0x30820000 0x10000>;
760 interrupts = <GIC_SPI 31 IRQ_TYPE_LEVEL_HIGH>;
761 clocks = <&clks IMX7D_ECSPI1_ROOT_CLK>,
762 <&clks IMX7D_ECSPI1_ROOT_CLK>;
763 clock-names = "ipg", "per";
767 ecspi2: ecspi@30830000 {
768 #address-cells = <1>;
770 compatible = "fsl,imx7d-ecspi", "fsl,imx51-ecspi";
771 reg = <0x30830000 0x10000>;
772 interrupts = <GIC_SPI 32 IRQ_TYPE_LEVEL_HIGH>;
773 clocks = <&clks IMX7D_ECSPI2_ROOT_CLK>,
774 <&clks IMX7D_ECSPI2_ROOT_CLK>;
775 clock-names = "ipg", "per";
779 ecspi3: ecspi@30840000 {
780 #address-cells = <1>;
782 compatible = "fsl,imx7d-ecspi", "fsl,imx51-ecspi";
783 reg = <0x30840000 0x10000>;
784 interrupts = <GIC_SPI 33 IRQ_TYPE_LEVEL_HIGH>;
785 clocks = <&clks IMX7D_ECSPI3_ROOT_CLK>,
786 <&clks IMX7D_ECSPI3_ROOT_CLK>;
787 clock-names = "ipg", "per";
791 uart1: serial@30860000 {
792 compatible = "fsl,imx7d-uart",
794 reg = <0x30860000 0x10000>;
795 interrupts = <GIC_SPI 26 IRQ_TYPE_LEVEL_HIGH>;
796 clocks = <&clks IMX7D_UART1_ROOT_CLK>,
797 <&clks IMX7D_UART1_ROOT_CLK>;
798 clock-names = "ipg", "per";
802 uart2: serial@30890000 {
803 compatible = "fsl,imx7d-uart",
805 reg = <0x30890000 0x10000>;
806 interrupts = <GIC_SPI 27 IRQ_TYPE_LEVEL_HIGH>;
807 clocks = <&clks IMX7D_UART2_ROOT_CLK>,
808 <&clks IMX7D_UART2_ROOT_CLK>;
809 clock-names = "ipg", "per";
813 uart3: serial@30880000 {
814 compatible = "fsl,imx7d-uart",
816 reg = <0x30880000 0x10000>;
817 interrupts = <GIC_SPI 28 IRQ_TYPE_LEVEL_HIGH>;
818 clocks = <&clks IMX7D_UART3_ROOT_CLK>,
819 <&clks IMX7D_UART3_ROOT_CLK>;
820 clock-names = "ipg", "per";
825 #sound-dai-cells = <0>;
826 compatible = "fsl,imx7d-sai", "fsl,imx6sx-sai";
827 reg = <0x308a0000 0x10000>;
828 interrupts = <GIC_SPI 95 IRQ_TYPE_LEVEL_HIGH>;
829 clocks = <&clks IMX7D_SAI1_IPG_CLK>,
830 <&clks IMX7D_SAI1_ROOT_CLK>,
831 <&clks IMX7D_CLK_DUMMY>,
832 <&clks IMX7D_CLK_DUMMY>;
833 clock-names = "bus", "mclk1", "mclk2", "mclk3";
834 dma-names = "rx", "tx";
835 dmas = <&sdma 8 24 0>, <&sdma 9 24 0>;
840 #sound-dai-cells = <0>;
841 compatible = "fsl,imx7d-sai", "fsl,imx6sx-sai";
842 reg = <0x308b0000 0x10000>;
843 interrupts = <GIC_SPI 96 IRQ_TYPE_LEVEL_HIGH>;
844 clocks = <&clks IMX7D_SAI2_IPG_CLK>,
845 <&clks IMX7D_SAI2_ROOT_CLK>,
846 <&clks IMX7D_CLK_DUMMY>,
847 <&clks IMX7D_CLK_DUMMY>;
848 clock-names = "bus", "mclk1", "mclk2", "mclk3";
849 dma-names = "rx", "tx";
850 dmas = <&sdma 10 24 0>, <&sdma 11 24 0>;
855 #sound-dai-cells = <0>;
856 compatible = "fsl,imx7d-sai", "fsl,imx6sx-sai";
857 reg = <0x308c0000 0x10000>;
858 interrupts = <GIC_SPI 50 IRQ_TYPE_LEVEL_HIGH>;
859 clocks = <&clks IMX7D_SAI3_IPG_CLK>,
860 <&clks IMX7D_SAI3_ROOT_CLK>,
861 <&clks IMX7D_CLK_DUMMY>,
862 <&clks IMX7D_CLK_DUMMY>;
863 clock-names = "bus", "mclk1", "mclk2", "mclk3";
864 dma-names = "rx", "tx";
865 dmas = <&sdma 12 24 0>, <&sdma 13 24 0>;
870 crypto: caam@30900000 {
871 compatible = "fsl,sec-v4.0";
872 #address-cells = <1>;
874 reg = <0x30900000 0x40000>;
875 ranges = <0 0x30900000 0x40000>;
876 interrupts = <GIC_SPI 91 IRQ_TYPE_LEVEL_HIGH>;
877 clocks = <&clks IMX7D_CAAM_CLK>,
878 <&clks IMX7D_AHB_CHANNEL_ROOT_CLK>;
879 clock-names = "ipg", "aclk";
882 compatible = "fsl,sec-v4.0-job-ring";
883 reg = <0x1000 0x1000>;
884 interrupts = <GIC_SPI 105 IRQ_TYPE_LEVEL_HIGH>;
888 compatible = "fsl,sec-v4.0-job-ring";
889 reg = <0x2000 0x1000>;
890 interrupts = <GIC_SPI 106 IRQ_TYPE_LEVEL_HIGH>;
894 compatible = "fsl,sec-v4.0-job-ring";
895 reg = <0x3000 0x1000>;
896 interrupts = <GIC_SPI 114 IRQ_TYPE_LEVEL_HIGH>;
900 flexcan1: can@30a00000 {
901 compatible = "fsl,imx7d-flexcan", "fsl,imx6q-flexcan";
902 reg = <0x30a00000 0x10000>;
903 interrupts = <GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH>;
904 clocks = <&clks IMX7D_CLK_DUMMY>,
905 <&clks IMX7D_CAN1_ROOT_CLK>;
906 clock-names = "ipg", "per";
910 flexcan2: can@30a10000 {
911 compatible = "fsl,imx7d-flexcan", "fsl,imx6q-flexcan";
912 reg = <0x30a10000 0x10000>;
913 interrupts = <GIC_SPI 111 IRQ_TYPE_LEVEL_HIGH>;
914 clocks = <&clks IMX7D_CLK_DUMMY>,
915 <&clks IMX7D_CAN2_ROOT_CLK>;
916 clock-names = "ipg", "per";
921 #address-cells = <1>;
923 compatible = "fsl,imx7d-i2c", "fsl,imx21-i2c";
924 reg = <0x30a20000 0x10000>;
925 interrupts = <GIC_SPI 35 IRQ_TYPE_LEVEL_HIGH>;
926 clocks = <&clks IMX7D_I2C1_ROOT_CLK>;
931 #address-cells = <1>;
933 compatible = "fsl,imx7d-i2c", "fsl,imx21-i2c";
934 reg = <0x30a30000 0x10000>;
935 interrupts = <GIC_SPI 36 IRQ_TYPE_LEVEL_HIGH>;
936 clocks = <&clks IMX7D_I2C2_ROOT_CLK>;
941 #address-cells = <1>;
943 compatible = "fsl,imx7d-i2c", "fsl,imx21-i2c";
944 reg = <0x30a40000 0x10000>;
945 interrupts = <GIC_SPI 37 IRQ_TYPE_LEVEL_HIGH>;
946 clocks = <&clks IMX7D_I2C3_ROOT_CLK>;
951 #address-cells = <1>;
953 compatible = "fsl,imx7d-i2c", "fsl,imx21-i2c";
954 reg = <0x30a50000 0x10000>;
955 interrupts = <GIC_SPI 38 IRQ_TYPE_LEVEL_HIGH>;
956 clocks = <&clks IMX7D_I2C4_ROOT_CLK>;
960 uart4: serial@30a60000 {
961 compatible = "fsl,imx7d-uart",
963 reg = <0x30a60000 0x10000>;
964 interrupts = <GIC_SPI 29 IRQ_TYPE_LEVEL_HIGH>;
965 clocks = <&clks IMX7D_UART4_ROOT_CLK>,
966 <&clks IMX7D_UART4_ROOT_CLK>;
967 clock-names = "ipg", "per";
971 uart5: serial@30a70000 {
972 compatible = "fsl,imx7d-uart",
974 reg = <0x30a70000 0x10000>;
975 interrupts = <GIC_SPI 30 IRQ_TYPE_LEVEL_HIGH>;
976 clocks = <&clks IMX7D_UART5_ROOT_CLK>,
977 <&clks IMX7D_UART5_ROOT_CLK>;
978 clock-names = "ipg", "per";
982 uart6: serial@30a80000 {
983 compatible = "fsl,imx7d-uart",
985 reg = <0x30a80000 0x10000>;
986 interrupts = <GIC_SPI 16 IRQ_TYPE_LEVEL_HIGH>;
987 clocks = <&clks IMX7D_UART6_ROOT_CLK>,
988 <&clks IMX7D_UART6_ROOT_CLK>;
989 clock-names = "ipg", "per";
993 uart7: serial@30a90000 {
994 compatible = "fsl,imx7d-uart",
996 reg = <0x30a90000 0x10000>;
997 interrupts = <GIC_SPI 126 IRQ_TYPE_LEVEL_HIGH>;
998 clocks = <&clks IMX7D_UART7_ROOT_CLK>,
999 <&clks IMX7D_UART7_ROOT_CLK>;
1000 clock-names = "ipg", "per";
1001 status = "disabled";
1004 usbotg1: usb@30b10000 {
1005 compatible = "fsl,imx7d-usb", "fsl,imx27-usb";
1006 reg = <0x30b10000 0x200>;
1007 interrupts = <GIC_SPI 43 IRQ_TYPE_LEVEL_HIGH>;
1008 clocks = <&clks IMX7D_USB_CTRL_CLK>;
1009 fsl,usbphy = <&usbphynop1>;
1010 fsl,usbmisc = <&usbmisc1 0>;
1011 phy-clkgate-delay-us = <400>;
1012 status = "disabled";
1015 usbh: usb@30b30000 {
1016 compatible = "fsl,imx7d-usb", "fsl,imx27-usb";
1017 reg = <0x30b30000 0x200>;
1018 interrupts = <GIC_SPI 40 IRQ_TYPE_LEVEL_HIGH>;
1019 clocks = <&clks IMX7D_USB_CTRL_CLK>;
1020 fsl,usbphy = <&usbphynop3>;
1021 fsl,usbmisc = <&usbmisc3 0>;
1024 phy-clkgate-delay-us = <400>;
1025 status = "disabled";
1028 usbmisc1: usbmisc@30b10200 {
1030 compatible = "fsl,imx7d-usbmisc", "fsl,imx6q-usbmisc";
1031 reg = <0x30b10200 0x200>;
1034 usbmisc3: usbmisc@30b30200 {
1036 compatible = "fsl,imx7d-usbmisc", "fsl,imx6q-usbmisc";
1037 reg = <0x30b30200 0x200>;
1040 usdhc1: usdhc@30b40000 {
1041 compatible = "fsl,imx7d-usdhc", "fsl,imx6sl-usdhc";
1042 reg = <0x30b40000 0x10000>;
1043 interrupts = <GIC_SPI 22 IRQ_TYPE_LEVEL_HIGH>;
1044 clocks = <&clks IMX7D_IPG_ROOT_CLK>,
1045 <&clks IMX7D_NAND_USDHC_BUS_ROOT_CLK>,
1046 <&clks IMX7D_USDHC1_ROOT_CLK>;
1047 clock-names = "ipg", "ahb", "per";
1049 status = "disabled";
1052 usdhc2: usdhc@30b50000 {
1053 compatible = "fsl,imx7d-usdhc", "fsl,imx6sl-usdhc";
1054 reg = <0x30b50000 0x10000>;
1055 interrupts = <GIC_SPI 23 IRQ_TYPE_LEVEL_HIGH>;
1056 clocks = <&clks IMX7D_IPG_ROOT_CLK>,
1057 <&clks IMX7D_NAND_USDHC_BUS_ROOT_CLK>,
1058 <&clks IMX7D_USDHC2_ROOT_CLK>;
1059 clock-names = "ipg", "ahb", "per";
1061 status = "disabled";
1064 usdhc3: usdhc@30b60000 {
1065 compatible = "fsl,imx7d-usdhc", "fsl,imx6sl-usdhc";
1066 reg = <0x30b60000 0x10000>;
1067 interrupts = <GIC_SPI 24 IRQ_TYPE_LEVEL_HIGH>;
1068 clocks = <&clks IMX7D_IPG_ROOT_CLK>,
1069 <&clks IMX7D_NAND_USDHC_BUS_ROOT_CLK>,
1070 <&clks IMX7D_USDHC3_ROOT_CLK>;
1071 clock-names = "ipg", "ahb", "per";
1073 status = "disabled";
1076 sdma: sdma@30bd0000 {
1077 compatible = "fsl,imx7d-sdma", "fsl,imx35-sdma";
1078 reg = <0x30bd0000 0x10000>;
1079 interrupts = <GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH>;
1080 clocks = <&clks IMX7D_SDMA_CORE_CLK>,
1081 <&clks IMX7D_AHB_CHANNEL_ROOT_CLK>;
1082 clock-names = "ipg", "ahb";
1084 fsl,sdma-ram-script-name = "imx/sdma/sdma-imx7d.bin";
1087 fec1: ethernet@30be0000 {
1088 compatible = "fsl,imx7d-fec", "fsl,imx6sx-fec";
1089 reg = <0x30be0000 0x10000>;
1090 interrupt-names = "int0", "int1", "int2", "pps";
1091 interrupts = <GIC_SPI 120 IRQ_TYPE_LEVEL_HIGH>,
1092 <GIC_SPI 118 IRQ_TYPE_LEVEL_HIGH>,
1093 <GIC_SPI 119 IRQ_TYPE_LEVEL_HIGH>,
1094 <GIC_SPI 121 IRQ_TYPE_LEVEL_HIGH>;
1095 clocks = <&clks IMX7D_ENET_AXI_ROOT_CLK>,
1096 <&clks IMX7D_ENET_AXI_ROOT_CLK>,
1097 <&clks IMX7D_ENET1_TIME_ROOT_CLK>,
1098 <&clks IMX7D_PLL_ENET_MAIN_125M_CLK>,
1099 <&clks IMX7D_ENET_PHY_REF_ROOT_CLK>;
1100 clock-names = "ipg", "ahb", "ptp",
1101 "enet_clk_ref", "enet_out";
1102 fsl,num-tx-queues=<3>;
1103 fsl,num-rx-queues=<3>;
1104 status = "disabled";
1108 dma_apbh: dma-apbh@33000000 {
1109 compatible = "fsl,imx7d-dma-apbh", "fsl,imx28-dma-apbh";
1110 reg = <0x33000000 0x2000>;
1111 interrupts = <GIC_SPI 12 IRQ_TYPE_LEVEL_HIGH>,
1112 <GIC_SPI 12 IRQ_TYPE_LEVEL_HIGH>,
1113 <GIC_SPI 12 IRQ_TYPE_LEVEL_HIGH>,
1114 <GIC_SPI 12 IRQ_TYPE_LEVEL_HIGH>;
1115 interrupt-names = "gpmi0", "gpmi1", "gpmi2", "gpmi3";
1118 clocks = <&clks IMX7D_NAND_USDHC_BUS_RAWNAND_CLK>;
1121 gpmi: gpmi-nand@33002000{
1122 compatible = "fsl,imx7d-gpmi-nand";
1123 #address-cells = <1>;
1125 reg = <0x33002000 0x2000>, <0x33004000 0x4000>;
1126 reg-names = "gpmi-nand", "bch";
1127 interrupts = <GIC_SPI 14 IRQ_TYPE_LEVEL_HIGH>;
1128 interrupt-names = "bch";
1129 clocks = <&clks IMX7D_NAND_RAWNAND_CLK>,
1130 <&clks IMX7D_NAND_USDHC_BUS_RAWNAND_CLK>;
1131 clock-names = "gpmi_io", "gpmi_bch_apb";
1132 dmas = <&dma_apbh 0>;
1133 dma-names = "rx-tx";
1134 status = "disabled";
1135 assigned-clocks = <&clks IMX7D_NAND_ROOT_SRC>;
1136 assigned-clock-parents = <&clks IMX7D_PLL_ENET_MAIN_500M_CLK>;