2 * Copyright 2015 Freescale Semiconductor, Inc.
3 * Copyright 2016 Toradex AG
5 * This file is dual-licensed: you can use it either under the terms
6 * of the GPL or the X11 license, at your option. Note that this dual
7 * licensing only applies to this file, and not this project as a
10 * a) This file is free software; you can redistribute it and/or
11 * modify it under the terms of the GNU General Public License as
12 * published by the Free Software Foundation; either version 2 of the
13 * License, or (at your option) any later version.
15 * This file is distributed in the hope that it will be useful,
16 * but WITHOUT ANY WARRANTY; without even the implied warranty of
17 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
18 * GNU General Public License for more details.
22 * b) Permission is hereby granted, free of charge, to any person
23 * obtaining a copy of this software and associated documentation
24 * files (the "Software"), to deal in the Software without
25 * restriction, including without limitation the rights to use,
26 * copy, modify, merge, publish, distribute, sublicense, and/or
27 * sell copies of the Software, and to permit persons to whom the
28 * Software is furnished to do so, subject to the following
31 * The above copyright notice and this permission notice shall be
32 * included in all copies or substantial portions of the Software.
34 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
35 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
36 * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
37 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
38 * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
39 * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
40 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
41 * OTHER DEALINGS IN THE SOFTWARE.
44 #include <dt-bindings/clock/imx7d-clock.h>
45 #include <dt-bindings/power/imx7-power.h>
46 #include <dt-bindings/gpio/gpio.h>
47 #include <dt-bindings/input/input.h>
48 #include <dt-bindings/interrupt-controller/arm-gic.h>
49 #include "imx7d-pinfunc.h"
55 * The decompressor and also some bootloaders rely on a
56 * pre-existing /chosen node to be available to insert the
57 * command line and merge other ATAGS info.
58 * Also for U-Boot there must be a pre-existing /memory node.
61 memory { device_type = "memory"; };
96 compatible = "arm,cortex-a7";
99 clock-frequency = <792000000>;
100 clock-latency = <61036>; /* two CLK32 periods */
101 clocks = <&clks IMX7D_CLK_ARM>;
106 compatible = "fixed-clock";
108 clock-frequency = <32768>;
109 clock-output-names = "ckil";
113 compatible = "fixed-clock";
115 clock-frequency = <24000000>;
116 clock-output-names = "osc";
119 usbphynop1: usbphynop1 {
120 compatible = "usb-nop-xceiv";
121 clocks = <&clks IMX7D_USB_PHY1_CLK>;
122 clock-names = "main_clk";
126 usbphynop3: usbphynop3 {
127 compatible = "usb-nop-xceiv";
128 clocks = <&clks IMX7D_USB_HSIC_ROOT_CLK>;
129 clock-names = "main_clk";
134 compatible = "arm,cortex-a7-pmu";
135 interrupt-parent = <&gpc>;
136 interrupts = <GIC_SPI 92 IRQ_TYPE_LEVEL_HIGH>;
137 interrupt-affinity = <&cpu0>;
142 * non-configurable replicators don't show up on the
143 * AMBA bus. As such no need to add "arm,primecell"
145 compatible = "arm,coresight-replicator";
148 #address-cells = <1>;
150 /* replicator output ports */
153 replicator_out_port0: endpoint {
154 remote-endpoint = <&tpiu_in_port>;
160 replicator_out_port1: endpoint {
161 remote-endpoint = <&etr_in_port>;
165 /* replicator input port */
168 replicator_in_port0: endpoint {
170 remote-endpoint = <&etf_out_port>;
177 compatible = "arm,armv7-timer";
178 interrupt-parent = <&intc>;
179 interrupts = <GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>,
180 <GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>,
181 <GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>,
182 <GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>;
186 #address-cells = <1>;
188 compatible = "simple-bus";
189 interrupt-parent = <&gpc>;
193 compatible = "arm,coresight-funnel", "arm,primecell";
194 reg = <0x30041000 0x1000>;
195 clocks = <&clks IMX7D_MAIN_AXI_ROOT_CLK>;
196 clock-names = "apb_pclk";
198 ca_funnel_ports: ports {
199 #address-cells = <1>;
202 /* funnel input ports */
205 ca_funnel_in_port0: endpoint {
207 remote-endpoint = <&etm0_out_port>;
211 /* funnel output port */
214 ca_funnel_out_port0: endpoint {
215 remote-endpoint = <&hugo_funnel_in_port0>;
219 /* the other input ports are not connect to anything */
224 compatible = "arm,coresight-etm3x", "arm,primecell";
225 reg = <0x3007c000 0x1000>;
227 clocks = <&clks IMX7D_MAIN_AXI_ROOT_CLK>;
228 clock-names = "apb_pclk";
231 etm0_out_port: endpoint {
232 remote-endpoint = <&ca_funnel_in_port0>;
238 compatible = "arm,coresight-funnel", "arm,primecell";
239 reg = <0x30083000 0x1000>;
240 clocks = <&clks IMX7D_MAIN_AXI_ROOT_CLK>;
241 clock-names = "apb_pclk";
244 #address-cells = <1>;
247 /* funnel input ports */
250 hugo_funnel_in_port0: endpoint {
252 remote-endpoint = <&ca_funnel_out_port0>;
258 hugo_funnel_in_port1: endpoint {
259 slave-mode; /* M4 input */
265 hugo_funnel_out_port0: endpoint {
266 remote-endpoint = <&etf_in_port>;
270 /* the other input ports are not connect to anything */
275 compatible = "arm,coresight-tmc", "arm,primecell";
276 reg = <0x30084000 0x1000>;
277 clocks = <&clks IMX7D_MAIN_AXI_ROOT_CLK>;
278 clock-names = "apb_pclk";
281 #address-cells = <1>;
286 etf_in_port: endpoint {
288 remote-endpoint = <&hugo_funnel_out_port0>;
294 etf_out_port: endpoint {
295 remote-endpoint = <&replicator_in_port0>;
302 compatible = "arm,coresight-tmc", "arm,primecell";
303 reg = <0x30086000 0x1000>;
304 clocks = <&clks IMX7D_MAIN_AXI_ROOT_CLK>;
305 clock-names = "apb_pclk";
308 etr_in_port: endpoint {
310 remote-endpoint = <&replicator_out_port1>;
316 compatible = "arm,coresight-tpiu", "arm,primecell";
317 reg = <0x30087000 0x1000>;
318 clocks = <&clks IMX7D_MAIN_AXI_ROOT_CLK>;
319 clock-names = "apb_pclk";
322 tpiu_in_port: endpoint {
324 remote-endpoint = <&replicator_out_port1>;
329 intc: interrupt-controller@31001000 {
330 compatible = "arm,cortex-a7-gic";
331 interrupts = <GIC_PPI 9 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_HIGH)>;
332 #interrupt-cells = <3>;
333 interrupt-controller;
334 interrupt-parent = <&intc>;
335 reg = <0x31001000 0x1000>,
341 aips1: aips-bus@30000000 {
342 compatible = "fsl,aips-bus", "simple-bus";
343 #address-cells = <1>;
345 reg = <0x30000000 0x400000>;
348 gpio1: gpio@30200000 {
349 compatible = "fsl,imx7d-gpio", "fsl,imx35-gpio";
350 reg = <0x30200000 0x10000>;
351 interrupts = <GIC_SPI 64 IRQ_TYPE_LEVEL_HIGH>, /* GPIO1_INT15_0 */
352 <GIC_SPI 65 IRQ_TYPE_LEVEL_HIGH>; /* GPIO1_INT31_16 */
355 interrupt-controller;
356 #interrupt-cells = <2>;
357 gpio-ranges = <&iomuxc_lpsr 0 0 8>, <&iomuxc 8 5 8>;
360 gpio2: gpio@30210000 {
361 compatible = "fsl,imx7d-gpio", "fsl,imx35-gpio";
362 reg = <0x30210000 0x10000>;
363 interrupts = <GIC_SPI 66 IRQ_TYPE_LEVEL_HIGH>,
364 <GIC_SPI 67 IRQ_TYPE_LEVEL_HIGH>;
367 interrupt-controller;
368 #interrupt-cells = <2>;
369 gpio-ranges = <&iomuxc 0 13 32>;
372 gpio3: gpio@30220000 {
373 compatible = "fsl,imx7d-gpio", "fsl,imx35-gpio";
374 reg = <0x30220000 0x10000>;
375 interrupts = <GIC_SPI 68 IRQ_TYPE_LEVEL_HIGH>,
376 <GIC_SPI 69 IRQ_TYPE_LEVEL_HIGH>;
379 interrupt-controller;
380 #interrupt-cells = <2>;
381 gpio-ranges = <&iomuxc 0 45 29>;
384 gpio4: gpio@30230000 {
385 compatible = "fsl,imx7d-gpio", "fsl,imx35-gpio";
386 reg = <0x30230000 0x10000>;
387 interrupts = <GIC_SPI 70 IRQ_TYPE_LEVEL_HIGH>,
388 <GIC_SPI 71 IRQ_TYPE_LEVEL_HIGH>;
391 interrupt-controller;
392 #interrupt-cells = <2>;
393 gpio-ranges = <&iomuxc 0 74 24>;
396 gpio5: gpio@30240000 {
397 compatible = "fsl,imx7d-gpio", "fsl,imx35-gpio";
398 reg = <0x30240000 0x10000>;
399 interrupts = <GIC_SPI 72 IRQ_TYPE_LEVEL_HIGH>,
400 <GIC_SPI 73 IRQ_TYPE_LEVEL_HIGH>;
403 interrupt-controller;
404 #interrupt-cells = <2>;
405 gpio-ranges = <&iomuxc 0 98 18>;
408 gpio6: gpio@30250000 {
409 compatible = "fsl,imx7d-gpio", "fsl,imx35-gpio";
410 reg = <0x30250000 0x10000>;
411 interrupts = <GIC_SPI 74 IRQ_TYPE_LEVEL_HIGH>,
412 <GIC_SPI 75 IRQ_TYPE_LEVEL_HIGH>;
415 interrupt-controller;
416 #interrupt-cells = <2>;
417 gpio-ranges = <&iomuxc 0 116 23>;
420 gpio7: gpio@30260000 {
421 compatible = "fsl,imx7d-gpio", "fsl,imx35-gpio";
422 reg = <0x30260000 0x10000>;
423 interrupts = <GIC_SPI 76 IRQ_TYPE_LEVEL_HIGH>,
424 <GIC_SPI 77 IRQ_TYPE_LEVEL_HIGH>;
427 interrupt-controller;
428 #interrupt-cells = <2>;
429 gpio-ranges = <&iomuxc 0 139 16>;
432 wdog1: wdog@30280000 {
433 compatible = "fsl,imx7d-wdt", "fsl,imx21-wdt";
434 reg = <0x30280000 0x10000>;
435 interrupts = <GIC_SPI 78 IRQ_TYPE_LEVEL_HIGH>;
436 clocks = <&clks IMX7D_WDOG1_ROOT_CLK>;
439 wdog2: wdog@30290000 {
440 compatible = "fsl,imx7d-wdt", "fsl,imx21-wdt";
441 reg = <0x30290000 0x10000>;
442 interrupts = <GIC_SPI 79 IRQ_TYPE_LEVEL_HIGH>;
443 clocks = <&clks IMX7D_WDOG2_ROOT_CLK>;
447 wdog3: wdog@302a0000 {
448 compatible = "fsl,imx7d-wdt", "fsl,imx21-wdt";
449 reg = <0x302a0000 0x10000>;
450 interrupts = <GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH>;
451 clocks = <&clks IMX7D_WDOG3_ROOT_CLK>;
455 wdog4: wdog@302b0000 {
456 compatible = "fsl,imx7d-wdt", "fsl,imx21-wdt";
457 reg = <0x302b0000 0x10000>;
458 interrupts = <GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH>;
459 clocks = <&clks IMX7D_WDOG4_ROOT_CLK>;
463 iomuxc_lpsr: iomuxc-lpsr@302c0000 {
464 compatible = "fsl,imx7d-iomuxc-lpsr";
465 reg = <0x302c0000 0x10000>;
466 fsl,input-sel = <&iomuxc>;
470 compatible = "fsl,imx7d-gpt", "fsl,imx6sx-gpt";
471 reg = <0x302d0000 0x10000>;
472 interrupts = <GIC_SPI 55 IRQ_TYPE_LEVEL_HIGH>;
473 clocks = <&clks IMX7D_CLK_DUMMY>,
474 <&clks IMX7D_GPT1_ROOT_CLK>;
475 clock-names = "ipg", "per";
479 compatible = "fsl,imx7d-gpt", "fsl,imx6sx-gpt";
480 reg = <0x302e0000 0x10000>;
481 interrupts = <GIC_SPI 54 IRQ_TYPE_LEVEL_HIGH>;
482 clocks = <&clks IMX7D_CLK_DUMMY>,
483 <&clks IMX7D_GPT2_ROOT_CLK>;
484 clock-names = "ipg", "per";
489 compatible = "fsl,imx7d-gpt", "fsl,imx6sx-gpt";
490 reg = <0x302f0000 0x10000>;
491 interrupts = <GIC_SPI 53 IRQ_TYPE_LEVEL_HIGH>;
492 clocks = <&clks IMX7D_CLK_DUMMY>,
493 <&clks IMX7D_GPT3_ROOT_CLK>;
494 clock-names = "ipg", "per";
499 compatible = "fsl,imx7d-gpt", "fsl,imx6sx-gpt";
500 reg = <0x30300000 0x10000>;
501 interrupts = <GIC_SPI 52 IRQ_TYPE_LEVEL_HIGH>;
502 clocks = <&clks IMX7D_CLK_DUMMY>,
503 <&clks IMX7D_GPT4_ROOT_CLK>;
504 clock-names = "ipg", "per";
509 compatible = "fsl,imx7d-kpp", "fsl,imx21-kpp";
510 reg = <0x30320000 0x10000>;
511 interrupts = <GIC_SPI 80 IRQ_TYPE_LEVEL_HIGH>;
512 clocks = <&clks IMX7D_KPP_ROOT_CLK>;
516 iomuxc: iomuxc@30330000 {
517 compatible = "fsl,imx7d-iomuxc";
518 reg = <0x30330000 0x10000>;
521 gpr: iomuxc-gpr@30340000 {
522 compatible = "fsl,imx7d-iomuxc-gpr",
523 "fsl,imx6q-iomuxc-gpr", "syscon";
524 reg = <0x30340000 0x10000>;
527 ocotp: ocotp-ctrl@30350000 {
528 #address-cells = <1>;
530 compatible = "fsl,imx7d-ocotp", "syscon";
531 reg = <0x30350000 0x10000>;
532 clocks = <&clks IMX7D_OCOTP_CLK>;
534 tempmon_calib: calib@3c {
538 tempmon_temp_grade: temp-grade@10 {
544 compatible = "fsl,imx7d-tempmon";
545 interrupts = <GIC_SPI 49 IRQ_TYPE_LEVEL_HIGH>;
546 fsl,tempmon =<&anatop>;
547 nvmem-cells = <&tempmon_calib>,
548 <&tempmon_temp_grade>;
549 nvmem-cell-names = "calib", "temp_grade";
550 clocks = <&clks IMX7D_PLL_SYS_MAIN_CLK>;
553 anatop: anatop@30360000 {
554 compatible = "fsl,imx7d-anatop", "fsl,imx6q-anatop",
555 "syscon", "simple-bus";
556 reg = <0x30360000 0x10000>;
557 interrupts = <GIC_SPI 49 IRQ_TYPE_LEVEL_HIGH>,
558 <GIC_SPI 51 IRQ_TYPE_LEVEL_HIGH>;
559 #address-cells = <1>;
562 reg_1p0d: regulator-vdd1p0d@30360210 {
564 compatible = "fsl,anatop-regulator";
565 regulator-name = "vdd1p0d";
566 regulator-min-microvolt = <800000>;
567 regulator-max-microvolt = <1200000>;
568 anatop-reg-offset = <0x210>;
569 anatop-vol-bit-shift = <8>;
570 anatop-vol-bit-width = <5>;
571 anatop-min-bit-val = <8>;
572 anatop-min-voltage = <800000>;
573 anatop-max-voltage = <1200000>;
574 anatop-enable-bit = <0>;
578 snvs: snvs@30370000 {
579 compatible = "fsl,sec-v4.0-mon", "syscon", "simple-mfd";
580 reg = <0x30370000 0x10000>;
582 snvs_rtc: snvs-rtc-lp {
583 compatible = "fsl,sec-v4.0-mon-rtc-lp";
586 interrupts = <GIC_SPI 19 IRQ_TYPE_LEVEL_HIGH>,
587 <GIC_SPI 20 IRQ_TYPE_LEVEL_HIGH>;
588 clocks = <&clks IMX7D_SNVS_CLK>;
589 clock-names = "snvs-rtc";
592 snvs_poweroff: snvs-poweroff {
593 compatible = "syscon-poweroff";
600 snvs_pwrkey: snvs-powerkey {
601 compatible = "fsl,sec-v4.0-pwrkey";
603 interrupts = <GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH>;
604 linux,keycode = <KEY_POWER>;
610 compatible = "fsl,imx7d-ccm";
611 reg = <0x30380000 0x10000>;
612 interrupts = <GIC_SPI 85 IRQ_TYPE_LEVEL_HIGH>,
613 <GIC_SPI 86 IRQ_TYPE_LEVEL_HIGH>;
615 clocks = <&ckil>, <&osc>;
616 clock-names = "ckil", "osc";
620 compatible = "fsl,imx7d-src", "syscon";
621 reg = <0x30390000 0x10000>;
622 interrupts = <GIC_SPI 89 IRQ_TYPE_LEVEL_HIGH>;
627 compatible = "fsl,imx7d-gpc";
628 reg = <0x303a0000 0x10000>;
629 interrupt-controller;
630 interrupts = <GIC_SPI 87 IRQ_TYPE_LEVEL_HIGH>;
631 #interrupt-cells = <3>;
632 interrupt-parent = <&intc>;
633 #power-domain-cells = <1>;
636 #address-cells = <1>;
639 pgc_pcie_phy: pgc-power-domain@1 {
640 #power-domain-cells = <0>;
642 power-supply = <®_1p0d>;
648 aips2: aips-bus@30400000 {
649 compatible = "fsl,aips-bus", "simple-bus";
650 #address-cells = <1>;
652 reg = <0x30400000 0x400000>;
656 compatible = "fsl,imx7d-adc";
657 reg = <0x30610000 0x10000>;
658 interrupts = <GIC_SPI 98 IRQ_TYPE_LEVEL_HIGH>;
659 clocks = <&clks IMX7D_ADC_ROOT_CLK>;
665 compatible = "fsl,imx7d-adc";
666 reg = <0x30620000 0x10000>;
667 interrupts = <GIC_SPI 99 IRQ_TYPE_LEVEL_HIGH>;
668 clocks = <&clks IMX7D_ADC_ROOT_CLK>;
673 ecspi4: ecspi@30630000 {
674 #address-cells = <1>;
676 compatible = "fsl,imx7d-ecspi", "fsl,imx51-ecspi";
677 reg = <0x30630000 0x10000>;
678 interrupts = <GIC_SPI 34 IRQ_TYPE_LEVEL_HIGH>;
679 clocks = <&clks IMX7D_ECSPI4_ROOT_CLK>,
680 <&clks IMX7D_ECSPI4_ROOT_CLK>;
681 clock-names = "ipg", "per";
686 compatible = "fsl,imx7d-pwm", "fsl,imx27-pwm";
687 reg = <0x30660000 0x10000>;
688 interrupts = <GIC_SPI 81 IRQ_TYPE_LEVEL_HIGH>;
689 clocks = <&clks IMX7D_PWM1_ROOT_CLK>,
690 <&clks IMX7D_PWM1_ROOT_CLK>;
691 clock-names = "ipg", "per";
697 compatible = "fsl,imx7d-pwm", "fsl,imx27-pwm";
698 reg = <0x30670000 0x10000>;
699 interrupts = <GIC_SPI 82 IRQ_TYPE_LEVEL_HIGH>;
700 clocks = <&clks IMX7D_PWM2_ROOT_CLK>,
701 <&clks IMX7D_PWM2_ROOT_CLK>;
702 clock-names = "ipg", "per";
708 compatible = "fsl,imx7d-pwm", "fsl,imx27-pwm";
709 reg = <0x30680000 0x10000>;
710 interrupts = <GIC_SPI 83 IRQ_TYPE_LEVEL_HIGH>;
711 clocks = <&clks IMX7D_PWM3_ROOT_CLK>,
712 <&clks IMX7D_PWM3_ROOT_CLK>;
713 clock-names = "ipg", "per";
719 compatible = "fsl,imx7d-pwm", "fsl,imx27-pwm";
720 reg = <0x30690000 0x10000>;
721 interrupts = <GIC_SPI 84 IRQ_TYPE_LEVEL_HIGH>;
722 clocks = <&clks IMX7D_PWM4_ROOT_CLK>,
723 <&clks IMX7D_PWM4_ROOT_CLK>;
724 clock-names = "ipg", "per";
729 lcdif: lcdif@30730000 {
730 compatible = "fsl,imx7d-lcdif", "fsl,imx28-lcdif";
731 reg = <0x30730000 0x10000>;
732 interrupts = <GIC_SPI 5 IRQ_TYPE_LEVEL_HIGH>;
733 clocks = <&clks IMX7D_LCDIF_PIXEL_ROOT_CLK>,
734 <&clks IMX7D_LCDIF_PIXEL_ROOT_CLK>;
735 clock-names = "pix", "axi";
740 aips3: aips-bus@30800000 {
741 compatible = "fsl,aips-bus", "simple-bus";
742 #address-cells = <1>;
744 reg = <0x30800000 0x400000>;
748 compatible = "fsl,spba-bus", "simple-bus";
749 #address-cells = <1>;
751 reg = <0x30800000 0x100000>;
754 ecspi1: ecspi@30820000 {
755 #address-cells = <1>;
757 compatible = "fsl,imx7d-ecspi", "fsl,imx51-ecspi";
758 reg = <0x30820000 0x10000>;
759 interrupts = <GIC_SPI 31 IRQ_TYPE_LEVEL_HIGH>;
760 clocks = <&clks IMX7D_ECSPI1_ROOT_CLK>,
761 <&clks IMX7D_ECSPI1_ROOT_CLK>;
762 clock-names = "ipg", "per";
766 ecspi2: ecspi@30830000 {
767 #address-cells = <1>;
769 compatible = "fsl,imx7d-ecspi", "fsl,imx51-ecspi";
770 reg = <0x30830000 0x10000>;
771 interrupts = <GIC_SPI 32 IRQ_TYPE_LEVEL_HIGH>;
772 clocks = <&clks IMX7D_ECSPI2_ROOT_CLK>,
773 <&clks IMX7D_ECSPI2_ROOT_CLK>;
774 clock-names = "ipg", "per";
778 ecspi3: ecspi@30840000 {
779 #address-cells = <1>;
781 compatible = "fsl,imx7d-ecspi", "fsl,imx51-ecspi";
782 reg = <0x30840000 0x10000>;
783 interrupts = <GIC_SPI 33 IRQ_TYPE_LEVEL_HIGH>;
784 clocks = <&clks IMX7D_ECSPI3_ROOT_CLK>,
785 <&clks IMX7D_ECSPI3_ROOT_CLK>;
786 clock-names = "ipg", "per";
790 uart1: serial@30860000 {
791 compatible = "fsl,imx7d-uart",
793 reg = <0x30860000 0x10000>;
794 interrupts = <GIC_SPI 26 IRQ_TYPE_LEVEL_HIGH>;
795 clocks = <&clks IMX7D_UART1_ROOT_CLK>,
796 <&clks IMX7D_UART1_ROOT_CLK>;
797 clock-names = "ipg", "per";
801 uart2: serial@30890000 {
802 compatible = "fsl,imx7d-uart",
804 reg = <0x30890000 0x10000>;
805 interrupts = <GIC_SPI 27 IRQ_TYPE_LEVEL_HIGH>;
806 clocks = <&clks IMX7D_UART2_ROOT_CLK>,
807 <&clks IMX7D_UART2_ROOT_CLK>;
808 clock-names = "ipg", "per";
812 uart3: serial@30880000 {
813 compatible = "fsl,imx7d-uart",
815 reg = <0x30880000 0x10000>;
816 interrupts = <GIC_SPI 28 IRQ_TYPE_LEVEL_HIGH>;
817 clocks = <&clks IMX7D_UART3_ROOT_CLK>,
818 <&clks IMX7D_UART3_ROOT_CLK>;
819 clock-names = "ipg", "per";
824 #sound-dai-cells = <0>;
825 compatible = "fsl,imx7d-sai", "fsl,imx6sx-sai";
826 reg = <0x308a0000 0x10000>;
827 interrupts = <GIC_SPI 95 IRQ_TYPE_LEVEL_HIGH>;
828 clocks = <&clks IMX7D_SAI1_IPG_CLK>,
829 <&clks IMX7D_SAI1_ROOT_CLK>,
830 <&clks IMX7D_CLK_DUMMY>,
831 <&clks IMX7D_CLK_DUMMY>;
832 clock-names = "bus", "mclk1", "mclk2", "mclk3";
833 dma-names = "rx", "tx";
834 dmas = <&sdma 8 24 0>, <&sdma 9 24 0>;
839 #sound-dai-cells = <0>;
840 compatible = "fsl,imx7d-sai", "fsl,imx6sx-sai";
841 reg = <0x308b0000 0x10000>;
842 interrupts = <GIC_SPI 96 IRQ_TYPE_LEVEL_HIGH>;
843 clocks = <&clks IMX7D_SAI2_IPG_CLK>,
844 <&clks IMX7D_SAI2_ROOT_CLK>,
845 <&clks IMX7D_CLK_DUMMY>,
846 <&clks IMX7D_CLK_DUMMY>;
847 clock-names = "bus", "mclk1", "mclk2", "mclk3";
848 dma-names = "rx", "tx";
849 dmas = <&sdma 10 24 0>, <&sdma 11 24 0>;
854 #sound-dai-cells = <0>;
855 compatible = "fsl,imx7d-sai", "fsl,imx6sx-sai";
856 reg = <0x308c0000 0x10000>;
857 interrupts = <GIC_SPI 50 IRQ_TYPE_LEVEL_HIGH>;
858 clocks = <&clks IMX7D_SAI3_IPG_CLK>,
859 <&clks IMX7D_SAI3_ROOT_CLK>,
860 <&clks IMX7D_CLK_DUMMY>,
861 <&clks IMX7D_CLK_DUMMY>;
862 clock-names = "bus", "mclk1", "mclk2", "mclk3";
863 dma-names = "rx", "tx";
864 dmas = <&sdma 12 24 0>, <&sdma 13 24 0>;
869 crypto: caam@30900000 {
870 compatible = "fsl,sec-v4.0";
871 #address-cells = <1>;
873 reg = <0x30900000 0x40000>;
874 ranges = <0 0x30900000 0x40000>;
875 interrupts = <GIC_SPI 91 IRQ_TYPE_LEVEL_HIGH>;
876 clocks = <&clks IMX7D_CAAM_CLK>,
877 <&clks IMX7D_AHB_CHANNEL_ROOT_CLK>;
878 clock-names = "ipg", "aclk";
881 compatible = "fsl,sec-v4.0-job-ring";
882 reg = <0x1000 0x1000>;
883 interrupts = <GIC_SPI 105 IRQ_TYPE_LEVEL_HIGH>;
887 compatible = "fsl,sec-v4.0-job-ring";
888 reg = <0x2000 0x1000>;
889 interrupts = <GIC_SPI 106 IRQ_TYPE_LEVEL_HIGH>;
893 compatible = "fsl,sec-v4.0-job-ring";
894 reg = <0x3000 0x1000>;
895 interrupts = <GIC_SPI 114 IRQ_TYPE_LEVEL_HIGH>;
899 flexcan1: can@30a00000 {
900 compatible = "fsl,imx7d-flexcan", "fsl,imx6q-flexcan";
901 reg = <0x30a00000 0x10000>;
902 interrupts = <GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH>;
903 clocks = <&clks IMX7D_CLK_DUMMY>,
904 <&clks IMX7D_CAN1_ROOT_CLK>;
905 clock-names = "ipg", "per";
909 flexcan2: can@30a10000 {
910 compatible = "fsl,imx7d-flexcan", "fsl,imx6q-flexcan";
911 reg = <0x30a10000 0x10000>;
912 interrupts = <GIC_SPI 111 IRQ_TYPE_LEVEL_HIGH>;
913 clocks = <&clks IMX7D_CLK_DUMMY>,
914 <&clks IMX7D_CAN2_ROOT_CLK>;
915 clock-names = "ipg", "per";
920 #address-cells = <1>;
922 compatible = "fsl,imx7d-i2c", "fsl,imx21-i2c";
923 reg = <0x30a20000 0x10000>;
924 interrupts = <GIC_SPI 35 IRQ_TYPE_LEVEL_HIGH>;
925 clocks = <&clks IMX7D_I2C1_ROOT_CLK>;
930 #address-cells = <1>;
932 compatible = "fsl,imx7d-i2c", "fsl,imx21-i2c";
933 reg = <0x30a30000 0x10000>;
934 interrupts = <GIC_SPI 36 IRQ_TYPE_LEVEL_HIGH>;
935 clocks = <&clks IMX7D_I2C2_ROOT_CLK>;
940 #address-cells = <1>;
942 compatible = "fsl,imx7d-i2c", "fsl,imx21-i2c";
943 reg = <0x30a40000 0x10000>;
944 interrupts = <GIC_SPI 37 IRQ_TYPE_LEVEL_HIGH>;
945 clocks = <&clks IMX7D_I2C3_ROOT_CLK>;
950 #address-cells = <1>;
952 compatible = "fsl,imx7d-i2c", "fsl,imx21-i2c";
953 reg = <0x30a50000 0x10000>;
954 interrupts = <GIC_SPI 38 IRQ_TYPE_LEVEL_HIGH>;
955 clocks = <&clks IMX7D_I2C4_ROOT_CLK>;
959 uart4: serial@30a60000 {
960 compatible = "fsl,imx7d-uart",
962 reg = <0x30a60000 0x10000>;
963 interrupts = <GIC_SPI 29 IRQ_TYPE_LEVEL_HIGH>;
964 clocks = <&clks IMX7D_UART4_ROOT_CLK>,
965 <&clks IMX7D_UART4_ROOT_CLK>;
966 clock-names = "ipg", "per";
970 uart5: serial@30a70000 {
971 compatible = "fsl,imx7d-uart",
973 reg = <0x30a70000 0x10000>;
974 interrupts = <GIC_SPI 30 IRQ_TYPE_LEVEL_HIGH>;
975 clocks = <&clks IMX7D_UART5_ROOT_CLK>,
976 <&clks IMX7D_UART5_ROOT_CLK>;
977 clock-names = "ipg", "per";
981 uart6: serial@30a80000 {
982 compatible = "fsl,imx7d-uart",
984 reg = <0x30a80000 0x10000>;
985 interrupts = <GIC_SPI 16 IRQ_TYPE_LEVEL_HIGH>;
986 clocks = <&clks IMX7D_UART6_ROOT_CLK>,
987 <&clks IMX7D_UART6_ROOT_CLK>;
988 clock-names = "ipg", "per";
992 uart7: serial@30a90000 {
993 compatible = "fsl,imx7d-uart",
995 reg = <0x30a90000 0x10000>;
996 interrupts = <GIC_SPI 126 IRQ_TYPE_LEVEL_HIGH>;
997 clocks = <&clks IMX7D_UART7_ROOT_CLK>,
998 <&clks IMX7D_UART7_ROOT_CLK>;
999 clock-names = "ipg", "per";
1000 status = "disabled";
1003 usbotg1: usb@30b10000 {
1004 compatible = "fsl,imx7d-usb", "fsl,imx27-usb";
1005 reg = <0x30b10000 0x200>;
1006 interrupts = <GIC_SPI 43 IRQ_TYPE_LEVEL_HIGH>;
1007 clocks = <&clks IMX7D_USB_CTRL_CLK>;
1008 fsl,usbphy = <&usbphynop1>;
1009 fsl,usbmisc = <&usbmisc1 0>;
1010 phy-clkgate-delay-us = <400>;
1011 status = "disabled";
1014 usbh: usb@30b30000 {
1015 compatible = "fsl,imx7d-usb", "fsl,imx27-usb";
1016 reg = <0x30b30000 0x200>;
1017 interrupts = <GIC_SPI 40 IRQ_TYPE_LEVEL_HIGH>;
1018 clocks = <&clks IMX7D_USB_CTRL_CLK>;
1019 fsl,usbphy = <&usbphynop3>;
1020 fsl,usbmisc = <&usbmisc3 0>;
1023 phy-clkgate-delay-us = <400>;
1024 status = "disabled";
1027 usbmisc1: usbmisc@30b10200 {
1029 compatible = "fsl,imx7d-usbmisc", "fsl,imx6q-usbmisc";
1030 reg = <0x30b10200 0x200>;
1033 usbmisc3: usbmisc@30b30200 {
1035 compatible = "fsl,imx7d-usbmisc", "fsl,imx6q-usbmisc";
1036 reg = <0x30b30200 0x200>;
1039 usdhc1: usdhc@30b40000 {
1040 compatible = "fsl,imx7d-usdhc", "fsl,imx6sl-usdhc";
1041 reg = <0x30b40000 0x10000>;
1042 interrupts = <GIC_SPI 22 IRQ_TYPE_LEVEL_HIGH>;
1043 clocks = <&clks IMX7D_IPG_ROOT_CLK>,
1044 <&clks IMX7D_NAND_USDHC_BUS_ROOT_CLK>,
1045 <&clks IMX7D_USDHC1_ROOT_CLK>;
1046 clock-names = "ipg", "ahb", "per";
1048 status = "disabled";
1051 usdhc2: usdhc@30b50000 {
1052 compatible = "fsl,imx7d-usdhc", "fsl,imx6sl-usdhc";
1053 reg = <0x30b50000 0x10000>;
1054 interrupts = <GIC_SPI 23 IRQ_TYPE_LEVEL_HIGH>;
1055 clocks = <&clks IMX7D_IPG_ROOT_CLK>,
1056 <&clks IMX7D_NAND_USDHC_BUS_ROOT_CLK>,
1057 <&clks IMX7D_USDHC2_ROOT_CLK>;
1058 clock-names = "ipg", "ahb", "per";
1060 status = "disabled";
1063 usdhc3: usdhc@30b60000 {
1064 compatible = "fsl,imx7d-usdhc", "fsl,imx6sl-usdhc";
1065 reg = <0x30b60000 0x10000>;
1066 interrupts = <GIC_SPI 24 IRQ_TYPE_LEVEL_HIGH>;
1067 clocks = <&clks IMX7D_IPG_ROOT_CLK>,
1068 <&clks IMX7D_NAND_USDHC_BUS_ROOT_CLK>,
1069 <&clks IMX7D_USDHC3_ROOT_CLK>;
1070 clock-names = "ipg", "ahb", "per";
1072 status = "disabled";
1075 sdma: sdma@30bd0000 {
1076 compatible = "fsl,imx7d-sdma", "fsl,imx35-sdma";
1077 reg = <0x30bd0000 0x10000>;
1078 interrupts = <GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH>;
1079 clocks = <&clks IMX7D_SDMA_CORE_CLK>,
1080 <&clks IMX7D_AHB_CHANNEL_ROOT_CLK>;
1081 clock-names = "ipg", "ahb";
1083 fsl,sdma-ram-script-name = "imx/sdma/sdma-imx7d.bin";
1086 fec1: ethernet@30be0000 {
1087 compatible = "fsl,imx7d-fec", "fsl,imx6sx-fec";
1088 reg = <0x30be0000 0x10000>;
1089 interrupt-names = "int0", "int1", "int2", "pps";
1090 interrupts = <GIC_SPI 120 IRQ_TYPE_LEVEL_HIGH>,
1091 <GIC_SPI 118 IRQ_TYPE_LEVEL_HIGH>,
1092 <GIC_SPI 119 IRQ_TYPE_LEVEL_HIGH>,
1093 <GIC_SPI 121 IRQ_TYPE_LEVEL_HIGH>;
1094 clocks = <&clks IMX7D_ENET_AXI_ROOT_CLK>,
1095 <&clks IMX7D_ENET_AXI_ROOT_CLK>,
1096 <&clks IMX7D_ENET1_TIME_ROOT_CLK>,
1097 <&clks IMX7D_PLL_ENET_MAIN_125M_CLK>,
1098 <&clks IMX7D_ENET_PHY_REF_ROOT_CLK>;
1099 clock-names = "ipg", "ahb", "ptp",
1100 "enet_clk_ref", "enet_out";
1101 fsl,num-tx-queues=<3>;
1102 fsl,num-rx-queues=<3>;
1103 status = "disabled";
1107 dma_apbh: dma-apbh@33000000 {
1108 compatible = "fsl,imx7d-dma-apbh", "fsl,imx28-dma-apbh";
1109 reg = <0x33000000 0x2000>;
1110 interrupts = <GIC_SPI 12 IRQ_TYPE_LEVEL_HIGH>,
1111 <GIC_SPI 12 IRQ_TYPE_LEVEL_HIGH>,
1112 <GIC_SPI 12 IRQ_TYPE_LEVEL_HIGH>,
1113 <GIC_SPI 12 IRQ_TYPE_LEVEL_HIGH>;
1114 interrupt-names = "gpmi0", "gpmi1", "gpmi2", "gpmi3";
1117 clocks = <&clks IMX7D_NAND_USDHC_BUS_RAWNAND_CLK>;
1120 gpmi: gpmi-nand@33002000{
1121 compatible = "fsl,imx7d-gpmi-nand";
1122 #address-cells = <1>;
1124 reg = <0x33002000 0x2000>, <0x33004000 0x4000>;
1125 reg-names = "gpmi-nand", "bch";
1126 interrupts = <GIC_SPI 14 IRQ_TYPE_LEVEL_HIGH>;
1127 interrupt-names = "bch";
1128 clocks = <&clks IMX7D_NAND_RAWNAND_CLK>,
1129 <&clks IMX7D_NAND_USDHC_BUS_RAWNAND_CLK>;
1130 clock-names = "gpmi_io", "gpmi_bch_apb";
1131 dmas = <&dma_apbh 0>;
1132 dma-names = "rx-tx";
1133 status = "disabled";
1134 assigned-clocks = <&clks IMX7D_NAND_ROOT_SRC>;
1135 assigned-clock-parents = <&clks IMX7D_PLL_ENET_MAIN_500M_CLK>;