Merge branch 'for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/dtor/input
[linux-2.6-microblaze.git] / arch / arm / boot / dts / imx7d.dtsi
1 /*
2  * Copyright 2015 Freescale Semiconductor, Inc.
3  * Copyright 2016 Toradex AG
4  *
5  * This file is dual-licensed: you can use it either under the terms
6  * of the GPL or the X11 license, at your option. Note that this dual
7  * licensing only applies to this file, and not this project as a
8  * whole.
9  *
10  *  a) This file is free software; you can redistribute it and/or
11  *     modify it under the terms of the GNU General Public License as
12  *     published by the Free Software Foundation; either version 2 of the
13  *     License, or (at your option) any later version.
14  *
15  *     This file is distributed in the hope that it will be useful,
16  *     but WITHOUT ANY WARRANTY; without even the implied warranty of
17  *     MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
18  *     GNU General Public License for more details.
19  *
20  * Or, alternatively,
21  *
22  *  b) Permission is hereby granted, free of charge, to any person
23  *     obtaining a copy of this software and associated documentation
24  *     files (the "Software"), to deal in the Software without
25  *     restriction, including without limitation the rights to use,
26  *     copy, modify, merge, publish, distribute, sublicense, and/or
27  *     sell copies of the Software, and to permit persons to whom the
28  *     Software is furnished to do so, subject to the following
29  *     conditions:
30  *
31  *     The above copyright notice and this permission notice shall be
32  *     included in all copies or substantial portions of the Software.
33  *
34  *     THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
35  *     EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
36  *     OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
37  *     NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
38  *     HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
39  *     WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
40  *     FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
41  *     OTHER DEALINGS IN THE SOFTWARE.
42  */
43
44 #include "imx7s.dtsi"
45 #include <dt-bindings/reset/imx7-reset.h>
46
47 / {
48         cpus {
49                 cpu0: cpu@0 {
50                         operating-points = <
51                                 /* KHz  uV */
52                                 996000  1075000
53                                 792000  975000
54                         >;
55                         clock-frequency = <996000000>;
56                 };
57
58                 cpu1: cpu@1 {
59                         compatible = "arm,cortex-a7";
60                         device_type = "cpu";
61                         reg = <1>;
62                         clock-frequency = <996000000>;
63                 };
64         };
65
66         usbphynop2: usbphynop2 {
67                 compatible = "usb-nop-xceiv";
68                 clocks = <&clks IMX7D_USB_PHY2_CLK>;
69                 clock-names = "main_clk";
70                 #phy-cells = <0>;
71         };
72
73         soc {
74                 etm@3007d000 {
75                         compatible = "arm,coresight-etm3x", "arm,primecell";
76                         reg = <0x3007d000 0x1000>;
77
78                         /*
79                          * System will hang if added nosmp in kernel command line
80                          * without arm,primecell-periphid because amba bus try to
81                          * read id and core1 power off at this time.
82                          */
83                         arm,primecell-periphid = <0xbb956>;
84                         cpu = <&cpu1>;
85                         clocks = <&clks IMX7D_MAIN_AXI_ROOT_CLK>;
86                         clock-names = "apb_pclk";
87
88                         port {
89                                 etm1_out_port: endpoint {
90                                         remote-endpoint = <&ca_funnel_in_port1>;
91                                 };
92                         };
93                 };
94         };
95 };
96
97 &aips3 {
98         usbotg2: usb@30b20000 {
99                 compatible = "fsl,imx7d-usb", "fsl,imx27-usb";
100                 reg = <0x30b20000 0x200>;
101                 interrupts = <GIC_SPI 42 IRQ_TYPE_LEVEL_HIGH>;
102                 clocks = <&clks IMX7D_USB_CTRL_CLK>;
103                 fsl,usbphy = <&usbphynop2>;
104                 fsl,usbmisc = <&usbmisc2 0>;
105                 phy-clkgate-delay-us = <400>;
106                 status = "disabled";
107         };
108
109         usbmisc2: usbmisc@30b20200 {
110                 #index-cells = <1>;
111                 compatible = "fsl,imx7d-usbmisc", "fsl,imx6q-usbmisc";
112                 reg = <0x30b20200 0x200>;
113         };
114
115         fec2: ethernet@30bf0000 {
116                 compatible = "fsl,imx7d-fec", "fsl,imx6sx-fec";
117                 reg = <0x30bf0000 0x10000>;
118                 interrupt-names = "int0", "int1", "int2", "pps";
119                 interrupts = <GIC_SPI 102 IRQ_TYPE_LEVEL_HIGH>,
120                         <GIC_SPI 100 IRQ_TYPE_LEVEL_HIGH>,
121                         <GIC_SPI 101 IRQ_TYPE_LEVEL_HIGH>,
122                         <GIC_SPI 103 IRQ_TYPE_LEVEL_HIGH>;
123                 clocks = <&clks IMX7D_ENET_AXI_ROOT_CLK>,
124                         <&clks IMX7D_ENET_AXI_ROOT_CLK>,
125                         <&clks IMX7D_ENET2_TIME_ROOT_CLK>,
126                         <&clks IMX7D_PLL_ENET_MAIN_125M_CLK>,
127                         <&clks IMX7D_ENET_PHY_REF_ROOT_CLK>;
128                 clock-names = "ipg", "ahb", "ptp",
129                         "enet_clk_ref", "enet_out";
130                 fsl,num-tx-queues=<3>;
131                 fsl,num-rx-queues=<3>;
132                 status = "disabled";
133         };
134
135         pcie: pcie@33800000 {
136                 compatible = "fsl,imx7d-pcie", "snps,dw-pcie";
137                 reg = <0x33800000 0x4000>,
138                       <0x4ff00000 0x80000>;
139                 reg-names = "dbi", "config";
140                 #address-cells = <3>;
141                 #size-cells = <2>;
142                 device_type = "pci";
143                 bus-range = <0x00 0xff>;
144                 ranges = <0x81000000 0 0          0x4ff80000 0 0x00010000   /* downstream I/O */
145                           0x82000000 0 0x40000000 0x40000000 0 0x0ff00000>; /* non-prefetchable memory */
146                 num-lanes = <1>;
147                 interrupts = <GIC_SPI 122 IRQ_TYPE_LEVEL_HIGH>;
148                 interrupt-names = "msi";
149                 #interrupt-cells = <1>;
150                 interrupt-map-mask = <0 0 0 0x7>;
151                 interrupt-map = <0 0 0 1 &intc GIC_SPI 122 IRQ_TYPE_LEVEL_HIGH>,
152                                 <0 0 0 2 &intc GIC_SPI 123 IRQ_TYPE_LEVEL_HIGH>,
153                                 <0 0 0 3 &intc GIC_SPI 124 IRQ_TYPE_LEVEL_HIGH>,
154                                 <0 0 0 4 &intc GIC_SPI 125 IRQ_TYPE_LEVEL_HIGH>;
155                 clocks = <&clks IMX7D_PCIE_CTRL_ROOT_CLK>,
156                          <&clks IMX7D_PLL_ENET_MAIN_100M_CLK>,
157                          <&clks IMX7D_PCIE_PHY_ROOT_CLK>;
158                 clock-names = "pcie", "pcie_bus", "pcie_phy";
159                 assigned-clocks = <&clks IMX7D_PCIE_CTRL_ROOT_SRC>,
160                                   <&clks IMX7D_PCIE_PHY_ROOT_SRC>;
161                 assigned-clock-parents = <&clks IMX7D_PLL_ENET_MAIN_250M_CLK>,
162                                          <&clks IMX7D_PLL_ENET_MAIN_100M_CLK>;
163
164                 fsl,max-link-speed = <2>;
165                 power-domains = <&pgc_pcie_phy>;
166                 resets = <&src IMX7_RESET_PCIEPHY>,
167                          <&src IMX7_RESET_PCIE_CTRL_APPS_EN>;
168                 reset-names = "pciephy", "apps";
169                 status = "disabled";
170         };
171 };
172
173 &ca_funnel_ports {
174         port@1 {
175                 reg = <1>;
176                 ca_funnel_in_port1: endpoint {
177                         slave-mode;
178                         remote-endpoint = <&etm1_out_port>;
179                 };
180         };
181 };