1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
3 * Copyright (C) 2015 Freescale Semiconductor, Inc.
4 * Copyright (C) 2019 reMarkable AS - http://www.remarkable.com/
13 model = "reMarkable 2.0";
14 compatible = "remarkable,imx7d-remarkable2", "fsl,imx7d";
21 device_type = "memory";
22 reg = <0x80000000 0x40000000>;
27 assigned-clocks = <&clks IMX7D_CLKO2_ROOT_SRC>,
28 <&clks IMX7D_CLKO2_ROOT_DIV>;
29 assigned-clock-parents = <&clks IMX7D_CKIL>;
30 assigned-clock-rates = <0>, <32768>;
38 pinctrl-names = "default";
39 pinctrl-0 = <&pinctrl_uart1>;
40 assigned-clocks = <&clks IMX7D_UART1_ROOT_SRC>;
41 assigned-clock-parents = <&clks IMX7D_OSC_24M_CLK>;
46 pinctrl-names = "default";
47 pinctrl-0 = <&pinctrl_uart6>;
48 assigned-clocks = <&clks IMX7D_UART6_ROOT_SRC>;
49 assigned-clock-parents = <&clks IMX7D_OSC_24M_CLK>;
60 pinctrl-names = "default", "state_100mhz", "state_200mhz", "sleep";
61 pinctrl-0 = <&pinctrl_usdhc3>;
62 pinctrl-1 = <&pinctrl_usdhc3_100mhz>;
63 pinctrl-2 = <&pinctrl_usdhc3_200mhz>;
64 pinctrl-3 = <&pinctrl_usdhc3>;
65 assigned-clocks = <&clks IMX7D_USDHC3_ROOT_CLK>;
66 assigned-clock-rates = <400000000>;
73 pinctrl-names = "default";
74 pinctrl-0 = <&pinctrl_wdog>;
79 pinctrl_uart1: uart1grp {
81 MX7D_PAD_UART1_TX_DATA__UART1_DCE_TX 0x79
82 MX7D_PAD_UART1_RX_DATA__UART1_DCE_RX 0x79
86 pinctrl_uart6: uart6grp {
88 MX7D_PAD_EPDC_DATA09__UART6_DCE_TX 0x79
89 MX7D_PAD_EPDC_DATA08__UART6_DCE_RX 0x79
93 pinctrl_usdhc3: usdhc3grp {
95 MX7D_PAD_SD3_CMD__SD3_CMD 0x59
96 MX7D_PAD_SD3_CLK__SD3_CLK 0x19
97 MX7D_PAD_SD3_DATA0__SD3_DATA0 0x59
98 MX7D_PAD_SD3_DATA1__SD3_DATA1 0x59
99 MX7D_PAD_SD3_DATA2__SD3_DATA2 0x59
100 MX7D_PAD_SD3_DATA3__SD3_DATA3 0x59
101 MX7D_PAD_SD3_DATA4__SD3_DATA4 0x59
102 MX7D_PAD_SD3_DATA5__SD3_DATA5 0x59
103 MX7D_PAD_SD3_DATA6__SD3_DATA6 0x59
104 MX7D_PAD_SD3_DATA7__SD3_DATA7 0x59
105 MX7D_PAD_SD3_STROBE__SD3_STROBE 0x19
109 pinctrl_usdhc3_100mhz: usdhc3grp_100mhz {
111 MX7D_PAD_SD3_CMD__SD3_CMD 0x5a
112 MX7D_PAD_SD3_CLK__SD3_CLK 0x1a
113 MX7D_PAD_SD3_DATA0__SD3_DATA0 0x5a
114 MX7D_PAD_SD3_DATA1__SD3_DATA1 0x5a
115 MX7D_PAD_SD3_DATA2__SD3_DATA2 0x5a
116 MX7D_PAD_SD3_DATA3__SD3_DATA3 0x5a
117 MX7D_PAD_SD3_DATA4__SD3_DATA4 0x5a
118 MX7D_PAD_SD3_DATA5__SD3_DATA5 0x5a
119 MX7D_PAD_SD3_DATA6__SD3_DATA6 0x5a
120 MX7D_PAD_SD3_DATA7__SD3_DATA7 0x5a
121 MX7D_PAD_SD3_STROBE__SD3_STROBE 0x1a
125 pinctrl_usdhc3_200mhz: usdhc3grp_200mhz {
127 MX7D_PAD_SD3_CMD__SD3_CMD 0x5b
128 MX7D_PAD_SD3_CLK__SD3_CLK 0x1b
129 MX7D_PAD_SD3_DATA0__SD3_DATA0 0x5b
130 MX7D_PAD_SD3_DATA1__SD3_DATA1 0x5b
131 MX7D_PAD_SD3_DATA2__SD3_DATA2 0x5b
132 MX7D_PAD_SD3_DATA3__SD3_DATA3 0x5b
133 MX7D_PAD_SD3_DATA4__SD3_DATA4 0x5b
134 MX7D_PAD_SD3_DATA5__SD3_DATA5 0x5b
135 MX7D_PAD_SD3_DATA6__SD3_DATA6 0x5b
136 MX7D_PAD_SD3_DATA7__SD3_DATA7 0x5b
137 MX7D_PAD_SD3_STROBE__SD3_STROBE 0x1b
141 pinctrl_wdog: wdoggrp {
143 MX7D_PAD_ENET1_COL__WDOG1_WDOG_ANY 0x74