4 * This file is dual-licensed: you can use it either under the terms
5 * of the GPL or the X11 license, at your option. Note that this dual
6 * licensing only applies to this file, and not this project as a
9 * a) This file is free software; you can redistribute it and/or
10 * modify it under the terms of the GNU General Public License as
11 * published by the Free Software Foundation; either version 2 of the
12 * License, or (at your option) any later version.
14 * This file is distributed in the hope that it will be useful,
15 * but WITHOUT ANY WARRANTY; without even the implied warranty of
16 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
17 * GNU General Public License for more details.
21 * b) Permission is hereby granted, free of charge, to any person
22 * obtaining a copy of this software and associated documentation
23 * files (the "Software"), to deal in the Software without
24 * restriction, including without limitation the rights to use,
25 * copy, modify, merge, publish, distribute, sublicense, and/or
26 * sell copies of the Software, and to permit persons to whom the
27 * Software is furnished to do so, subject to the following
30 * The above copyright notice and this permission notice shall be
31 * included in all copies or substantial portions of the Software.
33 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
34 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
35 * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
36 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
37 * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
38 * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
39 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
40 * OTHER DEALINGS IN THE SOFTWARE.
48 model = "Technexion Pico i.MX7D Board";
49 compatible = "technexion,imx7d-pico", "fsl,imx7d";
52 reg = <0x80000000 0x80000000>;
55 reg_ap6212: regulator-ap6212 {
56 compatible = "regulator-fixed";
57 pinctrl-names = "default";
58 pinctrl-0 = <&pinctrl_reg_ap6212>;
59 regulator-name = "AP6212";
60 regulator-min-microvolt = <3300000>;
61 regulator-max-microvolt = <3300000>;
62 gpio = <&gpio4 16 GPIO_ACTIVE_HIGH>;
66 reg_2p5v: regulator-2p5v {
67 compatible = "regulator-fixed";
68 regulator-name = "2P5V";
69 regulator-min-microvolt = <2500000>;
70 regulator-max-microvolt = <2500000>;
74 reg_3p3v: regulator-3p3v {
75 compatible = "regulator-fixed";
76 regulator-name = "3P3V";
77 regulator-min-microvolt = <3300000>;
78 regulator-max-microvolt = <3300000>;
82 reg_usb_otg1_vbus: regulator-usb-otg1-vbus {
83 compatible = "regulator-fixed";
84 regulator-name = "usb_otg1_vbus";
85 regulator-min-microvolt = <5000000>;
86 regulator-max-microvolt = <5000000>;
87 gpio = <&gpio4 5 GPIO_ACTIVE_LOW>;
90 reg_usb_otg2_vbus: regulator-usb-otg2-vbus {
91 compatible = "regulator-fixed";
92 regulator-name = "usb_otg2_vbus";
93 regulator-min-microvolt = <5000000>;
94 regulator-max-microvolt = <5000000>;
97 reg_vref_1v8: regulator-vref-1v8 {
98 compatible = "regulator-fixed";
99 regulator-name = "vref-1v8";
100 regulator-min-microvolt = <1800000>;
101 regulator-max-microvolt = <1800000>;
105 compatible = "simple-audio-card";
106 simple-audio-card,name = "imx7-sgtl5000";
107 simple-audio-card,format = "i2s";
108 simple-audio-card,bitclock-master = <&dailink_master>;
109 simple-audio-card,frame-master = <&dailink_master>;
110 simple-audio-card,cpu {
114 dailink_master: simple-audio-card,codec {
115 sound-dai = <&codec>;
116 clocks = <&clks IMX7D_AUDIO_MCLK_ROOT_CLK>;
122 pinctrl-names = "default";
123 pinctrl-0 = <&pinctrl_enet1>;
124 assigned-clocks = <&clks IMX7D_ENET1_TIME_ROOT_SRC>,
125 <&clks IMX7D_ENET1_TIME_ROOT_CLK>;
126 assigned-clock-parents = <&clks IMX7D_PLL_ENET_MAIN_100M_CLK>;
127 assigned-clock-rates = <0>, <100000000>;
129 phy-handle = <ðphy0>;
134 #address-cells = <1>;
137 ethphy0: ethernet-phy@1 {
138 compatible = "ethernet-phy-ieee802.3-c22";
146 clock-frequency = <100000>;
147 pinctrl-names = "default";
148 pinctrl-0 = <&pinctrl_i2c1>;
152 #sound-dai-cells = <0>;
154 compatible = "fsl,sgtl5000";
155 clocks = <&clks IMX7D_AUDIO_MCLK_ROOT_CLK>;
156 VDDA-supply = <®_2p5v>;
157 VDDIO-supply = <®_vref_1v8>;
162 pinctrl-names = "default";
163 pinctrl-0 = <&pinctrl_i2c4>;
167 compatible = "fsl,pfuze3000";
172 regulator-min-microvolt = <700000>;
173 regulator-max-microvolt = <3300000>;
176 regulator-ramp-delay = <6250>;
178 /* use sw1c_reg to align with pfuze100/pfuze200 */
180 regulator-min-microvolt = <700000>;
181 regulator-max-microvolt = <1475000>;
184 regulator-ramp-delay = <6250>;
188 regulator-min-microvolt = <1800000>;
189 regulator-max-microvolt = <1850000>;
195 regulator-min-microvolt = <900000>;
196 regulator-max-microvolt = <1650000>;
202 regulator-min-microvolt = <5000000>;
203 regulator-max-microvolt = <5150000>;
207 regulator-min-microvolt = <1000000>;
208 regulator-max-microvolt = <3000000>;
219 regulator-min-microvolt = <1800000>;
220 regulator-max-microvolt = <3300000>;
225 regulator-min-microvolt = <800000>;
226 regulator-max-microvolt = <1550000>;
230 regulator-min-microvolt = <2850000>;
231 regulator-max-microvolt = <3300000>;
236 regulator-min-microvolt = <2850000>;
237 regulator-max-microvolt = <3300000>;
242 regulator-min-microvolt = <1800000>;
243 regulator-max-microvolt = <3300000>;
248 regulator-min-microvolt = <1800000>;
249 regulator-max-microvolt = <3300000>;
257 pinctrl-names = "default";
258 pinctrl-0 = <&pinctrl_sai1>;
259 assigned-clocks = <&clks IMX7D_SAI1_ROOT_SRC>,
260 <&clks IMX7D_SAI1_ROOT_CLK>;
261 assigned-clock-parents = <&clks IMX7D_PLL_AUDIO_POST_DIV>;
262 assigned-clock-rates = <0>, <24576000>;
267 pinctrl-names = "default";
268 pinctrl-0 = <&pinctrl_uart5>;
269 assigned-clocks = <&clks IMX7D_UART5_ROOT_SRC>;
270 assigned-clock-parents = <&clks IMX7D_PLL_SYS_MAIN_240M_CLK>;
275 vbus-supply = <®_usb_otg1_vbus>;
280 vbus-supply = <®_usb_otg2_vbus>;
285 &usdhc2 { /* Wifi SDIO */
286 pinctrl-names = "default";
287 pinctrl-0 = <&pinctrl_usdhc2>;
290 keep-power-in-suspend;
292 vmmc-supply = <®_ap6212>;
297 pinctrl-names = "default", "state_100mhz", "state_200mhz";
298 pinctrl-0 = <&pinctrl_usdhc3>;
299 pinctrl-1 = <&pinctrl_usdhc3_100mhz>;
300 pinctrl-2 = <&pinctrl_usdhc3_200mhz>;
301 assigned-clocks = <&clks IMX7D_USDHC3_ROOT_CLK>;
302 assigned-clock-rates = <400000000>;
305 fsl,tuning-step = <2>;
311 pinctrl-names = "default";
312 pinctrl-0 = <&pinctrl_wdog>;
313 fsl,ext-reset-output;
318 pinctrl_enet1: enet1grp {
320 MX7D_PAD_SD2_CD_B__ENET1_MDIO 0x3
321 MX7D_PAD_SD2_WP__ENET1_MDC 0x3
322 MX7D_PAD_ENET1_RGMII_TXC__ENET1_RGMII_TXC 0x1
323 MX7D_PAD_ENET1_RGMII_TD0__ENET1_RGMII_TD0 0x1
324 MX7D_PAD_ENET1_RGMII_TD1__ENET1_RGMII_TD1 0x1
325 MX7D_PAD_ENET1_RGMII_TD2__ENET1_RGMII_TD2 0x1
326 MX7D_PAD_ENET1_RGMII_TD3__ENET1_RGMII_TD3 0x1
327 MX7D_PAD_ENET1_RGMII_TX_CTL__ENET1_RGMII_TX_CTL 0x1
328 MX7D_PAD_ENET1_RGMII_RXC__ENET1_RGMII_RXC 0x1
329 MX7D_PAD_ENET1_RGMII_RD0__ENET1_RGMII_RD0 0x1
330 MX7D_PAD_ENET1_RGMII_RD1__ENET1_RGMII_RD1 0x1
331 MX7D_PAD_ENET1_RGMII_RD2__ENET1_RGMII_RD2 0x1
332 MX7D_PAD_ENET1_RGMII_RD3__ENET1_RGMII_RD3 0x1
333 MX7D_PAD_ENET1_RGMII_RX_CTL__ENET1_RGMII_RX_CTL 0x1
337 pinctrl_i2c1: i2c1grp {
339 MX7D_PAD_UART1_TX_DATA__I2C1_SDA 0x4000007f
340 MX7D_PAD_UART1_RX_DATA__I2C1_SCL 0x4000007f
344 pinctrl_i2c4: i2c4grp {
346 MX7D_PAD_SAI1_RX_BCLK__I2C4_SDA 0x4000007f
347 MX7D_PAD_SAI1_RX_SYNC__I2C4_SCL 0x4000007f
351 pinctrl_reg_ap6212: regap6212grp {
353 MX7D_PAD_ECSPI1_SCLK__GPIO4_IO16 0x59
357 pinctrl_sai1: sai1grp {
359 MX7D_PAD_ENET1_RX_CLK__SAI1_TX_BCLK 0x1f
360 MX7D_PAD_ENET1_CRS__SAI1_TX_SYNC 0x1f
361 MX7D_PAD_ENET1_COL__SAI1_TX_DATA0 0x30
362 MX7D_PAD_ENET1_TX_CLK__SAI1_RX_DATA0 0x1f
366 pinctrl_uart5: uart5grp {
368 MX7D_PAD_I2C4_SDA__UART5_DCE_TX 0x79
369 MX7D_PAD_I2C4_SCL__UART5_DCE_RX 0x79
373 pinctrl_usbotg1_pwr: usbotg_pwr {
375 MX7D_PAD_UART3_TX_DATA__GPIO4_IO5 0x14
379 pinctrl_usdhc2: usdhc2grp {
381 MX7D_PAD_SD2_CMD__SD2_CMD 0x59
382 MX7D_PAD_SD2_CLK__SD2_CLK 0x19
383 MX7D_PAD_SD2_DATA0__SD2_DATA0 0x59
384 MX7D_PAD_SD2_DATA1__SD2_DATA1 0x59
385 MX7D_PAD_SD2_DATA2__SD2_DATA2 0x59
386 MX7D_PAD_SD2_DATA3__SD2_DATA3 0x59
390 pinctrl_usdhc3: usdhc3grp {
392 MX7D_PAD_SD3_CMD__SD3_CMD 0x59
393 MX7D_PAD_SD3_CLK__SD3_CLK 0x19
394 MX7D_PAD_SD3_DATA0__SD3_DATA0 0x59
395 MX7D_PAD_SD3_DATA1__SD3_DATA1 0x59
396 MX7D_PAD_SD3_DATA2__SD3_DATA2 0x59
397 MX7D_PAD_SD3_DATA3__SD3_DATA3 0x59
398 MX7D_PAD_SD3_DATA4__SD3_DATA4 0x59
399 MX7D_PAD_SD3_DATA5__SD3_DATA5 0x59
400 MX7D_PAD_SD3_DATA6__SD3_DATA6 0x59
401 MX7D_PAD_SD3_DATA7__SD3_DATA7 0x59
405 pinctrl_usdhc3_100mhz: usdhc3grp_100mhz {
407 MX7D_PAD_SD3_CMD__SD3_CMD 0x5a
408 MX7D_PAD_SD3_CLK__SD3_CLK 0x1a
409 MX7D_PAD_SD3_DATA0__SD3_DATA0 0x5a
410 MX7D_PAD_SD3_DATA1__SD3_DATA1 0x5a
411 MX7D_PAD_SD3_DATA2__SD3_DATA2 0x5a
412 MX7D_PAD_SD3_DATA3__SD3_DATA3 0x5a
413 MX7D_PAD_SD3_DATA4__SD3_DATA4 0x5a
414 MX7D_PAD_SD3_DATA5__SD3_DATA5 0x5a
415 MX7D_PAD_SD3_DATA6__SD3_DATA6 0x5a
416 MX7D_PAD_SD3_DATA7__SD3_DATA7 0x5a
420 pinctrl_usdhc3_200mhz: usdhc3grp_200mhz {
422 MX7D_PAD_SD3_CMD__SD3_CMD 0x5b
423 MX7D_PAD_SD3_CLK__SD3_CLK 0x1b
424 MX7D_PAD_SD3_DATA0__SD3_DATA0 0x5b
425 MX7D_PAD_SD3_DATA1__SD3_DATA1 0x5b
426 MX7D_PAD_SD3_DATA2__SD3_DATA2 0x5b
427 MX7D_PAD_SD3_DATA3__SD3_DATA3 0x5b
428 MX7D_PAD_SD3_DATA4__SD3_DATA4 0x5b
429 MX7D_PAD_SD3_DATA5__SD3_DATA5 0x5b
430 MX7D_PAD_SD3_DATA6__SD3_DATA6 0x5b
431 MX7D_PAD_SD3_DATA7__SD3_DATA7 0x5b
437 pinctrl_wdog: wdoggrp {
439 MX7D_PAD_LPSR_GPIO1_IO00__WDOG1_WDOG_B 0x74