arch/arm/boot/dts/imx6sx-sabreauto.dts

   1 /*
   2  * Copyright (C) 2014 Freescale Semiconductor, Inc.
   3  *
   4  * This program is free software; you can redistribute it and/or modify
   5  * it under the terms of the GNU General Public License version 2 as
   6  * published by the Free Software Foundation.
   7  */
   8
   9 /dts-v1/;
  10
  11 #include "imx6sx.dtsi"
  12
  13 / {
  14         model = "Freescale i.MX6 SoloX Sabre Auto Board";
  15         compatible = "fsl,imx6sx-sabreauto", "fsl,imx6sx";
  16
  17         memory@80000000 {
  18                 reg = <0x80000000 0x80000000>;
  19         };
  20
  21         vcc_sd3: regulator-vcc-sd3 {
  22                 compatible = "regulator-fixed";
  23                 pinctrl-names = "default";
  24                 pinctrl-0 = <&pinctrl_vcc_sd3>;
  25                 regulator-name = "VCC_SD3";
  26                 regulator-min-microvolt = <3000000>;
  27                 regulator-max-microvolt = <3000000>;
  28                 gpio = <&gpio2 11 GPIO_ACTIVE_HIGH>;
  29                 enable-active-high;
  30         };
  31 };
  32
  33 &anaclk2 {
  34         clock-frequency = <24576000>;
  35 };
  36
  37 &fec1 {
  38         pinctrl-names = "default";
  39         pinctrl-0 = <&pinctrl_enet1>;
  40         phy-mode = "rgmii";
  41         phy-handle = <&ethphy1>;
  42         fsl,magic-packet;
  43         status = "okay";
  44
  45         mdio {
  46                 #address-cells = <1>;
  47                 #size-cells = <0>;
  48
  49                 ethphy0: ethernet-phy@0 {
  50                         compatible = "ethernet-phy-ieee802.3-c22";
  51                         reg = <0>;
  52                 };
  53
  54                 ethphy1: ethernet-phy@1 {
  55                         compatible = "ethernet-phy-ieee802.3-c22";
  56                         reg = <1>;
  57                 };
  58         };
  59 };
  60
  61 &fec2 {
  62         pinctrl-names = "default";
  63         pinctrl-0 = <&pinctrl_enet2>;
  64         phy-mode = "rgmii";
  65         phy-handle = <&ethphy0>;
  66         fsl,magic-packet;
  67         status = "okay";
  68 };
  69
  70 &uart1 {
  71         pinctrl-names = "default";
  72         pinctrl-0 = <&pinctrl_uart1>;
  73         status = "okay";
  74 };
  75
  76 &usdhc3 {
  77         pinctrl-names = "default", "state_100mhz", "state_200mhz";
  78         pinctrl-0 = <&pinctrl_usdhc3>;
  79         pinctrl-1 = <&pinctrl_usdhc3_100mhz>;
  80         pinctrl-2 = <&pinctrl_usdhc3_200mhz>;
  81         bus-width = <8>;
  82         cd-gpios = <&gpio7 10 GPIO_ACTIVE_LOW>;
  83         wp-gpios = <&gpio3 19 GPIO_ACTIVE_HIGH>;
  84         keep-power-in-suspend;
  85         wakeup-source;
  86         vmmc-supply = <&vcc_sd3>;
  87         status = "okay";
  88 };
  89
  90 &usdhc4 {
  91         pinctrl-names = "default";
  92         pinctrl-0 = <&pinctrl_usdhc4>;
  93         bus-width = <8>;
  94         cd-gpios = <&gpio7 11 GPIO_ACTIVE_LOW>;
  95         no-1-8-v;
  96         keep-power-in-suspend;
  97         wakeup-source;
  98         status = "okay";
  99 };
 100
 101 &iomuxc {
 102         pinctrl_enet1: enet1grp {
 103                 fsl,pins = <
 104                         MX6SX_PAD_ENET1_MDIO__ENET1_MDIO        0xa0b1
 105                         MX6SX_PAD_ENET1_MDC__ENET1_MDC          0xa0b1
 106                         MX6SX_PAD_RGMII1_TXC__ENET1_RGMII_TXC   0xa0b9
 107                         MX6SX_PAD_RGMII1_TD0__ENET1_TX_DATA_0   0xa0b1
 108                         MX6SX_PAD_RGMII1_TD1__ENET1_TX_DATA_1   0xa0b1
 109                         MX6SX_PAD_RGMII1_TD2__ENET1_TX_DATA_2   0xa0b1
 110                         MX6SX_PAD_RGMII1_TD3__ENET1_TX_DATA_3   0xa0b1
 111                         MX6SX_PAD_RGMII1_TX_CTL__ENET1_TX_EN    0xa0b1
 112                         MX6SX_PAD_RGMII1_RXC__ENET1_RX_CLK      0x3081
 113                         MX6SX_PAD_RGMII1_RD0__ENET1_RX_DATA_0   0x3081
 114                         MX6SX_PAD_RGMII1_RD1__ENET1_RX_DATA_1   0x3081
 115                         MX6SX_PAD_RGMII1_RD2__ENET1_RX_DATA_2   0x3081
 116                         MX6SX_PAD_RGMII1_RD3__ENET1_RX_DATA_3   0x3081
 117                         MX6SX_PAD_RGMII1_RX_CTL__ENET1_RX_EN    0x3081
 118                 >;
 119         };
 120
 121         pinctrl_enet2: enet2grp {
 122                 fsl,pins = <
 123                         MX6SX_PAD_RGMII2_TXC__ENET2_RGMII_TXC   0xa0b9
 124                         MX6SX_PAD_RGMII2_TD0__ENET2_TX_DATA_0   0xa0b1
 125                         MX6SX_PAD_RGMII2_TD1__ENET2_TX_DATA_1   0xa0b1
 126                         MX6SX_PAD_RGMII2_TD2__ENET2_TX_DATA_2   0xa0b1
 127                         MX6SX_PAD_RGMII2_TD3__ENET2_TX_DATA_3   0xa0b1
 128                         MX6SX_PAD_RGMII2_TX_CTL__ENET2_TX_EN    0xa0b1
 129                         MX6SX_PAD_RGMII2_RXC__ENET2_RX_CLK      0x3081
 130                         MX6SX_PAD_RGMII2_RD0__ENET2_RX_DATA_0   0x3081
 131                         MX6SX_PAD_RGMII2_RD1__ENET2_RX_DATA_1   0x3081
 132                         MX6SX_PAD_RGMII2_RD2__ENET2_RX_DATA_2   0x3081
 133                         MX6SX_PAD_RGMII2_RD3__ENET2_RX_DATA_3   0x3081
 134                         MX6SX_PAD_RGMII2_RX_CTL__ENET2_RX_EN    0x3081
 135                 >;
 136         };
 137
 138         pinctrl_i2c2: i2c2grp {
 139                 fsl,pins = <
 140                         MX6SX_PAD_GPIO1_IO03__I2C2_SDA          0x4001b8b1
 141                         MX6SX_PAD_GPIO1_IO02__I2C2_SCL          0x4001b8b1
 142                 >;
 143         };
 144
 145         pinctrl_i2c3: i2c3grp {
 146                 fsl,pins = <
 147                         MX6SX_PAD_KEY_ROW4__I2C3_SDA            0x4001b8b1
 148                         MX6SX_PAD_KEY_COL4__I2C3_SCL            0x4001b8b1
 149                 >;
 150         };
 151
 152         pinctrl_uart1: uart1grp {
 153                 fsl,pins = <
 154                         MX6SX_PAD_GPIO1_IO04__UART1_TX          0x1b0b1
 155                         MX6SX_PAD_GPIO1_IO05__UART1_RX          0x1b0b1
 156                 >;
 157         };
 158
 159         pinctrl_usdhc3: usdhc3grp {
 160                 fsl,pins = <
 161                         MX6SX_PAD_SD3_CMD__USDHC3_CMD           0x17059
 162                         MX6SX_PAD_SD3_CLK__USDHC3_CLK           0x10059
 163                         MX6SX_PAD_SD3_DATA0__USDHC3_DATA0       0x17059
 164                         MX6SX_PAD_SD3_DATA1__USDHC3_DATA1       0x17059
 165                         MX6SX_PAD_SD3_DATA2__USDHC3_DATA2       0x17059
 166                         MX6SX_PAD_SD3_DATA3__USDHC3_DATA3       0x17059
 167                         MX6SX_PAD_SD3_DATA4__USDHC3_DATA4       0x17059
 168                         MX6SX_PAD_SD3_DATA5__USDHC3_DATA5       0x17059
 169                         MX6SX_PAD_SD3_DATA6__USDHC3_DATA6       0x17059
 170                         MX6SX_PAD_SD3_DATA7__USDHC3_DATA7       0x17059
 171                         MX6SX_PAD_KEY_COL0__GPIO2_IO_10         0x17059 /* CD */
 172                         MX6SX_PAD_KEY_ROW0__GPIO2_IO_15         0x17059 /* WP */
 173                 >;
 174         };
 175
 176         pinctrl_usdhc3_100mhz: usdhc3grp-100mhz {
 177                 fsl,pins = <
 178                         MX6SX_PAD_SD3_CMD__USDHC3_CMD           0x170b9
 179                         MX6SX_PAD_SD3_CLK__USDHC3_CLK           0x100b9
 180                         MX6SX_PAD_SD3_DATA0__USDHC3_DATA0       0x170b9
 181                         MX6SX_PAD_SD3_DATA1__USDHC3_DATA1       0x170b9
 182                         MX6SX_PAD_SD3_DATA2__USDHC3_DATA2       0x170b9
 183                         MX6SX_PAD_SD3_DATA3__USDHC3_DATA3       0x170b9
 184                         MX6SX_PAD_SD3_DATA4__USDHC3_DATA4       0x170b9
 185                         MX6SX_PAD_SD3_DATA5__USDHC3_DATA5       0x170b9
 186                         MX6SX_PAD_SD3_DATA6__USDHC3_DATA6       0x170b9
 187                         MX6SX_PAD_SD3_DATA7__USDHC3_DATA7       0x170b9
 188                 >;
 189         };
 190
 191         pinctrl_usdhc3_200mhz: usdhc3grp-200mhz {
 192                 fsl,pins = <
 193                         MX6SX_PAD_SD3_CMD__USDHC3_CMD           0x170f9
 194                         MX6SX_PAD_SD3_CLK__USDHC3_CLK           0x100f9
 195                         MX6SX_PAD_SD3_DATA0__USDHC3_DATA0       0x170f9
 196                         MX6SX_PAD_SD3_DATA1__USDHC3_DATA1       0x170f9
 197                         MX6SX_PAD_SD3_DATA2__USDHC3_DATA2       0x170f9
 198                         MX6SX_PAD_SD3_DATA3__USDHC3_DATA3       0x170f9
 199                         MX6SX_PAD_SD3_DATA4__USDHC3_DATA4       0x170f9
 200                         MX6SX_PAD_SD3_DATA5__USDHC3_DATA5       0x170f9
 201                         MX6SX_PAD_SD3_DATA6__USDHC3_DATA6       0x170f9
 202                         MX6SX_PAD_SD3_DATA7__USDHC3_DATA7       0x170f9
 203                 >;
 204         };
 205
 206         pinctrl_usdhc4: usdhc4grp {
 207                 fsl,pins = <
 208                         MX6SX_PAD_SD4_CMD__USDHC4_CMD           0x17059
 209                         MX6SX_PAD_SD4_CLK__USDHC4_CLK           0x10059
 210                         MX6SX_PAD_SD4_DATA0__USDHC4_DATA0       0x17059
 211                         MX6SX_PAD_SD4_DATA1__USDHC4_DATA1       0x17059
 212                         MX6SX_PAD_SD4_DATA2__USDHC4_DATA2       0x17059
 213                         MX6SX_PAD_SD4_DATA3__USDHC4_DATA3       0x17059
 214                         MX6SX_PAD_SD4_DATA7__GPIO6_IO_21        0x17059 /* CD */
 215                         MX6SX_PAD_SD4_DATA6__GPIO6_IO_20        0x17059 /* WP */
 216                 >;
 217         };
 218
 219         pinctrl_vcc_sd3: vccsd3grp {
 220                 fsl,pins = <
 221                         MX6SX_PAD_KEY_COL1__GPIO2_IO_11         0x17059
 222                 >;
 223         };
 224
 225         pinctrl_wdog: wdoggrp {
 226                 fsl,pins = <
 227                         MX6SX_PAD_GPIO1_IO13__WDOG1_WDOG_ANY    0x30b0
 228                 >;
 229         };
 230 };
 231
 232 &i2c2 {
 233         clock-frequency = <100000>;
 234         pinctrl-names = "default";
 235         pinctrl-0 = <&pinctrl_i2c2>;
 236         status = "okay";
 237
 238         pfuze100: pmic@8 {
 239                 compatible = "fsl,pfuze100";
 240                 reg = <0x08>;
 241
 242                 regulators {
 243                         sw1a_reg: sw1ab {
 244                                 regulator-min-microvolt = <300000>;
 245                                 regulator-max-microvolt = <1875000>;
 246                                 regulator-boot-on;
 247                                 regulator-always-on;
 248                                 regulator-ramp-delay = <6250>;
 249                         };
 250
 251                         sw1c_reg: sw1c {
 252                                 regulator-min-microvolt = <300000>;
 253                                 regulator-max-microvolt = <1875000>;
 254                                 regulator-boot-on;
 255                                 regulator-always-on;
 256                                 regulator-ramp-delay = <6250>;
 257                         };
 258
 259                         sw2_reg: sw2 {
 260                                 regulator-min-microvolt = <800000>;
 261                                 regulator-max-microvolt = <3300000>;
 262                                 regulator-boot-on;
 263                                 regulator-always-on;
 264                         };
 265
 266                         sw3a_reg: sw3a {
 267                                 regulator-min-microvolt = <400000>;
 268                                 regulator-max-microvolt = <1975000>;
 269                                 regulator-boot-on;
 270                                 regulator-always-on;
 271                         };
 272
 273                         sw3b_reg: sw3b {
 274                                 regulator-min-microvolt = <400000>;
 275                                 regulator-max-microvolt = <1975000>;
 276                                 regulator-boot-on;
 277                                 regulator-always-on;
 278                         };
 279
 280                         sw4_reg: sw4 {
 281                                 regulator-min-microvolt = <800000>;
 282                                 regulator-max-microvolt = <3300000>;
 283                                 regulator-always-on;
 284                         };
 285
 286                         swbst_reg: swbst {
 287                                 regulator-min-microvolt = <5000000>;
 288                                 regulator-max-microvolt = <5150000>;
 289                         };
 290
 291                         snvs_reg: vsnvs {
 292                                 regulator-min-microvolt = <1000000>;
 293                                 regulator-max-microvolt = <3000000>;
 294                                 regulator-boot-on;
 295                                 regulator-always-on;
 296                         };
 297
 298                         vref_reg: vrefddr {
 299                                 regulator-boot-on;
 300                                 regulator-always-on;
 301                         };
 302
 303                         vgen1_reg: vgen1 {
 304                                 regulator-min-microvolt = <800000>;
 305                                 regulator-max-microvolt = <1550000>;
 306                                 regulator-always-on;
 307                         };
 308
 309                         vgen2_reg: vgen2 {
 310                                 regulator-min-microvolt = <800000>;
 311                                 regulator-max-microvolt = <1550000>;
 312                         };
 313
 314                         vgen3_reg: vgen3 {
 315                                 regulator-min-microvolt = <1800000>;
 316                                 regulator-max-microvolt = <3300000>;
 317                                 regulator-always-on;
 318                         };
 319
 320                         vgen4_reg: vgen4 {
 321                                 regulator-min-microvolt = <1800000>;
 322                                 regulator-max-microvolt = <3300000>;
 323                                 regulator-always-on;
 324                         };
 325
 326                         vgen5_reg: vgen5 {
 327                                 regulator-min-microvolt = <1800000>;
 328                                 regulator-max-microvolt = <3300000>;
 329                                 regulator-always-on;
 330                         };
 331
 332                         vgen6_reg: vgen6 {
 333                                 regulator-min-microvolt = <1800000>;
 334                                 regulator-max-microvolt = <3300000>;
 335                                 regulator-always-on;
 336                         };
 337                 };
 338         };
 339
 340         max7322: gpio@68 {
 341                 compatible = "maxim,max7322";
 342                 reg = <0x68>;
 343                 gpio-controller;
 344                 #gpio-cells = <2>;
 345         };
 346 };
 347
 348 &i2c3 {
 349         clock-frequency = <100000>;
 350         pinctrl-names = "default";
 351         pinctrl-0 = <&pinctrl_i2c3>;
 352         status = "okay";
 353
 354         max7310_a: gpio@30 {
 355                 compatible = "maxim,max7310";
 356                 reg = <0x30>;
 357                 gpio-controller;
 358                 #gpio-cells = <2>;
 359         };
 360
 361         max7310_b: gpio@32 {
 362                 compatible = "maxim,max7310";
 363                 reg = <0x32>;
 364                 gpio-controller;
 365                 #gpio-cells = <2>;
 366         };
 367 };
 368
 369 &wdog1 {
 370         pinctrl-names = "default";
 371         pinctrl-0 = <&pinctrl_wdog>;
 372         fsl,ext-reset-output;
 373 };