Merge branch '40GbE' of git://git.kernel.org/pub/scm/linux/kernel/git/tnguy/net-queue
[linux-2.6-microblaze.git] / arch / arm / boot / dts / imx6sl-tolino-shine2hd.dts
1 // SPDX-License-Identifier: GPL-2.0
2 /*
3  * Device tree for the Tolino Shine 2 HD ebook reader
4  *
5  * Name on mainboard is: 37NB-E60QF0+4A2 or 37NB-E60QF0+4A3
6  * Serials start with: E60QF2
7  *
8  * Copyright 2020 Andreas Kemnade
9  */
10
11 /dts-v1/;
12
13 #include <dt-bindings/input/input.h>
14 #include <dt-bindings/gpio/gpio.h>
15 #include "imx6sl.dtsi"
16
17 / {
18         model = "Tolino Shine 2 HD";
19         compatible = "kobo,tolino-shine2hd", "fsl,imx6sl";
20
21         chosen {
22                 stdout-path = &uart1;
23         };
24
25         gpio_keys: gpio-keys {
26                 compatible = "gpio-keys";
27                 pinctrl-names = "default";
28                 pinctrl-0 = <&pinctrl_gpio_keys>;
29
30                 cover {
31                         label = "Cover";
32                         gpios = <&gpio5 12 GPIO_ACTIVE_LOW>;
33                         linux,code = <SW_LID>;
34                         linux,input-type = <EV_SW>;
35                         wakeup-source;
36                 };
37
38                 fl {
39                         label = "Frontlight";
40                         gpios = <&gpio3 26 GPIO_ACTIVE_LOW>;
41                         linux,code = <KEY_BRIGHTNESS_CYCLE>;
42                 };
43
44                 home {
45                         label = "Home";
46                         gpios = <&gpio3 25 GPIO_ACTIVE_LOW>;
47                         linux,code = <KEY_HOME>;
48                 };
49
50                 power {
51                         label = "Power";
52                         gpios = <&gpio5 8 GPIO_ACTIVE_LOW>;
53                         linux,code = <KEY_POWER>;
54                         wakeup-source;
55                 };
56         };
57
58         leds: leds {
59                 compatible = "gpio-leds";
60                 pinctrl-names = "default";
61                 pinctrl-0 = <&pinctrl_led>;
62
63                 on {
64                         label = "tolinoshine2hd:white:on";
65                         gpios = <&gpio5 13 GPIO_ACTIVE_LOW>;
66                         linux,default-trigger = "timer";
67                 };
68         };
69
70         memory@80000000 {
71                 device_type = "memory";
72                 reg = <0x80000000 0x20000000>;
73         };
74
75         reg_wifi: regulator-wifi {
76                 compatible = "regulator-fixed";
77                 pinctrl-names = "default";
78                 pinctrl-0 = <&pinctrl_wifi_power>;
79                 regulator-name = "SD3_SPWR";
80                 regulator-min-microvolt = <3000000>;
81                 regulator-max-microvolt = <3000000>;
82                 gpio = <&gpio4 29 GPIO_ACTIVE_LOW>;
83         };
84
85         wifi_pwrseq: wifi_pwrseq {
86                 compatible = "mmc-pwrseq-simple";
87                 pinctrl-names = "default";
88                 pinctrl-0 = <&pinctrl_wifi_reset>;
89                 post-power-on-delay-ms = <20>;
90                 reset-gpios = <&gpio5 0 GPIO_ACTIVE_LOW>;
91         };
92 };
93
94 &i2c1 {
95         pinctrl-names = "default","sleep";
96         pinctrl-0 = <&pinctrl_i2c1>;
97         pinctrl-1 = <&pinctrl_i2c1_sleep>;
98         status = "okay";
99
100         /* TODO: embedded controller at 0x43 (driver missing) */
101
102 };
103
104 &i2c2 {
105         pinctrl-names = "default","sleep";
106         pinctrl-0 = <&pinctrl_i2c2>;
107         pinctrl-1 = <&pinctrl_i2c2_sleep>;
108         clock-frequency = <100000>;
109         status = "okay";
110
111         zforce: touchscreen@50 {
112                 compatible = "neonode,zforce";
113                 pinctrl-names = "default";
114                 pinctrl-0 = <&pinctrl_zforce>;
115                 reg = <0x50>;
116                 interrupt-parent = <&gpio5>;
117                 interrupts = <6 IRQ_TYPE_EDGE_FALLING>;
118                 vdd-supply = <&ldo1_reg>;
119                 reset-gpios = <&gpio5 9 GPIO_ACTIVE_LOW>;
120                 x-size = <1072>;
121                 y-size = <1448>;
122         };
123
124         /* TODO: TPS65185 PMIC for E Ink at 0x68 */
125
126 };
127
128 &i2c3 {
129         pinctrl-names = "default";
130         pinctrl-0 = <&pinctrl_i2c3>;
131         clock-frequency = <400000>;
132         status = "okay";
133
134         ricoh619: pmic@32 {
135                 compatible = "ricoh,rc5t619";
136                 pinctrl-names = "default";
137                 pinctrl-0 = <&pinctrl_ricoh_gpio>;
138                 reg = <0x32>;
139                 interrupt-parent = <&gpio5>;
140                 interrupts = <11 IRQ_TYPE_EDGE_FALLING>;
141                 system-power-controller;
142
143                 regulators {
144                         dcdc1_reg: DCDC1 {
145                                 regulator-name = "DCDC1";
146                                 regulator-min-microvolt = <300000>;
147                                 regulator-max-microvolt = <1875000>;
148                                 regulator-always-on;
149                                 regulator-boot-on;
150
151                                 regulator-state-mem {
152                                         regulator-on-in-suspend;
153                                         regulator-suspend-max-microvolt = <900000>;
154                                         regulator-suspend-min-microvolt = <900000>;
155                                 };
156                         };
157
158                         /* Core3_3V3 */
159                         dcdc2_reg: DCDC2 {
160                                 regulator-name = "DCDC2";
161                                 regulator-always-on;
162                                 regulator-boot-on;
163
164                                 regulator-state-mem {
165                                         regulator-on-in-suspend;
166                                         regulator-suspend-max-microvolt = <3100000>;
167                                         regulator-suspend-min-microvolt = <3100000>;
168                                 };
169                         };
170
171                         dcdc3_reg: DCDC3 {
172                                 regulator-name = "DCDC3";
173                                 regulator-min-microvolt = <300000>;
174                                 regulator-max-microvolt = <1875000>;
175                                 regulator-always-on;
176                                 regulator-boot-on;
177
178                                 regulator-state-mem {
179                                         regulator-on-in-suspend;
180                                         regulator-suspend-max-microvolt = <1140000>;
181                                         regulator-suspend-min-microvolt = <1140000>;
182                                 };
183                         };
184
185                         /* Core4_1V2 */
186                         dcdc4_reg: DCDC4 {
187                                 regulator-name = "DCDC4";
188                                 regulator-min-microvolt = <1200000>;
189                                 regulator-max-microvolt = <1200000>;
190                                 regulator-always-on;
191                                 regulator-boot-on;
192
193                                 regulator-state-mem {
194                                         regulator-on-in-suspend;
195                                         regulator-suspend-max-microvolt = <1140000>;
196                                         regulator-suspend-min-microvolt = <1140000>;
197                                 };
198                         };
199
200                         /* Core4_1V8 */
201                         dcdc5_reg: DCDC5 {
202                                 regulator-name = "DCDC5";
203                                 regulator-min-microvolt = <1800000>;
204                                 regulator-max-microvolt = <1800000>;
205                                 regulator-always-on;
206                                 regulator-boot-on;
207
208                                 regulator-state-mem {
209                                         regulator-on-in-suspend;
210                                         regulator-suspend-max-microvolt = <1700000>;
211                                         regulator-suspend-min-microvolt = <1700000>;
212                                 };
213                         };
214
215                         /* IR_3V3 */
216                         ldo1_reg: LDO1  {
217                                 regulator-name = "LDO1";
218                                 regulator-boot-on;
219                         };
220
221                         /* Core1_3V3 */
222                         ldo2_reg: LDO2  {
223                                 regulator-name = "LDO2";
224                                 regulator-always-on;
225                                 regulator-boot-on;
226
227                                 regulator-state-mem {
228                                         regulator-on-in-suspend;
229                                         regulator-suspend-max-microvolt = <3000000>;
230                                         regulator-suspend-min-microvolt = <3000000>;
231                                 };
232                         };
233
234                         /* Core5_1V2 */
235                         ldo3_reg: LDO3  {
236                                 regulator-name = "LDO3";
237                                 regulator-always-on;
238                                 regulator-boot-on;
239                         };
240
241                         ldo4_reg: LDO4 {
242                                 regulator-name = "LDO4";
243                                 regulator-boot-on;
244                         };
245
246                         /* SPD_3V3 */
247                         ldo5_reg: LDO5 {
248                                 regulator-name = "LDO5";
249                                 regulator-always-on;
250                                 regulator-boot-on;
251                         };
252
253                         /* DDR_0V6 */
254                         ldo6_reg: LDO6 {
255                                 regulator-name = "LDO6";
256                                 regulator-always-on;
257                                 regulator-boot-on;
258                         };
259
260                         /* VDD_PWM */
261                         ldo7_reg: LDO7 {
262                                 regulator-name = "LDO7";
263                                 regulator-always-on;
264                                 regulator-boot-on;
265                         };
266
267                         /* ldo_1v8 */
268                         ldo8_reg: LDO8 {
269                                 regulator-name = "LDO8";
270                                 regulator-min-microvolt = <1800000>;
271                                 regulator-max-microvolt = <1800000>;
272                                 regulator-always-on;
273                                 regulator-boot-on;
274                         };
275
276                         ldo9_reg: LDO9 {
277                                 regulator-name = "LDO9";
278                                 regulator-boot-on;
279                         };
280
281                         ldo10_reg: LDO10 {
282                                 regulator-name = "LDO10";
283                                 regulator-boot-on;
284                         };
285
286                         ldortc1_reg: LDORTC1  {
287                                 regulator-name = "LDORTC1";
288                                 regulator-always-on;
289                                 regulator-boot-on;
290                         };
291                 };
292         };
293 };
294
295 &iomuxc {
296         pinctrl-names = "default";
297         pinctrl-0 = <&pinctrl_hog>;
298
299         pinctrl_gpio_keys: gpio-keysgrp {
300                 fsl,pins = <
301                         MX6SL_PAD_SD1_DAT1__GPIO5_IO08  0x17059
302                         MX6SL_PAD_SD1_DAT4__GPIO5_IO12  0x17059
303                         MX6SL_PAD_KEY_COL1__GPIO3_IO26  0x17059
304                         MX6SL_PAD_KEY_ROW0__GPIO3_IO25  0x17059
305                 >;
306         };
307
308         pinctrl_hog: hoggrp {
309                 fsl,pins = <
310                         MX6SL_PAD_LCD_DAT0__GPIO2_IO20  0x79
311                         MX6SL_PAD_LCD_DAT1__GPIO2_IO21  0x79
312                         MX6SL_PAD_LCD_DAT2__GPIO2_IO22  0x79
313                         MX6SL_PAD_LCD_DAT3__GPIO2_IO23  0x79
314                         MX6SL_PAD_LCD_DAT4__GPIO2_IO24  0x79
315                         MX6SL_PAD_LCD_DAT5__GPIO2_IO25  0x79
316                         MX6SL_PAD_LCD_DAT6__GPIO2_IO26  0x79
317                         MX6SL_PAD_LCD_DAT7__GPIO2_IO27  0x79
318                         MX6SL_PAD_LCD_DAT8__GPIO2_IO28  0x79
319                         MX6SL_PAD_LCD_DAT9__GPIO2_IO29  0x79
320                         MX6SL_PAD_LCD_DAT10__GPIO2_IO30 0x79
321                         MX6SL_PAD_LCD_DAT11__GPIO2_IO31 0x79
322                         MX6SL_PAD_LCD_DAT12__GPIO3_IO00 0x79
323                         MX6SL_PAD_LCD_DAT13__GPIO3_IO01 0x79
324                         MX6SL_PAD_LCD_DAT14__GPIO3_IO02 0x79
325                         MX6SL_PAD_LCD_DAT15__GPIO3_IO03 0x79
326                         MX6SL_PAD_LCD_DAT16__GPIO3_IO04 0x79
327                         MX6SL_PAD_LCD_DAT17__GPIO3_IO05 0x79
328                         MX6SL_PAD_LCD_DAT18__GPIO3_IO06 0x79
329                         MX6SL_PAD_LCD_DAT19__GPIO3_IO07 0x79
330                         MX6SL_PAD_LCD_DAT20__GPIO3_IO08 0x79
331                         MX6SL_PAD_LCD_DAT21__GPIO3_IO09 0x79
332                         MX6SL_PAD_LCD_DAT22__GPIO3_IO10 0x79
333                         MX6SL_PAD_LCD_DAT23__GPIO3_IO11 0x79
334                         MX6SL_PAD_LCD_CLK__GPIO2_IO15           0x79
335                         MX6SL_PAD_LCD_ENABLE__GPIO2_IO16        0x79
336                         MX6SL_PAD_LCD_HSYNC__GPIO2_IO17 0x79
337                         MX6SL_PAD_LCD_VSYNC__GPIO2_IO18 0x79
338                         MX6SL_PAD_LCD_RESET__GPIO2_IO19 0x79
339                         MX6SL_PAD_KEY_COL3__GPIO3_IO30          0x79
340                         MX6SL_PAD_KEY_ROW7__GPIO4_IO07          0x79
341                         MX6SL_PAD_ECSPI2_MOSI__GPIO4_IO13       0x79
342                         MX6SL_PAD_KEY_COL5__GPIO4_IO02          0x79
343                         MX6SL_PAD_KEY_ROW6__GPIO4_IO05          0x79
344                 >;
345         };
346
347         pinctrl_i2c1: i2c1grp {
348                 fsl,pins = <
349                         MX6SL_PAD_I2C1_SCL__I2C1_SCL     0x4001f8b1
350                         MX6SL_PAD_I2C1_SDA__I2C1_SDA     0x4001f8b1
351                 >;
352         };
353
354         pinctrl_i2c1_sleep: i2c1grp-sleep {
355                 fsl,pins = <
356                         MX6SL_PAD_I2C1_SCL__I2C1_SCL     0x400108b1
357                         MX6SL_PAD_I2C1_SDA__I2C1_SDA     0x400108b1
358                 >;
359         };
360
361         pinctrl_i2c2: i2c2grp {
362                 fsl,pins = <
363                         MX6SL_PAD_I2C2_SCL__I2C2_SCL     0x4001f8b1
364                         MX6SL_PAD_I2C2_SDA__I2C2_SDA     0x4001f8b1
365                 >;
366         };
367
368         pinctrl_i2c2_sleep: i2c2grp-sleep {
369                 fsl,pins = <
370                         MX6SL_PAD_I2C2_SCL__I2C2_SCL     0x400108b1
371                         MX6SL_PAD_I2C2_SDA__I2C2_SDA     0x400108b1
372                 >;
373         };
374
375         pinctrl_i2c3: i2c3grp {
376                 fsl,pins = <
377                         MX6SL_PAD_REF_CLK_24M__I2C3_SCL  0x4001f8b1
378                         MX6SL_PAD_REF_CLK_32K__I2C3_SDA  0x4001f8b1
379                 >;
380         };
381
382         pinctrl_led: ledgrp {
383                 fsl,pins = <
384                         MX6SL_PAD_SD1_DAT2__GPIO5_IO13 0x17059
385                 >;
386         };
387
388         pinctrl_ricoh_gpio: ricoh_gpiogrp {
389                 fsl,pins = <
390                         MX6SL_PAD_SD1_CLK__GPIO5_IO15   0x1b8b1 /* ricoh619 chg */
391                         MX6SL_PAD_SD1_DAT0__GPIO5_IO11  0x1b8b1 /* ricoh619 irq */
392                         MX6SL_PAD_KEY_COL2__GPIO3_IO28  0x1b8b1 /* ricoh619 bat_low_int */
393                 >;
394         };
395
396         pinctrl_uart1: uart1grp {
397                 fsl,pins = <
398                         MX6SL_PAD_UART1_TXD__UART1_TX_DATA 0x1b0b1
399                         MX6SL_PAD_UART1_RXD__UART1_TX_DATA 0x1b0b1
400                 >;
401         };
402
403         pinctrl_usbotg1: usbotg1grp {
404                 fsl,pins = <
405                         MX6SL_PAD_EPDC_PWRCOM__USB_OTG1_ID 0x17059
406                 >;
407         };
408
409         pinctrl_usdhc2: usdhc2grp {
410                 fsl,pins = <
411                         MX6SL_PAD_SD2_CMD__SD2_CMD              0x17059
412                         MX6SL_PAD_SD2_CLK__SD2_CLK              0x13059
413                         MX6SL_PAD_SD2_DAT0__SD2_DATA0           0x17059
414                         MX6SL_PAD_SD2_DAT1__SD2_DATA1           0x17059
415                         MX6SL_PAD_SD2_DAT2__SD2_DATA2           0x17059
416                         MX6SL_PAD_SD2_DAT3__SD2_DATA3           0x17059
417                 >;
418         };
419
420         pinctrl_usdhc2_100mhz: usdhc2grp-100mhz {
421                 fsl,pins = <
422                         MX6SL_PAD_SD2_CMD__SD2_CMD              0x170b9
423                         MX6SL_PAD_SD2_CLK__SD2_CLK              0x130b9
424                         MX6SL_PAD_SD2_DAT0__SD2_DATA0           0x170b9
425                         MX6SL_PAD_SD2_DAT1__SD2_DATA1           0x170b9
426                         MX6SL_PAD_SD2_DAT2__SD2_DATA2           0x170b9
427                         MX6SL_PAD_SD2_DAT3__SD2_DATA3           0x170b9
428                 >;
429         };
430
431         pinctrl_usdhc2_200mhz: usdhc2grp-200mhz {
432                 fsl,pins = <
433                         MX6SL_PAD_SD2_CMD__SD2_CMD              0x170f9
434                         MX6SL_PAD_SD2_CLK__SD2_CLK              0x130f9
435                         MX6SL_PAD_SD2_DAT0__SD2_DATA0           0x170f9
436                         MX6SL_PAD_SD2_DAT1__SD2_DATA1           0x170f9
437                         MX6SL_PAD_SD2_DAT2__SD2_DATA2           0x170f9
438                         MX6SL_PAD_SD2_DAT3__SD2_DATA3           0x170f9
439                 >;
440         };
441
442         pinctrl_usdhc2_sleep: usdhc2grp-sleep {
443                 fsl,pins = <
444                         MX6SL_PAD_SD2_CMD__GPIO5_IO04           0x100f9
445                         MX6SL_PAD_SD2_CLK__GPIO5_IO05           0x100f9
446                         MX6SL_PAD_SD2_DAT0__GPIO5_IO01          0x100f9
447                         MX6SL_PAD_SD2_DAT1__GPIO4_IO30          0x100f9
448                         MX6SL_PAD_SD2_DAT2__GPIO5_IO03          0x100f9
449                         MX6SL_PAD_SD2_DAT3__GPIO4_IO28          0x100f9
450                 >;
451         };
452
453         pinctrl_usdhc3: usdhc3grp {
454                 fsl,pins = <
455                         MX6SL_PAD_SD3_CMD__SD3_CMD      0x11059
456                         MX6SL_PAD_SD3_CLK__SD3_CLK      0x11059
457                         MX6SL_PAD_SD3_DAT0__SD3_DATA0   0x11059
458                         MX6SL_PAD_SD3_DAT1__SD3_DATA1   0x11059
459                         MX6SL_PAD_SD3_DAT2__SD3_DATA2   0x11059
460                         MX6SL_PAD_SD3_DAT3__SD3_DATA3   0x11059
461                 >;
462         };
463
464         pinctrl_usdhc3_100mhz: usdhc3grp-100mhz {
465                 fsl,pins = <
466                         MX6SL_PAD_SD3_CMD__SD3_CMD      0x170b9
467                         MX6SL_PAD_SD3_CLK__SD3_CLK      0x170b9
468                         MX6SL_PAD_SD3_DAT0__SD3_DATA0   0x170b9
469                         MX6SL_PAD_SD3_DAT1__SD3_DATA1   0x170b9
470                         MX6SL_PAD_SD3_DAT2__SD3_DATA2   0x170b9
471                         MX6SL_PAD_SD3_DAT3__SD3_DATA3   0x170b9
472                 >;
473         };
474
475         pinctrl_usdhc3_200mhz: usdhc3grp-200mhz {
476                 fsl,pins = <
477                         MX6SL_PAD_SD3_CMD__SD3_CMD      0x170f9
478                         MX6SL_PAD_SD3_CLK__SD3_CLK      0x170f9
479                         MX6SL_PAD_SD3_DAT0__SD3_DATA0   0x170f9
480                         MX6SL_PAD_SD3_DAT1__SD3_DATA1   0x170f9
481                         MX6SL_PAD_SD3_DAT2__SD3_DATA2   0x170f9
482                         MX6SL_PAD_SD3_DAT3__SD3_DATA3   0x170f9
483                 >;
484         };
485
486         pinctrl_usdhc3_sleep: usdhc3grp-sleep {
487                 fsl,pins = <
488                         MX6SL_PAD_SD3_CMD__GPIO5_IO21   0x100c1
489                         MX6SL_PAD_SD3_CLK__GPIO5_IO18   0x100c1
490                         MX6SL_PAD_SD3_DAT0__GPIO5_IO19  0x100c1
491                         MX6SL_PAD_SD3_DAT1__GPIO5_IO20  0x100c1
492                         MX6SL_PAD_SD3_DAT2__GPIO5_IO16  0x100c1
493                         MX6SL_PAD_SD3_DAT3__GPIO5_IO17  0x100c1
494                 >;
495         };
496
497         pinctrl_wifi_power: wifi-powergrp {
498                 fsl,pins = <
499                         MX6SL_PAD_SD2_DAT6__GPIO4_IO29  0x10059 /* WIFI_3V3_ON */
500                 >;
501         };
502
503         pinctrl_wifi_reset: wifi-resetgrp {
504                 fsl,pins = <
505                         MX6SL_PAD_SD2_DAT7__GPIO5_IO00  0x10059 /* WIFI_RST */
506                 >;
507         };
508
509         pinctrl_zforce: zforcegrp {
510                 fsl,pins = <
511                         MX6SL_PAD_SD1_DAT3__GPIO5_IO06          0x17059 /* TP_INT */
512                         MX6SL_PAD_SD1_DAT5__GPIO5_IO09          0x10059 /* TP_RST */
513                 >;
514         };
515 };
516
517 &reg_vdd1p1 {
518         vin-supply = <&dcdc2_reg>;
519 };
520
521 &reg_vdd2p5 {
522         vin-supply = <&dcdc2_reg>;
523 };
524
525 &reg_arm {
526         vin-supply = <&dcdc3_reg>;
527 };
528
529 &reg_soc {
530         vin-supply = <&dcdc1_reg>;
531 };
532
533 &reg_pu {
534         vin-supply = <&dcdc1_reg>;
535 };
536
537 &snvs_rtc {
538         /*
539          * We are using the RTC in the PMIC, but this one is not disabled
540          * in imx6sl.dtsi.
541          */
542         status = "disabled";
543 };
544
545 &uart1 {
546         pinctrl-names = "default";
547         pinctrl-0 = <&pinctrl_uart1>;
548         status = "okay";
549 };
550
551 &usdhc2 {
552         pinctrl-names = "default", "state_100mhz", "state_200mhz", "sleep";
553         pinctrl-0 = <&pinctrl_usdhc2>;
554         pinctrl-1 = <&pinctrl_usdhc2_100mhz>;
555         pinctrl-2 = <&pinctrl_usdhc2_200mhz>;
556         pinctrl-3 = <&pinctrl_usdhc2_sleep>;
557         non-removable;
558         status = "okay";
559
560         /* internal uSD card */
561 };
562
563 &usdhc3 {
564         pinctrl-names = "default", "state_100mhz", "state_200mhz", "sleep";
565         pinctrl-0 = <&pinctrl_usdhc3>;
566         pinctrl-1 = <&pinctrl_usdhc3_100mhz>;
567         pinctrl-2 = <&pinctrl_usdhc3_200mhz>;
568         pinctrl-3 = <&pinctrl_usdhc3_sleep>;
569         vmmc-supply = <&reg_wifi>;
570         mmc-pwrseq = <&wifi_pwrseq>;
571         cap-power-off-card;
572         non-removable;
573         status = "okay";
574
575         /*
576          * 37NB-E60QF0+4A2: CyberTan WC121 (BCM43362) SDIO WiFi
577          * 37NB-E60QF0+4A3: RTL8189F SDIO WiFi
578          */
579 };
580
581 &usbotg1 {
582         pinctrl-names = "default";
583         disable-over-current;
584         srp-disable;
585         hnp-disable;
586         adp-disable;
587         status = "okay";
588 };