1 // SPDX-License-Identifier: GPL-2.0+
3 // Copyright 2012 Freescale Semiconductor, Inc.
4 // Copyright 2011 Linaro Ltd.
6 #include <dt-bindings/clock/imx6qdl-clock.h>
7 #include <dt-bindings/gpio/gpio.h>
8 #include <dt-bindings/input/input.h>
16 device_type = "memory";
17 reg = <0x10000000 0x40000000>;
20 reg_usb_otg_vbus: regulator-usb-otg-vbus {
21 compatible = "regulator-fixed";
22 regulator-name = "usb_otg_vbus";
23 regulator-min-microvolt = <5000000>;
24 regulator-max-microvolt = <5000000>;
25 gpio = <&gpio3 22 GPIO_ACTIVE_HIGH>;
27 vin-supply = <&swbst_reg>;
30 reg_usb_h1_vbus: regulator-usb-h1-vbus {
31 compatible = "regulator-fixed";
32 regulator-name = "usb_h1_vbus";
33 regulator-min-microvolt = <5000000>;
34 regulator-max-microvolt = <5000000>;
35 gpio = <&gpio1 29 GPIO_ACTIVE_HIGH>;
37 vin-supply = <&swbst_reg>;
40 reg_audio: regulator-audio {
41 compatible = "regulator-fixed";
42 regulator-name = "wm8962-supply";
43 gpio = <&gpio4 10 GPIO_ACTIVE_HIGH>;
47 reg_pcie: regulator-pcie {
48 compatible = "regulator-fixed";
49 pinctrl-names = "default";
50 pinctrl-0 = <&pinctrl_pcie_reg>;
51 regulator-name = "MPCIE_3V3";
52 regulator-min-microvolt = <3300000>;
53 regulator-max-microvolt = <3300000>;
54 gpio = <&gpio3 19 GPIO_ACTIVE_HIGH>;
58 reg_sensors: regulator-sensors {
59 compatible = "regulator-fixed";
60 pinctrl-names = "default";
61 pinctrl-0 = <&pinctrl_sensors_reg>;
62 regulator-name = "sensors-supply";
63 regulator-min-microvolt = <3300000>;
64 regulator-max-microvolt = <3300000>;
65 gpio = <&gpio2 31 GPIO_ACTIVE_HIGH>;
70 compatible = "gpio-keys";
71 pinctrl-names = "default";
72 pinctrl-0 = <&pinctrl_gpio_keys>;
75 label = "Power Button";
76 gpios = <&gpio3 29 GPIO_ACTIVE_LOW>;
78 linux,code = <KEY_POWER>;
83 gpios = <&gpio1 4 GPIO_ACTIVE_LOW>;
85 linux,code = <KEY_VOLUMEUP>;
89 label = "Volume Down";
90 gpios = <&gpio1 5 GPIO_ACTIVE_LOW>;
92 linux,code = <KEY_VOLUMEDOWN>;
97 compatible = "fsl,imx6q-sabresd-wm8962",
98 "fsl,imx-audio-wm8962";
99 model = "wm8962-audio";
100 ssi-controller = <&ssi2>;
101 audio-codec = <&codec>;
103 "Headphone Jack", "HPOUTL",
104 "Headphone Jack", "HPOUTR",
105 "Ext Spk", "SPKOUTL",
106 "Ext Spk", "SPKOUTR",
113 backlight_lvds: backlight-lvds {
114 compatible = "pwm-backlight";
115 pwms = <&pwm1 0 5000000>;
116 brightness-levels = <0 4 8 16 32 64 128 255>;
117 default-brightness-level = <7>;
122 compatible = "gpio-leds";
123 pinctrl-names = "default";
124 pinctrl-0 = <&pinctrl_gpio_leds>;
127 gpios = <&gpio1 2 0>;
128 default-state = "on";
133 compatible = "hannstar,hsd100pxn1";
134 backlight = <&backlight_lvds>;
138 remote-endpoint = <&lvds0_out>;
144 &ipu1_csi0_from_ipu1_csi0_mux {
146 data-shift = <12>; /* Lines 19:12 used */
151 &ipu1_csi0_mux_from_parallel_sensor {
152 remote-endpoint = <&ov5642_to_ipu1_csi0_mux>;
156 pinctrl-names = "default";
157 pinctrl-0 = <&pinctrl_ipu1_csi0>;
166 mipi_csi2_in: endpoint {
167 remote-endpoint = <&ov5640_to_mipi_csi2>;
175 pinctrl-names = "default";
176 pinctrl-0 = <&pinctrl_audmux>;
181 assigned-clocks = <&clks IMX6QDL_CLK_LDB_DI0_SEL>,
182 <&clks IMX6QDL_CLK_LDB_DI1_SEL>;
183 assigned-clock-parents = <&clks IMX6QDL_CLK_PLL3_USB_OTG>,
184 <&clks IMX6QDL_CLK_PLL3_USB_OTG>;
188 cs-gpios = <&gpio4 9 0>;
189 pinctrl-names = "default";
190 pinctrl-0 = <&pinctrl_ecspi1>;
194 #address-cells = <1>;
196 compatible = "st,m25p32", "jedec,spi-nor";
197 spi-max-frequency = <20000000>;
203 pinctrl-names = "default";
204 pinctrl-0 = <&pinctrl_enet>;
205 phy-mode = "rgmii-id";
211 #address-cells = <1>;
214 phy: ethernet-phy@1 {
216 qca,clk-out-frequency = <125000000>;
217 reset-gpios = <&gpio1 25 GPIO_ACTIVE_LOW>;
218 reset-assert-us = <10000>;
224 pinctrl-names = "default";
225 pinctrl-0 = <&pinctrl_hdmi_cec>;
226 ddc-i2c-bus = <&i2c2>;
231 clock-frequency = <100000>;
232 pinctrl-names = "default";
233 pinctrl-0 = <&pinctrl_i2c1>;
237 compatible = "wlf,wm8962";
239 clocks = <&clks IMX6QDL_CLK_CKO>;
240 DCVDD-supply = <®_audio>;
241 DBVDD-supply = <®_audio>;
242 AVDD-supply = <®_audio>;
243 CPVDD-supply = <®_audio>;
244 MICVDD-supply = <®_audio>;
245 PLLVDD-supply = <®_audio>;
246 SPKVDD1-supply = <®_audio>;
247 SPKVDD2-supply = <®_audio>;
249 0x0000 /* 0:Default */
250 0x0000 /* 1:Default */
251 0x0013 /* 2:FN_DMICCLK */
252 0x0000 /* 3:Default */
253 0x8014 /* 4:FN_DMICCDAT */
254 0x0000 /* 5:Default */
259 compatible = "fsl,mma8451";
261 pinctrl-names = "default";
262 pinctrl-0 = <&pinctrl_i2c1_mma8451_int>;
263 interrupt-parent = <&gpio1>;
264 interrupts = <18 IRQ_TYPE_LEVEL_LOW>;
265 vdd-supply = <®_sensors>;
266 vddio-supply = <®_sensors>;
270 compatible = "ovti,ov5642";
271 pinctrl-names = "default";
272 pinctrl-0 = <&pinctrl_ov5642>;
273 clocks = <&clks IMX6QDL_CLK_CKO>;
274 clock-names = "xclk";
276 DOVDD-supply = <&vgen4_reg>; /* 1.8v */
277 AVDD-supply = <&vgen3_reg>; /* 2.8v, rev C board is VGEN3
278 rev B board is VGEN5 */
279 DVDD-supply = <&vgen2_reg>; /* 1.5v*/
280 powerdown-gpios = <&gpio1 16 GPIO_ACTIVE_HIGH>;
281 reset-gpios = <&gpio1 17 GPIO_ACTIVE_LOW>;
285 ov5642_to_ipu1_csi0_mux: endpoint {
286 remote-endpoint = <&ipu1_csi0_mux_from_parallel_sensor>;
296 clock-frequency = <100000>;
297 pinctrl-names = "default";
298 pinctrl-0 = <&pinctrl_i2c2>;
302 compatible = "eeti,egalax_ts";
304 pinctrl-names = "default";
305 pinctrl-0 = <&pinctrl_i2c2_egalax_int>;
306 interrupt-parent = <&gpio6>;
307 interrupts = <8 IRQ_TYPE_EDGE_FALLING>;
308 wakeup-gpios = <&gpio6 8 GPIO_ACTIVE_HIGH>;
312 compatible = "ovti,ov5640";
313 pinctrl-names = "default";
314 pinctrl-0 = <&pinctrl_ov5640>;
316 clocks = <&clks IMX6QDL_CLK_CKO>;
317 clock-names = "xclk";
318 DOVDD-supply = <&vgen4_reg>; /* 1.8v */
319 AVDD-supply = <&vgen3_reg>; /* 2.8v, rev C board is VGEN3
320 rev B board is VGEN5 */
321 DVDD-supply = <&vgen2_reg>; /* 1.5v*/
322 powerdown-gpios = <&gpio1 19 GPIO_ACTIVE_HIGH>;
323 reset-gpios = <&gpio1 20 GPIO_ACTIVE_LOW>;
326 ov5640_to_mipi_csi2: endpoint {
327 remote-endpoint = <&mipi_csi2_in>;
335 compatible = "fsl,pfuze100";
340 regulator-min-microvolt = <300000>;
341 regulator-max-microvolt = <1875000>;
344 regulator-ramp-delay = <6250>;
348 regulator-min-microvolt = <300000>;
349 regulator-max-microvolt = <1875000>;
352 regulator-ramp-delay = <6250>;
356 regulator-min-microvolt = <800000>;
357 regulator-max-microvolt = <3300000>;
360 regulator-ramp-delay = <6250>;
364 regulator-min-microvolt = <400000>;
365 regulator-max-microvolt = <1975000>;
371 regulator-min-microvolt = <400000>;
372 regulator-max-microvolt = <1975000>;
378 regulator-min-microvolt = <800000>;
379 regulator-max-microvolt = <3300000>;
384 regulator-min-microvolt = <5000000>;
385 regulator-max-microvolt = <5150000>;
389 regulator-min-microvolt = <1000000>;
390 regulator-max-microvolt = <3000000>;
401 regulator-min-microvolt = <800000>;
402 regulator-max-microvolt = <1550000>;
406 regulator-min-microvolt = <800000>;
407 regulator-max-microvolt = <1550000>;
411 regulator-min-microvolt = <1800000>;
412 regulator-max-microvolt = <3300000>;
416 regulator-min-microvolt = <1800000>;
417 regulator-max-microvolt = <3300000>;
422 regulator-min-microvolt = <1800000>;
423 regulator-max-microvolt = <3300000>;
428 regulator-min-microvolt = <1800000>;
429 regulator-max-microvolt = <3300000>;
437 clock-frequency = <100000>;
438 pinctrl-names = "default";
439 pinctrl-0 = <&pinctrl_i2c3>;
443 compatible = "eeti,egalax_ts";
445 interrupt-parent = <&gpio6>;
447 wakeup-gpios = <&gpio6 7 0>;
451 compatible = "fsl,mag3110";
453 pinctrl-names = "default";
454 pinctrl-0 = <&pinctrl_i2c3_mag3110_int>;
455 interrupt-parent = <&gpio3>;
456 interrupts = <16 IRQ_TYPE_EDGE_RISING>;
457 vdd-supply = <®_sensors>;
458 vddio-supply = <®_sensors>;
462 compatible = "isil,isl29023";
464 pinctrl-names = "default";
465 pinctrl-0 = <&pinctrl_i2c3_isl29023_int>;
466 interrupt-parent = <&gpio3>;
467 interrupts = <9 IRQ_TYPE_EDGE_FALLING>;
468 vcc-supply = <®_sensors>;
473 pinctrl-names = "default";
474 pinctrl-0 = <&pinctrl_hog>;
477 pinctrl_hog: hoggrp {
479 MX6QDL_PAD_NANDF_D0__GPIO2_IO00 0x1b0b0
480 MX6QDL_PAD_NANDF_D1__GPIO2_IO01 0x1b0b0
481 MX6QDL_PAD_NANDF_D2__GPIO2_IO02 0x1b0b0
482 MX6QDL_PAD_NANDF_D3__GPIO2_IO03 0x1b0b0
483 MX6QDL_PAD_GPIO_0__CCM_CLKO1 0x130b0
484 MX6QDL_PAD_NANDF_CLE__GPIO6_IO07 0x1b0b0
485 MX6QDL_PAD_ENET_TXD1__GPIO1_IO29 0x1b0b0
486 MX6QDL_PAD_EIM_D22__GPIO3_IO22 0x1b0b0
487 MX6QDL_PAD_ENET_CRS_DV__GPIO1_IO25 0x1b0b0
491 pinctrl_audmux: audmuxgrp {
493 MX6QDL_PAD_CSI0_DAT7__AUD3_RXD 0x130b0
494 MX6QDL_PAD_CSI0_DAT4__AUD3_TXC 0x130b0
495 MX6QDL_PAD_CSI0_DAT5__AUD3_TXD 0x110b0
496 MX6QDL_PAD_CSI0_DAT6__AUD3_TXFS 0x130b0
500 pinctrl_ecspi1: ecspi1grp {
502 MX6QDL_PAD_KEY_COL1__ECSPI1_MISO 0x100b1
503 MX6QDL_PAD_KEY_ROW0__ECSPI1_MOSI 0x100b1
504 MX6QDL_PAD_KEY_COL0__ECSPI1_SCLK 0x100b1
505 MX6QDL_PAD_KEY_ROW1__GPIO4_IO09 0x1b0b0
509 pinctrl_enet: enetgrp {
511 MX6QDL_PAD_ENET_MDIO__ENET_MDIO 0x1b0b0
512 MX6QDL_PAD_ENET_MDC__ENET_MDC 0x1b0b0
513 MX6QDL_PAD_RGMII_TXC__RGMII_TXC 0x1b030
514 MX6QDL_PAD_RGMII_TD0__RGMII_TD0 0x1b030
515 MX6QDL_PAD_RGMII_TD1__RGMII_TD1 0x1b030
516 MX6QDL_PAD_RGMII_TD2__RGMII_TD2 0x1b030
517 MX6QDL_PAD_RGMII_TD3__RGMII_TD3 0x1b030
518 MX6QDL_PAD_RGMII_TX_CTL__RGMII_TX_CTL 0x1b030
519 MX6QDL_PAD_ENET_REF_CLK__ENET_TX_CLK 0x1b0b0
520 MX6QDL_PAD_RGMII_RXC__RGMII_RXC 0x1b030
521 MX6QDL_PAD_RGMII_RD0__RGMII_RD0 0x1b030
522 MX6QDL_PAD_RGMII_RD1__RGMII_RD1 0x1b030
523 MX6QDL_PAD_RGMII_RD2__RGMII_RD2 0x1b030
524 MX6QDL_PAD_RGMII_RD3__RGMII_RD3 0x1b030
525 MX6QDL_PAD_RGMII_RX_CTL__RGMII_RX_CTL 0x1b030
526 MX6QDL_PAD_GPIO_16__ENET_REF_CLK 0x4001b0a8
530 pinctrl_gpio_keys: gpio_keysgrp {
532 MX6QDL_PAD_EIM_D29__GPIO3_IO29 0x1b0b0
533 MX6QDL_PAD_GPIO_4__GPIO1_IO04 0x1b0b0
534 MX6QDL_PAD_GPIO_5__GPIO1_IO05 0x1b0b0
538 pinctrl_hdmi_cec: hdmicecgrp {
540 MX6QDL_PAD_KEY_ROW2__HDMI_TX_CEC_LINE 0x1f8b0
544 pinctrl_i2c1: i2c1grp {
546 MX6QDL_PAD_CSI0_DAT8__I2C1_SDA 0x4001b8b1
547 MX6QDL_PAD_CSI0_DAT9__I2C1_SCL 0x4001b8b1
551 pinctrl_i2c1_mma8451_int: i2c1mma8451intgrp {
553 MX6QDL_PAD_SD1_CMD__GPIO1_IO18 0xb0b1
557 pinctrl_i2c2: i2c2grp {
559 MX6QDL_PAD_KEY_COL3__I2C2_SCL 0x4001b8b1
560 MX6QDL_PAD_KEY_ROW3__I2C2_SDA 0x4001b8b1
564 pinctrl_i2c2_egalax_int: i2c2egalaxintgrp {
566 MX6QDL_PAD_NANDF_ALE__GPIO6_IO08 0x1b0b0
570 pinctrl_i2c3: i2c3grp {
572 MX6QDL_PAD_GPIO_3__I2C3_SCL 0x4001b8b1
573 MX6QDL_PAD_GPIO_6__I2C3_SDA 0x4001b8b1
577 pinctrl_i2c3_isl29023_int: i2c3isl29023intgrp {
579 MX6QDL_PAD_EIM_DA9__GPIO3_IO09 0xb0b1
583 pinctrl_i2c3_mag3110_int: i2c3mag3110intgrp {
585 MX6QDL_PAD_EIM_D16__GPIO3_IO16 0xb0b1
589 pinctrl_ipu1_csi0: ipu1csi0grp {
591 MX6QDL_PAD_CSI0_DAT12__IPU1_CSI0_DATA12 0x1b0b0
592 MX6QDL_PAD_CSI0_DAT13__IPU1_CSI0_DATA13 0x1b0b0
593 MX6QDL_PAD_CSI0_DAT14__IPU1_CSI0_DATA14 0x1b0b0
594 MX6QDL_PAD_CSI0_DAT15__IPU1_CSI0_DATA15 0x1b0b0
595 MX6QDL_PAD_CSI0_DAT16__IPU1_CSI0_DATA16 0x1b0b0
596 MX6QDL_PAD_CSI0_DAT17__IPU1_CSI0_DATA17 0x1b0b0
597 MX6QDL_PAD_CSI0_DAT18__IPU1_CSI0_DATA18 0x1b0b0
598 MX6QDL_PAD_CSI0_DAT19__IPU1_CSI0_DATA19 0x1b0b0
599 MX6QDL_PAD_CSI0_PIXCLK__IPU1_CSI0_PIXCLK 0x1b0b0
600 MX6QDL_PAD_CSI0_MCLK__IPU1_CSI0_HSYNC 0x1b0b0
601 MX6QDL_PAD_CSI0_VSYNC__IPU1_CSI0_VSYNC 0x1b0b0
605 pinctrl_ov5640: ov5640grp {
607 MX6QDL_PAD_SD1_DAT2__GPIO1_IO19 0x1b0b0
608 MX6QDL_PAD_SD1_CLK__GPIO1_IO20 0x1b0b0
612 pinctrl_ov5642: ov5642grp {
614 MX6QDL_PAD_SD1_DAT0__GPIO1_IO16 0x1b0b0
615 MX6QDL_PAD_SD1_DAT1__GPIO1_IO17 0x1b0b0
619 pinctrl_pcie: pciegrp {
621 MX6QDL_PAD_GPIO_17__GPIO7_IO12 0x1b0b0
625 pinctrl_pcie_reg: pciereggrp {
627 MX6QDL_PAD_EIM_D19__GPIO3_IO19 0x1b0b0
631 pinctrl_pwm1: pwm1grp {
633 MX6QDL_PAD_SD1_DAT3__PWM1_OUT 0x1b0b1
637 pinctrl_sensors_reg: sensorsreggrp {
639 MX6QDL_PAD_EIM_EB3__GPIO2_IO31 0x1b0b0
643 pinctrl_uart1: uart1grp {
645 MX6QDL_PAD_CSI0_DAT10__UART1_TX_DATA 0x1b0b1
646 MX6QDL_PAD_CSI0_DAT11__UART1_RX_DATA 0x1b0b1
650 pinctrl_usbotg: usbotggrp {
652 MX6QDL_PAD_ENET_RX_ER__USB_OTG_ID 0x17059
656 pinctrl_usdhc2: usdhc2grp {
658 MX6QDL_PAD_SD2_CMD__SD2_CMD 0x17059
659 MX6QDL_PAD_SD2_CLK__SD2_CLK 0x10059
660 MX6QDL_PAD_SD2_DAT0__SD2_DATA0 0x17059
661 MX6QDL_PAD_SD2_DAT1__SD2_DATA1 0x17059
662 MX6QDL_PAD_SD2_DAT2__SD2_DATA2 0x17059
663 MX6QDL_PAD_SD2_DAT3__SD2_DATA3 0x17059
664 MX6QDL_PAD_NANDF_D4__SD2_DATA4 0x17059
665 MX6QDL_PAD_NANDF_D5__SD2_DATA5 0x17059
666 MX6QDL_PAD_NANDF_D6__SD2_DATA6 0x17059
667 MX6QDL_PAD_NANDF_D7__SD2_DATA7 0x17059
671 pinctrl_usdhc3: usdhc3grp {
673 MX6QDL_PAD_SD3_CMD__SD3_CMD 0x17059
674 MX6QDL_PAD_SD3_CLK__SD3_CLK 0x10059
675 MX6QDL_PAD_SD3_DAT0__SD3_DATA0 0x17059
676 MX6QDL_PAD_SD3_DAT1__SD3_DATA1 0x17059
677 MX6QDL_PAD_SD3_DAT2__SD3_DATA2 0x17059
678 MX6QDL_PAD_SD3_DAT3__SD3_DATA3 0x17059
679 MX6QDL_PAD_SD3_DAT4__SD3_DATA4 0x17059
680 MX6QDL_PAD_SD3_DAT5__SD3_DATA5 0x17059
681 MX6QDL_PAD_SD3_DAT6__SD3_DATA6 0x17059
682 MX6QDL_PAD_SD3_DAT7__SD3_DATA7 0x17059
686 pinctrl_usdhc4: usdhc4grp {
688 MX6QDL_PAD_SD4_CMD__SD4_CMD 0x17059
689 MX6QDL_PAD_SD4_CLK__SD4_CLK 0x10059
690 MX6QDL_PAD_SD4_DAT0__SD4_DATA0 0x17059
691 MX6QDL_PAD_SD4_DAT1__SD4_DATA1 0x17059
692 MX6QDL_PAD_SD4_DAT2__SD4_DATA2 0x17059
693 MX6QDL_PAD_SD4_DAT3__SD4_DATA3 0x17059
694 MX6QDL_PAD_SD4_DAT4__SD4_DATA4 0x17059
695 MX6QDL_PAD_SD4_DAT5__SD4_DATA5 0x17059
696 MX6QDL_PAD_SD4_DAT6__SD4_DATA6 0x17059
697 MX6QDL_PAD_SD4_DAT7__SD4_DATA7 0x17059
701 pinctrl_wdog: wdoggrp {
703 MX6QDL_PAD_GPIO_1__WDOG2_B 0x1b0b0
709 pinctrl_gpio_leds: gpioledsgrp {
711 MX6QDL_PAD_GPIO_2__GPIO1_IO02 0x1b0b0
721 fsl,data-mapping = "spwg";
722 fsl,data-width = <18>;
728 lvds0_out: endpoint {
729 remote-endpoint = <&panel_in>;
736 pinctrl-names = "default";
737 pinctrl-0 = <&pinctrl_pcie>;
738 reset-gpio = <&gpio7 12 GPIO_ACTIVE_LOW>;
739 vpcie-supply = <®_pcie>;
745 pinctrl-names = "default";
746 pinctrl-0 = <&pinctrl_pwm1>;
751 vin-supply = <&sw1a_reg>;
755 vin-supply = <&sw1c_reg>;
759 vin-supply = <&sw1c_reg>;
763 vin-supply = <&vgen5_reg>;
767 vin-supply = <&vgen5_reg>;
783 pinctrl-names = "default";
784 pinctrl-0 = <&pinctrl_uart1>;
789 vbus-supply = <®_usb_h1_vbus>;
794 vbus-supply = <®_usb_otg_vbus>;
795 pinctrl-names = "default";
796 pinctrl-0 = <&pinctrl_usbotg>;
797 disable-over-current;
802 pinctrl-names = "default";
803 pinctrl-0 = <&pinctrl_usdhc2>;
805 cd-gpios = <&gpio2 2 GPIO_ACTIVE_LOW>;
806 wp-gpios = <&gpio2 3 GPIO_ACTIVE_HIGH>;
811 pinctrl-names = "default";
812 pinctrl-0 = <&pinctrl_usdhc3>;
814 cd-gpios = <&gpio2 0 GPIO_ACTIVE_LOW>;
815 wp-gpios = <&gpio2 1 GPIO_ACTIVE_HIGH>;
820 pinctrl-names = "default";
821 pinctrl-0 = <&pinctrl_usdhc4>;
833 pinctrl-names = "default";
834 pinctrl-0 = <&pinctrl_wdog>;
835 fsl,ext-reset-output;