arch/arm/boot/dts/imx6qdl-hummingboard2.dtsi

   1 /*
   2  * Copyright (C) 2015 Rabeeh Khoury <rabeeh@solid-run.com>
   3  *
   4  * This file is dual-licensed: you can use it either under the terms
   5  * of the GPL or the X11 license, at your option. Note that this dual
   6  * licensing only applies to this file, and not this project as a
   7  * whole.
   8  *
   9  *  a) This file is free software; you can redistribute it and/or
  10  *     modify it under the terms of the GNU General Public License
  11  *     version 2 as published by the Free Software Foundation.
  12  *
  13  *     This file is distributed in the hope that it will be useful,
  14  *     but WITHOUT ANY WARRANTY; without even the implied warranty of
  15  *     MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  16  *     GNU General Public License for more details.
  17  *
  18  * Or, alternatively,
  19  *
  20  *  b) Permission is hereby granted, free of charge, to any person
  21  *     obtaining a copy of this software and associated documentation
  22  *     files (the "Software"), to deal in the Software without
  23  *     restriction, including without limitation the rights to use,
  24  *     copy, modify, merge, publish, distribute, sublicense, and/or
  25  *     sell copies of the Software, and to permit persons to whom the
  26  *     Software is furnished to do so, subject to the following
  27  *     conditions:
  28  *
  29  *     The above copyright notice and this permission notice shall be
  30  *     included in all copies or substantial portions of the Software.
  31  *
  32  *     THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
  33  *     EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
  34  *     OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
  35  *     NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
  36  *     HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
  37  *     WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
  38  *     FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
  39  *     OTHER DEALINGS IN THE SOFTWARE.
  40  */
  41 #include "imx6qdl-sr-som.dtsi"
  42
  43 / {
  44         chosen {
  45                 stdout-path = &uart1;
  46         };
  47
  48         ir_recv: ir-receiver {
  49                 compatible = "gpio-ir-receiver";
  50                 gpios = <&gpio7 9 1>;
  51                 pinctrl-names = "default";
  52                 pinctrl-0 = <&pinctrl_hummingboard2_gpio7_9>;
  53                 linux,rc-map-name = "rc-rc6-mce";
  54         };
  55
  56         usdhc2_pwrseq: usdhc2-pwrseq {
  57                 compatible = "mmc-pwrseq-simple";
  58                 reset-gpios = <&gpio4 30 GPIO_ACTIVE_HIGH>;
  59         };
  60
  61         reg_3p3v: regulator-3p3v {
  62                 compatible = "regulator-fixed";
  63                 regulator-name = "3P3V";
  64                 regulator-min-microvolt = <3300000>;
  65                 regulator-max-microvolt = <3300000>;
  66                 regulator-always-on;
  67         };
  68
  69         reg_1p8v: regulator-1p8v {
  70                 compatible = "regulator-fixed";
  71                 regulator-name = "1P8V";
  72                 regulator-min-microvolt = <1800000>;
  73                 regulator-max-microvolt = <1800000>;
  74                 regulator-always-on;
  75         };
  76
  77         reg_usbh1_vbus: regulator-usb-h1-vbus {
  78                 compatible = "regulator-fixed";
  79                 enable-active-high;
  80                 gpio = <&gpio1 0 0>;
  81                 pinctrl-names = "default";
  82                 pinctrl-0 = <&pinctrl_hummingboard2_usbh1_vbus>;
  83                 regulator-name = "usb_h1_vbus";
  84                 regulator-min-microvolt = <5000000>;
  85                 regulator-max-microvolt = <5000000>;
  86         };
  87
  88         reg_usbotg_vbus: regulator-usb-otg-vbus {
  89                 compatible = "regulator-fixed";
  90                 enable-active-high;
  91                 gpio = <&gpio3 22 0>;
  92                 pinctrl-names = "default";
  93                 pinctrl-0 = <&pinctrl_hummingboard2_usbotg_vbus>;
  94                 regulator-name = "usb_otg_vbus";
  95                 regulator-min-microvolt = <5000000>;
  96                 regulator-max-microvolt = <5000000>;
  97         };
  98
  99         reg_usbh2_vbus: regulator-usb-h2-vbus {
 100                 compatible = "regulator-gpio";
 101                 enable-active-high;
 102                 enable-gpio = <&gpio2 13 0>;
 103                 pinctrl-names = "default";
 104                 pinctrl-0 = <&pinctrl_hummingboard2_usbh2_vbus>;
 105                 regulator-name = "usb_h2_vbus";
 106                 regulator-min-microvolt = <5000000>;
 107                 regulator-max-microvolt = <5000000>;
 108                 regulator-boot-on;
 109         };
 110
 111         reg_usbh3_vbus: regulator-usb-h3-vbus {
 112                 compatible = "regulator-gpio";
 113                 enable-active-high;
 114                 enable-gpio = <&gpio7 10 0>;
 115                 pinctrl-names = "default";
 116                 pinctrl-0 = <&pinctrl_hummingboard2_usbh3_vbus>;
 117                 regulator-name = "usb_h3_vbus";
 118                 regulator-min-microvolt = <5000000>;
 119                 regulator-max-microvolt = <5000000>;
 120                 regulator-boot-on;
 121         };
 122
 123         sound-sgtl5000 {
 124                 audio-codec = <&sgtl5000>;
 125                 audio-routing =
 126                         "MIC_IN", "Mic Jack",
 127                         "Mic Jack", "Mic Bias",
 128                         "Headphone Jack", "HP_OUT";
 129                 compatible = "fsl,imx-audio-sgtl5000";
 130                 model = "On-board Codec";
 131                 mux-ext-port = <5>;
 132                 mux-int-port = <1>;
 133                 ssi-controller = <&ssi1>;
 134         };
 135 };
 136
 137 &audmux {
 138         status = "okay";
 139 };
 140
 141 &ecspi2 {
 142         pinctrl-names = "default";
 143         pinctrl-0 = <&pinctrl_hummingboard2_ecspi2>;
 144         cs-gpios = <&gpio2 26 0>;
 145         status = "okay";
 146 };
 147
 148 &hdmi {
 149         pinctrl-names = "default";
 150         pinctrl-0 = <&pinctrl_hummingboard2_hdmi>;
 151         ddc-i2c-bus = <&i2c2>;
 152         status = "okay";
 153 };
 154
 155 &i2c1 {
 156         clock-frequency = <100000>;
 157         pinctrl-names = "default";
 158         pinctrl-0 = <&pinctrl_hummingboard2_i2c1>;
 159         status = "okay";
 160
 161         pcf8523: rtc@68 {
 162                 compatible = "nxp,pcf8523";
 163                 reg = <0x68>;
 164                 nxp,12p5_pf;
 165         };
 166
 167         sgtl5000: codec@0a {
 168                 clocks = <&clks IMX6QDL_CLK_CKO>;
 169                 compatible = "fsl,sgtl5000";
 170                 pinctrl-names = "default";
 171                 pinctrl-0 = <&pinctrl_hummingboard2_sgtl5000>;
 172                 reg = <0x0a>;
 173                 VDDA-supply = <&reg_3p3v>;
 174                 VDDIO-supply = <&reg_3p3v>;
 175         };
 176 };
 177
 178 &i2c2 {
 179         clock-frequency = <100000>;
 180         pinctrl-names = "default";
 181         pinctrl-0 = <&pinctrl_hummingboard2_i2c2>;
 182         status = "okay";
 183 };
 184
 185 &i2c3 {
 186         clock-frequency = <100000>;
 187         pinctrl-names = "default";
 188         pinctrl-0 = <&pinctrl_hummingboard2_i2c3>;
 189         status = "okay";
 190 };
 191
 192 &iomuxc {
 193         pinctrl-names = "default";
 194         pinctrl-0 = <&pinctrl_hog>;
 195
 196         hummingboard2 {
 197                 pinctrl_hog: hoggrp {
 198                 fsl,pins = <
 199                                 /*
 200                                  * 36 pin headers GPIO description. The pins
 201                                  * numbering as following -
 202                                  *
 203                                  *      3.2v    5v      74      75
 204                                  *      73      72      71      70
 205                                  *      69      68      67      66
 206                                  *
 207                                  *      77      78      79      76
 208                                  *      65      64      61      60
 209                                  *      53      52      51      50
 210                                  *      49      48      166     132
 211                                  *      95      94      90      91
 212                                  *      GND     54      24      204
 213                                  *
 214                                  * The GPIO numbers can be extracted using
 215                                  * signal name from below.
 216                                  * Example -
 217                                  * MX6QDL_PAD_EIM_DA10__GPIO3_IO10 is
 218                                  * GPIO(3,10) which is (3-1)*32+10 = gpio 74
 219                                  *
 220                                  * i.e. The mapping of GPIO(X,Y) to Linux gpio
 221                                  * number is : gpio number = (X-1) * 32 + Y
 222                                  */
 223                                 /* DI1_PIN15 */
 224                                 MX6QDL_PAD_EIM_DA10__GPIO3_IO10 0x400130b1
 225                                 /* DI1_PIN02 */
 226                                 MX6QDL_PAD_EIM_DA11__GPIO3_IO11 0x400130b1
 227                                 /* DISP1_DATA00 */
 228                                 MX6QDL_PAD_EIM_DA9__GPIO3_IO09 0x400130b1
 229                                 /* DISP1_DATA01 */
 230                                 MX6QDL_PAD_EIM_DA8__GPIO3_IO08 0x400130b1
 231                                 /* DISP1_DATA02 */
 232                                 MX6QDL_PAD_EIM_DA7__GPIO3_IO07 0x400130b1
 233                                 /* DISP1_DATA03 */
 234                                 MX6QDL_PAD_EIM_DA6__GPIO3_IO06 0x400130b1
 235                                 /* DISP1_DATA04 */
 236                                 MX6QDL_PAD_EIM_DA5__GPIO3_IO05 0x400130b1
 237                                 /* DISP1_DATA05 */
 238                                 MX6QDL_PAD_EIM_DA4__GPIO3_IO04 0x400130b1
 239                                 /* DISP1_DATA06 */
 240                                 MX6QDL_PAD_EIM_DA3__GPIO3_IO03 0x400130b1
 241                                 /* DISP1_DATA07 */
 242                                 MX6QDL_PAD_EIM_DA2__GPIO3_IO02 0x400130b1
 243                                 /* DI1_D0_CS */
 244                                 MX6QDL_PAD_EIM_DA13__GPIO3_IO13 0x400130b1
 245                                 /* DI1_D1_CS */
 246                                 MX6QDL_PAD_EIM_DA14__GPIO3_IO14 0x400130b1
 247                                 /* DI1_PIN01 */
 248                                 MX6QDL_PAD_EIM_DA15__GPIO3_IO15 0x400130b1
 249                                 /* DI1_PIN03 */
 250                                 MX6QDL_PAD_EIM_DA12__GPIO3_IO12 0x400130b1
 251                                 /* DISP1_DATA08 */
 252                                 MX6QDL_PAD_EIM_DA1__GPIO3_IO01 0x400130b1
 253                                 /* DISP1_DATA09 */
 254                                 MX6QDL_PAD_EIM_DA0__GPIO3_IO00 0x400130b1
 255                                 /* DISP1_DATA10 */
 256                                 MX6QDL_PAD_EIM_EB1__GPIO2_IO29 0x400130b1
 257                                 /* DISP1_DATA11 */
 258                                 MX6QDL_PAD_EIM_EB0__GPIO2_IO28 0x400130b1
 259                                 /* DISP1_DATA12 */
 260                                 MX6QDL_PAD_EIM_A17__GPIO2_IO21 0x400130b1
 261                                 /* DISP1_DATA13 */
 262                                 MX6QDL_PAD_EIM_A18__GPIO2_IO20 0x400130b1
 263                                 /* DISP1_DATA14 */
 264                                 MX6QDL_PAD_EIM_A19__GPIO2_IO19 0x400130b1
 265                                 /* DISP1_DATA15 */
 266                                 MX6QDL_PAD_EIM_A20__GPIO2_IO18 0x400130b1
 267                                 /* DISP1_DATA16 */
 268                                 MX6QDL_PAD_EIM_A21__GPIO2_IO17 0x400130b1
 269                                 /* DISP1_DATA17 */
 270                                 MX6QDL_PAD_EIM_A22__GPIO2_IO16 0x400130b1
 271                                 /* DISP1_DATA18 */
 272                                 MX6QDL_PAD_EIM_A23__GPIO6_IO06 0x400130b1
 273                                 /* DISP1_DATA19 */
 274                                 MX6QDL_PAD_EIM_A24__GPIO5_IO04 0x400130b1
 275                                 /* DISP1_DATA20 */
 276                                 MX6QDL_PAD_EIM_D31__GPIO3_IO31 0x400130b1
 277                                 /* DISP1_DATA21 */
 278                                 MX6QDL_PAD_EIM_D30__GPIO3_IO30 0x400130b1
 279                                 /* DISP1_DATA22 */
 280                                 MX6QDL_PAD_EIM_D26__GPIO3_IO26 0x400130b1
 281                                 /* DISP1_DATA23 */
 282                                 MX6QDL_PAD_EIM_D27__GPIO3_IO27 0x400130b1
 283                                 /* DI1_DISP_CLK */
 284                                 MX6QDL_PAD_EIM_A16__GPIO2_IO22 0x400130b1
 285                                 /* SPDIF_IN */
 286                                 MX6QDL_PAD_ENET_RX_ER__GPIO1_IO24 0x400130b1
 287                                 /* SPDIF_OUT */
 288                                 MX6QDL_PAD_GPIO_17__GPIO7_IO12 0x400130b1
 289
 290                                 /* MikroBUS GPIO pin number 10 */
 291                                 MX6QDL_PAD_EIM_LBA__GPIO2_IO27 0x400130b1
 292                         >;
 293                 };
 294
 295                 pinctrl_hummingboard2_ecspi2: hummingboard2-ecspi2grp {
 296                         fsl,pins = <
 297                                 MX6QDL_PAD_EIM_OE__ECSPI2_MISO  0x100b1
 298                                 MX6QDL_PAD_EIM_CS1__ECSPI2_MOSI 0x100b1
 299                                 MX6QDL_PAD_EIM_CS0__ECSPI2_SCLK 0x100b1
 300                                 MX6QDL_PAD_EIM_RW__GPIO2_IO26   0x000b1 /* CS */
 301                         >;
 302                 };
 303
 304                 pinctrl_hummingboard2_gpio7_9: hummingboard2-gpio7_9 {
 305                         fsl,pins = <
 306                                 MX6QDL_PAD_SD4_CMD__GPIO7_IO09 0x80000000
 307                         >;
 308                 };
 309
 310                 pinctrl_hummingboard2_hdmi: hummingboard2-hdmi {
 311                         fsl,pins = <
 312                                 MX6QDL_PAD_KEY_ROW2__HDMI_TX_CEC_LINE 0x1f8b0
 313                         >;
 314                 };
 315
 316                 pinctrl_hummingboard2_i2c1: hummingboard2-i2c1 {
 317                         fsl,pins = <
 318                                 MX6QDL_PAD_EIM_D21__I2C1_SCL 0x4001b8b1
 319                                 MX6QDL_PAD_EIM_D28__I2C1_SDA 0x4001b8b1
 320                         >;
 321                 };
 322
 323                 pinctrl_hummingboard2_i2c2: hummingboard2-i2c2 {
 324                         fsl,pins = <
 325                                 MX6QDL_PAD_KEY_COL3__I2C2_SCL 0x4001b8b1
 326                                 MX6QDL_PAD_KEY_ROW3__I2C2_SDA 0x4001b8b1
 327                         >;
 328                 };
 329
 330                 pinctrl_hummingboard2_i2c3: hummingboard2-i2c3 {
 331                         fsl,pins = <
 332                                 MX6QDL_PAD_EIM_D17__I2C3_SCL 0x4001b8b1
 333                                 MX6QDL_PAD_EIM_D18__I2C3_SDA 0x4001b8b1
 334                         >;
 335                 };
 336
 337                 pinctrl_hummingboard2_mipi: hummingboard2_mipi {
 338                         fsl,pins = <
 339                                 MX6QDL_PAD_SD4_DAT2__GPIO2_IO10 0x4001b8b1
 340                                 MX6QDL_PAD_KEY_COL4__GPIO4_IO14 0x4001b8b1
 341                                 MX6QDL_PAD_NANDF_CS2__CCM_CLKO2 0x130b0
 342                         >;
 343                 };
 344
 345                 pinctrl_hummingboard2_pcie_reset: hummingboard2-pcie-reset {
 346                         fsl,pins = <
 347                                 MX6QDL_PAD_SD4_DAT3__GPIO2_IO11 0x1b0b1
 348                         >;
 349                 };
 350
 351                 pinctrl_hummingboard2_pwm1: pwm1grp {
 352                         fsl,pins = <
 353                                 MX6QDL_PAD_DISP0_DAT8__PWM1_OUT 0x1b0b1
 354                         >;
 355                 };
 356
 357                 pinctrl_hummingboard2_sgtl5000: hummingboard2-sgtl5000 {
 358                         fsl,pins = <
 359                                 MX6QDL_PAD_DISP0_DAT19__AUD5_RXD 0x130b0
 360                                 MX6QDL_PAD_KEY_COL0__AUD5_TXC 0x130b0
 361                                 MX6QDL_PAD_KEY_ROW0__AUD5_TXD 0x110b0
 362                                 MX6QDL_PAD_KEY_COL1__AUD5_TXFS 0x130b0
 363                                 MX6QDL_PAD_GPIO_5__CCM_CLKO1 0x130b0
 364                         >;
 365                 };
 366
 367                 pinctrl_hummingboard2_usbh1_vbus: hummingboard2-usbh1-vbus {
 368                         fsl,pins = <MX6QDL_PAD_GPIO_0__GPIO1_IO00 0x1b0b0>;
 369                 };
 370
 371                 pinctrl_hummingboard2_usbh2_vbus: hummingboard2-usbh2-vbus {
 372                         fsl,pins = <MX6QDL_PAD_SD4_DAT5__GPIO2_IO13 0x1b0b0>;
 373                 };
 374
 375                 pinctrl_hummingboard2_usbh3_vbus: hummingboard2-usbh3-vbus {
 376                         fsl,pins = <MX6QDL_PAD_SD4_CLK__GPIO7_IO10 0x1b0b0>;
 377                 };
 378
 379                 pinctrl_hummingboard2_usbotg_id: hummingboard2-usbotg-id {
 380                         /*
 381                          * Similar to pinctrl_usbotg_2, but we want it
 382                          * pulled down for a fixed host connection.
 383                          */
 384                         fsl,pins = <MX6QDL_PAD_GPIO_1__USB_OTG_ID 0x13059>;
 385                 };
 386
 387                 pinctrl_hummingboard2_usbotg_vbus: hummingboard2-usbotg-vbus {
 388                         fsl,pins = <MX6QDL_PAD_EIM_D22__GPIO3_IO22 0x1b0b0>;
 389                 };
 390
 391                 pinctrl_hummingboard2_usdhc2_aux: hummingboard2-usdhc2-aux {
 392                         fsl,pins = <
 393                                 MX6QDL_PAD_GPIO_4__GPIO1_IO04    0x13071
 394                                 MX6QDL_PAD_KEY_ROW1__SD2_VSELECT 0x1b071
 395                                 MX6QDL_PAD_DISP0_DAT9__GPIO4_IO30 0x1b0b0
 396                         >;
 397                 };
 398
 399                 pinctrl_hummingboard2_usdhc2: hummingboard2-usdhc2 {
 400                         fsl,pins = <
 401                                 MX6QDL_PAD_SD2_CMD__SD2_CMD    0x17059
 402                                 MX6QDL_PAD_SD2_CLK__SD2_CLK    0x10059
 403                                 MX6QDL_PAD_SD2_DAT0__SD2_DATA0 0x17059
 404                                 MX6QDL_PAD_SD2_DAT1__SD2_DATA1 0x17059
 405                                 MX6QDL_PAD_SD2_DAT2__SD2_DATA2 0x17059
 406                                 MX6QDL_PAD_SD2_DAT3__SD2_DATA3 0x13059
 407                         >;
 408                 };
 409
 410                 pinctrl_hummingboard2_usdhc2_100mhz: hummingboard2-usdhc2-100mhz {
 411                         fsl,pins = <
 412                                 MX6QDL_PAD_SD2_CMD__SD2_CMD    0x170b9
 413                                 MX6QDL_PAD_SD2_CLK__SD2_CLK    0x100b9
 414                                 MX6QDL_PAD_SD2_DAT0__SD2_DATA0 0x170b9
 415                                 MX6QDL_PAD_SD2_DAT1__SD2_DATA1 0x170b9
 416                                 MX6QDL_PAD_SD2_DAT2__SD2_DATA2 0x170b9
 417                                 MX6QDL_PAD_SD2_DAT3__SD2_DATA3 0x130b9
 418                         >;
 419                 };
 420
 421                 pinctrl_hummingboard2_usdhc2_200mhz: hummingboard2-usdhc2-200mhz {
 422                         fsl,pins = <
 423                                 MX6QDL_PAD_SD2_CMD__SD2_CMD    0x170f9
 424                                 MX6QDL_PAD_SD2_CLK__SD2_CLK    0x100f9
 425                                 MX6QDL_PAD_SD2_DAT0__SD2_DATA0 0x170f9
 426                                 MX6QDL_PAD_SD2_DAT1__SD2_DATA1 0x170f9
 427                                 MX6QDL_PAD_SD2_DAT2__SD2_DATA2 0x170f9
 428                                 MX6QDL_PAD_SD2_DAT3__SD2_DATA3 0x130f9
 429                         >;
 430                 };
 431
 432                 pinctrl_hummingboard2_usdhc3: hummingboard2-usdhc3 {
 433                         fsl,pins = <
 434                                 MX6QDL_PAD_SD3_CMD__SD3_CMD    0x17059
 435                                 MX6QDL_PAD_SD3_CLK__SD3_CLK    0x10059
 436                                 MX6QDL_PAD_SD3_DAT0__SD3_DATA0 0x17059
 437                                 MX6QDL_PAD_SD3_DAT1__SD3_DATA1 0x17059
 438                                 MX6QDL_PAD_SD3_DAT2__SD3_DATA2 0x17059
 439                                 MX6QDL_PAD_SD3_DAT3__SD3_DATA3 0x17059
 440                                 MX6QDL_PAD_SD3_DAT4__SD3_DATA4 0x17059
 441                                 MX6QDL_PAD_SD3_DAT5__SD3_DATA5 0x17059
 442                                 MX6QDL_PAD_SD3_DAT6__SD3_DATA6 0x17059
 443                                 MX6QDL_PAD_SD3_DAT7__SD3_DATA7 0x17059
 444                                 MX6QDL_PAD_SD3_RST__SD3_RESET  0x17059
 445                         >;
 446                 };
 447
 448                 pinctrl_hummingboard2_uart3: hummingboard2-uart3 {
 449                         fsl,pins = <
 450                                 MX6QDL_PAD_EIM_D25__UART3_TX_DATA       0x1b0b1
 451                                 MX6QDL_PAD_EIM_D24__UART3_RX_DATA       0x40013000
 452                         >;
 453                 };
 454         };
 455 };
 456
 457 &ldb {
 458         status = "disabled";
 459
 460         lvds-channel@0 {
 461                 fsl,data-mapping = "spwg";
 462                 fsl,data-width = <18>;
 463         };
 464 };
 465
 466 &pcie {
 467         pinctrl-names = "default";
 468         pinctrl-0 = <&pinctrl_hummingboard2_pcie_reset>;
 469         reset-gpio = <&gpio2 11 0>;
 470         status = "okay";
 471 };
 472
 473 &pwm1 {
 474         pinctrl-names = "default";
 475         pinctrl-0 = <&pinctrl_hummingboard2_pwm1>;
 476         status = "okay";
 477 };
 478
 479 &pwm3 {
 480         status = "disabled";
 481 };
 482
 483 &pwm4 {
 484         status = "disabled";
 485 };
 486
 487 &ssi1 {
 488         status = "okay";
 489 };
 490
 491 &usbh1 {
 492         disable-over-current;
 493         vbus-supply = <&reg_usbh1_vbus>;
 494         status = "okay";
 495 };
 496
 497 &usbotg {
 498         disable-over-current;
 499         pinctrl-names = "default";
 500         pinctrl-0 = <&pinctrl_hummingboard2_usbotg_id>;
 501         vbus-supply = <&reg_usbotg_vbus>;
 502         status = "okay";
 503 };
 504
 505 &usdhc2 {
 506         pinctrl-names = "default", "state_100mhz", "state_200mhz";
 507         pinctrl-0 = <
 508                 &pinctrl_hummingboard2_usdhc2_aux
 509                 &pinctrl_hummingboard2_usdhc2
 510         >;
 511         pinctrl-1 = <
 512                 &pinctrl_hummingboard2_usdhc2_aux
 513                 &pinctrl_hummingboard2_usdhc2_100mhz
 514         >;
 515         pinctrl-2 = <
 516                 &pinctrl_hummingboard2_usdhc2_aux
 517                 &pinctrl_hummingboard2_usdhc2_200mhz
 518         >;
 519         mmc-pwrseq = <&usdhc2_pwrseq>;
 520         cd-gpios = <&gpio1 4 0>;
 521         status = "okay";
 522 };
 523
 524 &usdhc3 {
 525         pinctrl-names = "default";
 526         pinctrl-0 = <
 527                 &pinctrl_hummingboard2_usdhc3
 528         >;
 529         vmmc-supply = <&reg_3p3v>;
 530         vqmmc-supply = <&reg_3p3v>;
 531         bus-width = <8>;
 532         non-removable;
 533         status = "okay";
 534 };
 535
 536 &uart3 {
 537         pinctrl-names = "default";
 538         pinctrl-0 = <&pinctrl_hummingboard2_uart3>;
 539         status = "okay";
 540 };