1 // SPDX-License-Identifier: GPL-2.0
3 * Copyright 2019 Gateworks Corporation
6 #include <dt-bindings/gpio/gpio.h>
7 #include <dt-bindings/input/linux-event-codes.h>
8 #include <dt-bindings/interrupt-controller/irq.h>
11 /* these are used by bootloader for disabling nodes */
26 compatible = "gpio-keys";
30 gpios = <&gsc_gpio 0 GPIO_ACTIVE_LOW>;
37 interrupt-parent = <&gsc>;
44 interrupt-parent = <&gsc>;
51 interrupt-parent = <&gsc>;
58 interrupt-parent = <&gsc>;
63 label = "switch_hold";
65 interrupt-parent = <&gsc>;
71 compatible = "gpio-leds";
72 pinctrl-names = "default";
73 pinctrl-0 = <&pinctrl_gpio_leds>;
77 gpios = <&gpio4 6 GPIO_ACTIVE_HIGH>; /* MX6_PANLEDG */
79 linux,default-trigger = "heartbeat";
84 gpios = <&gpio4 7 GPIO_ACTIVE_HIGH>; /* MX6_PANLEDR */
85 default-state = "off";
90 gpios = <&gpio4 15 GPIO_ACTIVE_LOW>; /* MX6_LOCLED# */
91 default-state = "off";
96 device_type = "memory";
97 reg = <0x10000000 0x40000000>;
101 compatible = "pps-gpio";
102 pinctrl-names = "default";
103 pinctrl-0 = <&pinctrl_pps>;
104 gpios = <&gpio1 5 GPIO_ACTIVE_HIGH>;
107 reg_3p3v: regulator-3p3v {
108 compatible = "regulator-fixed";
109 regulator-name = "3P3V";
110 regulator-min-microvolt = <3300000>;
111 regulator-max-microvolt = <3300000>;
115 reg_usb_vbus: regulator-5p0v {
116 compatible = "regulator-fixed";
117 regulator-name = "usb_vbus";
118 regulator-min-microvolt = <5000000>;
119 regulator-max-microvolt = <5000000>;
125 pinctrl-names = "default";
126 pinctrl-0 = <&pinctrl_flexcan1>;
131 cs-gpios = <&gpio2 26 GPIO_ACTIVE_LOW>;
132 pinctrl-names = "default";
133 pinctrl-0 = <&pinctrl_ecspi2>;
138 pinctrl-names = "default";
139 pinctrl-0 = <&pinctrl_enet>;
140 phy-mode = "rgmii-id";
145 pinctrl-names = "default";
146 pinctrl-0 = <&pinctrl_gpmi_nand>;
151 clock-frequency = <100000>;
152 pinctrl-names = "default";
153 pinctrl-0 = <&pinctrl_i2c1>;
157 compatible = "gw,gsc";
159 interrupt-parent = <&gpio1>;
160 interrupts = <4 IRQ_TYPE_LEVEL_LOW>;
161 interrupt-controller;
162 #interrupt-cells = <1>;
163 #address-cells = <1>;
167 compatible = "gw,gsc-adc";
168 #address-cells = <1>;
245 compatible = "gw,gsc-fan";
246 #address-cells = <1>;
253 compatible = "nxp,pca9555";
257 interrupt-parent = <&gsc>;
262 compatible = "atmel,24c02";
268 compatible = "atmel,24c02";
274 compatible = "atmel,24c02";
280 compatible = "atmel,24c02";
286 compatible = "dallas,ds1672";
292 clock-frequency = <100000>;
293 pinctrl-names = "default";
294 pinctrl-0 = <&pinctrl_i2c2>;
299 clock-frequency = <100000>;
300 pinctrl-names = "default";
301 pinctrl-0 = <&pinctrl_i2c3>;
305 pinctrl-names = "default";
306 pinctrl-0 = <&pinctrl_accel>;
307 compatible = "st,lis2de12";
309 st,drdy-int-pin = <1>;
310 interrupt-parent = <&gpio7>;
312 interrupt-names = "INT1";
317 pinctrl-names = "default";
318 pinctrl-0 = <&pinctrl_pcie>;
319 reset-gpio = <&gpio1 29 GPIO_ACTIVE_LOW>;
324 pinctrl-names = "default";
325 pinctrl-0 = <&pinctrl_pwm1>; /* MX6_DIO0 */
330 pinctrl-names = "default";
331 pinctrl-0 = <&pinctrl_pwm2>; /* MX6_DIO1 */
336 pinctrl-names = "default";
337 pinctrl-0 = <&pinctrl_pwm3>; /* MX6_DIO2 */
342 pinctrl-names = "default";
343 pinctrl-0 = <&pinctrl_pwm4>; /* MX6_DIO3 */
348 pinctrl-names = "default";
349 pinctrl-0 = <&pinctrl_uart1>;
350 rts-gpios = <&gpio7 12 GPIO_ACTIVE_HIGH>;
355 pinctrl-names = "default";
356 pinctrl-0 = <&pinctrl_uart2>;
361 pinctrl-names = "default";
362 pinctrl-0 = <&pinctrl_uart5>;
367 vbus-supply = <®_usb_vbus>;
368 pinctrl-names = "default";
369 pinctrl-0 = <&pinctrl_usbotg>;
370 disable-over-current;
376 vbus-supply = <®_usb_vbus>;
381 pinctrl-names = "default", "state_100mhz", "state_200mhz";
382 pinctrl-0 = <&pinctrl_usdhc3>;
383 pinctrl-1 = <&pinctrl_usdhc3_100mhz>;
384 pinctrl-2 = <&pinctrl_usdhc3_200mhz>;
385 cd-gpios = <&gpio7 0 GPIO_ACTIVE_LOW>;
386 vmmc-supply = <®_3p3v>;
387 no-1-8-v; /* firmware will remove if board revision supports */
396 pinctrl-names = "default";
397 pinctrl-0 = <&pinctrl_wdog>;
398 fsl,ext-reset-output;
403 pinctrl_accel: accelmuxgrp {
405 MX6QDL_PAD_GPIO_18__GPIO7_IO13 0x1b0b1
409 pinctrl_enet: enetgrp {
411 MX6QDL_PAD_RGMII_RXC__RGMII_RXC 0x1b030
412 MX6QDL_PAD_RGMII_RD0__RGMII_RD0 0x1b030
413 MX6QDL_PAD_RGMII_RD1__RGMII_RD1 0x1b030
414 MX6QDL_PAD_RGMII_RD2__RGMII_RD2 0x1b030
415 MX6QDL_PAD_RGMII_RD3__RGMII_RD3 0x1b030
416 MX6QDL_PAD_RGMII_RX_CTL__RGMII_RX_CTL 0x1b030
417 MX6QDL_PAD_RGMII_TXC__RGMII_TXC 0x1b030
418 MX6QDL_PAD_RGMII_TD0__RGMII_TD0 0x1b030
419 MX6QDL_PAD_RGMII_TD1__RGMII_TD1 0x1b030
420 MX6QDL_PAD_RGMII_TD2__RGMII_TD2 0x1b030
421 MX6QDL_PAD_RGMII_TD3__RGMII_TD3 0x1b030
422 MX6QDL_PAD_RGMII_TX_CTL__RGMII_TX_CTL 0x1b030
423 MX6QDL_PAD_ENET_REF_CLK__ENET_TX_CLK 0x1b0b0
424 MX6QDL_PAD_ENET_MDIO__ENET_MDIO 0x1b0b0
425 MX6QDL_PAD_ENET_MDC__ENET_MDC 0x1b0b0
429 pinctrl_ecspi2: escpi2grp {
431 MX6QDL_PAD_EIM_CS0__ECSPI2_SCLK 0x100b1
432 MX6QDL_PAD_EIM_CS1__ECSPI2_MOSI 0x100b1
433 MX6QDL_PAD_EIM_OE__ECSPI2_MISO 0x100b1
434 MX6QDL_PAD_EIM_RW__GPIO2_IO26 0x100b1
438 pinctrl_flexcan1: flexcan1grp {
440 MX6QDL_PAD_KEY_ROW2__FLEXCAN1_RX 0x1b0b1
441 MX6QDL_PAD_KEY_COL2__FLEXCAN1_TX 0x1b0b1
442 MX6QDL_PAD_GPIO_2__GPIO1_IO02 0x4001b0b0
446 pinctrl_gpio_leds: gpioledsgrp {
448 MX6QDL_PAD_KEY_COL0__GPIO4_IO06 0x1b0b0
449 MX6QDL_PAD_KEY_ROW0__GPIO4_IO07 0x1b0b0
450 MX6QDL_PAD_KEY_ROW4__GPIO4_IO15 0x1b0b0
454 pinctrl_gpmi_nand: gpminandgrp {
456 MX6QDL_PAD_NANDF_CLE__NAND_CLE 0xb0b1
457 MX6QDL_PAD_NANDF_ALE__NAND_ALE 0xb0b1
458 MX6QDL_PAD_NANDF_WP_B__NAND_WP_B 0xb0b1
459 MX6QDL_PAD_NANDF_RB0__NAND_READY_B 0xb000
460 MX6QDL_PAD_NANDF_CS0__NAND_CE0_B 0xb0b1
461 MX6QDL_PAD_SD4_CMD__NAND_RE_B 0xb0b1
462 MX6QDL_PAD_SD4_CLK__NAND_WE_B 0xb0b1
463 MX6QDL_PAD_NANDF_D0__NAND_DATA00 0xb0b1
464 MX6QDL_PAD_NANDF_D1__NAND_DATA01 0xb0b1
465 MX6QDL_PAD_NANDF_D2__NAND_DATA02 0xb0b1
466 MX6QDL_PAD_NANDF_D3__NAND_DATA03 0xb0b1
467 MX6QDL_PAD_NANDF_D4__NAND_DATA04 0xb0b1
468 MX6QDL_PAD_NANDF_D5__NAND_DATA05 0xb0b1
469 MX6QDL_PAD_NANDF_D6__NAND_DATA06 0xb0b1
470 MX6QDL_PAD_NANDF_D7__NAND_DATA07 0xb0b1
474 pinctrl_i2c1: i2c1grp {
476 MX6QDL_PAD_EIM_D21__I2C1_SCL 0x4001b8b1
477 MX6QDL_PAD_EIM_D28__I2C1_SDA 0x4001b8b1
478 MX6QDL_PAD_GPIO_4__GPIO1_IO04 0x0001b0b0
482 pinctrl_i2c2: i2c2grp {
484 MX6QDL_PAD_KEY_COL3__I2C2_SCL 0x4001b8b1
485 MX6QDL_PAD_KEY_ROW3__I2C2_SDA 0x4001b8b1
489 pinctrl_i2c3: i2c3grp {
491 MX6QDL_PAD_GPIO_3__I2C3_SCL 0x4001b8b1
492 MX6QDL_PAD_GPIO_6__I2C3_SDA 0x4001b8b1
496 pinctrl_pcie: pciegrp {
498 MX6QDL_PAD_ENET_TX_EN__GPIO1_IO28 0x1b0b0
499 MX6QDL_PAD_ENET_TXD1__GPIO1_IO29 0x1b0b0
503 pinctrl_pps: ppsgrp {
505 MX6QDL_PAD_GPIO_5__GPIO1_IO05 0x1b0b1
509 pinctrl_pwm1: pwm1grp {
511 MX6QDL_PAD_GPIO_9__PWM1_OUT 0x1b0b1
515 pinctrl_pwm2: pwm2grp {
517 MX6QDL_PAD_SD1_DAT2__PWM2_OUT 0x1b0b1
521 pinctrl_pwm3: pwm3grp {
523 MX6QDL_PAD_SD4_DAT1__PWM3_OUT 0x1b0b1
527 pinctrl_pwm4: pwm4grp {
529 MX6QDL_PAD_SD4_DAT2__PWM4_OUT 0x1b0b1
533 pinctrl_uart1: uart1grp {
535 MX6QDL_PAD_SD3_DAT7__UART1_TX_DATA 0x1b0b1
536 MX6QDL_PAD_SD3_DAT6__UART1_RX_DATA 0x1b0b1
537 MX6QDL_PAD_GPIO_17__GPIO7_IO12 0x4001b0b1
541 pinctrl_uart2: uart2grp {
543 MX6QDL_PAD_SD4_DAT7__UART2_TX_DATA 0x1b0b1
544 MX6QDL_PAD_SD4_DAT4__UART2_RX_DATA 0x1b0b1
545 MX6QDL_PAD_SD4_DAT3__GPIO2_IO11 0x4001b0b1
549 pinctrl_uart5: uart5grp {
551 MX6QDL_PAD_KEY_COL1__UART5_TX_DATA 0x1b0b1
552 MX6QDL_PAD_KEY_ROW1__UART5_RX_DATA 0x1b0b1
556 pinctrl_usbotg: usbotggrp {
558 MX6QDL_PAD_GPIO_1__USB_OTG_ID 0x13059
562 pinctrl_usdhc3: usdhc3grp {
564 MX6QDL_PAD_SD3_CMD__SD3_CMD 0x17059
565 MX6QDL_PAD_SD3_CLK__SD3_CLK 0x10059
566 MX6QDL_PAD_SD3_DAT0__SD3_DATA0 0x17059
567 MX6QDL_PAD_SD3_DAT1__SD3_DATA1 0x17059
568 MX6QDL_PAD_SD3_DAT2__SD3_DATA2 0x17059
569 MX6QDL_PAD_SD3_DAT3__SD3_DATA3 0x17059
570 MX6QDL_PAD_SD3_DAT5__GPIO7_IO00 0x17059 /* CD */
571 MX6QDL_PAD_NANDF_CS1__SD3_VSELECT 0x17059
575 pinctrl_usdhc3_100mhz: usdhc3grp100mhz {
577 MX6QDL_PAD_SD3_CMD__SD3_CMD 0x170b9
578 MX6QDL_PAD_SD3_CLK__SD3_CLK 0x100b9
579 MX6QDL_PAD_SD3_DAT0__SD3_DATA0 0x170b9
580 MX6QDL_PAD_SD3_DAT1__SD3_DATA1 0x170b9
581 MX6QDL_PAD_SD3_DAT2__SD3_DATA2 0x170b9
582 MX6QDL_PAD_SD3_DAT3__SD3_DATA3 0x170b9
583 MX6QDL_PAD_SD3_DAT5__GPIO7_IO00 0x170b9 /* CD */
584 MX6QDL_PAD_NANDF_CS1__SD3_VSELECT 0x170b9
588 pinctrl_usdhc3_200mhz: usdhc3grp200mhz {
590 MX6QDL_PAD_SD3_CMD__SD3_CMD 0x170f9
591 MX6QDL_PAD_SD3_CLK__SD3_CLK 0x100f9
592 MX6QDL_PAD_SD3_DAT0__SD3_DATA0 0x170f9
593 MX6QDL_PAD_SD3_DAT1__SD3_DATA1 0x170f9
594 MX6QDL_PAD_SD3_DAT2__SD3_DATA2 0x170f9
595 MX6QDL_PAD_SD3_DAT3__SD3_DATA3 0x170f9
596 MX6QDL_PAD_SD3_DAT5__GPIO7_IO00 0x170f9 /* CD */
597 MX6QDL_PAD_NANDF_CS1__SD3_VSELECT 0x170f9
601 pinctrl_wdog: wdoggrp {
603 MX6QDL_PAD_SD1_DAT3__WDOG2_B 0x1b0b0