1 // SPDX-License-Identifier: GPL-2.0
3 * Copyright 2019 Gateworks Corporation
6 #include <dt-bindings/gpio/gpio.h>
9 /* these are used by bootloader for disabling nodes */
21 device_type = "memory";
22 reg = <0x10000000 0x20000000>;
26 compatible = "gpio-leds";
27 pinctrl-names = "default";
28 pinctrl-0 = <&pinctrl_gpio_leds>;
32 gpios = <&gpio4 6 GPIO_ACTIVE_HIGH>; /* MX6_PANLEDG */
34 linux,default-trigger = "heartbeat";
39 gpios = <&gpio4 7 GPIO_ACTIVE_HIGH>; /* MX6_PANLEDR */
40 default-state = "off";
45 gpios = <&gpio4 15 GPIO_ACTIVE_LOW>; /* MX6_LOCLED# */
46 default-state = "off";
51 compatible = "pps-gpio";
52 pinctrl-names = "default";
53 pinctrl-0 = <&pinctrl_pps>;
54 gpios = <&gpio4 16 GPIO_ACTIVE_HIGH>;
58 reg_3p3v: regulator-3p3v {
59 compatible = "regulator-fixed";
60 regulator-name = "3P3V";
61 regulator-min-microvolt = <3300000>;
62 regulator-max-microvolt = <3300000>;
66 reg_5p0v: regulator-5p0v {
67 compatible = "regulator-fixed";
68 regulator-name = "5P0V";
69 regulator-min-microvolt = <5000000>;
70 regulator-max-microvolt = <5000000>;
74 reg_wl: regulator-wl {
75 pinctrl-names = "default";
76 pinctrl-0 = <&pinctrl_reg_wl>;
77 compatible = "regulator-fixed";
78 regulator-name = "wl";
79 gpio = <&gpio1 5 GPIO_ACTIVE_HIGH>;
80 startup-delay-us = <100>;
82 regulator-min-microvolt = <3300000>;
83 regulator-max-microvolt = <3300000>;
87 reg_bt: regulator-bt {
88 pinctrl-names = "default";
89 pinctrl-0 = <&pinctrl_reg_bt>;
90 compatible = "regulator-fixed";
91 regulator-name = "bt";
92 gpio = <&gpio1 2 GPIO_ACTIVE_HIGH>;
93 startup-delay-us = <100>;
95 regulator-min-microvolt = <3300000>;
96 regulator-max-microvolt = <3300000>;
103 cs-gpios = <&gpio4 24 GPIO_ACTIVE_HIGH>;
104 pinctrl-names = "default";
105 pinctrl-0 = <&pinctrl_ecspi3>;
110 pinctrl-names = "default";
111 pinctrl-0 = <&pinctrl_enet>;
112 phy-mode = "rgmii-id";
117 pinctrl-names = "default";
118 pinctrl-0 = <&pinctrl_gpmi_nand>;
123 clock-frequency = <100000>;
124 pinctrl-names = "default";
125 pinctrl-0 = <&pinctrl_i2c1>;
129 compatible = "nxp,pca9555";
136 compatible = "atmel,24c02";
142 compatible = "atmel,24c02";
148 compatible = "atmel,24c02";
154 compatible = "atmel,24c02";
160 compatible = "dallas,ds1672";
166 clock-frequency = <100000>;
167 pinctrl-names = "default";
168 pinctrl-0 = <&pinctrl_i2c2>;
173 clock-frequency = <100000>;
174 pinctrl-names = "default";
175 pinctrl-0 = <&pinctrl_i2c3>;
179 pinctrl-names = "default";
180 pinctrl-0 = <&pinctrl_accel>;
181 compatible = "st,lis2de12";
183 st,drdy-int-pin = <1>;
184 interrupt-parent = <&gpio7>;
186 interrupt-names = "INT1";
191 pinctrl-names = "default";
192 pinctrl-0 = <&pinctrl_pcie>;
193 reset-gpio = <&gpio3 20 GPIO_ACTIVE_LOW>;
198 pinctrl-names = "default";
199 pinctrl-0 = <&pinctrl_pwm2>; /* MX6_DIO1 */
204 pinctrl-names = "default";
205 pinctrl-0 = <&pinctrl_pwm3>; /* MX6_DIO2 */
209 /* off-board RS232 */
211 pinctrl-names = "default";
212 pinctrl-0 = <&pinctrl_uart1>;
218 pinctrl-names = "default";
219 pinctrl-0 = <&pinctrl_uart2>;
223 /* Sterling-LWB Bluetooth */
225 pinctrl-names = "default";
226 pinctrl-0 = <&pinctrl_uart4>;
233 pinctrl-names = "default";
234 pinctrl-0 = <&pinctrl_uart5>;
239 vbus-supply = <®_5p0v>;
240 pinctrl-names = "default";
241 pinctrl-0 = <&pinctrl_usbotg>;
242 disable-over-current;
250 /* Sterling-LWB SDIO WiFi */
252 pinctrl-names = "default";
253 pinctrl-0 = <&pinctrl_usdhc2>;
254 vmmc-supply = <®_3p3v>;
261 pinctrl-names = "default", "state_100mhz", "state_200mhz";
262 pinctrl-0 = <&pinctrl_usdhc3>;
263 pinctrl-1 = <&pinctrl_usdhc3_100mhz>;
264 pinctrl-2 = <&pinctrl_usdhc3_200mhz>;
265 cd-gpios = <&gpio7 0 GPIO_ACTIVE_LOW>;
266 vmmc-supply = <®_3p3v>;
271 pinctrl-names = "default";
272 pinctrl-0 = <&pinctrl_wdog>;
273 fsl,ext-reset-output;
277 pinctrl_accel: accelmuxgrp {
279 MX6QDL_PAD_GPIO_18__GPIO7_IO13 0x1b0b1
283 pinctrl_ecspi3: escpi3grp {
285 MX6QDL_PAD_DISP0_DAT0__ECSPI3_SCLK 0x100b1
286 MX6QDL_PAD_DISP0_DAT1__ECSPI3_MOSI 0x100b1
287 MX6QDL_PAD_DISP0_DAT2__ECSPI3_MISO 0x100b1
288 MX6QDL_PAD_DISP0_DAT3__GPIO4_IO24 0x100b1
292 pinctrl_enet: enetgrp {
294 MX6QDL_PAD_RGMII_RXC__RGMII_RXC 0x1b030
295 MX6QDL_PAD_RGMII_RD0__RGMII_RD0 0x1b030
296 MX6QDL_PAD_RGMII_RD1__RGMII_RD1 0x1b030
297 MX6QDL_PAD_RGMII_RD2__RGMII_RD2 0x1b030
298 MX6QDL_PAD_RGMII_RD3__RGMII_RD3 0x1b030
299 MX6QDL_PAD_RGMII_RX_CTL__RGMII_RX_CTL 0x1b030
300 MX6QDL_PAD_RGMII_TXC__RGMII_TXC 0x1b030
301 MX6QDL_PAD_RGMII_TD0__RGMII_TD0 0x1b030
302 MX6QDL_PAD_RGMII_TD1__RGMII_TD1 0x1b030
303 MX6QDL_PAD_RGMII_TD2__RGMII_TD2 0x1b030
304 MX6QDL_PAD_RGMII_TD3__RGMII_TD3 0x1b030
305 MX6QDL_PAD_RGMII_TX_CTL__RGMII_TX_CTL 0x1b030
306 MX6QDL_PAD_ENET_REF_CLK__ENET_TX_CLK 0x1b0b0
307 MX6QDL_PAD_ENET_MDIO__ENET_MDIO 0x1b0b0
308 MX6QDL_PAD_ENET_MDC__ENET_MDC 0x1b0b0
309 MX6QDL_PAD_GPIO_16__ENET_REF_CLK 0x4001b0a8
310 MX6QDL_PAD_ENET_TXD0__GPIO1_IO30 0x1b0b0
314 pinctrl_gpio_leds: gpioledsgrp {
316 MX6QDL_PAD_KEY_COL0__GPIO4_IO06 0x1b0b0
317 MX6QDL_PAD_KEY_ROW0__GPIO4_IO07 0x1b0b0
318 MX6QDL_PAD_KEY_ROW4__GPIO4_IO15 0x1b0b0
322 pinctrl_gpmi_nand: gpminandgrp {
324 MX6QDL_PAD_NANDF_CLE__NAND_CLE 0xb0b1
325 MX6QDL_PAD_NANDF_ALE__NAND_ALE 0xb0b1
326 MX6QDL_PAD_NANDF_WP_B__NAND_WP_B 0xb0b1
327 MX6QDL_PAD_NANDF_RB0__NAND_READY_B 0xb000
328 MX6QDL_PAD_NANDF_CS0__NAND_CE0_B 0xb0b1
329 MX6QDL_PAD_SD4_CMD__NAND_RE_B 0xb0b1
330 MX6QDL_PAD_SD4_CLK__NAND_WE_B 0xb0b1
331 MX6QDL_PAD_NANDF_D0__NAND_DATA00 0xb0b1
332 MX6QDL_PAD_NANDF_D1__NAND_DATA01 0xb0b1
333 MX6QDL_PAD_NANDF_D2__NAND_DATA02 0xb0b1
334 MX6QDL_PAD_NANDF_D3__NAND_DATA03 0xb0b1
335 MX6QDL_PAD_NANDF_D4__NAND_DATA04 0xb0b1
336 MX6QDL_PAD_NANDF_D5__NAND_DATA05 0xb0b1
337 MX6QDL_PAD_NANDF_D6__NAND_DATA06 0xb0b1
338 MX6QDL_PAD_NANDF_D7__NAND_DATA07 0xb0b1
342 pinctrl_i2c1: i2c1grp {
344 MX6QDL_PAD_EIM_D21__I2C1_SCL 0x4001b8b1
345 MX6QDL_PAD_EIM_D28__I2C1_SDA 0x4001b8b1
346 MX6QDL_PAD_GPIO_4__GPIO1_IO04 0x0001b0b0
350 pinctrl_i2c2: i2c2grp {
352 MX6QDL_PAD_KEY_COL3__I2C2_SCL 0x4001b8b1
353 MX6QDL_PAD_KEY_ROW3__I2C2_SDA 0x4001b8b1
357 pinctrl_i2c3: i2c3grp {
359 MX6QDL_PAD_GPIO_3__I2C3_SCL 0x4001b8b1
360 MX6QDL_PAD_GPIO_6__I2C3_SDA 0x4001b8b1
364 pinctrl_pcie: pciegrp {
366 MX6QDL_PAD_EIM_D20__GPIO3_IO20 0x1b0b0
370 pinctrl_pps: ppsgrp {
372 MX6QDL_PAD_DI0_DISP_CLK__GPIO4_IO16 0x1b0b1
376 pinctrl_pwm2: pwm2grp {
378 MX6QDL_PAD_SD1_DAT2__PWM2_OUT 0x1b0b1
382 pinctrl_pwm3: pwm3grp {
384 MX6QDL_PAD_SD1_DAT1__PWM3_OUT 0x1b0b1
388 pinctrl_reg_bt: regbtgrp {
390 MX6QDL_PAD_GPIO_2__GPIO1_IO02 0x1b0b1
394 pinctrl_reg_wl: regwlgrp {
396 MX6QDL_PAD_GPIO_5__GPIO1_IO05 0x1b0b1
400 pinctrl_uart1: uart1grp {
402 MX6QDL_PAD_CSI0_DAT10__UART1_TX_DATA 0x1b0b1
403 MX6QDL_PAD_CSI0_DAT11__UART1_RX_DATA 0x1b0b1
407 pinctrl_uart2: uart2grp {
409 MX6QDL_PAD_SD4_DAT7__UART2_TX_DATA 0x1b0b1
410 MX6QDL_PAD_SD4_DAT4__UART2_RX_DATA 0x1b0b1
414 pinctrl_uart4: uart4grp {
416 MX6QDL_PAD_CSI0_DAT12__UART4_TX_DATA 0x1b0b1
417 MX6QDL_PAD_CSI0_DAT13__UART4_RX_DATA 0x1b0b1
418 MX6QDL_PAD_CSI0_DAT16__UART4_RTS_B 0x1b0b1
419 MX6QDL_PAD_CSI0_DAT17__UART4_CTS_B 0x1b0b1
423 pinctrl_uart5: uart5grp {
425 MX6QDL_PAD_KEY_COL1__UART5_TX_DATA 0x1b0b1
426 MX6QDL_PAD_KEY_ROW1__UART5_RX_DATA 0x1b0b1
430 pinctrl_usbotg: usbotggrp {
432 MX6QDL_PAD_GPIO_1__USB_OTG_ID 0x13059
436 pinctrl_usdhc2: usdhc2grp {
438 MX6QDL_PAD_SD2_CMD__SD2_CMD 0x17059
439 MX6QDL_PAD_SD2_CLK__SD2_CLK 0x10059
440 MX6QDL_PAD_SD2_DAT0__SD2_DATA0 0x17059
441 MX6QDL_PAD_SD2_DAT1__SD2_DATA1 0x17059
442 MX6QDL_PAD_SD2_DAT2__SD2_DATA2 0x17059
443 MX6QDL_PAD_SD2_DAT3__SD2_DATA3 0x17059
447 pinctrl_usdhc3: usdhc3grp {
449 MX6QDL_PAD_SD3_CMD__SD3_CMD 0x17059
450 MX6QDL_PAD_SD3_CLK__SD3_CLK 0x10059
451 MX6QDL_PAD_SD3_DAT0__SD3_DATA0 0x17059
452 MX6QDL_PAD_SD3_DAT1__SD3_DATA1 0x17059
453 MX6QDL_PAD_SD3_DAT2__SD3_DATA2 0x17059
454 MX6QDL_PAD_SD3_DAT3__SD3_DATA3 0x17059
455 MX6QDL_PAD_SD3_DAT5__GPIO7_IO00 0x17059 /* CD */
456 MX6QDL_PAD_NANDF_CS1__SD3_VSELECT 0x17059
460 pinctrl_usdhc3_100mhz: usdhc3grp100mhz {
462 MX6QDL_PAD_SD3_CMD__SD3_CMD 0x170b9
463 MX6QDL_PAD_SD3_CLK__SD3_CLK 0x170b9
464 MX6QDL_PAD_SD3_DAT0__SD3_DATA0 0x170b9
465 MX6QDL_PAD_SD3_DAT1__SD3_DATA1 0x170b9
466 MX6QDL_PAD_SD3_DAT2__SD3_DATA2 0x170b9
467 MX6QDL_PAD_SD3_DAT3__SD3_DATA3 0x170b9
468 MX6QDL_PAD_SD3_DAT5__GPIO7_IO00 0x170b9 /* CD */
469 MX6QDL_PAD_NANDF_CS1__SD3_VSELECT 0x170b9
473 pinctrl_usdhc3_200mhz: usdhc3grp200mhz {
475 MX6QDL_PAD_SD3_CMD__SD3_CMD 0x170f9
476 MX6QDL_PAD_SD3_CLK__SD3_CLK 0x100f9
477 MX6QDL_PAD_SD3_DAT0__SD3_DATA0 0x170f9
478 MX6QDL_PAD_SD3_DAT1__SD3_DATA1 0x170f9
479 MX6QDL_PAD_SD3_DAT2__SD3_DATA2 0x170f9
480 MX6QDL_PAD_SD3_DAT3__SD3_DATA3 0x170f9
481 MX6QDL_PAD_SD3_DAT5__GPIO7_IO00 0x170f9 /* CD */
482 MX6QDL_PAD_NANDF_CS1__SD3_VSELECT 0x170f9
486 pinctrl_wdog: wdoggrp {
488 MX6QDL_PAD_DISP0_DAT8__WDOG1_B 0x1b0b0