1 // SPDX-License-Identifier: GPL-2.0
3 * Copyright 2019 Gateworks Corporation
6 #include <dt-bindings/gpio/gpio.h>
9 /* these are used by bootloader for disabling nodes */
23 compatible = "gpio-leds";
24 pinctrl-names = "default";
25 pinctrl-0 = <&pinctrl_gpio_leds>;
29 gpios = <&gpio4 6 GPIO_ACTIVE_HIGH>; /* MX6_PANLEDG */
31 linux,default-trigger = "heartbeat";
36 gpios = <&gpio4 7 GPIO_ACTIVE_HIGH>; /* MX6_PANLEDR */
37 default-state = "off";
42 device_type = "memory";
43 reg = <0x10000000 0x20000000>;
47 compatible = "pps-gpio";
48 pinctrl-names = "default";
49 pinctrl-0 = <&pinctrl_pps>;
50 gpios = <&gpio1 26 GPIO_ACTIVE_HIGH>;
54 reg_3p3v: regulator-3p3v {
55 compatible = "regulator-fixed";
56 regulator-name = "3P3V";
57 regulator-min-microvolt = <3300000>;
58 regulator-max-microvolt = <3300000>;
62 reg_5p0v: regulator-5p0v {
63 compatible = "regulator-fixed";
64 regulator-name = "5P0V";
65 regulator-min-microvolt = <5000000>;
66 regulator-max-microvolt = <5000000>;
70 reg_usb_otg_vbus: regulator-usb-otg-vbus {
71 compatible = "regulator-fixed";
72 regulator-name = "usb_otg_vbus";
73 regulator-min-microvolt = <5000000>;
74 regulator-max-microvolt = <5000000>;
75 gpio = <&gpio3 22 GPIO_ACTIVE_HIGH>;
81 pinctrl-names = "default";
82 pinctrl-0 = <&pinctrl_enet>;
83 phy-mode = "rgmii-id";
84 phy-reset-gpios = <&gpio1 30 GPIO_ACTIVE_LOW>;
89 pinctrl-names = "default";
90 pinctrl-0 = <&pinctrl_gpmi_nand>;
95 ddc-i2c-bus = <&i2c3>;
100 clock-frequency = <100000>;
101 pinctrl-names = "default";
102 pinctrl-0 = <&pinctrl_i2c1>;
106 compatible = "nxp,pca9555";
113 compatible = "atmel,24c02";
119 compatible = "atmel,24c02";
125 compatible = "atmel,24c02";
131 compatible = "atmel,24c02";
137 compatible = "dallas,ds1672";
143 clock-frequency = <100000>;
144 pinctrl-names = "default";
145 pinctrl-0 = <&pinctrl_i2c2>;
150 clock-frequency = <100000>;
151 pinctrl-names = "default";
152 pinctrl-0 = <&pinctrl_i2c3>;
156 compatible = "nxp,pca9555";
163 compatible = "ti,ads1015";
165 #address-cells = <1>;
189 pinctrl-names = "default";
190 pinctrl-0 = <&pinctrl_pcie>;
191 reset-gpio = <&gpio1 0 GPIO_ACTIVE_LOW>;
196 pinctrl-names = "default";
197 pinctrl-0 = <&pinctrl_pwm2>; /* MX6_DIO1 */
202 pinctrl-names = "default";
203 pinctrl-0 = <&pinctrl_pwm3>; /* MX6_DIO2 */
208 pinctrl-names = "default";
209 pinctrl-0 = <&pinctrl_pwm4>; /* MX6_DIO3 */
214 pinctrl-names = "default";
215 pinctrl-0 = <&pinctrl_uart1>;
220 pinctrl-names = "default";
221 pinctrl-0 = <&pinctrl_uart2>;
226 pinctrl-names = "default";
227 pinctrl-0 = <&pinctrl_uart3>;
232 pinctrl-names = "default";
233 pinctrl-0 = <&pinctrl_uart5>;
238 vbus-supply = <®_usb_otg_vbus>;
239 pinctrl-names = "default";
240 pinctrl-0 = <&pinctrl_usbotg>;
241 disable-over-current;
250 pinctrl-names = "default";
251 pinctrl-0 = <&pinctrl_wdog>;
252 fsl,ext-reset-output;
256 pinctrl_enet: enetgrp {
258 MX6QDL_PAD_RGMII_RXC__RGMII_RXC 0x1b0b0
259 MX6QDL_PAD_RGMII_RD0__RGMII_RD0 0x1b0b0
260 MX6QDL_PAD_RGMII_RD1__RGMII_RD1 0x1b0b0
261 MX6QDL_PAD_RGMII_RD2__RGMII_RD2 0x1b0b0
262 MX6QDL_PAD_RGMII_RD3__RGMII_RD3 0x1b0b0
263 MX6QDL_PAD_RGMII_RX_CTL__RGMII_RX_CTL 0x1b0b0
264 MX6QDL_PAD_RGMII_TXC__RGMII_TXC 0x1b0b0
265 MX6QDL_PAD_RGMII_TD0__RGMII_TD0 0x1b0b0
266 MX6QDL_PAD_RGMII_TD1__RGMII_TD1 0x1b0b0
267 MX6QDL_PAD_RGMII_TD2__RGMII_TD2 0x1b0b0
268 MX6QDL_PAD_RGMII_TD3__RGMII_TD3 0x1b0b0
269 MX6QDL_PAD_RGMII_TX_CTL__RGMII_TX_CTL 0x1b0b0
270 MX6QDL_PAD_ENET_REF_CLK__ENET_TX_CLK 0x1b0b0
271 MX6QDL_PAD_ENET_MDIO__ENET_MDIO 0x1b0b0
272 MX6QDL_PAD_ENET_MDC__ENET_MDC 0x1b0b0
273 MX6QDL_PAD_GPIO_16__ENET_REF_CLK 0x4001b0a8
274 MX6QDL_PAD_ENET_TXD0__GPIO1_IO30 0x1b0b0
278 pinctrl_gpio_leds: gpioledsgrp {
280 MX6QDL_PAD_KEY_COL0__GPIO4_IO06 0x1b0b0
281 MX6QDL_PAD_KEY_ROW0__GPIO4_IO07 0x1b0b0
285 pinctrl_gpmi_nand: gpminandgrp {
287 MX6QDL_PAD_NANDF_CLE__NAND_CLE 0xb0b1
288 MX6QDL_PAD_NANDF_ALE__NAND_ALE 0xb0b1
289 MX6QDL_PAD_NANDF_WP_B__NAND_WP_B 0xb0b1
290 MX6QDL_PAD_NANDF_RB0__NAND_READY_B 0xb000
291 MX6QDL_PAD_NANDF_CS0__NAND_CE0_B 0xb0b1
292 MX6QDL_PAD_SD4_CMD__NAND_RE_B 0xb0b1
293 MX6QDL_PAD_SD4_CLK__NAND_WE_B 0xb0b1
294 MX6QDL_PAD_NANDF_D0__NAND_DATA00 0xb0b1
295 MX6QDL_PAD_NANDF_D1__NAND_DATA01 0xb0b1
296 MX6QDL_PAD_NANDF_D2__NAND_DATA02 0xb0b1
297 MX6QDL_PAD_NANDF_D3__NAND_DATA03 0xb0b1
298 MX6QDL_PAD_NANDF_D4__NAND_DATA04 0xb0b1
299 MX6QDL_PAD_NANDF_D5__NAND_DATA05 0xb0b1
300 MX6QDL_PAD_NANDF_D6__NAND_DATA06 0xb0b1
301 MX6QDL_PAD_NANDF_D7__NAND_DATA07 0xb0b1
305 pinctrl_i2c1: i2c1grp {
307 MX6QDL_PAD_EIM_D21__I2C1_SCL 0x4001b8b1
308 MX6QDL_PAD_EIM_D28__I2C1_SDA 0x4001b8b1
309 MX6QDL_PAD_GPIO_4__GPIO1_IO04 0x0001b0b0
313 pinctrl_i2c2: i2c2grp {
315 MX6QDL_PAD_KEY_COL3__I2C2_SCL 0x4001b8b1
316 MX6QDL_PAD_KEY_ROW3__I2C2_SDA 0x4001b8b1
320 pinctrl_i2c3: i2c3grp {
322 MX6QDL_PAD_GPIO_3__I2C3_SCL 0x4001b8b1
323 MX6QDL_PAD_GPIO_6__I2C3_SDA 0x4001b8b1
324 MX6QDL_PAD_GPIO_2__GPIO1_IO02 0x1b0b0
325 MX6QDL_PAD_GPIO_19__GPIO4_IO05 0x1b0b0
329 pinctrl_pcie: pciegrp {
331 MX6QDL_PAD_GPIO_0__GPIO1_IO00 0x1b0b0
335 pinctrl_pps: ppsgrp {
337 MX6QDL_PAD_ENET_RXD1__GPIO1_IO26 0x1b0b1
341 pinctrl_pwm2: pwm2grp {
343 MX6QDL_PAD_SD1_DAT2__PWM2_OUT 0x1b0b1
347 pinctrl_pwm3: pwm3grp {
349 MX6QDL_PAD_SD1_DAT1__PWM3_OUT 0x1b0b1
353 pinctrl_pwm4: pwm4grp {
355 MX6QDL_PAD_SD1_CMD__PWM4_OUT 0x1b0b1
359 pinctrl_uart1: uart1grp {
361 MX6QDL_PAD_SD3_DAT7__UART1_TX_DATA 0x1b0b1
362 MX6QDL_PAD_SD3_DAT6__UART1_RX_DATA 0x1b0b1
366 pinctrl_uart2: uart2grp {
368 MX6QDL_PAD_SD4_DAT7__UART2_TX_DATA 0x1b0b1
369 MX6QDL_PAD_SD4_DAT4__UART2_RX_DATA 0x1b0b1
373 pinctrl_uart3: uart3grp {
375 MX6QDL_PAD_EIM_D24__UART3_TX_DATA 0x1b0b1
376 MX6QDL_PAD_EIM_D25__UART3_RX_DATA 0x1b0b1
380 pinctrl_uart5: uart5grp {
382 MX6QDL_PAD_KEY_COL1__UART5_TX_DATA 0x1b0b1
383 MX6QDL_PAD_KEY_ROW1__UART5_RX_DATA 0x1b0b1
387 pinctrl_usbotg: usbotggrp {
389 MX6QDL_PAD_GPIO_1__USB_OTG_ID 0x17059
390 MX6QDL_PAD_EIM_D22__GPIO3_IO22 0x1b0b0
394 pinctrl_wdog: wdoggrp {
396 MX6QDL_PAD_DISP0_DAT8__WDOG1_B 0x1b0b0