2 * Copyright 2017 Gateworks Corporation
4 * This file is dual-licensed: you can use it either under the terms
5 * of the GPL or the X11 license, at your option. Note that this dual
6 * licensing only applies to this file, and not this project as a
9 * a) This file is free software; you can redistribute it and/or
10 * modify it under the terms of the GNU General Public License as
11 * published by the Free Software Foundation; either version 2 of
12 * the License, or (at your option) any later version.
14 * This file is distributed in the hope that it will be useful,
15 * but WITHOUT ANY WARRANTY; without even the implied warranty of
16 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
17 * GNU General Public License for more details.
19 * You should have received a copy of the GNU General Public
20 * License along with this file; if not, write to the Free
21 * Software Foundation, Inc., 51 Franklin St, Fifth Floor, Boston,
26 * b) Permission is hereby granted, free of charge, to any person
27 * obtaining a copy of this software and associated documentation
28 * files (the "Software"), to deal in the Software without
29 * restriction, including without limitation the rights to use,
30 * copy, modify, merge, publish, distribute, sublicense, and/or
31 * sell copies of the Software, and to permit persons to whom the
32 * Software is furnished to do so, subject to the following
35 * The above copyright notice and this permission notice shall be
36 * included in all copies or substantial portions of the Software.
38 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
39 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
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41 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
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45 * OTHER DEALINGS IN THE SOFTWARE.
48 #include <dt-bindings/gpio/gpio.h>
49 #include <dt-bindings/input/linux-event-codes.h>
50 #include <dt-bindings/interrupt-controller/irq.h>
53 /* these are used by bootloader for disabling nodes */
67 compatible = "pwm-backlight";
68 pwms = <&pwm4 0 5000000>;
69 brightness-levels = <0 4 8 16 32 64 128 255>;
70 default-brightness-level = <7>;
74 compatible = "gpio-keys";
78 gpios = <&gsc_gpio 0 GPIO_ACTIVE_LOW>;
85 interrupt-parent = <&gsc>;
92 interrupt-parent = <&gsc>;
99 interrupt-parent = <&gsc>;
105 linux,code = <BTN_4>;
106 interrupt-parent = <&gsc>;
111 label = "switch_hold";
112 linux,code = <BTN_5>;
113 interrupt-parent = <&gsc>;
119 compatible = "gpio-leds";
120 pinctrl-names = "default";
121 pinctrl-0 = <&pinctrl_gpio_leds>;
125 gpios = <&gpio4 6 GPIO_ACTIVE_HIGH>; /* MX6_PANLEDG */
126 default-state = "on";
127 linux,default-trigger = "heartbeat";
132 gpios = <&gpio4 7 GPIO_ACTIVE_HIGH>; /* MX6_PANLEDR */
133 default-state = "off";
138 gpios = <&gpio4 15 GPIO_ACTIVE_LOW>; /* MX6_LOCLED# */
139 default-state = "off";
144 device_type = "memory";
145 reg = <0x10000000 0x40000000>;
149 compatible = "pps-gpio";
150 pinctrl-names = "default";
151 pinctrl-0 = <&pinctrl_pps>;
152 gpios = <&gpio1 26 GPIO_ACTIVE_HIGH>;
155 reg_1p0v: regulator-1p0v {
156 compatible = "regulator-fixed";
157 regulator-name = "1P0V";
158 regulator-min-microvolt = <1000000>;
159 regulator-max-microvolt = <1000000>;
163 reg_3p3v: regulator-3p3v {
164 compatible = "regulator-fixed";
165 regulator-name = "3P3V";
166 regulator-min-microvolt = <3300000>;
167 regulator-max-microvolt = <3300000>;
171 reg_usb_h1_vbus: regulator-usb-h1-vbus {
172 compatible = "regulator-fixed";
173 regulator-name = "usb_h1_vbus";
174 regulator-min-microvolt = <5000000>;
175 regulator-max-microvolt = <5000000>;
179 reg_usb_otg_vbus: regulator-usb-otg-vbus {
180 compatible = "regulator-fixed";
181 regulator-name = "usb_otg_vbus";
182 regulator-min-microvolt = <5000000>;
183 regulator-max-microvolt = <5000000>;
184 gpio = <&gpio3 22 GPIO_ACTIVE_HIGH>;
190 assigned-clocks = <&clks IMX6QDL_CLK_LDB_DI0_SEL>,
191 <&clks IMX6QDL_CLK_LDB_DI1_SEL>;
192 assigned-clock-parents = <&clks IMX6QDL_CLK_PLL3_USB_OTG>,
193 <&clks IMX6QDL_CLK_PLL3_USB_OTG>;
197 pinctrl-names = "default";
198 pinctrl-0 = <&pinctrl_enet>;
199 phy-mode = "rgmii-id";
208 #address-cells = <1>;
212 compatible = "marvell,mv88e6085";
216 #address-cells = <1>;
250 clock-frequency = <100000>;
251 pinctrl-names = "default";
252 pinctrl-0 = <&pinctrl_i2c1>;
256 compatible = "gw,gsc";
258 interrupt-parent = <&gpio1>;
259 interrupts = <4 IRQ_TYPE_LEVEL_LOW>;
260 interrupt-controller;
261 #interrupt-cells = <1>;
265 compatible = "gw,gsc-adc";
266 #address-cells = <1>;
344 compatible = "nxp,pca9555";
348 interrupt-parent = <&gsc>;
353 compatible = "atmel,24c02";
359 compatible = "atmel,24c02";
365 compatible = "atmel,24c02";
371 compatible = "atmel,24c02";
377 compatible = "dallas,ds1672";
383 clock-frequency = <100000>;
384 pinctrl-names = "default";
385 pinctrl-0 = <&pinctrl_i2c2>;
389 compatible = "st,lsm9ds1-magn";
391 pinctrl-names = "default";
392 pinctrl-0 = <&pinctrl_mag>;
393 interrupt-parent = <&gpio5>;
394 interrupts = <17 IRQ_TYPE_EDGE_RISING>;
398 compatible = "lltc,ltc3676";
400 interrupt-parent = <&gpio1>;
401 interrupts = <8 IRQ_TYPE_EDGE_FALLING>;
404 /* VDD_SOC (1+R1/R2 = 1.635) */
406 regulator-name = "vddsoc";
407 regulator-min-microvolt = <674400>;
408 regulator-max-microvolt = <1308000>;
409 lltc,fb-voltage-divider = <127000 200000>;
410 regulator-ramp-delay = <7000>;
415 /* VDD_1P8 (1+R1/R2 = 2.505): GbE switch */
417 regulator-name = "vdd1p8";
418 regulator-min-microvolt = <1033310>;
419 regulator-max-microvolt = <2004000>;
420 lltc,fb-voltage-divider = <301000 200000>;
421 regulator-ramp-delay = <7000>;
426 /* VDD_ARM (1+R1/R2 = 1.635) */
428 regulator-name = "vddarm";
429 regulator-min-microvolt = <674400>;
430 regulator-max-microvolt = <1308000>;
431 lltc,fb-voltage-divider = <127000 200000>;
432 regulator-ramp-delay = <7000>;
437 /* VDD_DDR (1+R1/R2 = 2.105) */
439 regulator-name = "vddddr";
440 regulator-min-microvolt = <868310>;
441 regulator-max-microvolt = <1684000>;
442 lltc,fb-voltage-divider = <221000 200000>;
443 regulator-ramp-delay = <7000>;
448 /* VDD_2P5 (1+R1/R2 = 3.435): PCIe/ENET-PHY */
450 regulator-name = "vdd2p5";
451 regulator-min-microvolt = <2490375>;
452 regulator-max-microvolt = <2490375>;
453 lltc,fb-voltage-divider = <487000 200000>;
458 /* VDD_HIGH (1+R1/R2 = 4.17) */
460 regulator-name = "vdd3p0";
461 regulator-min-microvolt = <3023250>;
462 regulator-max-microvolt = <3023250>;
463 lltc,fb-voltage-divider = <634000 200000>;
471 compatible = "st,lsm9ds1-imu";
473 st,drdy-int-pin = <1>;
474 pinctrl-names = "default";
475 pinctrl-0 = <&pinctrl_imu>;
476 interrupt-parent = <&gpio4>;
477 interrupts = <18 IRQ_TYPE_LEVEL_HIGH>;
482 clock-frequency = <100000>;
483 pinctrl-names = "default";
484 pinctrl-0 = <&pinctrl_i2c3>;
487 egalax_ts: touchscreen@4 {
488 compatible = "eeti,egalax_ts";
490 interrupt-parent = <&gpio1>;
491 interrupts = <11 IRQ_TYPE_EDGE_FALLING>;
492 wakeup-gpios = <&gpio1 11 GPIO_ACTIVE_LOW>;
500 fsl,data-mapping = "spwg";
501 fsl,data-width = <18>;
505 native-mode = <&timing0>;
506 timing0: hsd100pxn1 {
507 clock-frequency = <65000000>;
522 pinctrl-names = "default";
523 pinctrl-0 = <&pinctrl_pcie>;
524 reset-gpio = <&gpio1 0 GPIO_ACTIVE_LOW>;
529 pinctrl-names = "default";
530 pinctrl-0 = <&pinctrl_pwm2>; /* MX6_DIO1 */
535 pinctrl-names = "default";
536 pinctrl-0 = <&pinctrl_pwm3>; /* MX6_DIO2 */
542 pinctrl-names = "default";
543 pinctrl-0 = <&pinctrl_pwm4>;
548 pinctrl-names = "default";
549 pinctrl-0 = <&pinctrl_uart1>;
554 pinctrl-names = "default";
555 pinctrl-0 = <&pinctrl_uart2>;
560 pinctrl-names = "default";
561 pinctrl-0 = <&pinctrl_uart3>;
567 pinctrl-names = "default";
568 pinctrl-0 = <&pinctrl_uart4>;
574 pinctrl-names = "default";
575 pinctrl-0 = <&pinctrl_uart5>;
580 vbus-supply = <®_usb_otg_vbus>;
581 pinctrl-names = "default";
582 pinctrl-0 = <&pinctrl_usbotg>;
583 disable-over-current;
588 vbus-supply = <®_usb_h1_vbus>;
593 pinctrl-names = "default", "state_100mhz", "state_200mhz";
594 pinctrl-0 = <&pinctrl_usdhc3>;
595 pinctrl-1 = <&pinctrl_usdhc3_100mhz>;
596 pinctrl-2 = <&pinctrl_usdhc3_200mhz>;
598 vmmc-supply = <®_3p3v>;
599 keep-power-in-suspend;
604 pinctrl-names = "default";
605 pinctrl-0 = <&pinctrl_wdog>;
606 fsl,ext-reset-output;
610 pinctrl_enet: enetgrp {
612 MX6QDL_PAD_RGMII_RXC__RGMII_RXC 0x1b030
613 MX6QDL_PAD_RGMII_RD0__RGMII_RD0 0x1b030
614 MX6QDL_PAD_RGMII_RD1__RGMII_RD1 0x1b030
615 MX6QDL_PAD_RGMII_RD2__RGMII_RD2 0x1b030
616 MX6QDL_PAD_RGMII_RD3__RGMII_RD3 0x1b030
617 MX6QDL_PAD_RGMII_RX_CTL__RGMII_RX_CTL 0x1b030
618 MX6QDL_PAD_RGMII_TXC__RGMII_TXC 0x1b030
619 MX6QDL_PAD_RGMII_TD0__RGMII_TD0 0x1b030
620 MX6QDL_PAD_RGMII_TD1__RGMII_TD1 0x1b030
621 MX6QDL_PAD_RGMII_TD2__RGMII_TD2 0x1b030
622 MX6QDL_PAD_RGMII_TD3__RGMII_TD3 0x1b030
623 MX6QDL_PAD_RGMII_TX_CTL__RGMII_TX_CTL 0x1b030
624 MX6QDL_PAD_ENET_REF_CLK__ENET_TX_CLK 0x1b0b0
625 MX6QDL_PAD_ENET_MDIO__ENET_MDIO 0x1b0b0
626 MX6QDL_PAD_ENET_MDC__ENET_MDC 0x1b0b0
627 MX6QDL_PAD_GPIO_16__ENET_REF_CLK 0x4001b0a8
628 MX6QDL_PAD_ENET_TXD0__GPIO1_IO30 0x4001b0b0 /* PHY_RST# */
632 pinctrl_gpio_leds: gpioledsgrp {
634 MX6QDL_PAD_KEY_COL0__GPIO4_IO06 0x1b0b0
635 MX6QDL_PAD_KEY_ROW0__GPIO4_IO07 0x1b0b0
636 MX6QDL_PAD_KEY_ROW4__GPIO4_IO15 0x1b0b0
640 pinctrl_i2c1: i2c1grp {
642 MX6QDL_PAD_EIM_D21__I2C1_SCL 0x4001b8b1
643 MX6QDL_PAD_EIM_D28__I2C1_SDA 0x4001b8b1
644 MX6QDL_PAD_GPIO_4__GPIO1_IO04 0x0001b0b0 /* GSC_IRQ# */
648 pinctrl_i2c2: i2c2grp {
650 MX6QDL_PAD_KEY_COL3__I2C2_SCL 0x4001b8b1
651 MX6QDL_PAD_KEY_ROW3__I2C2_SDA 0x4001b8b1
655 pinctrl_i2c3: i2c3grp {
657 MX6QDL_PAD_GPIO_3__I2C3_SCL 0x4001b8b1
658 MX6QDL_PAD_GPIO_6__I2C3_SDA 0x4001b8b1
662 pinctrl_imu: imugrp {
664 MX6QDL_PAD_DI0_PIN2__GPIO4_IO18 0x1b0b0
668 pinctrl_mag: maggrp {
670 MX6QDL_PAD_DISP0_DAT23__GPIO5_IO17 0x1b0b0
674 pinctrl_pcie: pciegrp {
676 MX6QDL_PAD_GPIO_0__GPIO1_IO00 0x1b0b0 /* PCIE RST */
680 pinctrl_pmic: pmicgrp {
682 MX6QDL_PAD_GPIO_8__GPIO1_IO08 0x1b0b0 /* PMIC_IRQ# */
686 pinctrl_pps: ppsgrp {
688 MX6QDL_PAD_ENET_RXD1__GPIO1_IO26 0x1b0b1
692 pinctrl_pwm2: pwm2grp {
694 MX6QDL_PAD_SD1_DAT2__PWM2_OUT 0x1b0b1
698 pinctrl_pwm3: pwm3grp {
700 MX6QDL_PAD_SD1_DAT1__PWM3_OUT 0x1b0b1
704 pinctrl_pwm4: pwm4grp {
706 MX6QDL_PAD_SD1_CMD__PWM4_OUT 0x1b0b1
710 pinctrl_uart1: uart1grp {
712 MX6QDL_PAD_CSI0_DAT10__UART1_TX_DATA 0x1b0b1
713 MX6QDL_PAD_CSI0_DAT11__UART1_RX_DATA 0x1b0b1
717 pinctrl_uart2: uart2grp {
719 MX6QDL_PAD_SD4_DAT7__UART2_TX_DATA 0x1b0b1
720 MX6QDL_PAD_SD4_DAT4__UART2_RX_DATA 0x1b0b1
724 pinctrl_uart3: uart3grp {
726 MX6QDL_PAD_EIM_D23__UART3_CTS_B 0x1b0b1
727 MX6QDL_PAD_EIM_D24__UART3_TX_DATA 0x1b0b1
728 MX6QDL_PAD_EIM_D25__UART3_RX_DATA 0x1b0b1
729 MX6QDL_PAD_EIM_D31__UART3_RTS_B 0x1b0b1
733 pinctrl_uart4: uart4grp {
735 MX6QDL_PAD_CSI0_DAT12__UART4_TX_DATA 0x1b0b1
736 MX6QDL_PAD_CSI0_DAT13__UART4_RX_DATA 0x1b0b1
737 MX6QDL_PAD_CSI0_DAT16__UART4_RTS_B 0x1b0b1
738 MX6QDL_PAD_CSI0_DAT17__UART4_CTS_B 0x1b0b1
742 pinctrl_uart5: uart5grp {
744 MX6QDL_PAD_KEY_COL1__UART5_TX_DATA 0x1b0b1
745 MX6QDL_PAD_KEY_ROW1__UART5_RX_DATA 0x1b0b1
749 pinctrl_usbotg: usbotggrp {
751 MX6QDL_PAD_GPIO_1__USB_OTG_ID 0x17059
752 MX6QDL_PAD_EIM_D22__GPIO3_IO22 0x1b0b0 /* PWR_EN */
753 MX6QDL_PAD_KEY_COL4__GPIO4_IO14 0x1b0b0 /* OC */
757 pinctrl_usdhc3: usdhc3grp {
759 MX6QDL_PAD_SD3_CMD__SD3_CMD 0x17059
760 MX6QDL_PAD_SD3_CLK__SD3_CLK 0x10059
761 MX6QDL_PAD_SD3_RST__SD3_RESET 0x10059
762 MX6QDL_PAD_SD3_DAT0__SD3_DATA0 0x17059
763 MX6QDL_PAD_SD3_DAT1__SD3_DATA1 0x17059
764 MX6QDL_PAD_SD3_DAT2__SD3_DATA2 0x17059
765 MX6QDL_PAD_SD3_DAT3__SD3_DATA3 0x17059
766 MX6QDL_PAD_SD3_DAT4__SD3_DATA4 0x17059
767 MX6QDL_PAD_SD3_DAT5__SD3_DATA5 0x17059
768 MX6QDL_PAD_SD3_DAT6__SD3_DATA6 0x17059
769 MX6QDL_PAD_SD3_DAT7__SD3_DATA7 0x17059
773 pinctrl_usdhc3_100mhz: usdhc3grp100mhz {
775 MX6QDL_PAD_SD3_CMD__SD3_CMD 0x170b9
776 MX6QDL_PAD_SD3_CLK__SD3_CLK 0x100b9
777 MX6QDL_PAD_SD3_RST__SD3_RESET 0x100b9
778 MX6QDL_PAD_SD3_DAT0__SD3_DATA0 0x170b9
779 MX6QDL_PAD_SD3_DAT1__SD3_DATA1 0x170b9
780 MX6QDL_PAD_SD3_DAT2__SD3_DATA2 0x170b9
781 MX6QDL_PAD_SD3_DAT3__SD3_DATA3 0x170b9
782 MX6QDL_PAD_SD3_DAT4__SD3_DATA4 0x170b9
783 MX6QDL_PAD_SD3_DAT5__SD3_DATA5 0x170b9
784 MX6QDL_PAD_SD3_DAT6__SD3_DATA6 0x170b9
785 MX6QDL_PAD_SD3_DAT7__SD3_DATA7 0x170b9
789 pinctrl_usdhc3_200mhz: usdhc3grp200mhz {
791 MX6QDL_PAD_SD3_CMD__SD3_CMD 0x170f9
792 MX6QDL_PAD_SD3_CLK__SD3_CLK 0x100f9
793 MX6QDL_PAD_SD3_RST__SD3_RESET 0x100f9
794 MX6QDL_PAD_SD3_DAT0__SD3_DATA0 0x170f9
795 MX6QDL_PAD_SD3_DAT1__SD3_DATA1 0x170f9
796 MX6QDL_PAD_SD3_DAT2__SD3_DATA2 0x170f9
797 MX6QDL_PAD_SD3_DAT3__SD3_DATA3 0x170f9
798 MX6QDL_PAD_SD3_DAT4__SD3_DATA4 0x170f9
799 MX6QDL_PAD_SD3_DAT5__SD3_DATA5 0x170f9
800 MX6QDL_PAD_SD3_DAT6__SD3_DATA6 0x170f9
801 MX6QDL_PAD_SD3_DAT7__SD3_DATA7 0x170f9
805 pinctrl_wdog: wdoggrp {
807 MX6QDL_PAD_DISP0_DAT8__WDOG1_B 0x1b0b0