arch/arm/boot/dts/imx6qdl-gw560x.dtsi

   1 /*
   2  * Copyright 2017 Gateworks Corporation
   3  *
   4  * This file is dual-licensed: you can use it either under the terms
   5  * of the GPL or the X11 license, at your option. Note that this dual
   6  * licensing only applies to this file, and not this project as a
   7  * whole.
   8  *
   9  *  a) This file is free software; you can redistribute it and/or
  10  *     modify it under the terms of the GNU General Public License as
  11  *     published by the Free Software Foundation; either version 2 of
  12  *     the License, or (at your option) any later version.
  13  *
  14  *     This file is distributed in the hope that it will be useful,
  15  *     but WITHOUT ANY WARRANTY; without even the implied warranty of
  16  *     MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  17  *     GNU General Public License for more details.
  18  *
  19  *     You should have received a copy of the GNU General Public
  20  *     License along with this file; if not, write to the Free
  21  *     Software Foundation, Inc., 51 Franklin St, Fifth Floor, Boston,
  22  *     MA 02110-1301 USA
  23  *
  24  * Or, alternatively,
  25  *
  26  *  b) Permission is hereby granted, free of charge, to any person
  27  *     obtaining a copy of this software and associated documentation
  28  *     files (the "Software"), to deal in the Software without
  29  *     restriction, including without limitation the rights to use,
  30  *     copy, modify, merge, publish, distribute, sublicense, and/or
  31  *     sell copies of the Software, and to permit persons to whom the
  32  *     Software is furnished to do so, subject to the following
  33  *     conditions:
  34  *
  35  *     The above copyright notice and this permission notice shall be
  36  *     included in all copies or substantial portions of the Software.
  37  *
  38  *     THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
  39  *     EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
  40  *     OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
  41  *     NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
  42  *     HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
  43  *     WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
  44  *     FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
  45  *     OTHER DEALINGS IN THE SOFTWARE.
  46  */
  47
  48 #include <dt-bindings/gpio/gpio.h>
  49 #include <dt-bindings/input/input.h>
  50
  51 / {
  52         /* these are used by bootloader for disabling nodes */
  53         aliases {
  54                 led0 = &led0;
  55                 led1 = &led1;
  56                 led2 = &led2;
  57                 ssi0 = &ssi1;
  58                 usb0 = &usbh1;
  59                 usb1 = &usbotg;
  60         };
  61
  62         chosen {
  63                 stdout-path = &uart2;
  64         };
  65
  66         backlight-display {
  67                 compatible = "pwm-backlight";
  68                 pwms = <&pwm4 0 5000000>;
  69                 brightness-levels = <
  70                         0  1  2  3  4  5  6  7  8  9
  71                         10 11 12 13 14 15 16 17 18 19
  72                         20 21 22 23 24 25 26 27 28 29
  73                         30 31 32 33 34 35 36 37 38 39
  74                         40 41 42 43 44 45 46 47 48 49
  75                         50 51 52 53 54 55 56 57 58 59
  76                         60 61 62 63 64 65 66 67 68 69
  77                         70 71 72 73 74 75 76 77 78 79
  78                         80 81 82 83 84 85 86 87 88 89
  79                         90 91 92 93 94 95 96 97 98 99
  80                         100
  81                         >;
  82                 default-brightness-level = <100>;
  83         };
  84
  85         backlight-keypad {
  86                 compatible = "gpio-backlight";
  87                 gpios = <&gpio4 30 GPIO_ACTIVE_HIGH>;
  88                 default-on;
  89         };
  90
  91         gpio-keys {
  92                 compatible = "gpio-keys";
  93                 #address-cells = <1>;
  94                 #size-cells = <0>;
  95
  96                 user-pb {
  97                         label = "user_pb";
  98                         gpios = <&gsc_gpio 0 GPIO_ACTIVE_LOW>;
  99                         linux,code = <BTN_0>;
 100                 };
 101
 102                 user-pb1x {
 103                         label = "user_pb1x";
 104                         linux,code = <BTN_1>;
 105                         interrupt-parent = <&gsc>;
 106                         interrupts = <0>;
 107                 };
 108
 109                 key-erased {
 110                         label = "key-erased";
 111                         linux,code = <BTN_2>;
 112                         interrupt-parent = <&gsc>;
 113                         interrupts = <1>;
 114                 };
 115
 116                 eeprom-wp {
 117                         label = "eeprom_wp";
 118                         linux,code = <BTN_3>;
 119                         interrupt-parent = <&gsc>;
 120                         interrupts = <2>;
 121                 };
 122
 123                 tamper {
 124                         label = "tamper";
 125                         linux,code = <BTN_4>;
 126                         interrupt-parent = <&gsc>;
 127                         interrupts = <5>;
 128                 };
 129
 130                 switch-hold {
 131                         label = "switch_hold";
 132                         linux,code = <BTN_5>;
 133                         interrupt-parent = <&gsc>;
 134                         interrupts = <7>;
 135                 };
 136         };
 137
 138         leds {
 139                 compatible = "gpio-leds";
 140                 pinctrl-names = "default";
 141                 pinctrl-0 = <&pinctrl_gpio_leds>;
 142
 143                 led0: user1 {
 144                         label = "user1";
 145                         gpios = <&gpio4 6 GPIO_ACTIVE_HIGH>; /* MX6_PANLEDG */
 146                         default-state = "on";
 147                         linux,default-trigger = "heartbeat";
 148                 };
 149
 150                 led1: user2 {
 151                         label = "user2";
 152                         gpios = <&gpio4 7 GPIO_ACTIVE_HIGH>; /* MX6_PANLEDR */
 153                         default-state = "off";
 154                 };
 155
 156                 led2: user3 {
 157                         label = "user3";
 158                         gpios = <&gpio4 15 GPIO_ACTIVE_LOW>; /* MX6_LOCLED# */
 159                         default-state = "off";
 160                 };
 161         };
 162
 163         memory@10000000 {
 164                 device_type = "memory";
 165                 reg = <0x10000000 0x40000000>;
 166         };
 167
 168         pps {
 169                 compatible = "pps-gpio";
 170                 pinctrl-names = "default";
 171                 pinctrl-0 = <&pinctrl_pps>;
 172                 gpios = <&gpio1 26 GPIO_ACTIVE_HIGH>;
 173         };
 174
 175         reg_2p5v: regulator-2p5v {
 176                 compatible = "regulator-fixed";
 177                 regulator-name = "2P5V";
 178                 regulator-min-microvolt = <2500000>;
 179                 regulator-max-microvolt = <2500000>;
 180                 regulator-always-on;
 181         };
 182
 183         reg_3p3v: regulator-3p3v {
 184                 compatible = "regulator-fixed";
 185                 regulator-name = "3P3V";
 186                 regulator-min-microvolt = <3300000>;
 187                 regulator-max-microvolt = <3300000>;
 188                 regulator-always-on;
 189         };
 190
 191         reg_5p0v: regulator-5p0v {
 192                 compatible = "regulator-fixed";
 193                 regulator-name = "5P0V";
 194                 regulator-min-microvolt = <5000000>;
 195                 regulator-max-microvolt = <5000000>;
 196                 regulator-always-on;
 197         };
 198
 199         reg_12p0v: regulator-12p0v {
 200                 compatible = "regulator-fixed";
 201                 regulator-name = "12P0V";
 202                 regulator-min-microvolt = <12000000>;
 203                 regulator-max-microvolt = <12000000>;
 204                 gpio = <&gpio4 25 GPIO_ACTIVE_HIGH>;
 205                 enable-active-high;
 206         };
 207
 208         reg_1p4v: regulator-vddsoc {
 209                 compatible = "regulator-fixed";
 210                 regulator-name = "vdd_soc";
 211                 regulator-min-microvolt = <1400000>;
 212                 regulator-max-microvolt = <1400000>;
 213                 regulator-always-on;
 214         };
 215
 216         reg_usb_h1_vbus: regulator-usb-h1-vbus {
 217                 compatible = "regulator-fixed";
 218                 regulator-name = "usb_h1_vbus";
 219                 regulator-min-microvolt = <5000000>;
 220                 regulator-max-microvolt = <5000000>;
 221                 regulator-always-on;
 222         };
 223
 224         reg_usb_otg_vbus: regulator-usb-otg-vbus {
 225                 compatible = "regulator-fixed";
 226                 regulator-name = "usb_otg_vbus";
 227                 regulator-min-microvolt = <5000000>;
 228                 regulator-max-microvolt = <5000000>;
 229                 gpio = <&gpio3 22 GPIO_ACTIVE_HIGH>;
 230                 enable-active-high;
 231         };
 232
 233         sound {
 234                 compatible = "fsl,imx6q-ventana-sgtl5000",
 235                              "fsl,imx-audio-sgtl5000";
 236                 model = "sgtl5000-audio";
 237                 ssi-controller = <&ssi1>;
 238                 audio-codec = <&sgtl5000>;
 239                 audio-routing =
 240                         "MIC_IN", "Mic Jack",
 241                         "Mic Jack", "Mic Bias",
 242                         "Headphone Jack", "HP_OUT";
 243                 mux-int-port = <1>;
 244                 mux-ext-port = <4>;
 245         };
 246 };
 247
 248 &audmux {
 249         pinctrl-names = "default";
 250         pinctrl-0 = <&pinctrl_audmux>;
 251         status = "okay";
 252 };
 253
 254 &ecspi3 {
 255         cs-gpios = <&gpio4 24 GPIO_ACTIVE_HIGH>;
 256         pinctrl-names = "default";
 257         pinctrl-0 = <&pinctrl_ecspi3>;
 258         status = "okay";
 259 };
 260
 261 &can1 {
 262         pinctrl-names = "default";
 263         pinctrl-0 = <&pinctrl_flexcan>;
 264         status = "okay";
 265 };
 266
 267 &clks {
 268         assigned-clocks = <&clks IMX6QDL_CLK_LDB_DI0_SEL>,
 269                           <&clks IMX6QDL_CLK_LDB_DI1_SEL>;
 270         assigned-clock-parents = <&clks IMX6QDL_CLK_PLL3_USB_OTG>,
 271                                  <&clks IMX6QDL_CLK_PLL3_USB_OTG>;
 272 };
 273
 274 &fec {
 275         pinctrl-names = "default";
 276         pinctrl-0 = <&pinctrl_enet>;
 277         phy-mode = "rgmii-id";
 278         phy-reset-gpios = <&gpio1 30 GPIO_ACTIVE_LOW>;
 279         status = "okay";
 280 };
 281
 282 &hdmi {
 283         ddc-i2c-bus = <&i2c3>;
 284         status = "okay";
 285 };
 286
 287 &i2c1 {
 288         clock-frequency = <100000>;
 289         pinctrl-names = "default";
 290         pinctrl-0 = <&pinctrl_i2c1>;
 291         status = "okay";
 292
 293         gsc: gsc@20 {
 294                 compatible = "gw,gsc";
 295                 reg = <0x20>;
 296                 interrupt-parent = <&gpio1>;
 297                 interrupts = <4 GPIO_ACTIVE_LOW>;
 298                 interrupt-controller;
 299                 #interrupt-cells = <1>;
 300                 #size-cells = <0>;
 301
 302                 adc {
 303                         compatible = "gw,gsc-adc";
 304                         #address-cells = <1>;
 305                         #size-cells = <0>;
 306
 307                         channel@0 {
 308                                 gw,mode = <0>;
 309                                 reg = <0x00>;
 310                                 label = "temp";
 311                         };
 312
 313                         channel@2 {
 314                                 gw,mode = <1>;
 315                                 reg = <0x02>;
 316                                 label = "vdd_vin";
 317                         };
 318
 319                         channel@5 {
 320                                 gw,mode = <1>;
 321                                 reg = <0x05>;
 322                                 label = "vdd_3p3";
 323                         };
 324
 325                         channel@8 {
 326                                 gw,mode = <1>;
 327                                 reg = <0x08>;
 328                                 label = "vdd_bat";
 329                         };
 330
 331                         channel@b {
 332                                 gw,mode = <1>;
 333                                 reg = <0x0b>;
 334                                 label = "vdd_5p0";
 335                         };
 336
 337                         channel@e {
 338                                 gw,mode = <1>;
 339                                 reg = <0xe>;
 340                                 label = "vdd_arm";
 341                         };
 342
 343                         channel@11 {
 344                                 gw,mode = <1>;
 345                                 reg = <0x11>;
 346                                 label = "vdd_soc";
 347                         };
 348
 349                         channel@14 {
 350                                 gw,mode = <1>;
 351                                 reg = <0x14>;
 352                                 label = "vdd_3p0";
 353                         };
 354
 355                         channel@17 {
 356                                 gw,mode = <1>;
 357                                 reg = <0x17>;
 358                                 label = "vdd_1p5";
 359                         };
 360
 361                         channel@1d {
 362                                 gw,mode = <1>;
 363                                 reg = <0x1d>;
 364                                 label = "vdd_1p8";
 365                         };
 366
 367                         channel@20 {
 368                                 gw,mode = <1>;
 369                                 reg = <0x20>;
 370                                 label = "vdd_an1";
 371                         };
 372
 373                         channel@23 {
 374                                 gw,mode = <1>;
 375                                 reg = <0x23>;
 376                                 label = "vdd_2p5";
 377                         };
 378
 379                         channel@26 {
 380                                 gw,mode = <1>;
 381                                 reg = <0x26>;
 382                                 label = "vdd_gps";
 383                         };
 384
 385                         channel@29 {
 386                                 gw,mode = <1>;
 387                                 reg = <0x29>;
 388                                 label = "vdd_an2";
 389                         };
 390                 };
 391         };
 392
 393         gsc_gpio: gpio@23 {
 394                 compatible = "nxp,pca9555";
 395                 reg = <0x23>;
 396                 gpio-controller;
 397                 #gpio-cells = <2>;
 398                 interrupt-parent = <&gsc>;
 399                 interrupts = <4>;
 400         };
 401
 402         eeprom1: eeprom@50 {
 403                 compatible = "atmel,24c02";
 404                 reg = <0x50>;
 405                 pagesize = <16>;
 406         };
 407
 408         eeprom2: eeprom@51 {
 409                 compatible = "atmel,24c02";
 410                 reg = <0x51>;
 411                 pagesize = <16>;
 412         };
 413
 414         eeprom3: eeprom@52 {
 415                 compatible = "atmel,24c02";
 416                 reg = <0x52>;
 417                 pagesize = <16>;
 418         };
 419
 420         eeprom4: eeprom@53 {
 421                 compatible = "atmel,24c02";
 422                 reg = <0x53>;
 423                 pagesize = <16>;
 424         };
 425
 426         ds1672: rtc@68 {
 427                 compatible = "dallas,ds1672";
 428                 reg = <0x68>;
 429         };
 430 };
 431
 432 &i2c2 {
 433         clock-frequency = <100000>;
 434         pinctrl-names = "default";
 435         pinctrl-0 = <&pinctrl_i2c2>;
 436         status = "okay";
 437
 438         sgtl5000: codec@a {
 439                 compatible = "fsl,sgtl5000";
 440                 reg = <0x0a>;
 441                 #sound-dai-cells = <0>;
 442                 clocks = <&clks IMX6QDL_CLK_CKO>;
 443                 VDDA-supply = <&reg_1p8v>;
 444                 VDDIO-supply = <&reg_3p3v>;
 445         };
 446
 447         magn@1c {
 448                 compatible = "st,lsm9ds1-magn";
 449                 reg = <0x1c>;
 450                 pinctrl-names = "default";
 451                 pinctrl-0 = <&pinctrl_mag>;
 452                 interrupt-parent = <&gpio5>;
 453                 interrupts = <9 IRQ_TYPE_EDGE_RISING>;
 454         };
 455
 456         tca8418: keypad@34 {
 457                 compatible = "ti,tca8418";
 458                 pinctrl-names = "default";
 459                 pinctrl-0 = <&pinctrl_keypad>;
 460                 reg = <0x34>;
 461                 interrupt-parent = <&gpio5>;
 462                 interrupts = <11 IRQ_TYPE_EDGE_FALLING>;
 463                 linux,keymap = < MATRIX_KEY(0x00, 0x01, BTN_0)
 464                                  MATRIX_KEY(0x00, 0x00, BTN_1)
 465                                  MATRIX_KEY(0x01, 0x01, BTN_2)
 466                                  MATRIX_KEY(0x01, 0x00, BTN_3)
 467                                  MATRIX_KEY(0x02, 0x00, BTN_4)
 468                                  MATRIX_KEY(0x00, 0x03, BTN_5)
 469                                  MATRIX_KEY(0x00, 0x02, BTN_6)
 470                                  MATRIX_KEY(0x01, 0x03, BTN_7)
 471                                  MATRIX_KEY(0x01, 0x02, BTN_8)
 472                                  MATRIX_KEY(0x02, 0x02, BTN_9)
 473                 >;
 474                 keypad,num-rows = <4>;
 475                 keypad,num-columns = <4>;
 476         };
 477
 478         ltc3676: pmic@3c {
 479                 compatible = "lltc,ltc3676";
 480                 pinctrl-names = "default";
 481                 pinctrl-0 = <&pinctrl_pmic>;
 482                 reg = <0x3c>;
 483                 interrupt-parent = <&gpio1>;
 484                 interrupts = <8 IRQ_TYPE_EDGE_FALLING>;
 485
 486                 regulators {
 487                         /* VDD_DDR (1+R1/R2 = 2.105) */
 488                         reg_vdd_ddr: sw2 {
 489                                 regulator-name = "vddddr";
 490                                 regulator-min-microvolt = <868310>;
 491                                 regulator-max-microvolt = <1684000>;
 492                                 lltc,fb-voltage-divider = <221000 200000>;
 493                                 regulator-ramp-delay = <7000>;
 494                                 regulator-boot-on;
 495                                 regulator-always-on;
 496                         };
 497
 498                         /* VDD_ARM (1+R1/R2 = 1.931) */
 499                         reg_vdd_arm: sw3 {
 500                                 regulator-name = "vddarm";
 501                                 regulator-min-microvolt = <796551>;
 502                                 regulator-max-microvolt = <1544827>;
 503                                 lltc,fb-voltage-divider = <243000 261000>;
 504                                 regulator-ramp-delay = <7000>;
 505                                 regulator-boot-on;
 506                                 regulator-always-on;
 507                                 linux,phandle = <&reg_vdd_arm>;
 508                         };
 509
 510                         /* VDD_1P8 (1+R1/R2 = 2.505): GPS/VideoIn/ENET-PHY */
 511                         reg_1p8v: sw4 {
 512                                 regulator-name = "vdd1p8";
 513                                 regulator-min-microvolt = <1033310>;
 514                                 regulator-max-microvolt = <2004000>;
 515                                 lltc,fb-voltage-divider = <301000 200000>;
 516                                 regulator-ramp-delay = <7000>;
 517                                 regulator-boot-on;
 518                                 regulator-always-on;
 519                         };
 520
 521                         /* VDD_1P0 (1+R1/R2 = 1.39): PCIe/ENET-PHY */
 522                         reg_1p0v: ldo2 {
 523                                 regulator-name = "vdd1p0";
 524                                 regulator-min-microvolt = <950000>;
 525                                 regulator-max-microvolt = <1050000>;
 526                                 lltc,fb-voltage-divider = <78700 200000>;
 527                                 regulator-boot-on;
 528                                 regulator-always-on;
 529                         };
 530
 531                         /* VDD_AUD_1P8: Audio codec */
 532                         reg_aud_1p8v: ldo3 {
 533                                 regulator-name = "vdd1p8a";
 534                                 regulator-min-microvolt = <1800000>;
 535                                 regulator-max-microvolt = <1800000>;
 536                                 regulator-boot-on;
 537                         };
 538
 539                         /* VDD_HIGH (1+R1/R2 = 4.17) */
 540                         reg_3p0v: ldo4 {
 541                                 regulator-name = "vdd3p0";
 542                                 regulator-min-microvolt = <3023250>;
 543                                 regulator-max-microvolt = <3023250>;
 544                                 lltc,fb-voltage-divider = <634000 200000>;
 545                                 regulator-boot-on;
 546                                 regulator-always-on;
 547                         };
 548                 };
 549         };
 550
 551         imu@6a {
 552                 compatible = "st,lsm9ds1-imu";
 553                 reg = <0x6a>;
 554                 st,drdy-int-pin = <1>;
 555                 pinctrl-names = "default";
 556                 pinctrl-0 = <&pinctrl_imu>;
 557                 interrupt-parent = <&gpio5>;
 558                 interrupts = <6 IRQ_TYPE_LEVEL_HIGH>;
 559         };
 560 };
 561
 562 &i2c3 {
 563         clock-frequency = <100000>;
 564         pinctrl-names = "default";
 565         pinctrl-0 = <&pinctrl_i2c3>;
 566         status = "okay";
 567
 568         egalax_ts: touchscreen@4 {
 569                 compatible = "eeti,egalax_ts";
 570                 reg = <0x04>;
 571                 interrupt-parent = <&gpio5>;
 572                 interrupts = <12 IRQ_TYPE_EDGE_FALLING>;
 573                 wakeup-gpios = <&gpio5 13 GPIO_ACTIVE_LOW>;
 574         };
 575 };
 576
 577 &ldb {
 578         fsl,dual-channel;
 579         status = "okay";
 580
 581         lvds-channel@0 {
 582                 fsl,data-mapping = "spwg";
 583                 fsl,data-width = <18>;
 584                 status = "okay";
 585
 586                 display-timings {
 587                         native-mode = <&timing0>;
 588                         timing0: hsd100pxn1 {
 589                                 clock-frequency = <65000000>;
 590                                 hactive = <1024>;
 591                                 vactive = <768>;
 592                                 hback-porch = <220>;
 593                                 hfront-porch = <40>;
 594                                 vback-porch = <21>;
 595                                 vfront-porch = <7>;
 596                                 hsync-len = <60>;
 597                                 vsync-len = <10>;
 598                         };
 599                 };
 600         };
 601 };
 602
 603 &pcie {
 604         pinctrl-names = "default";
 605         pinctrl-0 = <&pinctrl_pcie>;
 606         reset-gpio = <&gpio4 31 GPIO_ACTIVE_LOW>;
 607         status = "okay";
 608 };
 609
 610 &pwm2 {
 611         pinctrl-names = "default";
 612         pinctrl-0 = <&pinctrl_pwm2>; /* MX6_DIO1 */
 613         status = "disabled";
 614 };
 615
 616 &pwm3 {
 617         pinctrl-names = "default";
 618         pinctrl-0 = <&pinctrl_pwm3>; /* MX6_DIO2 */
 619         status = "disabled";
 620 };
 621
 622 &pwm4 {
 623         #pwm-cells = <2>;
 624         pinctrl-names = "default";
 625         pinctrl-0 = <&pinctrl_pwm4>;
 626         status = "okay";
 627 };
 628
 629 &ssi1 {
 630         status = "okay";
 631 };
 632
 633 &uart1 {
 634         pinctrl-names = "default";
 635         pinctrl-0 = <&pinctrl_uart1>;
 636         uart-has-rtscts;
 637         rts-gpios = <&gpio7 1 GPIO_ACTIVE_HIGH>;
 638         status = "okay";
 639 };
 640
 641 &uart2 {
 642         pinctrl-names = "default";
 643         pinctrl-0 = <&pinctrl_uart2>;
 644         status = "okay";
 645 };
 646
 647 &uart5 {
 648         pinctrl-names = "default";
 649         pinctrl-0 = <&pinctrl_uart5>;
 650         status = "okay";
 651 };
 652
 653 &usbotg {
 654         vbus-supply = <&reg_usb_otg_vbus>;
 655         pinctrl-names = "default";
 656         pinctrl-0 = <&pinctrl_usbotg>;
 657         disable-over-current;
 658         status = "okay";
 659 };
 660
 661 &usbh1 {
 662         vbus-supply = <&reg_usb_h1_vbus>;
 663         pinctrl-names = "default";
 664         pinctrl-0 = <&pinctrl_usbh1>;
 665         status = "okay";
 666 };
 667
 668 &usdhc2 {
 669         pinctrl-names = "default";
 670         pinctrl-0 = <&pinctrl_usdhc2>;
 671         bus-width = <8>;
 672         vmmc-supply = <&reg_3p3v>;
 673         non-removable;
 674         status = "okay";
 675 };
 676
 677 &usdhc3 {
 678         pinctrl-names = "default", "state_100mhz", "state_200mhz";
 679         pinctrl-0 = <&pinctrl_usdhc3>;
 680         pinctrl-1 = <&pinctrl_usdhc3_100mhz>;
 681         pinctrl-2 = <&pinctrl_usdhc3_200mhz>;
 682         cd-gpios = <&gpio7 0 GPIO_ACTIVE_HIGH>;
 683         vmmc-supply = <&reg_3p3v>;
 684         status = "okay";
 685 };
 686
 687 &wdog1 {
 688         pinctrl-names = "default";
 689         pinctrl-0 = <&pinctrl_wdog>;
 690         fsl,ext-reset-output;
 691 };
 692
 693 &iomuxc {
 694         pinctrl_audmux: audmuxgrp {
 695                 fsl,pins = <
 696                         /* AUD4 */
 697                         MX6QDL_PAD_DISP0_DAT20__AUD4_TXC        0x130b0
 698                         MX6QDL_PAD_DISP0_DAT21__AUD4_TXD        0x110b0
 699                         MX6QDL_PAD_DISP0_DAT22__AUD4_TXFS       0x130b0
 700                         MX6QDL_PAD_DISP0_DAT23__AUD4_RXD        0x130b0
 701                         MX6QDL_PAD_GPIO_0__CCM_CLKO1            0x130b0 /* AUD4_MCK */
 702                         /* AUD6 */
 703                         MX6QDL_PAD_DI0_PIN2__AUD6_TXD           0x130b0
 704                         MX6QDL_PAD_DI0_PIN3__AUD6_TXFS          0x130b0
 705                         MX6QDL_PAD_DI0_PIN4__AUD6_RXD           0x130b0
 706                         MX6QDL_PAD_DI0_PIN15__AUD6_TXC          0x130b0
 707                 >;
 708         };
 709
 710         pinctrl_ecspi3: escpi3grp {
 711                 fsl,pins = <
 712                         MX6QDL_PAD_DISP0_DAT0__ECSPI3_SCLK      0x100b1
 713                         MX6QDL_PAD_DISP0_DAT1__ECSPI3_MOSI      0x100b1
 714                         MX6QDL_PAD_DISP0_DAT2__ECSPI3_MISO      0x100b1
 715                         MX6QDL_PAD_DISP0_DAT3__GPIO4_IO24       0x100b1
 716                 >;
 717         };
 718
 719         pinctrl_enet: enetgrp {
 720                 fsl,pins = <
 721                         MX6QDL_PAD_RGMII_RXC__RGMII_RXC         0x1b030
 722                         MX6QDL_PAD_RGMII_RD0__RGMII_RD0         0x1b030
 723                         MX6QDL_PAD_RGMII_RD1__RGMII_RD1         0x1b030
 724                         MX6QDL_PAD_RGMII_RD2__RGMII_RD2         0x1b030
 725                         MX6QDL_PAD_RGMII_RD3__RGMII_RD3         0x1b030
 726                         MX6QDL_PAD_RGMII_RX_CTL__RGMII_RX_CTL   0x1b030
 727                         MX6QDL_PAD_RGMII_TXC__RGMII_TXC         0x1b030
 728                         MX6QDL_PAD_RGMII_TD0__RGMII_TD0         0x1b030
 729                         MX6QDL_PAD_RGMII_TD1__RGMII_TD1         0x1b030
 730                         MX6QDL_PAD_RGMII_TD2__RGMII_TD2         0x1b030
 731                         MX6QDL_PAD_RGMII_TD3__RGMII_TD3         0x1b030
 732                         MX6QDL_PAD_RGMII_TX_CTL__RGMII_TX_CTL   0x1b030
 733                         MX6QDL_PAD_ENET_REF_CLK__ENET_TX_CLK    0x1b0b0
 734                         MX6QDL_PAD_ENET_MDIO__ENET_MDIO         0x1b0b0
 735                         MX6QDL_PAD_ENET_MDC__ENET_MDC           0x1b0b0
 736                         MX6QDL_PAD_GPIO_16__ENET_REF_CLK        0x4001b0a8
 737                         MX6QDL_PAD_ENET_TXD0__GPIO1_IO30        0x4001b0b0 /* PHY_RST# */
 738                 >;
 739         };
 740
 741         pinctrl_flexcan: flexcangrp {
 742                 fsl,pins = <
 743                         MX6QDL_PAD_KEY_ROW2__FLEXCAN1_RX        0x1b0b1
 744                         MX6QDL_PAD_KEY_COL2__FLEXCAN1_TX        0x1b0b1
 745                         MX6QDL_PAD_GPIO_2__GPIO1_IO02           0x4001b0b0 /* CAN_STBY */
 746                 >;
 747         };
 748
 749         pinctrl_gpio_leds: gpioledsgrp {
 750                 fsl,pins = <
 751                         MX6QDL_PAD_KEY_COL0__GPIO4_IO06         0x1b0b0
 752                         MX6QDL_PAD_KEY_ROW0__GPIO4_IO07         0x1b0b0
 753                         MX6QDL_PAD_KEY_ROW4__GPIO4_IO15         0x1b0b0
 754                 >;
 755         };
 756
 757         pinctrl_i2c1: i2c1grp {
 758                 fsl,pins = <
 759                         MX6QDL_PAD_EIM_D21__I2C1_SCL            0x4001b8b1
 760                         MX6QDL_PAD_EIM_D28__I2C1_SDA            0x4001b8b1
 761                         MX6QDL_PAD_GPIO_4__GPIO1_IO04           0xb0b1
 762                 >;
 763         };
 764
 765         pinctrl_i2c2: i2c2grp {
 766                 fsl,pins = <
 767                         MX6QDL_PAD_KEY_COL3__I2C2_SCL           0x4001b8b1
 768                         MX6QDL_PAD_KEY_ROW3__I2C2_SDA           0x4001b8b1
 769                 >;
 770         };
 771
 772         pinctrl_i2c3: i2c3grp {
 773                 fsl,pins = <
 774                         MX6QDL_PAD_GPIO_3__I2C3_SCL             0x4001b8b1
 775                         MX6QDL_PAD_GPIO_6__I2C3_SDA             0x4001b8b1
 776                         MX6QDL_PAD_GPIO_19__GPIO4_IO05          0x4001b0b0 /* DIOI2C_DIS# */
 777                         MX6QDL_PAD_DISP0_DAT18__GPIO5_IO12      0x0001b0b0 /* LVDS_TOUCH_IRQ# */
 778                         MX6QDL_PAD_DISP0_DAT19__GPIO5_IO13      0x0001b0b0 /* LVDS_BACKEN */
 779                 >;
 780         };
 781
 782         pinctrl_imu: imugrp {
 783                 fsl,pins = <
 784                         MX6QDL_PAD_DISP0_DAT12__GPIO5_IO06      0x1b0b0
 785                 >;
 786         };
 787
 788         pinctrl_keypad: keypadgrp {
 789                 fsl,pins = <
 790                         MX6QDL_PAD_DISP0_DAT17__GPIO5_IO11      0x0001b0b0 /* KEYPAD_IRQ# */
 791                         MX6QDL_PAD_DISP0_DAT9__GPIO4_IO30       0x0001b0b0 /* KEYPAD_LED_EN */
 792                 >;
 793         };
 794
 795         pinctrl_mag: maggrp {
 796                 fsl,pins = <
 797                         MX6QDL_PAD_DISP0_DAT15__GPIO5_IO09      0x1b0b0
 798                 >;
 799         };
 800
 801         pinctrl_pcie: pciegrp {
 802                 fsl,pins = <
 803                         MX6QDL_PAD_DISP0_DAT10__GPIO4_IO31      0x1b0b0    /* PCI_RST# */
 804                         MX6QDL_PAD_GPIO_17__GPIO7_IO12          0x4001b0b0 /* PCIESKT_WDIS# */
 805                 >;
 806         };
 807
 808         pinctrl_pmic: pmicgrp {
 809                 fsl,pins = <
 810                         MX6QDL_PAD_GPIO_8__GPIO1_IO08           0x0001b0b0 /* PMIC_IRQ# */
 811                 >;
 812         };
 813
 814         pinctrl_pps: ppsgrp {
 815                 fsl,pins = <
 816                         MX6QDL_PAD_ENET_RXD1__GPIO1_IO26        0x1b0b1
 817                 >;
 818         };
 819
 820         pinctrl_pwm2: pwm2grp {
 821                 fsl,pins = <
 822                         MX6QDL_PAD_SD1_DAT2__PWM2_OUT           0x1b0b1
 823                 >;
 824         };
 825
 826         pinctrl_pwm3: pwm3grp {
 827                 fsl,pins = <
 828                         MX6QDL_PAD_SD1_DAT1__PWM3_OUT           0x1b0b1
 829                 >;
 830         };
 831
 832         pinctrl_pwm4: pwm4grp {
 833                 fsl,pins = <
 834                         MX6QDL_PAD_SD1_CMD__PWM4_OUT            0x1b0b1
 835                 >;
 836         };
 837
 838         pinctrl_uart1: uart1grp {
 839                 fsl,pins = <
 840                         MX6QDL_PAD_SD3_DAT7__UART1_TX_DATA      0x1b0b1
 841                         MX6QDL_PAD_SD3_DAT6__UART1_RX_DATA      0x1b0b1
 842                         MX6QDL_PAD_SD3_DAT4__GPIO7_IO01         0x4001b0b1 /* TEN */
 843                 >;
 844         };
 845
 846         pinctrl_uart2: uart2grp {
 847                 fsl,pins = <
 848                         MX6QDL_PAD_SD4_DAT7__UART2_TX_DATA      0x1b0b1
 849                         MX6QDL_PAD_SD4_DAT4__UART2_RX_DATA      0x1b0b1
 850                 >;
 851         };
 852
 853         pinctrl_uart5: uart5grp {
 854                 fsl,pins = <
 855                         MX6QDL_PAD_KEY_COL1__UART5_TX_DATA      0x1b0b1
 856                         MX6QDL_PAD_KEY_ROW1__UART5_RX_DATA      0x1b0b1
 857                 >;
 858         };
 859
 860         pinctrl_usbh1: usbh1grp {
 861                 fsl,pins = <
 862                         MX6QDL_PAD_GPIO_9__GPIO1_IO09           0x4001b0b0 /* USBHUB_RST# */
 863                 >;
 864         };
 865
 866         pinctrl_usbotg: usbotggrp {
 867                 fsl,pins = <
 868                         MX6QDL_PAD_GPIO_1__USB_OTG_ID           0x17059
 869                         MX6QDL_PAD_EIM_D22__GPIO3_IO22          0x1b0b0 /* PWR_EN */
 870                         MX6QDL_PAD_KEY_COL4__GPIO4_IO14         0x1b0b0 /* OC */
 871                 >;
 872         };
 873
 874         pinctrl_usdhc2: usdhc2grp {
 875                 fsl,pins = <
 876                         MX6QDL_PAD_SD2_CMD__SD2_CMD             0x170f9
 877                         MX6QDL_PAD_SD2_CLK__SD2_CLK             0x100f9
 878                         MX6QDL_PAD_SD2_DAT0__SD2_DATA0          0x170f9
 879                         MX6QDL_PAD_SD2_DAT1__SD2_DATA1          0x170f9
 880                         MX6QDL_PAD_SD2_DAT2__SD2_DATA2          0x170f9
 881                         MX6QDL_PAD_SD2_DAT3__SD2_DATA3          0x170f9
 882                         MX6QDL_PAD_NANDF_D4__SD2_DATA4          0x170f9
 883                         MX6QDL_PAD_NANDF_D5__SD2_DATA5          0x170f9
 884                         MX6QDL_PAD_NANDF_D6__SD2_DATA6          0x170f9
 885                         MX6QDL_PAD_NANDF_D7__SD2_DATA7          0x170f9
 886                 >;
 887         };
 888
 889         pinctrl_usdhc3: usdhc3grp {
 890                 fsl,pins = <
 891                         MX6QDL_PAD_SD3_CMD__SD3_CMD             0x17059
 892                         MX6QDL_PAD_SD3_CLK__SD3_CLK             0x10059
 893                         MX6QDL_PAD_SD3_DAT0__SD3_DATA0          0x17059
 894                         MX6QDL_PAD_SD3_DAT1__SD3_DATA1          0x17059
 895                         MX6QDL_PAD_SD3_DAT2__SD3_DATA2          0x17059
 896                         MX6QDL_PAD_SD3_DAT3__SD3_DATA3          0x17059
 897                         MX6QDL_PAD_SD3_DAT5__GPIO7_IO00         0x17059 /* CD */
 898                         MX6QDL_PAD_NANDF_CS1__SD3_VSELECT       0x17059
 899                 >;
 900         };
 901
 902         pinctrl_usdhc3_100mhz: usdhc3grp100mhz {
 903                 fsl,pins = <
 904                         MX6QDL_PAD_SD3_CMD__SD3_CMD             0x170b9
 905                         MX6QDL_PAD_SD3_CLK__SD3_CLK             0x100b9
 906                         MX6QDL_PAD_SD3_DAT0__SD3_DATA0          0x170b9
 907                         MX6QDL_PAD_SD3_DAT1__SD3_DATA1          0x170b9
 908                         MX6QDL_PAD_SD3_DAT2__SD3_DATA2          0x170b9
 909                         MX6QDL_PAD_SD3_DAT3__SD3_DATA3          0x170b9
 910                         MX6QDL_PAD_SD3_DAT5__GPIO7_IO00         0x170b9 /* CD */
 911                         MX6QDL_PAD_NANDF_CS1__SD3_VSELECT       0x170b9
 912                 >;
 913         };
 914
 915         pinctrl_usdhc3_200mhz: usdhc3grp200mhz {
 916                 fsl,pins = <
 917                         MX6QDL_PAD_SD3_CMD__SD3_CMD             0x170f9
 918                         MX6QDL_PAD_SD3_CLK__SD3_CLK             0x100f9
 919                         MX6QDL_PAD_SD3_DAT0__SD3_DATA0          0x170f9
 920                         MX6QDL_PAD_SD3_DAT1__SD3_DATA1          0x170f9
 921                         MX6QDL_PAD_SD3_DAT2__SD3_DATA2          0x170f9
 922                         MX6QDL_PAD_SD3_DAT3__SD3_DATA3          0x170f9
 923                         MX6QDL_PAD_SD3_DAT5__GPIO7_IO00         0x170f9 /* CD */
 924                         MX6QDL_PAD_NANDF_CS1__SD3_VSELECT       0x170f9
 925                 >;
 926         };
 927
 928         pinctrl_wdog: wdoggrp {
 929                 fsl,pins = <
 930                         MX6QDL_PAD_DISP0_DAT8__WDOG1_B          0x1b0b0
 931                 >;
 932         };
 933 };