2 * Copyright 2016 Gateworks Corporation
4 * This file is dual-licensed: you can use it either under the terms
5 * of the GPL or the X11 license, at your option. Note that this dual
6 * licensing only applies to this file, and not this project as a
9 * a) This file is free software; you can redistribute it and/or
10 * modify it under the terms of the GNU General Public License as
11 * published by the Free Software Foundation; either version 2 of
12 * the License, or (at your option) any later version.
14 * This file is distributed in the hope that it will be useful,
15 * but WITHOUT ANY WARRANTY; without even the implied warranty of
16 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
17 * GNU General Public License for more details.
19 * You should have received a copy of the GNU General Public
20 * License along with this file; if not, write to the Free
21 * Software Foundation, Inc., 51 Franklin St, Fifth Floor, Boston,
26 * b) Permission is hereby granted, free of charge, to any person
27 * obtaining a copy of this software and associated documentation
28 * files (the "Software"), to deal in the Software without
29 * restriction, including without limitation the rights to use,
30 * copy, modify, merge, publish, distribute, sublicense, and/or
31 * sell copies of the Software, and to permit persons to whom the
32 * Software is furnished to do so, subject to the following
35 * The above copyright notice and this permission notice shall be
36 * included in all copies or substantial portions of the Software.
38 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
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41 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
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45 * OTHER DEALINGS IN THE SOFTWARE.
48 #include <dt-bindings/gpio/gpio.h>
49 #include <dt-bindings/input/linux-event-codes.h>
52 /* these are used by bootloader for disabling nodes */
66 compatible = "gpio-keys";
72 gpios = <&gsc_gpio 0 GPIO_ACTIVE_LOW>;
79 interrupt-parent = <&gsc>;
86 interrupt-parent = <&gsc>;
93 interrupt-parent = <&gsc>;
100 interrupt-parent = <&gsc>;
105 label = "switch_hold";
106 linux,code = <BTN_5>;
107 interrupt-parent = <&gsc>;
113 compatible = "gpio-leds";
114 pinctrl-names = "default";
115 pinctrl-0 = <&pinctrl_gpio_leds>;
119 gpios = <&gpio4 10 GPIO_ACTIVE_HIGH>; /* MX6_PANLEDG */
120 default-state = "on";
121 linux,default-trigger = "heartbeat";
126 gpios = <&gpio4 11 GPIO_ACTIVE_HIGH>; /* MX6_PANLEDR */
127 default-state = "off";
132 device_type = "memory";
133 reg = <0x10000000 0x20000000>;
137 compatible = "pps-gpio";
138 pinctrl-names = "default";
139 pinctrl-0 = <&pinctrl_pps>;
140 gpios = <&gpio1 26 GPIO_ACTIVE_HIGH>;
144 reg_5p0v: regulator-5p0v {
145 compatible = "regulator-fixed";
146 regulator-name = "5P0V";
147 regulator-min-microvolt = <5000000>;
148 regulator-max-microvolt = <5000000>;
152 reg_usb_otg_vbus: regulator-usb-otg-vbus {
153 compatible = "regulator-fixed";
154 regulator-name = "usb_otg_vbus";
155 regulator-min-microvolt = <5000000>;
156 regulator-max-microvolt = <5000000>;
157 gpio = <&gpio3 22 GPIO_ACTIVE_HIGH>;
163 pinctrl-names = "default";
164 pinctrl-0 = <&pinctrl_gpmi_nand>;
169 pinctrl-names = "default";
170 pinctrl-0 = <&pinctrl_hdmi>;
171 ddc-i2c-bus = <&i2c3>;
176 clock-frequency = <100000>;
177 pinctrl-names = "default";
178 pinctrl-0 = <&pinctrl_i2c1>;
182 compatible = "gw,gsc";
184 interrupt-parent = <&gpio1>;
185 interrupts = <4 GPIO_ACTIVE_LOW>;
186 interrupt-controller;
187 #interrupt-cells = <1>;
191 compatible = "gw,gsc-adc";
192 #address-cells = <1>;
270 compatible = "nxp,pca9555";
274 interrupt-parent = <&gsc>;
279 compatible = "atmel,24c02";
285 compatible = "atmel,24c02";
291 compatible = "atmel,24c02";
297 compatible = "atmel,24c02";
303 compatible = "dallas,ds1672";
309 clock-frequency = <100000>;
310 pinctrl-names = "default";
311 pinctrl-0 = <&pinctrl_i2c2>;
315 compatible = "st,lsm9ds1-magn";
317 pinctrl-names = "default";
318 pinctrl-0 = <&pinctrl_mag>;
319 interrupt-parent = <&gpio1>;
320 interrupts = <2 IRQ_TYPE_EDGE_RISING>;
324 compatible = "st,lsm9ds1-imu";
326 st,drdy-int-pin = <1>;
327 pinctrl-names = "default";
328 pinctrl-0 = <&pinctrl_imu>;
329 interrupt-parent = <&gpio7>;
330 interrupts = <13 IRQ_TYPE_LEVEL_HIGH>;
334 compatible = "lltc,ltc3676";
336 pinctrl-names = "default";
337 pinctrl-0 = <&pinctrl_pmic>;
338 interrupt-parent = <&gpio1>;
339 interrupts = <8 IRQ_TYPE_EDGE_FALLING>;
342 /* VDD_SOC (1+R1/R2 = 1.635) */
344 regulator-name = "vddsoc";
345 regulator-min-microvolt = <674400>;
346 regulator-max-microvolt = <1308000>;
347 lltc,fb-voltage-divider = <127000 200000>;
348 regulator-ramp-delay = <7000>;
353 /* VDD_DDR (1+R1/R2 = 2.105) */
355 regulator-name = "vddddr";
356 regulator-min-microvolt = <868310>;
357 regulator-max-microvolt = <1684000>;
358 lltc,fb-voltage-divider = <221000 200000>;
359 regulator-ramp-delay = <7000>;
364 /* VDD_ARM (1+R1/R2 = 1.635) */
366 regulator-name = "vddarm";
367 regulator-min-microvolt = <674400>;
368 regulator-max-microvolt = <1308000>;
369 lltc,fb-voltage-divider = <127000 200000>;
370 regulator-ramp-delay = <7000>;
375 /* VDD_3P3 (1+R1/R2 = 1.281) */
377 regulator-name = "vdd3p3";
378 regulator-min-microvolt = <1880000>;
379 regulator-max-microvolt = <3647000>;
380 lltc,fb-voltage-divider = <200000 56200>;
381 regulator-ramp-delay = <7000>;
386 /* VDD_1P8a (1+R1/R2 = 2.505): Analog Video Decoder */
388 regulator-name = "vdd1p8a";
389 regulator-min-microvolt = <1816125>;
390 regulator-max-microvolt = <1816125>;
391 lltc,fb-voltage-divider = <301000 200000>;
396 /* VDD_1P8b: microSD VDD_1P8 */
398 regulator-name = "vdd1p8b";
399 regulator-min-microvolt = <1800000>;
400 regulator-max-microvolt = <1800000>;
404 /* VDD_HIGH (1+R1/R2 = 4.17) */
406 regulator-name = "vdd3p0";
407 regulator-min-microvolt = <3023250>;
408 regulator-max-microvolt = <3023250>;
409 lltc,fb-voltage-divider = <634000 200000>;
418 clock-frequency = <100000>;
419 pinctrl-names = "default";
420 pinctrl-0 = <&pinctrl_i2c3>;
424 compatible = "adi,adv7180";
425 pinctrl-names = "default";
426 pinctrl-0 = <&pinctrl_adv7180>;
428 powerdown-gpios = <&gpio5 20 GPIO_ACTIVE_LOW>;
429 interrupt-parent = <&gpio5>;
430 interrupts = <23 IRQ_TYPE_LEVEL_LOW>;
433 adv7180_to_ipu1_csi0_mux: endpoint {
434 remote-endpoint = <&ipu1_csi0_mux_from_parallel_sensor>;
441 &ipu1_csi0_from_ipu1_csi0_mux {
445 &ipu1_csi0_mux_from_parallel_sensor {
446 remote-endpoint = <&adv7180_to_ipu1_csi0_mux>;
451 pinctrl-names = "default";
452 pinctrl-0 = <&pinctrl_ipu1_csi0>;
456 pinctrl-names = "default";
457 pinctrl-0 = <&pinctrl_pcie>;
458 reset-gpio = <&gpio1 0 GPIO_ACTIVE_LOW>;
463 pinctrl-names = "default";
464 pinctrl-0 = <&pinctrl_pwm2>; /* MX6_DIO1 */
469 pinctrl-names = "default";
470 pinctrl-0 = <&pinctrl_pwm3>; /* MX6_DIO2 */
475 pinctrl-names = "default";
476 pinctrl-0 = <&pinctrl_pwm4>; /* MX6_DIO3 */
481 pinctrl-names = "default";
482 pinctrl-0 = <&pinctrl_uart2>;
487 pinctrl-names = "default";
488 pinctrl-0 = <&pinctrl_uart3>;
493 pinctrl-names = "default";
494 pinctrl-0 = <&pinctrl_uart4>;
499 pinctrl-names = "default";
500 pinctrl-0 = <&pinctrl_uart5>;
509 vbus-supply = <®_usb_otg_vbus>;
510 pinctrl-names = "default";
511 pinctrl-0 = <&pinctrl_usbotg>;
512 disable-over-current;
517 pinctrl-names = "default", "state_100mhz", "state_200mhz";
518 pinctrl-0 = <&pinctrl_usdhc3>;
519 pinctrl-1 = <&pinctrl_usdhc3_100mhz>;
520 pinctrl-2 = <&pinctrl_usdhc3_200mhz>;
521 cd-gpios = <&gpio7 0 GPIO_ACTIVE_LOW>;
526 pinctrl-names = "default";
527 pinctrl-0 = <&pinctrl_wdog>;
528 fsl,ext-reset-output;
532 pinctrl_adv7180: adv7180grp {
534 MX6QDL_PAD_CSI0_DAT5__GPIO5_IO23 0x0001b0b0
535 MX6QDL_PAD_CSI0_DATA_EN__GPIO5_IO20 0x4001b0b0
539 pinctrl_gpmi_nand: gpminandgrp {
541 MX6QDL_PAD_NANDF_CLE__NAND_CLE 0xb0b1
542 MX6QDL_PAD_NANDF_ALE__NAND_ALE 0xb0b1
543 MX6QDL_PAD_NANDF_WP_B__NAND_WP_B 0xb0b1
544 MX6QDL_PAD_NANDF_RB0__NAND_READY_B 0xb000
545 MX6QDL_PAD_NANDF_CS0__NAND_CE0_B 0xb0b1
546 MX6QDL_PAD_SD4_CMD__NAND_RE_B 0xb0b1
547 MX6QDL_PAD_SD4_CLK__NAND_WE_B 0xb0b1
548 MX6QDL_PAD_NANDF_D0__NAND_DATA00 0xb0b1
549 MX6QDL_PAD_NANDF_D1__NAND_DATA01 0xb0b1
550 MX6QDL_PAD_NANDF_D2__NAND_DATA02 0xb0b1
551 MX6QDL_PAD_NANDF_D3__NAND_DATA03 0xb0b1
552 MX6QDL_PAD_NANDF_D4__NAND_DATA04 0xb0b1
553 MX6QDL_PAD_NANDF_D5__NAND_DATA05 0xb0b1
554 MX6QDL_PAD_NANDF_D6__NAND_DATA06 0xb0b1
555 MX6QDL_PAD_NANDF_D7__NAND_DATA07 0xb0b1
559 pinctrl_hdmi: hdmigrp {
561 MX6QDL_PAD_EIM_A25__HDMI_TX_CEC_LINE 0x1f8b0
565 pinctrl_i2c1: i2c1grp {
567 MX6QDL_PAD_EIM_D21__I2C1_SCL 0x4001b8b1
568 MX6QDL_PAD_EIM_D28__I2C1_SDA 0x4001b8b1
569 MX6QDL_PAD_GPIO_4__GPIO1_IO04 0xb0b1
573 pinctrl_i2c2: i2c2grp {
575 MX6QDL_PAD_KEY_COL3__I2C2_SCL 0x4001b8b1
576 MX6QDL_PAD_KEY_ROW3__I2C2_SDA 0x4001b8b1
580 pinctrl_i2c3: i2c3grp {
582 MX6QDL_PAD_GPIO_3__I2C3_SCL 0x4001b8b1
583 MX6QDL_PAD_GPIO_6__I2C3_SDA 0x4001b8b1
587 pinctrl_imu: imugrp {
589 MX6QDL_PAD_GPIO_18__GPIO7_IO13 0x1b0b0
593 pinctrl_ipu1_csi0: ipu1csi0grp {
595 MX6QDL_PAD_CSI0_DAT12__IPU1_CSI0_DATA12 0x1b0b0
596 MX6QDL_PAD_CSI0_DAT13__IPU1_CSI0_DATA13 0x1b0b0
597 MX6QDL_PAD_CSI0_DAT14__IPU1_CSI0_DATA14 0x1b0b0
598 MX6QDL_PAD_CSI0_DAT15__IPU1_CSI0_DATA15 0x1b0b0
599 MX6QDL_PAD_CSI0_DAT16__IPU1_CSI0_DATA16 0x1b0b0
600 MX6QDL_PAD_CSI0_DAT17__IPU1_CSI0_DATA17 0x1b0b0
601 MX6QDL_PAD_CSI0_DAT18__IPU1_CSI0_DATA18 0x1b0b0
602 MX6QDL_PAD_CSI0_DAT19__IPU1_CSI0_DATA19 0x1b0b0
603 MX6QDL_PAD_CSI0_MCLK__IPU1_CSI0_HSYNC 0x1b0b0
604 MX6QDL_PAD_CSI0_VSYNC__IPU1_CSI0_VSYNC 0x1b0b0
605 MX6QDL_PAD_CSI0_PIXCLK__IPU1_CSI0_PIXCLK 0x1b0b0
609 pinctrl_gpio_leds: gpioledsgrp {
611 MX6QDL_PAD_KEY_COL2__GPIO4_IO10 0x1b0b0
612 MX6QDL_PAD_KEY_ROW2__GPIO4_IO11 0x1b0b0
616 pinctrl_mag: maggrp {
618 MX6QDL_PAD_GPIO_2__GPIO1_IO02 0x1b0b0
622 pinctrl_pcie: pciegrp {
624 MX6QDL_PAD_GPIO_0__GPIO1_IO00 0x1b0b0
625 MX6QDL_PAD_GPIO_17__GPIO7_IO12 0x4001b0b0 /* PCIESKT_WDIS# */
629 pinctrl_pmic: pmicgrp {
631 MX6QDL_PAD_GPIO_8__GPIO1_IO08 0x0001b0b0 /* PMIC_IRQ# */
635 pinctrl_pps: ppsgrp {
637 MX6QDL_PAD_ENET_RXD1__GPIO1_IO26 0x1b0b1
641 pinctrl_pwm2: pwm2grp {
643 MX6QDL_PAD_SD1_DAT2__PWM2_OUT 0x1b0b1
647 pinctrl_pwm3: pwm3grp {
649 MX6QDL_PAD_SD4_DAT1__PWM3_OUT 0x1b0b1
653 pinctrl_pwm4: pwm4grp {
655 MX6QDL_PAD_SD1_CMD__PWM4_OUT 0x1b0b1
659 pinctrl_uart2: uart2grp {
661 MX6QDL_PAD_SD4_DAT7__UART2_TX_DATA 0x1b0b1
662 MX6QDL_PAD_SD4_DAT4__UART2_RX_DATA 0x1b0b1
666 pinctrl_uart3: uart3grp {
668 MX6QDL_PAD_EIM_D24__UART3_TX_DATA 0x1b0b1
669 MX6QDL_PAD_EIM_D25__UART3_RX_DATA 0x1b0b1
673 pinctrl_uart4: uart4grp {
675 MX6QDL_PAD_KEY_COL0__UART4_TX_DATA 0x1b0b1
676 MX6QDL_PAD_KEY_ROW0__UART4_RX_DATA 0x1b0b1
680 pinctrl_uart5: uart5grp {
682 MX6QDL_PAD_KEY_COL1__UART5_TX_DATA 0x1b0b1
683 MX6QDL_PAD_KEY_ROW1__UART5_RX_DATA 0x1b0b1
687 pinctrl_usbotg: usbotggrp {
689 MX6QDL_PAD_GPIO_1__USB_OTG_ID 0x17059
690 MX6QDL_PAD_EIM_D22__GPIO3_IO22 0x1b0b0 /* OTG_PWR_EN */
694 pinctrl_usdhc3: usdhc3grp {
696 MX6QDL_PAD_SD3_CMD__SD3_CMD 0x17059
697 MX6QDL_PAD_SD3_CLK__SD3_CLK 0x10059
698 MX6QDL_PAD_SD3_DAT0__SD3_DATA0 0x17059
699 MX6QDL_PAD_SD3_DAT1__SD3_DATA1 0x17059
700 MX6QDL_PAD_SD3_DAT2__SD3_DATA2 0x17059
701 MX6QDL_PAD_SD3_DAT3__SD3_DATA3 0x17059
702 MX6QDL_PAD_SD3_DAT5__GPIO7_IO00 0x17059 /* CD */
703 MX6QDL_PAD_NANDF_CS1__SD3_VSELECT 0x17059
707 pinctrl_usdhc3_100mhz: usdhc3grp100mhz {
709 MX6QDL_PAD_SD3_CMD__SD3_CMD 0x170b9
710 MX6QDL_PAD_SD3_CLK__SD3_CLK 0x100b9
711 MX6QDL_PAD_SD3_DAT0__SD3_DATA0 0x170b9
712 MX6QDL_PAD_SD3_DAT1__SD3_DATA1 0x170b9
713 MX6QDL_PAD_SD3_DAT2__SD3_DATA2 0x170b9
714 MX6QDL_PAD_SD3_DAT3__SD3_DATA3 0x170b9
715 MX6QDL_PAD_SD3_DAT5__GPIO7_IO00 0x170b9 /* CD */
716 MX6QDL_PAD_NANDF_CS1__SD3_VSELECT 0x170b9
720 pinctrl_usdhc3_200mhz: usdhc3grp200mhz {
722 MX6QDL_PAD_SD3_CMD__SD3_CMD 0x170f9
723 MX6QDL_PAD_SD3_CLK__SD3_CLK 0x100f9
724 MX6QDL_PAD_SD3_DAT0__SD3_DATA0 0x170f9
725 MX6QDL_PAD_SD3_DAT1__SD3_DATA1 0x170f9
726 MX6QDL_PAD_SD3_DAT2__SD3_DATA2 0x170f9
727 MX6QDL_PAD_SD3_DAT3__SD3_DATA3 0x170f9
728 MX6QDL_PAD_SD3_DAT5__GPIO7_IO00 0x170f9 /* CD */
729 MX6QDL_PAD_NANDF_CS1__SD3_VSELECT 0x170f9
733 pinctrl_wdog: wdoggrp {
735 MX6QDL_PAD_DISP0_DAT8__WDOG1_B 0x1b0b0