1 // SPDX-License-Identifier: GPL-2.0-or-later
3 * Copyright 2014 Gateworks Corporation
6 #include <dt-bindings/gpio/gpio.h>
7 #include <dt-bindings/input/linux-event-codes.h>
8 #include <dt-bindings/interrupt-controller/irq.h>
11 /* these are used by bootloader for disabling nodes */
22 bootargs = "console=ttymxc1,115200";
26 compatible = "gpio-keys";
32 gpios = <&gsc_gpio 0 GPIO_ACTIVE_LOW>;
39 interrupt-parent = <&gsc>;
46 interrupt-parent = <&gsc>;
53 interrupt-parent = <&gsc>;
60 interrupt-parent = <&gsc>;
65 label = "switch_hold";
67 interrupt-parent = <&gsc>;
73 compatible = "gpio-leds";
74 pinctrl-names = "default";
75 pinctrl-0 = <&pinctrl_gpio_leds>;
79 gpios = <&gpio4 6 GPIO_ACTIVE_HIGH>; /* MX6_PANLEDG */
81 linux,default-trigger = "heartbeat";
86 gpios = <&gpio4 7 GPIO_ACTIVE_HIGH>; /* MX6_PANLEDR */
87 default-state = "off";
92 gpios = <&gpio4 15 GPIO_ACTIVE_LOW>; /* MX6_LOCLED# */
93 default-state = "off";
98 device_type = "memory";
99 reg = <0x10000000 0x20000000>;
102 reg_1p0v: regulator-1p0v {
103 compatible = "regulator-fixed";
104 regulator-name = "1P0V";
105 regulator-min-microvolt = <1000000>;
106 regulator-max-microvolt = <1000000>;
110 reg_3p3v: regulator-3p3v {
111 compatible = "regulator-fixed";
112 regulator-name = "3P3V";
113 regulator-min-microvolt = <3300000>;
114 regulator-max-microvolt = <3300000>;
118 reg_5p0v: regulator-5p0v {
119 compatible = "regulator-fixed";
120 regulator-name = "5P0V";
121 regulator-min-microvolt = <5000000>;
122 regulator-max-microvolt = <5000000>;
128 pinctrl-names = "default";
129 pinctrl-0 = <&pinctrl_gpmi_nand>;
134 ddc-i2c-bus = <&i2c3>;
139 clock-frequency = <100000>;
140 pinctrl-names = "default";
141 pinctrl-0 = <&pinctrl_i2c1>;
145 compatible = "gw,gsc";
147 interrupt-parent = <&gpio1>;
148 interrupts = <4 IRQ_TYPE_LEVEL_LOW>;
149 interrupt-controller;
150 #interrupt-cells = <1>;
154 compatible = "gw,gsc-adc";
155 #address-cells = <1>;
233 compatible = "nxp,pca9555";
237 interrupt-parent = <&gsc>;
242 compatible = "atmel,24c02";
248 compatible = "atmel,24c02";
254 compatible = "atmel,24c02";
260 compatible = "atmel,24c02";
266 compatible = "dallas,ds1672";
272 clock-frequency = <100000>;
273 pinctrl-names = "default";
274 pinctrl-0 = <&pinctrl_i2c2>;
278 compatible = "lltc,ltc3676";
280 pinctrl-names = "default";
281 pinctrl-0 = <&pinctrl_pmic>;
282 interrupt-parent = <&gpio1>;
283 interrupts = <8 IRQ_TYPE_EDGE_FALLING>;
286 /* VDD_SOC (1+R1/R2 = 1.635) */
288 regulator-name = "vddsoc";
289 regulator-min-microvolt = <674400>;
290 regulator-max-microvolt = <1308000>;
291 lltc,fb-voltage-divider = <127000 200000>;
292 regulator-ramp-delay = <7000>;
297 /* VDD_1P8 (1+R1/R2 = 2.505): ENET-PHY */
299 regulator-name = "vdd1p8";
300 regulator-min-microvolt = <1033310>;
301 regulator-max-microvolt = <2004000>;
302 lltc,fb-voltage-divider = <301000 200000>;
303 regulator-ramp-delay = <7000>;
308 /* VDD_ARM (1+R1/R2 = 1.635) */
310 regulator-name = "vddarm";
311 regulator-min-microvolt = <674400>;
312 regulator-max-microvolt = <1308000>;
313 lltc,fb-voltage-divider = <127000 200000>;
314 regulator-ramp-delay = <7000>;
319 /* VDD_DDR (1+R1/R2 = 2.105) */
321 regulator-name = "vddddr";
322 regulator-min-microvolt = <868310>;
323 regulator-max-microvolt = <1684000>;
324 lltc,fb-voltage-divider = <221000 200000>;
325 regulator-ramp-delay = <7000>;
330 /* VDD_2P5 (1+R1/R2 = 3.435): PCIe/ENET-PHY */
332 regulator-name = "vdd2p5";
333 regulator-min-microvolt = <2490375>;
334 regulator-max-microvolt = <2490375>;
335 lltc,fb-voltage-divider = <487000 200000>;
340 /* VDD_HIGH (1+R1/R2 = 4.17) */
342 regulator-name = "vdd3p0";
343 regulator-min-microvolt = <3023250>;
344 regulator-max-microvolt = <3023250>;
345 lltc,fb-voltage-divider = <634000 200000>;
354 clock-frequency = <100000>;
355 pinctrl-names = "default";
356 pinctrl-0 = <&pinctrl_i2c3>;
361 pinctrl-names = "default";
362 pinctrl-0 = <&pinctrl_pcie>;
363 reset-gpio = <&gpio1 29 GPIO_ACTIVE_LOW>;
368 pinctrl-names = "default";
369 pinctrl-0 = <&pinctrl_pwm2>; /* MX6_DIO1 */
374 pinctrl-names = "default";
375 pinctrl-0 = <&pinctrl_pwm3>; /* MX6_DIO2 */
380 pinctrl-names = "default";
381 pinctrl-0 = <&pinctrl_uart2>;
386 pinctrl-names = "default";
387 pinctrl-0 = <&pinctrl_uart3>;
392 pinctrl-names = "default";
393 pinctrl-0 = <&pinctrl_uart5>;
401 vbus-supply = <®_5p0v>;
402 pinctrl-names = "default";
403 pinctrl-0 = <&pinctrl_usbotg>;
404 disable-over-current;
409 pinctrl-names = "default";
410 pinctrl-0 = <&pinctrl_wdog>;
411 fsl,ext-reset-output;
415 pinctrl_gpio_leds: gpioledsgrp {
417 MX6QDL_PAD_KEY_COL0__GPIO4_IO06 0x1b0b0
418 MX6QDL_PAD_KEY_ROW0__GPIO4_IO07 0x1b0b0
419 MX6QDL_PAD_KEY_ROW4__GPIO4_IO15 0x1b0b0
423 pinctrl_gpmi_nand: gpminandgrp {
425 MX6QDL_PAD_NANDF_CLE__NAND_CLE 0xb0b1
426 MX6QDL_PAD_NANDF_ALE__NAND_ALE 0xb0b1
427 MX6QDL_PAD_NANDF_WP_B__NAND_WP_B 0xb0b1
428 MX6QDL_PAD_NANDF_RB0__NAND_READY_B 0xb000
429 MX6QDL_PAD_NANDF_CS0__NAND_CE0_B 0xb0b1
430 MX6QDL_PAD_SD4_CMD__NAND_RE_B 0xb0b1
431 MX6QDL_PAD_SD4_CLK__NAND_WE_B 0xb0b1
432 MX6QDL_PAD_NANDF_D0__NAND_DATA00 0xb0b1
433 MX6QDL_PAD_NANDF_D1__NAND_DATA01 0xb0b1
434 MX6QDL_PAD_NANDF_D2__NAND_DATA02 0xb0b1
435 MX6QDL_PAD_NANDF_D3__NAND_DATA03 0xb0b1
436 MX6QDL_PAD_NANDF_D4__NAND_DATA04 0xb0b1
437 MX6QDL_PAD_NANDF_D5__NAND_DATA05 0xb0b1
438 MX6QDL_PAD_NANDF_D6__NAND_DATA06 0xb0b1
439 MX6QDL_PAD_NANDF_D7__NAND_DATA07 0xb0b1
443 pinctrl_i2c1: i2c1grp {
445 MX6QDL_PAD_EIM_D21__I2C1_SCL 0x4001b8b1
446 MX6QDL_PAD_EIM_D28__I2C1_SDA 0x4001b8b1
447 MX6QDL_PAD_GPIO_4__GPIO1_IO04 0xb0b1
451 pinctrl_i2c2: i2c2grp {
453 MX6QDL_PAD_KEY_COL3__I2C2_SCL 0x4001b8b1
454 MX6QDL_PAD_KEY_ROW3__I2C2_SDA 0x4001b8b1
458 pinctrl_i2c3: i2c3grp {
460 MX6QDL_PAD_GPIO_3__I2C3_SCL 0x4001b8b1
461 MX6QDL_PAD_GPIO_6__I2C3_SDA 0x4001b8b1
465 pinctrl_pcie: pciegrp {
467 MX6QDL_PAD_ENET_TXD1__GPIO1_IO29 0x1b0b0
471 pinctrl_pmic: pmicgrp {
473 MX6QDL_PAD_GPIO_8__GPIO1_IO08 0x0001b0b0 /* PMIC_IRQ# */
477 pinctrl_pwm2: pwm2grp {
479 MX6QDL_PAD_SD1_DAT2__PWM2_OUT 0x1b0b1
483 pinctrl_pwm3: pwm3grp {
485 MX6QDL_PAD_SD1_DAT1__PWM3_OUT 0x1b0b1
489 pinctrl_uart2: uart2grp {
491 MX6QDL_PAD_SD4_DAT7__UART2_TX_DATA 0x1b0b1
492 MX6QDL_PAD_SD4_DAT4__UART2_RX_DATA 0x1b0b1
496 pinctrl_uart3: uart3grp {
498 MX6QDL_PAD_EIM_D24__UART3_TX_DATA 0x1b0b1
499 MX6QDL_PAD_EIM_D25__UART3_RX_DATA 0x1b0b1
503 pinctrl_uart5: uart5grp {
505 MX6QDL_PAD_KEY_COL1__UART5_TX_DATA 0x1b0b1
506 MX6QDL_PAD_KEY_ROW1__UART5_RX_DATA 0x1b0b1
510 pinctrl_usbotg: usbotggrp {
512 MX6QDL_PAD_ENET_RX_ER__USB_OTG_ID 0x13059
516 pinctrl_wdog: wdoggrp {
518 MX6QDL_PAD_DISP0_DAT8__WDOG1_B 0x1b0b0