1 // SPDX-License-Identifier: GPL-2.0-or-later
3 * Copyright 2014 Gateworks Corporation
6 #include <dt-bindings/gpio/gpio.h>
7 #include <dt-bindings/input/linux-event-codes.h>
8 #include <dt-bindings/interrupt-controller/irq.h>
11 /* these are used by bootloader for disabling nodes */
22 bootargs = "console=ttymxc1,115200";
26 compatible = "gpio-keys";
30 gpios = <&gsc_gpio 0 GPIO_ACTIVE_LOW>;
37 interrupt-parent = <&gsc>;
44 interrupt-parent = <&gsc>;
51 interrupt-parent = <&gsc>;
58 interrupt-parent = <&gsc>;
63 label = "switch_hold";
65 interrupt-parent = <&gsc>;
71 compatible = "gpio-leds";
72 pinctrl-names = "default";
73 pinctrl-0 = <&pinctrl_gpio_leds>;
77 gpios = <&gpio4 6 GPIO_ACTIVE_HIGH>; /* MX6_PANLEDG */
79 linux,default-trigger = "heartbeat";
84 gpios = <&gpio4 7 GPIO_ACTIVE_HIGH>; /* MX6_PANLEDR */
85 default-state = "off";
90 gpios = <&gpio4 15 GPIO_ACTIVE_LOW>; /* MX6_LOCLED# */
91 default-state = "off";
96 device_type = "memory";
97 reg = <0x10000000 0x20000000>;
100 reg_1p0v: regulator-1p0v {
101 compatible = "regulator-fixed";
102 regulator-name = "1P0V";
103 regulator-min-microvolt = <1000000>;
104 regulator-max-microvolt = <1000000>;
108 reg_3p3v: regulator-3p3v {
109 compatible = "regulator-fixed";
110 regulator-name = "3P3V";
111 regulator-min-microvolt = <3300000>;
112 regulator-max-microvolt = <3300000>;
116 reg_5p0v: regulator-5p0v {
117 compatible = "regulator-fixed";
118 regulator-name = "5P0V";
119 regulator-min-microvolt = <5000000>;
120 regulator-max-microvolt = <5000000>;
126 pinctrl-names = "default";
127 pinctrl-0 = <&pinctrl_gpmi_nand>;
132 ddc-i2c-bus = <&i2c3>;
137 clock-frequency = <100000>;
138 pinctrl-names = "default";
139 pinctrl-0 = <&pinctrl_i2c1>;
143 compatible = "gw,gsc";
145 interrupt-parent = <&gpio1>;
146 interrupts = <4 IRQ_TYPE_LEVEL_LOW>;
147 interrupt-controller;
148 #interrupt-cells = <1>;
152 compatible = "gw,gsc-adc";
153 #address-cells = <1>;
231 compatible = "nxp,pca9555";
235 interrupt-parent = <&gsc>;
240 compatible = "atmel,24c02";
246 compatible = "atmel,24c02";
252 compatible = "atmel,24c02";
258 compatible = "atmel,24c02";
264 compatible = "dallas,ds1672";
270 clock-frequency = <100000>;
271 pinctrl-names = "default";
272 pinctrl-0 = <&pinctrl_i2c2>;
276 compatible = "lltc,ltc3676";
278 pinctrl-names = "default";
279 pinctrl-0 = <&pinctrl_pmic>;
280 interrupt-parent = <&gpio1>;
281 interrupts = <8 IRQ_TYPE_EDGE_FALLING>;
284 /* VDD_SOC (1+R1/R2 = 1.635) */
286 regulator-name = "vddsoc";
287 regulator-min-microvolt = <674400>;
288 regulator-max-microvolt = <1308000>;
289 lltc,fb-voltage-divider = <127000 200000>;
290 regulator-ramp-delay = <7000>;
295 /* VDD_1P8 (1+R1/R2 = 2.505): ENET-PHY */
297 regulator-name = "vdd1p8";
298 regulator-min-microvolt = <1033310>;
299 regulator-max-microvolt = <2004000>;
300 lltc,fb-voltage-divider = <301000 200000>;
301 regulator-ramp-delay = <7000>;
306 /* VDD_ARM (1+R1/R2 = 1.635) */
308 regulator-name = "vddarm";
309 regulator-min-microvolt = <674400>;
310 regulator-max-microvolt = <1308000>;
311 lltc,fb-voltage-divider = <127000 200000>;
312 regulator-ramp-delay = <7000>;
317 /* VDD_DDR (1+R1/R2 = 2.105) */
319 regulator-name = "vddddr";
320 regulator-min-microvolt = <868310>;
321 regulator-max-microvolt = <1684000>;
322 lltc,fb-voltage-divider = <221000 200000>;
323 regulator-ramp-delay = <7000>;
328 /* VDD_2P5 (1+R1/R2 = 3.435): PCIe/ENET-PHY */
330 regulator-name = "vdd2p5";
331 regulator-min-microvolt = <2490375>;
332 regulator-max-microvolt = <2490375>;
333 lltc,fb-voltage-divider = <487000 200000>;
338 /* VDD_HIGH (1+R1/R2 = 4.17) */
340 regulator-name = "vdd3p0";
341 regulator-min-microvolt = <3023250>;
342 regulator-max-microvolt = <3023250>;
343 lltc,fb-voltage-divider = <634000 200000>;
352 clock-frequency = <100000>;
353 pinctrl-names = "default";
354 pinctrl-0 = <&pinctrl_i2c3>;
359 pinctrl-names = "default";
360 pinctrl-0 = <&pinctrl_pcie>;
361 reset-gpio = <&gpio1 29 GPIO_ACTIVE_LOW>;
366 pinctrl-names = "default";
367 pinctrl-0 = <&pinctrl_pwm2>; /* MX6_DIO1 */
372 pinctrl-names = "default";
373 pinctrl-0 = <&pinctrl_pwm3>; /* MX6_DIO2 */
378 pinctrl-names = "default";
379 pinctrl-0 = <&pinctrl_uart2>;
384 pinctrl-names = "default";
385 pinctrl-0 = <&pinctrl_uart3>;
390 pinctrl-names = "default";
391 pinctrl-0 = <&pinctrl_uart5>;
399 vbus-supply = <®_5p0v>;
400 pinctrl-names = "default";
401 pinctrl-0 = <&pinctrl_usbotg>;
402 disable-over-current;
407 pinctrl-names = "default";
408 pinctrl-0 = <&pinctrl_wdog>;
409 fsl,ext-reset-output;
413 pinctrl_gpio_leds: gpioledsgrp {
415 MX6QDL_PAD_KEY_COL0__GPIO4_IO06 0x1b0b0
416 MX6QDL_PAD_KEY_ROW0__GPIO4_IO07 0x1b0b0
417 MX6QDL_PAD_KEY_ROW4__GPIO4_IO15 0x1b0b0
421 pinctrl_gpmi_nand: gpminandgrp {
423 MX6QDL_PAD_NANDF_CLE__NAND_CLE 0xb0b1
424 MX6QDL_PAD_NANDF_ALE__NAND_ALE 0xb0b1
425 MX6QDL_PAD_NANDF_WP_B__NAND_WP_B 0xb0b1
426 MX6QDL_PAD_NANDF_RB0__NAND_READY_B 0xb000
427 MX6QDL_PAD_NANDF_CS0__NAND_CE0_B 0xb0b1
428 MX6QDL_PAD_SD4_CMD__NAND_RE_B 0xb0b1
429 MX6QDL_PAD_SD4_CLK__NAND_WE_B 0xb0b1
430 MX6QDL_PAD_NANDF_D0__NAND_DATA00 0xb0b1
431 MX6QDL_PAD_NANDF_D1__NAND_DATA01 0xb0b1
432 MX6QDL_PAD_NANDF_D2__NAND_DATA02 0xb0b1
433 MX6QDL_PAD_NANDF_D3__NAND_DATA03 0xb0b1
434 MX6QDL_PAD_NANDF_D4__NAND_DATA04 0xb0b1
435 MX6QDL_PAD_NANDF_D5__NAND_DATA05 0xb0b1
436 MX6QDL_PAD_NANDF_D6__NAND_DATA06 0xb0b1
437 MX6QDL_PAD_NANDF_D7__NAND_DATA07 0xb0b1
441 pinctrl_i2c1: i2c1grp {
443 MX6QDL_PAD_EIM_D21__I2C1_SCL 0x4001b8b1
444 MX6QDL_PAD_EIM_D28__I2C1_SDA 0x4001b8b1
445 MX6QDL_PAD_GPIO_4__GPIO1_IO04 0xb0b1
449 pinctrl_i2c2: i2c2grp {
451 MX6QDL_PAD_KEY_COL3__I2C2_SCL 0x4001b8b1
452 MX6QDL_PAD_KEY_ROW3__I2C2_SDA 0x4001b8b1
456 pinctrl_i2c3: i2c3grp {
458 MX6QDL_PAD_GPIO_3__I2C3_SCL 0x4001b8b1
459 MX6QDL_PAD_GPIO_6__I2C3_SDA 0x4001b8b1
463 pinctrl_pcie: pciegrp {
465 MX6QDL_PAD_ENET_TXD1__GPIO1_IO29 0x1b0b0
469 pinctrl_pmic: pmicgrp {
471 MX6QDL_PAD_GPIO_8__GPIO1_IO08 0x0001b0b0 /* PMIC_IRQ# */
475 pinctrl_pwm2: pwm2grp {
477 MX6QDL_PAD_SD1_DAT2__PWM2_OUT 0x1b0b1
481 pinctrl_pwm3: pwm3grp {
483 MX6QDL_PAD_SD1_DAT1__PWM3_OUT 0x1b0b1
487 pinctrl_uart2: uart2grp {
489 MX6QDL_PAD_SD4_DAT7__UART2_TX_DATA 0x1b0b1
490 MX6QDL_PAD_SD4_DAT4__UART2_RX_DATA 0x1b0b1
494 pinctrl_uart3: uart3grp {
496 MX6QDL_PAD_EIM_D24__UART3_TX_DATA 0x1b0b1
497 MX6QDL_PAD_EIM_D25__UART3_RX_DATA 0x1b0b1
501 pinctrl_uart5: uart5grp {
503 MX6QDL_PAD_KEY_COL1__UART5_TX_DATA 0x1b0b1
504 MX6QDL_PAD_KEY_ROW1__UART5_RX_DATA 0x1b0b1
508 pinctrl_usbotg: usbotggrp {
510 MX6QDL_PAD_ENET_RX_ER__USB_OTG_ID 0x13059
514 pinctrl_wdog: wdoggrp {
516 MX6QDL_PAD_DISP0_DAT8__WDOG1_B 0x1b0b0