1 // SPDX-License-Identifier: GPL-2.0-or-later
3 * Copyright 2013 Gateworks Corporation
6 #include <dt-bindings/gpio/gpio.h>
7 #include <dt-bindings/input/linux-event-codes.h>
8 #include <dt-bindings/interrupt-controller/irq.h>
9 #include <dt-bindings/sound/fsl-imx-audmux.h>
12 /* these are used by bootloader for disabling nodes */
24 bootargs = "console=ttymxc1,115200";
28 compatible = "pwm-backlight";
29 pwms = <&pwm4 0 5000000>;
30 brightness-levels = <0 4 8 16 32 64 128 255>;
31 default-brightness-level = <7>;
35 compatible = "gpio-keys";
39 gpios = <&gsc_gpio 0 GPIO_ACTIVE_LOW>;
46 interrupt-parent = <&gsc>;
53 interrupt-parent = <&gsc>;
60 interrupt-parent = <&gsc>;
67 interrupt-parent = <&gsc>;
72 label = "switch_hold";
74 interrupt-parent = <&gsc>;
80 compatible = "gpio-leds";
81 pinctrl-names = "default";
82 pinctrl-0 = <&pinctrl_gpio_leds>;
86 gpios = <&gpio4 6 GPIO_ACTIVE_HIGH>; /* MX6_PANLEDG */
88 linux,default-trigger = "heartbeat";
93 gpios = <&gpio4 7 GPIO_ACTIVE_HIGH>; /* MX6_PANLEDR */
94 default-state = "off";
99 gpios = <&gpio4 15 GPIO_ACTIVE_LOW>; /* MX6_LOCLED# */
100 default-state = "off";
105 device_type = "memory";
106 reg = <0x10000000 0x40000000>;
110 compatible = "pps-gpio";
111 pinctrl-names = "default";
112 pinctrl-0 = <&pinctrl_pps>;
113 gpios = <&gpio1 26 GPIO_ACTIVE_HIGH>;
118 compatible = "simple-bus";
119 #address-cells = <1>;
122 reg_1p0v: regulator@0 {
123 compatible = "regulator-fixed";
125 regulator-name = "1P0V";
126 regulator-min-microvolt = <1000000>;
127 regulator-max-microvolt = <1000000>;
131 reg_3p3v: regulator@1 {
132 compatible = "regulator-fixed";
134 regulator-name = "3P3V";
135 regulator-min-microvolt = <3300000>;
136 regulator-max-microvolt = <3300000>;
140 reg_usb_h1_vbus: regulator@2 {
141 compatible = "regulator-fixed";
143 regulator-name = "usb_h1_vbus";
144 regulator-min-microvolt = <5000000>;
145 regulator-max-microvolt = <5000000>;
149 reg_usb_otg_vbus: regulator@3 {
150 compatible = "regulator-fixed";
152 regulator-name = "usb_otg_vbus";
153 regulator-min-microvolt = <5000000>;
154 regulator-max-microvolt = <5000000>;
155 gpio = <&gpio3 22 GPIO_ACTIVE_HIGH>;
161 compatible = "fsl,imx6q-ventana-sgtl5000",
162 "fsl,imx-audio-sgtl5000";
163 model = "sgtl5000-audio";
164 ssi-controller = <&ssi1>;
165 audio-codec = <&sgtl5000>;
167 "MIC_IN", "Mic Jack",
168 "Mic Jack", "Mic Bias",
169 "Headphone Jack", "HP_OUT";
176 pinctrl-names = "default";
177 pinctrl-0 = <&pinctrl_audmux>; /* AUD4<->sgtl5000 */
181 fsl,audmux-port = <1>;
183 (IMX_AUDMUX_V2_PTCR_TFSDIR |
184 IMX_AUDMUX_V2_PTCR_TFSEL(4+8) | /* RXFS */
185 IMX_AUDMUX_V2_PTCR_TCLKDIR |
186 IMX_AUDMUX_V2_PTCR_TCSEL(4+8) | /* RXC */
187 IMX_AUDMUX_V2_PTCR_SYN)
188 IMX_AUDMUX_V2_PDCR_RXDSEL(4)
193 fsl,audmux-port = <4>;
195 IMX_AUDMUX_V2_PTCR_SYN
196 IMX_AUDMUX_V2_PDCR_RXDSEL(1)>;
201 pinctrl-names = "default";
202 pinctrl-0 = <&pinctrl_flexcan1>;
207 assigned-clocks = <&clks IMX6QDL_CLK_LDB_DI0_SEL>,
208 <&clks IMX6QDL_CLK_LDB_DI1_SEL>;
209 assigned-clock-parents = <&clks IMX6QDL_CLK_PLL3_USB_OTG>,
210 <&clks IMX6QDL_CLK_PLL3_USB_OTG>;
214 cs-gpios = <&gpio2 26 GPIO_ACTIVE_LOW>;
215 pinctrl-names = "default";
216 pinctrl-0 = <&pinctrl_ecspi2>;
221 pinctrl-names = "default";
222 pinctrl-0 = <&pinctrl_enet>;
223 phy-mode = "rgmii-id";
224 phy-reset-gpios = <&gpio1 30 GPIO_ACTIVE_LOW>;
229 pinctrl-names = "default";
230 pinctrl-0 = <&pinctrl_gpmi_nand>;
235 ddc-i2c-bus = <&i2c3>;
240 clock-frequency = <100000>;
241 pinctrl-names = "default";
242 pinctrl-0 = <&pinctrl_i2c1>;
246 compatible = "gw,gsc";
248 interrupt-parent = <&gpio1>;
249 interrupts = <4 IRQ_TYPE_LEVEL_LOW>;
250 interrupt-controller;
251 #interrupt-cells = <1>;
252 #address-cells = <1>;
256 compatible = "gw,gsc-adc";
257 #address-cells = <1>;
340 compatible = "gw,gsc-fan";
341 #address-cells = <1>;
348 compatible = "nxp,pca9555";
352 interrupt-parent = <&gsc>;
357 compatible = "atmel,24c02";
363 compatible = "atmel,24c02";
369 compatible = "atmel,24c02";
375 compatible = "atmel,24c02";
381 compatible = "dallas,ds1672";
387 clock-frequency = <100000>;
388 pinctrl-names = "default";
389 pinctrl-0 = <&pinctrl_i2c2>;
393 compatible = "fsl,pfuze100";
398 regulator-min-microvolt = <300000>;
399 regulator-max-microvolt = <1875000>;
402 regulator-ramp-delay = <6250>;
406 regulator-min-microvolt = <300000>;
407 regulator-max-microvolt = <1875000>;
410 regulator-ramp-delay = <6250>;
414 regulator-min-microvolt = <800000>;
415 regulator-max-microvolt = <3950000>;
421 regulator-min-microvolt = <400000>;
422 regulator-max-microvolt = <1975000>;
428 regulator-min-microvolt = <400000>;
429 regulator-max-microvolt = <1975000>;
435 regulator-min-microvolt = <800000>;
436 regulator-max-microvolt = <3300000>;
440 regulator-min-microvolt = <5000000>;
441 regulator-max-microvolt = <5150000>;
447 regulator-min-microvolt = <1000000>;
448 regulator-max-microvolt = <3000000>;
459 regulator-min-microvolt = <800000>;
460 regulator-max-microvolt = <1550000>;
464 regulator-min-microvolt = <800000>;
465 regulator-max-microvolt = <1550000>;
469 regulator-min-microvolt = <1800000>;
470 regulator-max-microvolt = <3300000>;
474 regulator-min-microvolt = <1800000>;
475 regulator-max-microvolt = <3300000>;
480 regulator-min-microvolt = <1800000>;
481 regulator-max-microvolt = <3300000>;
486 regulator-min-microvolt = <1800000>;
487 regulator-max-microvolt = <3300000>;
495 clock-frequency = <100000>;
496 pinctrl-names = "default";
497 pinctrl-0 = <&pinctrl_i2c3>;
500 sgtl5000: audio-codec@a {
501 compatible = "fsl,sgtl5000";
503 clocks = <&clks IMX6QDL_CLK_CKO>;
504 VDDA-supply = <&sw4_reg>;
505 VDDIO-supply = <®_3p3v>;
508 touchscreen: egalax_ts@4 {
509 compatible = "eeti,egalax_ts";
511 interrupt-parent = <&gpio7>;
513 wakeup-gpios = <&gpio7 12 GPIO_ACTIVE_LOW>;
517 compatible = "nxp,fxos8700";
526 fsl,data-mapping = "spwg";
527 fsl,data-width = <18>;
531 native-mode = <&timing0>;
532 timing0: hsd100pxn1 {
533 clock-frequency = <65000000>;
548 pinctrl-names = "default";
549 pinctrl-0 = <&pinctrl_pcie>;
550 reset-gpio = <&gpio1 29 GPIO_ACTIVE_LOW>;
555 pinctrl-names = "default";
556 pinctrl-0 = <&pinctrl_pwm1>; /* MX6_DIO0 */
561 pinctrl-names = "default";
562 pinctrl-0 = <&pinctrl_pwm2>; /* MX6_DIO1 */
567 pinctrl-names = "default";
568 pinctrl-0 = <&pinctrl_pwm3>; /* MX6_DIO2 */
574 pinctrl-names = "default", "state_dio";
575 pinctrl-0 = <&pinctrl_pwm4_backlight>;
576 pinctrl-1 = <&pinctrl_pwm4_dio>;
589 pinctrl-names = "default";
590 pinctrl-0 = <&pinctrl_uart1>;
591 rts-gpios = <&gpio7 1 GPIO_ACTIVE_HIGH>;
596 pinctrl-names = "default";
597 pinctrl-0 = <&pinctrl_uart2>;
602 pinctrl-names = "default";
603 pinctrl-0 = <&pinctrl_uart5>;
608 vbus-supply = <®_usb_otg_vbus>;
609 pinctrl-names = "default";
610 pinctrl-0 = <&pinctrl_usbotg>;
611 disable-over-current;
616 vbus-supply = <®_usb_h1_vbus>;
621 pinctrl-names = "default", "state_100mhz", "state_200mhz";
622 pinctrl-0 = <&pinctrl_usdhc3>;
623 pinctrl-1 = <&pinctrl_usdhc3_100mhz>;
624 pinctrl-2 = <&pinctrl_usdhc3_200mhz>;
625 cd-gpios = <&gpio7 0 GPIO_ACTIVE_LOW>;
626 vmmc-supply = <®_3p3v>;
627 no-1-8-v; /* firmware will remove if board revision supports */
636 pinctrl-names = "default";
637 pinctrl-0 = <&pinctrl_wdog>;
638 fsl,ext-reset-output;
643 pinctrl_audmux: audmuxgrp {
645 MX6QDL_PAD_SD2_DAT0__AUD4_RXD 0x130b0
646 MX6QDL_PAD_SD2_DAT3__AUD4_TXC 0x130b0
647 MX6QDL_PAD_SD2_DAT2__AUD4_TXD 0x110b0
648 MX6QDL_PAD_SD2_DAT1__AUD4_TXFS 0x130b0
649 MX6QDL_PAD_GPIO_0__CCM_CLKO1 0x130b0 /* AUD4_MCK */
650 MX6QDL_PAD_EIM_D25__AUD5_RXC 0x130b0
651 MX6QDL_PAD_DISP0_DAT19__AUD5_RXD 0x130b0
652 MX6QDL_PAD_EIM_D24__AUD5_RXFS 0x130b0
656 pinctrl_enet: enetgrp {
658 MX6QDL_PAD_RGMII_RXC__RGMII_RXC 0x1b030
659 MX6QDL_PAD_RGMII_RD0__RGMII_RD0 0x1b030
660 MX6QDL_PAD_RGMII_RD1__RGMII_RD1 0x1b030
661 MX6QDL_PAD_RGMII_RD2__RGMII_RD2 0x1b030
662 MX6QDL_PAD_RGMII_RD3__RGMII_RD3 0x1b030
663 MX6QDL_PAD_RGMII_RX_CTL__RGMII_RX_CTL 0x1b030
664 MX6QDL_PAD_RGMII_TXC__RGMII_TXC 0x1b030
665 MX6QDL_PAD_RGMII_TD0__RGMII_TD0 0x1b030
666 MX6QDL_PAD_RGMII_TD1__RGMII_TD1 0x1b030
667 MX6QDL_PAD_RGMII_TD2__RGMII_TD2 0x1b030
668 MX6QDL_PAD_RGMII_TD3__RGMII_TD3 0x1b030
669 MX6QDL_PAD_RGMII_TX_CTL__RGMII_TX_CTL 0x1b030
670 MX6QDL_PAD_ENET_REF_CLK__ENET_TX_CLK 0x1b0b0
671 MX6QDL_PAD_ENET_MDIO__ENET_MDIO 0x1b0b0
672 MX6QDL_PAD_ENET_MDC__ENET_MDC 0x1b0b0
673 MX6QDL_PAD_GPIO_16__ENET_REF_CLK 0x4001b0a8
677 pinctrl_ecspi2: escpi2grp {
679 MX6QDL_PAD_EIM_CS0__ECSPI2_SCLK 0x100b1
680 MX6QDL_PAD_EIM_CS1__ECSPI2_MOSI 0x100b1
681 MX6QDL_PAD_EIM_OE__ECSPI2_MISO 0x100b1
682 MX6QDL_PAD_EIM_RW__GPIO2_IO26 0x100b1
686 pinctrl_flexcan1: flexcan1grp {
688 MX6QDL_PAD_KEY_ROW2__FLEXCAN1_RX 0x1b0b1
689 MX6QDL_PAD_KEY_COL2__FLEXCAN1_TX 0x1b0b1
690 MX6QDL_PAD_GPIO_2__GPIO1_IO02 0x4001b0b0 /* CAN_STBY */
694 pinctrl_gpio_leds: gpioledsgrp {
696 MX6QDL_PAD_KEY_COL0__GPIO4_IO06 0x1b0b0
697 MX6QDL_PAD_KEY_ROW0__GPIO4_IO07 0x1b0b0
698 MX6QDL_PAD_KEY_ROW4__GPIO4_IO15 0x1b0b0
702 pinctrl_gpmi_nand: gpminandgrp {
704 MX6QDL_PAD_NANDF_CLE__NAND_CLE 0xb0b1
705 MX6QDL_PAD_NANDF_ALE__NAND_ALE 0xb0b1
706 MX6QDL_PAD_NANDF_WP_B__NAND_WP_B 0xb0b1
707 MX6QDL_PAD_NANDF_RB0__NAND_READY_B 0xb000
708 MX6QDL_PAD_NANDF_CS0__NAND_CE0_B 0xb0b1
709 MX6QDL_PAD_SD4_CMD__NAND_RE_B 0xb0b1
710 MX6QDL_PAD_SD4_CLK__NAND_WE_B 0xb0b1
711 MX6QDL_PAD_NANDF_D0__NAND_DATA00 0xb0b1
712 MX6QDL_PAD_NANDF_D1__NAND_DATA01 0xb0b1
713 MX6QDL_PAD_NANDF_D2__NAND_DATA02 0xb0b1
714 MX6QDL_PAD_NANDF_D3__NAND_DATA03 0xb0b1
715 MX6QDL_PAD_NANDF_D4__NAND_DATA04 0xb0b1
716 MX6QDL_PAD_NANDF_D5__NAND_DATA05 0xb0b1
717 MX6QDL_PAD_NANDF_D6__NAND_DATA06 0xb0b1
718 MX6QDL_PAD_NANDF_D7__NAND_DATA07 0xb0b1
722 pinctrl_i2c1: i2c1grp {
724 MX6QDL_PAD_EIM_D21__I2C1_SCL 0x4001b8b1
725 MX6QDL_PAD_EIM_D28__I2C1_SDA 0x4001b8b1
726 MX6QDL_PAD_GPIO_4__GPIO1_IO04 0xb0b1
730 pinctrl_i2c2: i2c2grp {
732 MX6QDL_PAD_KEY_COL3__I2C2_SCL 0x4001b8b1
733 MX6QDL_PAD_KEY_ROW3__I2C2_SDA 0x4001b8b1
737 pinctrl_i2c3: i2c3grp {
739 MX6QDL_PAD_GPIO_3__I2C3_SCL 0x4001b8b1
740 MX6QDL_PAD_GPIO_6__I2C3_SDA 0x4001b8b1
744 pinctrl_pcie: pciegrp {
746 MX6QDL_PAD_ENET_TX_EN__GPIO1_IO28 0x1b0b0 /* PCIE IRQ */
747 MX6QDL_PAD_ENET_TXD1__GPIO1_IO29 0x1b0b0 /* PCIE RST */
751 pinctrl_pps: ppsgrp {
753 MX6QDL_PAD_ENET_RXD1__GPIO1_IO26 0x1b0b1
757 pinctrl_pwm1: pwm1grp {
759 MX6QDL_PAD_GPIO_9__PWM1_OUT 0x1b0b1
763 pinctrl_pwm2: pwm2grp {
765 MX6QDL_PAD_SD1_DAT2__PWM2_OUT 0x1b0b1
769 pinctrl_pwm3: pwm3grp {
771 MX6QDL_PAD_SD4_DAT1__PWM3_OUT 0x1b0b1
775 pinctrl_pwm4_backlight: pwm4grpbacklight {
778 MX6QDL_PAD_SD1_CMD__PWM4_OUT 0x1b0b1
782 pinctrl_pwm4_dio: pwm4grpdio {
785 MX6QDL_PAD_SD4_DAT2__PWM4_OUT 0x1b0b1
789 pinctrl_uart1: uart1grp {
791 MX6QDL_PAD_SD3_DAT7__UART1_TX_DATA 0x1b0b1
792 MX6QDL_PAD_SD3_DAT6__UART1_RX_DATA 0x1b0b1
793 MX6QDL_PAD_SD3_DAT4__GPIO7_IO01 0x4001b0b1 /* TEN */
797 pinctrl_uart2: uart2grp {
799 MX6QDL_PAD_SD4_DAT7__UART2_TX_DATA 0x1b0b1
800 MX6QDL_PAD_SD4_DAT4__UART2_RX_DATA 0x1b0b1
804 pinctrl_uart5: uart5grp {
806 MX6QDL_PAD_KEY_COL1__UART5_TX_DATA 0x1b0b1
807 MX6QDL_PAD_KEY_ROW1__UART5_RX_DATA 0x1b0b1
811 pinctrl_usbotg: usbotggrp {
813 MX6QDL_PAD_GPIO_1__USB_OTG_ID 0x17059
814 MX6QDL_PAD_EIM_D22__GPIO3_IO22 0x1b0b0 /* PWR_EN */
815 MX6QDL_PAD_KEY_COL4__USB_OTG_OC 0x17059
819 pinctrl_usdhc3: usdhc3grp {
821 MX6QDL_PAD_SD3_CMD__SD3_CMD 0x17059
822 MX6QDL_PAD_SD3_CLK__SD3_CLK 0x10059
823 MX6QDL_PAD_SD3_DAT0__SD3_DATA0 0x17059
824 MX6QDL_PAD_SD3_DAT1__SD3_DATA1 0x17059
825 MX6QDL_PAD_SD3_DAT2__SD3_DATA2 0x17059
826 MX6QDL_PAD_SD3_DAT3__SD3_DATA3 0x17059
827 MX6QDL_PAD_SD3_DAT5__GPIO7_IO00 0x17059 /* CD */
828 MX6QDL_PAD_NANDF_CS1__SD3_VSELECT 0x17059
832 pinctrl_usdhc3_100mhz: usdhc3grp100mhz {
834 MX6QDL_PAD_SD3_CMD__SD3_CMD 0x170b9
835 MX6QDL_PAD_SD3_CLK__SD3_CLK 0x100b9
836 MX6QDL_PAD_SD3_DAT0__SD3_DATA0 0x170b9
837 MX6QDL_PAD_SD3_DAT1__SD3_DATA1 0x170b9
838 MX6QDL_PAD_SD3_DAT2__SD3_DATA2 0x170b9
839 MX6QDL_PAD_SD3_DAT3__SD3_DATA3 0x170b9
840 MX6QDL_PAD_SD3_DAT5__GPIO7_IO00 0x170b9 /* CD */
841 MX6QDL_PAD_NANDF_CS1__SD3_VSELECT 0x170b9
845 pinctrl_usdhc3_200mhz: usdhc3grp200mhz {
847 MX6QDL_PAD_SD3_CMD__SD3_CMD 0x170f9
848 MX6QDL_PAD_SD3_CLK__SD3_CLK 0x100f9
849 MX6QDL_PAD_SD3_DAT0__SD3_DATA0 0x170f9
850 MX6QDL_PAD_SD3_DAT1__SD3_DATA1 0x170f9
851 MX6QDL_PAD_SD3_DAT2__SD3_DATA2 0x170f9
852 MX6QDL_PAD_SD3_DAT3__SD3_DATA3 0x170f9
853 MX6QDL_PAD_SD3_DAT5__GPIO7_IO00 0x170f9 /* CD */
854 MX6QDL_PAD_NANDF_CS1__SD3_VSELECT 0x170f9
858 pinctrl_wdog: wdoggrp {
860 MX6QDL_PAD_SD1_DAT3__WDOG2_B 0x1b0b0