1 // SPDX-License-Identifier: GPL-2.0+
3 // Copyright 2021 Dillon Min <dillon.minfei@gmail.com>
5 // Based on imx6qdl-sabresd.dtsi which is:
6 // Copyright 2012 Freescale Semiconductor, Inc.
7 // Copyright 2011 Linaro Ltd.
9 #include <dt-bindings/clock/imx6qdl-clock.h>
10 #include <dt-bindings/gpio/gpio.h>
11 #include <dt-bindings/input/input.h>
19 device_type = "memory";
20 reg = <0x10000000 0x80000000>;
23 reg_usb_otg_vbus: regulator-usb-otg-vbus {
24 compatible = "regulator-fixed";
25 regulator-name = "usb_otg_vbus";
26 regulator-min-microvolt = <5000000>;
27 regulator-max-microvolt = <5000000>;
30 reg_usb_h1_vbus: regulator-usb-h1-vbus {
31 compatible = "regulator-fixed";
32 regulator-name = "usb_h1_vbus";
33 regulator-min-microvolt = <5000000>;
34 regulator-max-microvolt = <5000000>;
38 compatible = "gpio-leds";
39 pinctrl-names = "default";
40 pinctrl-0 = <&pinctrl_gpio_leds>;
43 gpios = <&gpio4 8 GPIO_ACTIVE_HIGH>;
45 linux,default-trigger = "heartbeat";
50 &ipu1_csi0_from_ipu1_csi0_mux {
52 data-shift = <12>; /* Lines 19:12 used */
57 &ipu1_csi0_mux_from_parallel_sensor {
58 remote-endpoint = <&ov2659_to_ipu1_csi0_mux>;
62 pinctrl-names = "default";
63 pinctrl-0 = <&pinctrl_ipu1_csi0>;
68 cs-gpios = <&gpio4 9 GPIO_ACTIVE_LOW>;
69 pinctrl-names = "default";
70 pinctrl-0 = <&pinctrl_ecspi1>, <&pinctrl_ecspi1_gpio>;
76 compatible = "st,m25p80", "jedec,spi-nor";
77 spi-max-frequency = <20000000>;
83 pinctrl-names = "default";
84 pinctrl-0 = <&pinctrl_enet>;
85 phy-mode = "rgmii-id";
96 qca,clk-out-frequency = <125000000>;
97 reset-gpios = <&gpio4 10 GPIO_ACTIVE_LOW>;
98 reset-assert-us = <10000>;
104 pinctrl-names = "default";
105 pinctrl-0 = <&pinctrl_hdmi_cec>;
106 ddc-i2c-bus = <&i2c3>;
111 clock-frequency = <100000>;
112 pinctrl-names = "default";
113 pinctrl-0 = <&pinctrl_i2c2>;
117 compatible = "fsl,pfuze100";
122 regulator-min-microvolt = <300000>;
123 regulator-max-microvolt = <1875000>;
126 regulator-ramp-delay = <6250>;
130 regulator-min-microvolt = <300000>;
131 regulator-max-microvolt = <1875000>;
134 regulator-ramp-delay = <6250>;
138 regulator-min-microvolt = <800000>;
139 regulator-max-microvolt = <3300000>;
142 regulator-ramp-delay = <6250>;
146 regulator-min-microvolt = <400000>;
147 regulator-max-microvolt = <1975000>;
153 regulator-min-microvolt = <400000>;
154 regulator-max-microvolt = <1975000>;
160 regulator-min-microvolt = <800000>;
161 regulator-max-microvolt = <3300000>;
166 regulator-min-microvolt = <5000000>;
167 regulator-max-microvolt = <5150000>;
171 regulator-min-microvolt = <1000000>;
172 regulator-max-microvolt = <3000000>;
183 regulator-min-microvolt = <800000>;
184 regulator-max-microvolt = <1550000>;
188 regulator-min-microvolt = <800000>;
189 regulator-max-microvolt = <1550000>;
193 regulator-min-microvolt = <1800000>;
194 regulator-max-microvolt = <3300000>;
198 regulator-min-microvolt = <1800000>;
199 regulator-max-microvolt = <3300000>;
204 regulator-min-microvolt = <1800000>;
205 regulator-max-microvolt = <3300000>;
210 regulator-min-microvolt = <1800000>;
211 regulator-max-microvolt = <3300000>;
219 clock-frequency = <100000>;
220 pinctrl-names = "default";
221 pinctrl-0 = <&pinctrl_i2c3>;
225 compatible = "ovti,ov2659";
226 pinctrl-names = "default";
227 pinctrl-0 = <&pinctrl_ov2659>;
228 clocks = <&clks IMX6QDL_CLK_CKO>;
229 clock-names = "xvclk";
231 powerdown-gpios = <&gpio7 11 GPIO_ACTIVE_HIGH>;
232 reset-gpios = <&gpio1 7 GPIO_ACTIVE_LOW>;
236 ov2659_to_ipu1_csi0_mux: endpoint {
237 remote-endpoint = <&ipu1_csi0_mux_from_parallel_sensor>;
238 link-frequencies = /bits/ 64 <70000000>;
248 pinctrl_ecspi1: ecspi1grp {
250 MX6QDL_PAD_EIM_D16__ECSPI1_SCLK 0x100b1
251 MX6QDL_PAD_EIM_D18__ECSPI1_MOSI 0x100b1
252 MX6QDL_PAD_EIM_D17__ECSPI1_MISO 0x100b1
256 pinctrl_ecspi1_gpio: ecspi1grpgpiogrp {
258 MX6QDL_PAD_KEY_ROW1__GPIO4_IO09 0x1b0b0
259 MX6QDL_PAD_ENET_RXD0__GPIO1_IO27 0x1b0b0
263 pinctrl_enet: enetgrp {
265 MX6QDL_PAD_ENET_MDIO__ENET_MDIO 0x1b0b0
266 MX6QDL_PAD_ENET_MDC__ENET_MDC 0x1b0b0
267 MX6QDL_PAD_RGMII_TXC__RGMII_TXC 0x1b030
268 MX6QDL_PAD_RGMII_TD0__RGMII_TD0 0x1b030
269 MX6QDL_PAD_RGMII_TD1__RGMII_TD1 0x1b030
270 MX6QDL_PAD_RGMII_TD2__RGMII_TD2 0x1b030
271 MX6QDL_PAD_RGMII_TD3__RGMII_TD3 0x1b030
272 MX6QDL_PAD_RGMII_TX_CTL__RGMII_TX_CTL 0x1b030
273 MX6QDL_PAD_ENET_REF_CLK__ENET_TX_CLK 0x1b0b0
274 MX6QDL_PAD_RGMII_RXC__RGMII_RXC 0x1b030
275 MX6QDL_PAD_RGMII_RD0__RGMII_RD0 0x1b030
276 MX6QDL_PAD_RGMII_RD1__RGMII_RD1 0x1b030
277 MX6QDL_PAD_RGMII_RD2__RGMII_RD2 0x1b030
278 MX6QDL_PAD_RGMII_RD3__RGMII_RD3 0x1b030
279 MX6QDL_PAD_RGMII_RX_CTL__RGMII_RX_CTL 0x1b030
280 MX6QDL_PAD_KEY_COL2__GPIO4_IO10 0x1b0b0
284 pinctrl_hdmi_cec: hdmicecgrp {
286 MX6QDL_PAD_EIM_A25__HDMI_TX_CEC_LINE 0x1f8b0
290 pinctrl_i2c2: i2c2grp {
292 MX6QDL_PAD_EIM_EB2__I2C2_SCL 0x4001b8b1
293 MX6QDL_PAD_KEY_ROW3__I2C2_SDA 0x4001b8b1
297 pinctrl_i2c3: i2c3grp {
299 MX6QDL_PAD_GPIO_5__I2C3_SCL 0x4001b8b1
300 MX6QDL_PAD_GPIO_6__I2C3_SDA 0x4001b8b1
304 pinctrl_ipu1_csi0: ipu1csi0grp {
306 MX6QDL_PAD_CSI0_DAT12__IPU1_CSI0_DATA12 0x1b0b0
307 MX6QDL_PAD_CSI0_DAT13__IPU1_CSI0_DATA13 0x1b0b0
308 MX6QDL_PAD_CSI0_DAT14__IPU1_CSI0_DATA14 0x1b0b0
309 MX6QDL_PAD_CSI0_DAT15__IPU1_CSI0_DATA15 0x1b0b0
310 MX6QDL_PAD_CSI0_DAT16__IPU1_CSI0_DATA16 0x1b0b0
311 MX6QDL_PAD_CSI0_DAT17__IPU1_CSI0_DATA17 0x1b0b0
312 MX6QDL_PAD_CSI0_DAT18__IPU1_CSI0_DATA18 0x1b0b0
313 MX6QDL_PAD_CSI0_DAT19__IPU1_CSI0_DATA19 0x1b0b0
314 MX6QDL_PAD_CSI0_PIXCLK__IPU1_CSI0_PIXCLK 0x1b0b0
315 MX6QDL_PAD_CSI0_MCLK__IPU1_CSI0_HSYNC 0x1b0b0
316 MX6QDL_PAD_CSI0_VSYNC__IPU1_CSI0_VSYNC 0x1b0b0
320 pinctrl_ov2659: ov2659grp {
322 MX6QDL_PAD_GPIO_16__GPIO7_IO11 0x1b0b0
323 MX6QDL_PAD_GPIO_7__GPIO1_IO07 0x1b0b0
324 MX6QDL_PAD_GPIO_0__CCM_CLKO1 0x130b0
328 pinctrl_uart4: uart4grp {
330 MX6QDL_PAD_KEY_COL0__UART4_TX_DATA 0x1b0b1
331 MX6QDL_PAD_KEY_ROW0__UART4_RX_DATA 0x1b0b1
335 pinctrl_usbotg: usbotggrp {
337 MX6QDL_PAD_ENET_RX_ER__USB_OTG_ID 0x17059
341 pinctrl_usdhc1: usdhc1grp {
343 MX6QDL_PAD_SD1_CMD__SD1_CMD 0x17059
344 MX6QDL_PAD_SD1_CLK__SD1_CLK 0x10059
345 MX6QDL_PAD_SD1_DAT0__SD1_DATA0 0x17059
346 MX6QDL_PAD_SD1_DAT1__SD1_DATA1 0x17059
347 MX6QDL_PAD_SD1_DAT2__SD1_DATA2 0x17059
348 MX6QDL_PAD_SD1_DAT3__SD1_DATA3 0x17059
352 pinctrl_usdhc1_gpio: usdhc1grpgpiogrp {
354 MX6QDL_PAD_ENET_TX_EN__GPIO1_IO28 0x1b0b0
358 pinctrl_usdhc2: usdhc2grp {
360 MX6QDL_PAD_SD2_CMD__SD2_CMD 0x17059
361 MX6QDL_PAD_SD2_CLK__SD2_CLK 0x10059
362 MX6QDL_PAD_SD2_DAT0__SD2_DATA0 0x17059
363 MX6QDL_PAD_SD2_DAT1__SD2_DATA1 0x17059
364 MX6QDL_PAD_SD2_DAT2__SD2_DATA2 0x17059
365 MX6QDL_PAD_SD2_DAT3__SD2_DATA3 0x17059
369 pinctrl_usdhc2_gpio: usdhc2grpgpiogrp {
371 MX6QDL_PAD_NANDF_D0__GPIO2_IO00 0x1b0b0
372 MX6QDL_PAD_NANDF_D1__GPIO2_IO01 0x1b0b0
376 pinctrl_usdhc3: usdhc3grp {
378 MX6QDL_PAD_SD3_CMD__SD3_CMD 0x17059
379 MX6QDL_PAD_SD3_CLK__SD3_CLK 0x10059
380 MX6QDL_PAD_SD3_DAT0__SD3_DATA0 0x17059
381 MX6QDL_PAD_SD3_DAT1__SD3_DATA1 0x17059
382 MX6QDL_PAD_SD3_DAT2__SD3_DATA2 0x17059
383 MX6QDL_PAD_SD3_DAT3__SD3_DATA3 0x17059
384 MX6QDL_PAD_SD3_DAT4__SD3_DATA4 0x17059
385 MX6QDL_PAD_SD3_DAT5__SD3_DATA5 0x17059
386 MX6QDL_PAD_SD3_DAT6__SD3_DATA6 0x17059
387 MX6QDL_PAD_SD3_DAT7__SD3_DATA7 0x17059
391 pinctrl_wdog: wdoggrp {
393 MX6QDL_PAD_GPIO_1__WDOG2_B 0x1b0b0
397 pinctrl_gpio_leds: gpioledsgrp {
399 MX6QDL_PAD_KEY_COL1__GPIO4_IO08 0x1b0b0
405 pinctrl-names = "default";
406 pinctrl-0 = <&pinctrl_uart4>;
411 vbus-supply = <®_usb_h1_vbus>;
416 vbus-supply = <®_usb_otg_vbus>;
417 pinctrl-names = "default";
418 pinctrl-0 = <&pinctrl_usbotg>;
419 disable-over-current;
424 pinctrl-names = "default";
425 pinctrl-0 = <&pinctrl_usdhc1>, <&pinctrl_usdhc1_gpio>;
427 cd-gpios = <&gpio1 28 GPIO_ACTIVE_LOW>;
432 pinctrl-names = "default";
433 pinctrl-0 = <&pinctrl_usdhc2>, <&pinctrl_usdhc2_gpio>;
435 cd-gpios = <&gpio2 0 GPIO_ACTIVE_LOW>;
436 wp-gpios = <&gpio2 1 GPIO_ACTIVE_HIGH>;
441 pinctrl-names = "default";
442 pinctrl-0 = <&pinctrl_usdhc3>;
454 pinctrl-names = "default";
455 pinctrl-0 = <&pinctrl_wdog>;
456 fsl,ext-reset-output;