2 * Copyright 2014-2017 Toradex AG
3 * Copyright 2012 Freescale Semiconductor, Inc.
4 * Copyright 2011 Linaro Ltd.
6 * This file is dual-licensed: you can use it either under the terms
7 * of the GPL or the X11 license, at your option. Note that this dual
8 * licensing only applies to this file, and not this project as a
11 * a) This file is free software; you can redistribute it and/or
12 * modify it under the terms of the GNU General Public License
13 * version 2 as published by the Free Software Foundation.
15 * This file is distributed in the hope that it will be useful,
16 * but WITHOUT ANY WARRANTY; without even the implied warranty of
17 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
18 * GNU General Public License for more details.
22 * b) Permission is hereby granted, free of charge, to any person
23 * obtaining a copy of this software and associated documentation
24 * files (the "Software"), to deal in the Software without
25 * restriction, including without limitation the rights to use,
26 * copy, modify, merge, publish, distribute, sublicense, and/or
27 * sell copies of the Software, and to permit persons to whom the
28 * Software is furnished to do so, subject to the following
31 * The above copyright notice and this permission notice shall be
32 * included in all copies or substantial portions of the Software.
34 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
35 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
36 * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
37 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
38 * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
39 * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
40 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
41 * OTHER DEALINGS IN THE SOFTWARE.
44 #include <dt-bindings/gpio/gpio.h>
47 model = "Toradex Apalis iMX6Q/D Module";
48 compatible = "toradex,apalis_imx6q", "fsl,imx6q";
50 /* Will be filled by the bootloader */
55 backlight: backlight {
56 compatible = "pwm-backlight";
57 pinctrl-names = "default";
58 pinctrl-0 = <&pinctrl_gpio_bl_on>;
59 pwms = <&pwm4 0 5000000>;
60 enable-gpios = <&gpio3 13 GPIO_ACTIVE_HIGH>;
64 reg_1p8v: regulator-1p8v {
65 compatible = "regulator-fixed";
66 regulator-name = "1P8V";
67 regulator-min-microvolt = <1800000>;
68 regulator-max-microvolt = <1800000>;
72 reg_2p5v: regulator-2p5v {
73 compatible = "regulator-fixed";
74 regulator-name = "2P5V";
75 regulator-min-microvolt = <2500000>;
76 regulator-max-microvolt = <2500000>;
80 reg_3p3v: regulator-3p3v {
81 compatible = "regulator-fixed";
82 regulator-name = "3P3V";
83 regulator-min-microvolt = <3300000>;
84 regulator-max-microvolt = <3300000>;
88 reg_usb_otg_vbus: regulator-usb-otg-vbus {
89 compatible = "regulator-fixed";
90 pinctrl-names = "default";
91 pinctrl-0 = <&pinctrl_regulator_usbotg_pwr>;
92 regulator-name = "usb_otg_vbus";
93 regulator-min-microvolt = <5000000>;
94 regulator-max-microvolt = <5000000>;
95 gpio = <&gpio3 22 GPIO_ACTIVE_HIGH>;
100 /* on module USB hub */
101 reg_usb_host_vbus_hub: regulator-usb-host-vbus-hub {
102 compatible = "regulator-fixed";
103 pinctrl-names = "default";
104 pinctrl-0 = <&pinctrl_regulator_usbhub_pwr>;
105 regulator-name = "usb_host_vbus_hub";
106 regulator-min-microvolt = <5000000>;
107 regulator-max-microvolt = <5000000>;
108 gpio = <&gpio3 28 GPIO_ACTIVE_HIGH>;
109 startup-delay-us = <2000>;
114 reg_usb_host_vbus: regulator-usb-host-vbus {
115 compatible = "regulator-fixed";
116 pinctrl-names = "default";
117 pinctrl-0 = <&pinctrl_regulator_usbh_pwr>;
118 regulator-name = "usb_host_vbus";
119 regulator-min-microvolt = <5000000>;
120 regulator-max-microvolt = <5000000>;
121 gpio = <&gpio1 0 GPIO_ACTIVE_HIGH>;
123 vin-supply = <®_usb_host_vbus_hub>;
128 compatible = "fsl,imx-audio-sgtl5000";
129 model = "imx6q-apalis-sgtl5000";
130 ssi-controller = <&ssi1>;
131 audio-codec = <&codec>;
133 "LINE_IN", "Line In Jack",
134 "MIC_IN", "Mic Jack",
135 "Mic Jack", "Mic Bias",
136 "Headphone Jack", "HP_OUT";
141 sound_spdif: sound-spdif {
142 compatible = "fsl,imx-audio-spdif";
144 spdif-controller = <&spdif>;
152 pinctrl-names = "default";
153 pinctrl-0 = <&pinctrl_audmux>;
158 pinctrl-names = "default";
159 pinctrl-0 = <&pinctrl_flexcan1>;
164 pinctrl-names = "default";
165 pinctrl-0 = <&pinctrl_flexcan2>;
171 cs-gpios = <&gpio5 25 GPIO_ACTIVE_HIGH>;
172 pinctrl-names = "default";
173 pinctrl-0 = <&pinctrl_ecspi1>;
179 cs-gpios = <&gpio2 26 GPIO_ACTIVE_HIGH>;
180 pinctrl-names = "default";
181 pinctrl-0 = <&pinctrl_ecspi2>;
186 pinctrl-names = "default";
187 pinctrl-0 = <&pinctrl_enet>;
189 phy-handle = <ðphy>;
190 phy-reset-duration = <10>;
191 phy-reset-gpios = <&gpio1 25 GPIO_ACTIVE_LOW>;
195 #address-cells = <1>;
198 ethphy: ethernet-phy@7 {
199 interrupt-parent = <&gpio1>;
200 interrupts = <30 IRQ_TYPE_LEVEL_LOW>;
207 pinctrl-names = "default";
208 pinctrl-0 = <&pinctrl_hdmi_ddc>;
212 /* I2C1_SDA/SCL on MXM3 209/211 (e.g. RTC on carrier board) */
214 clock-frequency = <100000>;
215 pinctrl-names = "default";
216 pinctrl-0 = <&pinctrl_i2c1>;
221 * PWR_I2C: power I2C to audio codec, PMIC, temperature sensor and
222 * touch screen controller
225 clock-frequency = <100000>;
226 pinctrl-names = "default";
227 pinctrl-0 = <&pinctrl_i2c2>;
231 compatible = "fsl,pfuze100";
236 regulator-min-microvolt = <300000>;
237 regulator-max-microvolt = <1875000>;
240 regulator-ramp-delay = <6250>;
244 regulator-min-microvolt = <300000>;
245 regulator-max-microvolt = <1875000>;
248 regulator-ramp-delay = <6250>;
252 regulator-min-microvolt = <400000>;
253 regulator-max-microvolt = <1975000>;
259 regulator-min-microvolt = <5000000>;
260 regulator-max-microvolt = <5150000>;
266 regulator-min-microvolt = <1000000>;
267 regulator-max-microvolt = <3000000>;
278 regulator-min-microvolt = <800000>;
279 regulator-max-microvolt = <1550000>;
285 regulator-min-microvolt = <800000>;
286 regulator-max-microvolt = <1550000>;
292 regulator-min-microvolt = <1800000>;
293 regulator-max-microvolt = <3300000>;
299 regulator-min-microvolt = <1800000>;
300 regulator-max-microvolt = <3300000>;
306 regulator-min-microvolt = <1800000>;
307 regulator-max-microvolt = <3300000>;
313 regulator-min-microvolt = <1800000>;
314 regulator-max-microvolt = <3300000>;
322 compatible = "fsl,sgtl5000";
324 clocks = <&clks IMX6QDL_CLK_CKO>;
325 VDDA-supply = <®_2p5v>;
326 VDDIO-supply = <®_3p3v>;
329 /* STMPE811 touch screen controller */
331 compatible = "st,stmpe811";
332 pinctrl-names = "default";
333 pinctrl-0 = <&pinctrl_touch_int>;
334 #address-cells = <1>;
337 interrupts = <10 IRQ_TYPE_LEVEL_LOW>;
338 interrupt-parent = <&gpio4>;
339 interrupt-controller;
345 compatible = "st,stmpe-ts";
346 /* 3.25 MHz ADC clock speed */
348 /* 8 sample average control */
350 /* 7 length fractional part in z */
353 * 50 mA typical 80 mA max touchscreen drivers
354 * current limit value
359 /* internal ADC reference */
361 /* ADC converstion time: 80 clocks */
362 st,sample-time = <4>;
363 /* 1 ms panel driver settling time */
365 /* 5 ms touch detect interrupt delay */
366 st,touch-det-delay = <5>;
372 * I2C3_SDA/SCL (CAM) on MXM3 pin 201/203 (e.g. camera sensor on carrier
376 clock-frequency = <100000>;
377 pinctrl-names = "default", "recovery";
378 pinctrl-0 = <&pinctrl_i2c3>;
379 pinctrl-1 = <&pinctrl_i2c3_recovery>;
380 scl-gpios = <&gpio3 17 GPIO_ACTIVE_HIGH>;
381 sda-gpios = <&gpio3 18 GPIO_ACTIVE_HIGH>;
386 pinctrl-names = "default";
387 pinctrl-0 = <&pinctrl_pwm1>;
392 pinctrl-names = "default";
393 pinctrl-0 = <&pinctrl_pwm2>;
398 pinctrl-names = "default";
399 pinctrl-0 = <&pinctrl_pwm3>;
404 pinctrl-names = "default";
405 pinctrl-0 = <&pinctrl_pwm4>;
410 pinctrl-names = "default";
411 pinctrl-0 = <&pinctrl_spdif>;
420 pinctrl-names = "default";
421 pinctrl-0 = <&pinctrl_uart1_dte &pinctrl_uart1_ctrl>;
428 pinctrl-names = "default";
429 pinctrl-0 = <&pinctrl_uart2_dte>;
436 pinctrl-names = "default";
437 pinctrl-0 = <&pinctrl_uart4_dte>;
443 pinctrl-names = "default";
444 pinctrl-0 = <&pinctrl_uart5_dte>;
450 pinctrl-names = "default";
451 pinctrl-0 = <&pinctrl_usbotg>;
452 disable-over-current;
458 pinctrl-names = "default";
459 pinctrl-0 = <&pinctrl_usdhc1_4bit &pinctrl_usdhc1_8bit>;
460 vqmmc-supply = <®_3p3v>;
462 voltage-ranges = <3300 3300>;
468 pinctrl-names = "default";
469 pinctrl-0 = <&pinctrl_usdhc2>;
470 vqmmc-supply = <®_3p3v>;
472 voltage-ranges = <3300 3300>;
478 pinctrl-names = "default";
479 pinctrl-0 = <&pinctrl_usdhc3>;
480 vqmmc-supply = <®_3p3v>;
482 voltage-ranges = <3300 3300>;
492 /* pins used on module */
493 pinctrl-names = "default";
494 pinctrl-0 = <&pinctrl_reset_moci>;
496 pinctrl_apalis_gpio1: gpio2io04grp {
498 MX6QDL_PAD_NANDF_D4__GPIO2_IO04 0x130b0
502 pinctrl_apalis_gpio2: gpio2io05grp {
504 MX6QDL_PAD_NANDF_D5__GPIO2_IO05 0x130b0
508 pinctrl_apalis_gpio3: gpio2io06grp {
510 MX6QDL_PAD_NANDF_D6__GPIO2_IO06 0x130b0
514 pinctrl_apalis_gpio4: gpio2io07grp {
516 MX6QDL_PAD_NANDF_D7__GPIO2_IO07 0x130b0
520 pinctrl_apalis_gpio5: gpio6io10grp {
522 MX6QDL_PAD_NANDF_RB0__GPIO6_IO10 0x130b0
526 pinctrl_apalis_gpio6: gpio6io09grp {
528 MX6QDL_PAD_NANDF_WP_B__GPIO6_IO09 0x130b0
532 pinctrl_apalis_gpio7: gpio1io02grp {
534 MX6QDL_PAD_GPIO_2__GPIO1_IO02 0x130b0
538 pinctrl_apalis_gpio8: gpio1io06grp {
540 MX6QDL_PAD_GPIO_6__GPIO1_IO06 0x130b0
544 pinctrl_audmux: audmuxgrp {
546 MX6QDL_PAD_DISP0_DAT20__AUD4_TXC 0x130b0
547 MX6QDL_PAD_DISP0_DAT21__AUD4_TXD 0x130b0
548 MX6QDL_PAD_DISP0_DAT22__AUD4_TXFS 0x130b0
549 MX6QDL_PAD_DISP0_DAT23__AUD4_RXD 0x130b0
550 /* SGTL5000 sys_mclk */
551 MX6QDL_PAD_GPIO_5__CCM_CLKO1 0x130b0
555 pinctrl_cam_mclk: cammclkgrp {
558 MX6QDL_PAD_NANDF_CS2__CCM_CLKO2 0x00b0
562 pinctrl_ecspi1: ecspi1grp {
564 MX6QDL_PAD_CSI0_DAT6__ECSPI1_MISO 0x100b1
565 MX6QDL_PAD_CSI0_DAT5__ECSPI1_MOSI 0x100b1
566 MX6QDL_PAD_CSI0_DAT4__ECSPI1_SCLK 0x100b1
568 MX6QDL_PAD_CSI0_DAT7__GPIO5_IO25 0x000b1
572 pinctrl_ecspi2: ecspi2grp {
574 MX6QDL_PAD_EIM_OE__ECSPI2_MISO 0x100b1
575 MX6QDL_PAD_EIM_CS1__ECSPI2_MOSI 0x100b1
576 MX6QDL_PAD_EIM_CS0__ECSPI2_SCLK 0x100b1
578 MX6QDL_PAD_EIM_RW__GPIO2_IO26 0x000b1
582 pinctrl_enet: enetgrp {
584 MX6QDL_PAD_ENET_MDIO__ENET_MDIO 0x100b0
585 MX6QDL_PAD_ENET_MDC__ENET_MDC 0x100b0
586 MX6QDL_PAD_RGMII_TXC__RGMII_TXC 0x10030
587 MX6QDL_PAD_RGMII_TD0__RGMII_TD0 0x10030
588 MX6QDL_PAD_RGMII_TD1__RGMII_TD1 0x10030
589 MX6QDL_PAD_RGMII_TD2__RGMII_TD2 0x10030
590 MX6QDL_PAD_RGMII_TD3__RGMII_TD3 0x10030
591 MX6QDL_PAD_RGMII_TX_CTL__RGMII_TX_CTL 0x10030
592 MX6QDL_PAD_ENET_REF_CLK__ENET_TX_CLK 0x100b0
593 MX6QDL_PAD_RGMII_RXC__RGMII_RXC 0x1b030
594 MX6QDL_PAD_RGMII_RD0__RGMII_RD0 0x1b030
595 MX6QDL_PAD_RGMII_RD1__RGMII_RD1 0x1b030
596 MX6QDL_PAD_RGMII_RD2__RGMII_RD2 0x1b030
597 MX6QDL_PAD_RGMII_RD3__RGMII_RD3 0x1b030
598 MX6QDL_PAD_RGMII_RX_CTL__RGMII_RX_CTL 0x1b030
599 /* Ethernet PHY reset */
600 MX6QDL_PAD_ENET_CRS_DV__GPIO1_IO25 0x000b0
601 /* Ethernet PHY interrupt */
602 MX6QDL_PAD_ENET_TXD0__GPIO1_IO30 0x000b1
606 pinctrl_flexcan1: flexcan1grp {
608 MX6QDL_PAD_GPIO_7__FLEXCAN1_TX 0x1b0b0
609 MX6QDL_PAD_GPIO_8__FLEXCAN1_RX 0x1b0b0
613 pinctrl_flexcan2: flexcan2grp {
615 MX6QDL_PAD_KEY_COL4__FLEXCAN2_TX 0x1b0b0
616 MX6QDL_PAD_KEY_ROW4__FLEXCAN2_RX 0x1b0b0
620 pinctrl_gpio_bl_on: gpioblon {
622 MX6QDL_PAD_EIM_DA13__GPIO3_IO13 0x1b0b0
626 pinctrl_gpio_keys: gpio1io04grp {
629 MX6QDL_PAD_GPIO_4__GPIO1_IO04 0x1b0b0
633 pinctrl_hdmi_cec: hdmicecgrp {
635 MX6QDL_PAD_KEY_ROW2__HDMI_TX_CEC_LINE 0x1f8b0
639 pinctrl_hdmi_ddc: hdmiddcgrp {
641 MX6QDL_PAD_EIM_EB2__HDMI_TX_DDC_SCL 0x4001b8b1
642 MX6QDL_PAD_EIM_D16__HDMI_TX_DDC_SDA 0x4001b8b1
646 pinctrl_i2c1: i2c1grp {
648 MX6QDL_PAD_CSI0_DAT8__I2C1_SDA 0x4001b8b1
649 MX6QDL_PAD_CSI0_DAT9__I2C1_SCL 0x4001b8b1
653 pinctrl_i2c2: i2c2grp {
655 MX6QDL_PAD_KEY_COL3__I2C2_SCL 0x4001b8b1
656 MX6QDL_PAD_KEY_ROW3__I2C2_SDA 0x4001b8b1
660 pinctrl_i2c3: i2c3grp {
662 MX6QDL_PAD_EIM_D17__I2C3_SCL 0x4001b8b1
663 MX6QDL_PAD_EIM_D18__I2C3_SDA 0x4001b8b1
667 pinctrl_i2c3_recovery: i2c3recoverygrp {
669 MX6QDL_PAD_EIM_D17__GPIO3_IO17 0x4001b8b1
670 MX6QDL_PAD_EIM_D18__GPIO3_IO18 0x4001b8b1
674 pinctrl_ipu1_csi0: ipu1csi0grp { /* parallel camera */
676 MX6QDL_PAD_CSI0_DAT12__IPU1_CSI0_DATA12 0xb0b1
677 MX6QDL_PAD_CSI0_DAT13__IPU1_CSI0_DATA13 0xb0b1
678 MX6QDL_PAD_CSI0_DAT14__IPU1_CSI0_DATA14 0xb0b1
679 MX6QDL_PAD_CSI0_DAT15__IPU1_CSI0_DATA15 0xb0b1
680 MX6QDL_PAD_CSI0_DAT16__IPU1_CSI0_DATA16 0xb0b1
681 MX6QDL_PAD_CSI0_DAT17__IPU1_CSI0_DATA17 0xb0b1
682 MX6QDL_PAD_CSI0_DAT18__IPU1_CSI0_DATA18 0xb0b1
683 MX6QDL_PAD_CSI0_DAT19__IPU1_CSI0_DATA19 0xb0b1
684 MX6QDL_PAD_CSI0_PIXCLK__IPU1_CSI0_PIXCLK 0xb0b1
685 MX6QDL_PAD_CSI0_MCLK__IPU1_CSI0_HSYNC 0xb0b1
686 MX6QDL_PAD_CSI0_VSYNC__IPU1_CSI0_VSYNC 0xb0b1
690 pinctrl_ipu1_lcdif: ipu1lcdifgrp {
692 MX6QDL_PAD_EIM_A16__IPU1_DI1_DISP_CLK 0x61
694 MX6QDL_PAD_EIM_DA10__IPU1_DI1_PIN15 0x61
696 MX6QDL_PAD_EIM_DA11__IPU1_DI1_PIN02 0x61
698 MX6QDL_PAD_EIM_DA12__IPU1_DI1_PIN03 0x61
699 MX6QDL_PAD_EIM_DA9__IPU1_DISP1_DATA00 0x61
700 MX6QDL_PAD_EIM_DA8__IPU1_DISP1_DATA01 0x61
701 MX6QDL_PAD_EIM_DA7__IPU1_DISP1_DATA02 0x61
702 MX6QDL_PAD_EIM_DA6__IPU1_DISP1_DATA03 0x61
703 MX6QDL_PAD_EIM_DA5__IPU1_DISP1_DATA04 0x61
704 MX6QDL_PAD_EIM_DA4__IPU1_DISP1_DATA05 0x61
705 MX6QDL_PAD_EIM_DA3__IPU1_DISP1_DATA06 0x61
706 MX6QDL_PAD_EIM_DA2__IPU1_DISP1_DATA07 0x61
707 MX6QDL_PAD_EIM_DA1__IPU1_DISP1_DATA08 0x61
708 MX6QDL_PAD_EIM_DA0__IPU1_DISP1_DATA09 0x61
709 MX6QDL_PAD_EIM_EB1__IPU1_DISP1_DATA10 0x61
710 MX6QDL_PAD_EIM_EB0__IPU1_DISP1_DATA11 0x61
711 MX6QDL_PAD_EIM_A17__IPU1_DISP1_DATA12 0x61
712 MX6QDL_PAD_EIM_A18__IPU1_DISP1_DATA13 0x61
713 MX6QDL_PAD_EIM_A19__IPU1_DISP1_DATA14 0x61
714 MX6QDL_PAD_EIM_A20__IPU1_DISP1_DATA15 0x61
715 MX6QDL_PAD_EIM_A21__IPU1_DISP1_DATA16 0x61
716 MX6QDL_PAD_EIM_A22__IPU1_DISP1_DATA17 0x61
717 MX6QDL_PAD_EIM_A23__IPU1_DISP1_DATA18 0x61
718 MX6QDL_PAD_EIM_A24__IPU1_DISP1_DATA19 0x61
719 MX6QDL_PAD_EIM_D31__IPU1_DISP1_DATA20 0x61
720 MX6QDL_PAD_EIM_D30__IPU1_DISP1_DATA21 0x61
721 MX6QDL_PAD_EIM_D26__IPU1_DISP1_DATA22 0x61
722 MX6QDL_PAD_EIM_D27__IPU1_DISP1_DATA23 0x61
726 pinctrl_ipu2_vdac: ipu2vdacgrp {
728 MX6QDL_PAD_DI0_DISP_CLK__IPU2_DI0_DISP_CLK 0xd1
729 MX6QDL_PAD_DI0_PIN15__IPU2_DI0_PIN15 0xd1
730 MX6QDL_PAD_DI0_PIN2__IPU2_DI0_PIN02 0xd1
731 MX6QDL_PAD_DI0_PIN3__IPU2_DI0_PIN03 0xd1
732 MX6QDL_PAD_DISP0_DAT0__IPU2_DISP0_DATA00 0xf9
733 MX6QDL_PAD_DISP0_DAT1__IPU2_DISP0_DATA01 0xf9
734 MX6QDL_PAD_DISP0_DAT2__IPU2_DISP0_DATA02 0xf9
735 MX6QDL_PAD_DISP0_DAT3__IPU2_DISP0_DATA03 0xf9
736 MX6QDL_PAD_DISP0_DAT4__IPU2_DISP0_DATA04 0xf9
737 MX6QDL_PAD_DISP0_DAT5__IPU2_DISP0_DATA05 0xf9
738 MX6QDL_PAD_DISP0_DAT6__IPU2_DISP0_DATA06 0xf9
739 MX6QDL_PAD_DISP0_DAT7__IPU2_DISP0_DATA07 0xf9
740 MX6QDL_PAD_DISP0_DAT8__IPU2_DISP0_DATA08 0xf9
741 MX6QDL_PAD_DISP0_DAT9__IPU2_DISP0_DATA09 0xf9
742 MX6QDL_PAD_DISP0_DAT10__IPU2_DISP0_DATA10 0xf9
743 MX6QDL_PAD_DISP0_DAT11__IPU2_DISP0_DATA11 0xf9
744 MX6QDL_PAD_DISP0_DAT12__IPU2_DISP0_DATA12 0xf9
745 MX6QDL_PAD_DISP0_DAT13__IPU2_DISP0_DATA13 0xf9
746 MX6QDL_PAD_DISP0_DAT14__IPU2_DISP0_DATA14 0xf9
747 MX6QDL_PAD_DISP0_DAT15__IPU2_DISP0_DATA15 0xf9
751 pinctrl_mmc_cd: gpiommccdgrp {
754 MX6QDL_PAD_DI0_PIN4__GPIO4_IO20 0x000b0
758 pinctrl_pwm1: pwm1grp {
760 MX6QDL_PAD_GPIO_9__PWM1_OUT 0x1b0b1
764 pinctrl_pwm2: pwm2grp {
766 MX6QDL_PAD_GPIO_1__PWM2_OUT 0x1b0b1
770 pinctrl_pwm3: pwm3grp {
772 MX6QDL_PAD_SD4_DAT1__PWM3_OUT 0x1b0b1
776 pinctrl_pwm4: pwm4grp {
778 MX6QDL_PAD_SD4_DAT2__PWM4_OUT 0x1b0b1
782 pinctrl_regulator_usbh_pwr: gpioregusbhpwrgrp {
785 MX6QDL_PAD_GPIO_0__GPIO1_IO00 0x0f058
789 pinctrl_regulator_usbhub_pwr: gpioregusbhubpwrgrp {
792 MX6QDL_PAD_EIM_D28__GPIO3_IO28 0x0f058
796 pinctrl_regulator_usbotg_pwr: gpioregusbotgpwrgrp {
799 MX6QDL_PAD_EIM_D22__GPIO3_IO22 0x0f058
803 pinctrl_reset_moci: gpioresetmocigrp {
805 /* RESET_MOCI control */
806 MX6QDL_PAD_ENET_TX_EN__GPIO1_IO28 0x0f058
810 pinctrl_sd_cd: gpiosdcdgrp {
813 MX6QDL_PAD_NANDF_CS1__GPIO6_IO14 0x000b0
817 pinctrl_spdif: spdifgrp {
819 MX6QDL_PAD_GPIO_16__SPDIF_IN 0x1b0b0
820 MX6QDL_PAD_GPIO_17__SPDIF_OUT 0x1b0b0
824 pinctrl_touch_int: gpiotouchintgrp {
826 /* STMPE811 interrupt */
827 MX6QDL_PAD_KEY_COL2__GPIO4_IO10 0x1b0b0
831 pinctrl_uart1_dce: uart1dcegrp {
833 MX6QDL_PAD_CSI0_DAT10__UART1_TX_DATA 0x1b0b1
834 MX6QDL_PAD_CSI0_DAT11__UART1_RX_DATA 0x1b0b1
839 pinctrl_uart1_dte: uart1dtegrp {
841 MX6QDL_PAD_CSI0_DAT10__UART1_RX_DATA 0x1b0b1
842 MX6QDL_PAD_CSI0_DAT11__UART1_TX_DATA 0x1b0b1
843 MX6QDL_PAD_EIM_D19__UART1_RTS_B 0x1b0b1
844 MX6QDL_PAD_EIM_D20__UART1_CTS_B 0x1b0b1
848 /* Additional DTR, DSR, DCD */
849 pinctrl_uart1_ctrl: uart1ctrlgrp {
851 MX6QDL_PAD_EIM_D23__UART1_DCD_B 0x1b0b0
852 MX6QDL_PAD_EIM_D24__UART1_DTR_B 0x1b0b0
853 MX6QDL_PAD_EIM_D25__UART1_DSR_B 0x1b0b0
857 pinctrl_uart2_dce: uart2dcegrp {
859 MX6QDL_PAD_SD4_DAT4__UART2_RX_DATA 0x1b0b1
860 MX6QDL_PAD_SD4_DAT7__UART2_TX_DATA 0x1b0b1
865 pinctrl_uart2_dte: uart2dtegrp {
867 MX6QDL_PAD_SD4_DAT4__UART2_TX_DATA 0x1b0b1
868 MX6QDL_PAD_SD4_DAT7__UART2_RX_DATA 0x1b0b1
869 MX6QDL_PAD_SD4_DAT6__UART2_RTS_B 0x1b0b1
870 MX6QDL_PAD_SD4_DAT5__UART2_CTS_B 0x1b0b1
874 pinctrl_uart4_dce: uart4dcegrp {
876 MX6QDL_PAD_KEY_COL0__UART4_TX_DATA 0x1b0b1
877 MX6QDL_PAD_KEY_ROW0__UART4_RX_DATA 0x1b0b1
882 pinctrl_uart4_dte: uart4dtegrp {
884 MX6QDL_PAD_KEY_COL0__UART4_RX_DATA 0x1b0b1
885 MX6QDL_PAD_KEY_ROW0__UART4_TX_DATA 0x1b0b1
889 pinctrl_uart5_dce: uart5dcegrp {
891 MX6QDL_PAD_KEY_COL1__UART5_TX_DATA 0x1b0b1
892 MX6QDL_PAD_KEY_ROW1__UART5_RX_DATA 0x1b0b1
897 pinctrl_uart5_dte: uart5dtegrp {
899 MX6QDL_PAD_KEY_COL1__UART5_RX_DATA 0x1b0b1
900 MX6QDL_PAD_KEY_ROW1__UART5_TX_DATA 0x1b0b1
904 pinctrl_usbotg: usbotggrp {
906 MX6QDL_PAD_ENET_RX_ER__USB_OTG_ID 0x17059
910 pinctrl_usdhc1_4bit: usdhc1grp_4bit {
912 MX6QDL_PAD_SD1_CMD__SD1_CMD 0x17071
913 MX6QDL_PAD_SD1_CLK__SD1_CLK 0x10071
914 MX6QDL_PAD_SD1_DAT0__SD1_DATA0 0x17071
915 MX6QDL_PAD_SD1_DAT1__SD1_DATA1 0x17071
916 MX6QDL_PAD_SD1_DAT2__SD1_DATA2 0x17071
917 MX6QDL_PAD_SD1_DAT3__SD1_DATA3 0x17071
921 pinctrl_usdhc1_8bit: usdhc1grp_8bit {
923 MX6QDL_PAD_NANDF_D0__SD1_DATA4 0x17071
924 MX6QDL_PAD_NANDF_D1__SD1_DATA5 0x17071
925 MX6QDL_PAD_NANDF_D2__SD1_DATA6 0x17071
926 MX6QDL_PAD_NANDF_D3__SD1_DATA7 0x17071
930 pinctrl_usdhc2: usdhc2grp {
932 MX6QDL_PAD_SD2_CMD__SD2_CMD 0x17071
933 MX6QDL_PAD_SD2_CLK__SD2_CLK 0x10071
934 MX6QDL_PAD_SD2_DAT0__SD2_DATA0 0x17071
935 MX6QDL_PAD_SD2_DAT1__SD2_DATA1 0x17071
936 MX6QDL_PAD_SD2_DAT2__SD2_DATA2 0x17071
937 MX6QDL_PAD_SD2_DAT3__SD2_DATA3 0x17071
941 pinctrl_usdhc3: usdhc3grp {
943 MX6QDL_PAD_SD3_CMD__SD3_CMD 0x17059
944 MX6QDL_PAD_SD3_CLK__SD3_CLK 0x10059
945 MX6QDL_PAD_SD3_DAT0__SD3_DATA0 0x17059
946 MX6QDL_PAD_SD3_DAT1__SD3_DATA1 0x17059
947 MX6QDL_PAD_SD3_DAT2__SD3_DATA2 0x17059
948 MX6QDL_PAD_SD3_DAT3__SD3_DATA3 0x17059
949 MX6QDL_PAD_SD3_DAT4__SD3_DATA4 0x17059
950 MX6QDL_PAD_SD3_DAT5__SD3_DATA5 0x17059
951 MX6QDL_PAD_SD3_DAT6__SD3_DATA6 0x17059
952 MX6QDL_PAD_SD3_DAT7__SD3_DATA7 0x17059
954 MX6QDL_PAD_SD3_RST__SD3_RESET 0x17059
958 pinctrl_usdhc3_100mhz: usdhc3100mhzgrp {
960 MX6QDL_PAD_SD3_CMD__SD3_CMD 0x170b9
961 MX6QDL_PAD_SD3_CLK__SD3_CLK 0x100b9
962 MX6QDL_PAD_SD3_DAT0__SD3_DATA0 0x170b9
963 MX6QDL_PAD_SD3_DAT1__SD3_DATA1 0x170b9
964 MX6QDL_PAD_SD3_DAT2__SD3_DATA2 0x170b9
965 MX6QDL_PAD_SD3_DAT3__SD3_DATA3 0x170b9
966 MX6QDL_PAD_SD3_DAT4__SD3_DATA4 0x170b9
967 MX6QDL_PAD_SD3_DAT5__SD3_DATA5 0x170b9
968 MX6QDL_PAD_SD3_DAT6__SD3_DATA6 0x170b9
969 MX6QDL_PAD_SD3_DAT7__SD3_DATA7 0x170b9
971 MX6QDL_PAD_SD3_RST__SD3_RESET 0x170b9
975 pinctrl_usdhc3_200mhz: usdhc3200mhzgrp {
977 MX6QDL_PAD_SD3_CMD__SD3_CMD 0x170f9
978 MX6QDL_PAD_SD3_CLK__SD3_CLK 0x100f9
979 MX6QDL_PAD_SD3_DAT0__SD3_DATA0 0x170f9
980 MX6QDL_PAD_SD3_DAT1__SD3_DATA1 0x170f9
981 MX6QDL_PAD_SD3_DAT2__SD3_DATA2 0x170f9
982 MX6QDL_PAD_SD3_DAT3__SD3_DATA3 0x170f9
983 MX6QDL_PAD_SD3_DAT4__SD3_DATA4 0x170f9
984 MX6QDL_PAD_SD3_DAT5__SD3_DATA5 0x170f9
985 MX6QDL_PAD_SD3_DAT6__SD3_DATA6 0x170f9
986 MX6QDL_PAD_SD3_DAT7__SD3_DATA7 0x170f9
988 MX6QDL_PAD_SD3_RST__SD3_RESET 0x170f9