2 * Copyright 2016 United Western Technologies.
4 * This file is dual-licensed: you can use it either under the terms
5 * of the GPL or the X11 license, at your option. Note that this dual
6 * licensing only applies to this file, and not this project as a
9 * a) This file is free software; you can redistribute it and/or
10 * modify it under the terms of the GNU General Public License as
11 * published by the Free Software Foundation; either version 2 of the
12 * License, or (at your option) any later version.
14 * This file is distributed in the hope that it will be useful,
15 * but WITHOUT ANY WARRANTY; without even the implied warranty of
16 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
17 * GNU General Public License for more details.
21 * b) Permission is hereby granted, free of charge, to any person
22 * obtaining a copy of this software and associated documentation
23 * files (the "Software"), to deal in the Software without
24 * restriction, including without limitation the rights to use,
25 * copy, modify, merge, publish, distribute, sublicense, and/or
26 * sell copies of the Software, and to permit persons to whom the
27 * Software is furnished to do so, subject to the following
30 * The above copyright notice and this permission notice shall be
31 * included in all copies or substantial portions of the Software.
33 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
34 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
35 * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
36 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
37 * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
38 * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
39 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
40 * OTHER DEALINGS IN THE SOFTWARE.
46 #include <dt-bindings/gpio/gpio.h>
47 #include <dt-bindings/interrupt-controller/irq.h>
50 model = "Uniwest Evi";
51 compatible = "uniwest,imx6q-evi", "fsl,imx6q";
54 device_type = "memory";
55 reg = <0x10000000 0x40000000>;
58 reg_usbh1_vbus: regulator-usbhubreset {
59 compatible = "regulator-fixed";
60 regulator-name = "usbh1_vbus";
61 regulator-min-microvolt = <5000000>;
62 regulator-max-microvolt = <5000000>;
64 startup-delay-us = <2>;
65 pinctrl-names = "default";
66 pinctrl-0 = <&pinctrl_usbh1_hubreset>;
67 gpio = <&gpio7 12 GPIO_ACTIVE_HIGH>;
70 reg_usb_otg_vbus: regulator-usbotgvbus {
71 compatible = "regulator-fixed";
72 regulator-name = "usb_otg_vbus";
73 regulator-min-microvolt = <5000000>;
74 regulator-max-microvolt = <5000000>;
75 pinctrl-names = "default";
76 pinctrl-0 = <&pinctrl_usbotgvbus>;
77 gpio = <&gpio4 15 GPIO_ACTIVE_HIGH>;
83 compatible = "sharp,lq101k1ly04";
87 remote-endpoint = <&lvds0_out>;
94 cs-gpios = <&gpio4 10 GPIO_ACTIVE_LOW>;
95 pinctrl-names = "default";
96 pinctrl-0 = <&pinctrl_ecspi1 &pinctrl_ecspi1cs>;
100 compatible = "altr,fpga-passive-serial";
101 spi-max-frequency = <20000000>;
103 pinctrl-0 = <&pinctrl_fpgaspi>;
104 nconfig-gpios = <&gpio4 9 GPIO_ACTIVE_LOW>;
105 nstat-gpios = <&gpio4 11 GPIO_ACTIVE_LOW>;
110 cs-gpios = <&gpio4 24 GPIO_ACTIVE_LOW>,
111 <&gpio4 25 GPIO_ACTIVE_LOW>,
112 <&gpio4 26 GPIO_ACTIVE_LOW>;
113 pinctrl-names = "default";
114 pinctrl-0 = <&pinctrl_ecspi3 &pinctrl_ecspi3cs>;
119 cs-gpios = <&gpio1 14 GPIO_ACTIVE_LOW>,
120 <&gpio1 13 GPIO_ACTIVE_LOW>,
121 <&gpio1 12 GPIO_ACTIVE_LOW>,
122 <&gpio2 9 GPIO_ACTIVE_HIGH>;
123 pinctrl-names = "default";
124 pinctrl-0 = <&pinctrl_ecspi5 &pinctrl_ecspi5cs>;
128 compatible = "st,m95m02", "atmel,at25";
131 address-width = <24>;
132 spi-max-frequency = <5000000>;
137 compatible = "nxp,rtc-pcf2123";
138 spi-max-frequency = <2450000>;
145 pinctrl-names = "default";
146 pinctrl-0 = <&pinctrl_enet>;
148 phy-reset-gpios = <&gpio1 25 GPIO_ACTIVE_LOW>;
149 interrupts-extended = <&gpio1 6 IRQ_TYPE_LEVEL_HIGH>,
150 <&intc 0 119 IRQ_TYPE_LEVEL_HIGH>;
151 fsl,err006687-workaround-present;
156 pinctrl-names = "default";
157 pinctrl-0 = <&pinctrl_gpminand>;
162 pinctrl-names = "default";
163 pinctrl-0 = <&pinctrl_i2c2>;
164 clock-frequency = <100000>;
169 pinctrl-names = "default", "gpio";
170 pinctrl-0 = <&pinctrl_i2c3>;
171 pinctrl-1 = <&pinctrl_i2c3_gpio>;
172 clock-frequency = <100000>;
173 scl-gpios = <&gpio1 5 GPIO_ACTIVE_HIGH>;
174 sda-gpios = <&gpio7 11 GPIO_ACTIVE_HIGH>;
177 battery: sbs-battery@b {
178 compatible = "sbs,sbs-battery";
180 sbs,poll-retry-count = <100>;
181 sbs,i2c-retry-count = <100>;
188 lvds0: lvds-channel@0 {
193 lvds0_out: endpoint {
194 remote-endpoint = <&panel_in>;
205 pinctrl-names = "default";
206 pinctrl-0 = <&pinctrl_uart1>;
211 pinctrl-names = "default";
212 pinctrl-0 = <&pinctrl_uart2>;
217 vbus-supply = <®_usbh1_vbus>;
218 pinctrl-names = "default";
219 pinctrl-0 = <&pinctrl_usbh1>;
221 disable-over-current;
226 vbus-supply = <®_usb_otg_vbus>;
227 pinctrl-names = "default";
228 pinctrl-0 = <&pinctrl_usbotg>;
229 disable-over-current;
235 pinctrl-names = "default";
236 pinctrl-0 = <&pinctrl_usdhc1>;
242 ranges = <0 0 0x08000000 0x08000000>;
243 pinctrl-names = "default";
244 pinctrl-0 = <&pinctrl_weimfpga &pinctrl_weimcs>;
249 pinctrl-names = "default";
250 pinctrl-0 = <&pinctrl_hog>;
252 pinctrl_hog: hoggrp {
254 /* pwr mcu alert irq */
255 MX6QDL_PAD_SD4_DAT2__GPIO2_IO10 0x1b0b0
257 MX6QDL_PAD_CSI0_MCLK__GPIO5_IO19 0x1b0b0
261 pinctrl_ecspi1: ecspi1grp {
263 MX6QDL_PAD_KEY_COL1__ECSPI1_MISO 0x100b1
264 MX6QDL_PAD_KEY_ROW0__ECSPI1_MOSI 0x100b1
265 MX6QDL_PAD_KEY_COL0__ECSPI1_SCLK 0x100b1
269 pinctrl_ecspi1cs: ecspi1csgrp {
271 MX6QDL_PAD_KEY_COL2__GPIO4_IO10 0x1b0b0
275 pinctrl_ecspi3: ecspi3grp {
277 MX6QDL_PAD_DISP0_DAT0__ECSPI3_SCLK 0x10068
278 MX6QDL_PAD_DISP0_DAT1__ECSPI3_MOSI 0x10068
279 MX6QDL_PAD_DISP0_DAT2__ECSPI3_MISO 0x1f068
283 pinctrl_ecspi3cs: ecspi3csgrp {
285 MX6QDL_PAD_DISP0_DAT3__GPIO4_IO24 0x1b0b0
286 MX6QDL_PAD_DISP0_DAT4__GPIO4_IO25 0x1b0b0
287 MX6QDL_PAD_DISP0_DAT5__GPIO4_IO26 0x1b0b0
288 MX6QDL_PAD_DISP0_DAT6__GPIO4_IO27 0x1b0b0
292 pinctrl_ecspi5: ecspi5grp {
294 MX6QDL_PAD_SD2_CLK__ECSPI5_SCLK 0x100b1
295 MX6QDL_PAD_SD2_CMD__ECSPI5_MOSI 0x100b1
296 MX6QDL_PAD_SD2_DAT0__ECSPI5_MISO 0x100b1
300 pinctrl_ecspi5cs: ecspi5csgrp {
302 MX6QDL_PAD_SD2_DAT1__GPIO1_IO14 0x1b0b0
303 MX6QDL_PAD_SD2_DAT2__GPIO1_IO13 0x1b0b0
304 MX6QDL_PAD_SD2_DAT3__GPIO1_IO12 0x1b0b0
305 MX6QDL_PAD_SD4_DAT1__GPIO2_IO09 0x1b0b0
309 pinctrl_enet: enetgrp {
311 MX6QDL_PAD_ENET_MDIO__ENET_MDIO 0x1b0b0
312 MX6QDL_PAD_ENET_MDC__ENET_MDC 0x1b0b0
313 MX6QDL_PAD_RGMII_TXC__RGMII_TXC 0x1b030
314 MX6QDL_PAD_RGMII_TD0__RGMII_TD0 0x1b030
315 MX6QDL_PAD_RGMII_TD1__RGMII_TD1 0x1b030
316 MX6QDL_PAD_RGMII_TD2__RGMII_TD2 0x1b030
317 MX6QDL_PAD_RGMII_TD3__RGMII_TD3 0x1b030
318 MX6QDL_PAD_RGMII_TX_CTL__RGMII_TX_CTL 0x1b030
319 MX6QDL_PAD_ENET_REF_CLK__ENET_TX_CLK 0x1b0b0
320 MX6QDL_PAD_RGMII_RXC__RGMII_RXC 0x1b030
321 MX6QDL_PAD_RGMII_RD0__RGMII_RD0 0x1b030
322 MX6QDL_PAD_RGMII_RD1__RGMII_RD1 0x1b030
323 MX6QDL_PAD_RGMII_RD2__RGMII_RD2 0x1b030
324 MX6QDL_PAD_RGMII_RD3__RGMII_RD3 0x1b030
325 MX6QDL_PAD_RGMII_RX_CTL__RGMII_RX_CTL 0x1b030
326 MX6QDL_PAD_ENET_TX_EN__ENET_TX_EN 0x4001b0a8
327 MX6QDL_PAD_ENET_CRS_DV__GPIO1_IO25 0x1b0b0
328 MX6QDL_PAD_GPIO_6__ENET_IRQ 0x000b1
332 pinctrl_fpgaspi: fpgaspigrp {
334 MX6QDL_PAD_KEY_ROW1__GPIO4_IO09 0x1b0b0
335 MX6QDL_PAD_KEY_ROW2__GPIO4_IO11 0x1b0b0
339 pinctrl_gpminand: gpminandgrp {
341 MX6QDL_PAD_NANDF_CLE__NAND_CLE 0xb0b1
342 MX6QDL_PAD_NANDF_ALE__NAND_ALE 0xb0b1
343 MX6QDL_PAD_NANDF_WP_B__NAND_WP_B 0xb0b1
344 MX6QDL_PAD_NANDF_RB0__NAND_READY_B 0xb000
345 MX6QDL_PAD_NANDF_CS0__NAND_CE0_B 0xb0b1
346 MX6QDL_PAD_NANDF_CS1__NAND_CE1_B 0xb0b1
347 MX6QDL_PAD_SD4_CMD__NAND_RE_B 0xb0b1
348 MX6QDL_PAD_SD4_CLK__NAND_WE_B 0xb0b1
349 MX6QDL_PAD_NANDF_D0__NAND_DATA00 0xb0b1
350 MX6QDL_PAD_NANDF_D1__NAND_DATA01 0xb0b1
351 MX6QDL_PAD_NANDF_D2__NAND_DATA02 0xb0b1
352 MX6QDL_PAD_NANDF_D3__NAND_DATA03 0xb0b1
353 MX6QDL_PAD_NANDF_D4__NAND_DATA04 0xb0b1
354 MX6QDL_PAD_NANDF_D5__NAND_DATA05 0xb0b1
355 MX6QDL_PAD_NANDF_D6__NAND_DATA06 0xb0b1
356 MX6QDL_PAD_NANDF_D7__NAND_DATA07 0xb0b1
357 MX6QDL_PAD_SD4_DAT0__NAND_DQS 0x00b1
361 pinctrl_i2c2: i2c2grp {
363 MX6QDL_PAD_KEY_ROW3__I2C2_SDA 0x4001b8b1
364 MX6QDL_PAD_KEY_COL3__I2C2_SCL 0x4001b8b1
368 pinctrl_i2c3: i2c3grp {
370 MX6QDL_PAD_GPIO_5__I2C3_SCL 0x4001b8b1
371 MX6QDL_PAD_GPIO_16__I2C3_SDA 0x4001b8b1
375 pinctrl_i2c3_gpio: i2c3gpiogrp {
377 MX6QDL_PAD_GPIO_5__GPIO1_IO05 0x4001b8b1
378 MX6QDL_PAD_GPIO_16__GPIO7_IO11 0x4001b8b1
382 pinctrl_weimcs: weimcsgrp {
384 MX6QDL_PAD_EIM_CS0__EIM_CS0_B 0xb0b1
385 MX6QDL_PAD_EIM_CS1__EIM_CS1_B 0xb0b1
389 pinctrl_weimfpga: weimfpgagrp {
392 MX6QDL_PAD_EIM_OE__EIM_OE_B 0xb0b1
393 MX6QDL_PAD_EIM_RW__EIM_RW 0xb0b1
394 MX6QDL_PAD_EIM_WAIT__EIM_WAIT_B 0xb060
395 MX6QDL_PAD_EIM_BCLK__EIM_BCLK 0xb0b1
396 MX6QDL_PAD_EIM_LBA__EIM_LBA_B 0xb0b1
397 MX6QDL_PAD_EIM_EB0__EIM_EB0_B 0xb0b1
398 MX6QDL_PAD_EIM_EB1__EIM_EB1_B 0xb0b1
399 MX6QDL_PAD_EIM_EB2__EIM_EB2_B 0xb0b1
400 MX6QDL_PAD_EIM_EB3__EIM_EB3_B 0xb0b1
402 MX6QDL_PAD_CSI0_DATA_EN__EIM_DATA00 0x1b0b0
403 MX6QDL_PAD_CSI0_VSYNC__EIM_DATA01 0x1b0b0
404 MX6QDL_PAD_CSI0_DAT4__EIM_DATA02 0x1b0b0
405 MX6QDL_PAD_CSI0_DAT5__EIM_DATA03 0x1b0b0
406 MX6QDL_PAD_CSI0_DAT6__EIM_DATA04 0x1b0b0
407 MX6QDL_PAD_CSI0_DAT7__EIM_DATA05 0x1b0b0
408 MX6QDL_PAD_CSI0_DAT8__EIM_DATA06 0x1b0b0
409 MX6QDL_PAD_CSI0_DAT9__EIM_DATA07 0x1b0b0
410 MX6QDL_PAD_CSI0_DAT12__EIM_DATA08 0x1b0b0
411 MX6QDL_PAD_CSI0_DAT13__EIM_DATA09 0x1b0b0
412 MX6QDL_PAD_CSI0_DAT14__EIM_DATA10 0x1b0b0
413 MX6QDL_PAD_CSI0_DAT15__EIM_DATA11 0x1b0b0
414 MX6QDL_PAD_CSI0_DAT16__EIM_DATA12 0x1b0b0
415 MX6QDL_PAD_CSI0_DAT17__EIM_DATA13 0x1b0b0
416 MX6QDL_PAD_CSI0_DAT18__EIM_DATA14 0x1b0b0
417 MX6QDL_PAD_CSI0_DAT19__EIM_DATA15 0x1b0b0
418 MX6QDL_PAD_EIM_D16__EIM_DATA16 0x1b0b0
419 MX6QDL_PAD_EIM_D17__EIM_DATA17 0x1b0b0
420 MX6QDL_PAD_EIM_D18__EIM_DATA18 0x1b0b0
421 MX6QDL_PAD_EIM_D19__EIM_DATA19 0x1b0b0
422 MX6QDL_PAD_EIM_D20__EIM_DATA20 0x1b0b0
423 MX6QDL_PAD_EIM_D21__EIM_DATA21 0x1b0b0
424 MX6QDL_PAD_EIM_D22__EIM_DATA22 0x1b0b0
425 MX6QDL_PAD_EIM_D23__EIM_DATA23 0x1b0b0
426 MX6QDL_PAD_EIM_D24__EIM_DATA24 0x1b0b0
427 MX6QDL_PAD_EIM_D25__EIM_DATA25 0x1b0b0
428 MX6QDL_PAD_EIM_D26__EIM_DATA26 0x1b0b0
429 MX6QDL_PAD_EIM_D27__EIM_DATA27 0x1b0b0
430 MX6QDL_PAD_EIM_D28__EIM_DATA28 0x1b0b0
431 MX6QDL_PAD_EIM_D29__EIM_DATA29 0x1b0b0
432 MX6QDL_PAD_EIM_D30__EIM_DATA30 0x1b0b0
433 MX6QDL_PAD_EIM_D31__EIM_DATA31 0x1b0b0
435 MX6QDL_PAD_EIM_A25__EIM_ADDR25 0xb0b1
436 MX6QDL_PAD_EIM_A24__EIM_ADDR24 0xb0b1
437 MX6QDL_PAD_EIM_A23__EIM_ADDR23 0xb0b1
438 MX6QDL_PAD_EIM_A22__EIM_ADDR22 0xb0b1
439 MX6QDL_PAD_EIM_A21__EIM_ADDR21 0xb0b1
440 MX6QDL_PAD_EIM_A20__EIM_ADDR20 0xb0b1
441 MX6QDL_PAD_EIM_A19__EIM_ADDR19 0xb0b1
442 MX6QDL_PAD_EIM_A18__EIM_ADDR18 0xb0b1
443 MX6QDL_PAD_EIM_A17__EIM_ADDR17 0xb0b1
444 MX6QDL_PAD_EIM_A16__EIM_ADDR16 0xb0b1
445 MX6QDL_PAD_EIM_DA15__EIM_AD15 0xb0b1
446 MX6QDL_PAD_EIM_DA14__EIM_AD14 0xb0b1
447 MX6QDL_PAD_EIM_DA13__EIM_AD13 0xb0b1
448 MX6QDL_PAD_EIM_DA12__EIM_AD12 0xb0b1
449 MX6QDL_PAD_EIM_DA11__EIM_AD11 0xb0b1
450 MX6QDL_PAD_EIM_DA10__EIM_AD10 0xb0b1
451 MX6QDL_PAD_EIM_DA9__EIM_AD09 0xb0b1
452 MX6QDL_PAD_EIM_DA8__EIM_AD08 0xb0b1
453 MX6QDL_PAD_EIM_DA7__EIM_AD07 0xb0b1
454 MX6QDL_PAD_EIM_DA6__EIM_AD06 0xb0b1
455 MX6QDL_PAD_EIM_DA5__EIM_AD05 0xb0b1
456 MX6QDL_PAD_EIM_DA4__EIM_AD04 0xb0b1
457 MX6QDL_PAD_EIM_DA3__EIM_AD03 0xb0b1
458 MX6QDL_PAD_EIM_DA2__EIM_AD02 0xb0b1
459 MX6QDL_PAD_EIM_DA1__EIM_AD01 0xb0b1
460 MX6QDL_PAD_EIM_DA0__EIM_AD00 0xb0b1
464 pinctrl_uart1: uart1grp {
466 MX6QDL_PAD_CSI0_DAT10__UART1_TX_DATA 0x1b0b1
467 MX6QDL_PAD_CSI0_DAT11__UART1_RX_DATA 0x1b0b1
471 pinctrl_uart2: uart2grp {
473 MX6QDL_PAD_SD3_DAT5__UART2_TX_DATA 0x1b0b1
474 MX6QDL_PAD_SD3_DAT4__UART2_RX_DATA 0x1b0b1
475 MX6QDL_PAD_SD3_CLK__UART2_RTS_B 0x1b0b1
476 MX6QDL_PAD_SD3_CMD__UART2_CTS_B 0x1b0b1
480 pinctrl_usbh1: usbh1grp {
482 MX6QDL_PAD_GPIO_3__USB_H1_OC 0x1b0b0
484 MX6QDL_PAD_GPIO_0__GPIO1_IO00 0x1b0b0
488 pinctrl_usbh1_hubreset: usbh1hubresetgrp {
490 MX6QDL_PAD_GPIO_17__GPIO7_IO12 0x1b0b0
494 pinctrl_usbotg: usbotggrp {
496 MX6QDL_PAD_GPIO_1__USB_OTG_ID 0x17059
497 MX6QDL_PAD_KEY_COL4__USB_OTG_OC 0x1b0b0
501 pinctrl_usbotgvbus: usbotgvbusgrp {
503 MX6QDL_PAD_KEY_ROW4__GPIO4_IO15 0x000b0
507 pinctrl_usdhc1: usdhc1grp {
509 MX6QDL_PAD_SD1_CMD__SD1_CMD 0x17059
510 MX6QDL_PAD_SD1_CLK__SD1_CLK 0x10059
511 MX6QDL_PAD_SD1_DAT0__SD1_DATA0 0x17059
512 MX6QDL_PAD_SD1_DAT1__SD1_DATA1 0x17059
513 MX6QDL_PAD_SD1_DAT2__SD1_DATA2 0x17059
514 MX6QDL_PAD_SD1_DAT3__SD1_DATA3 0x17059