arch/arm/boot/dts/imx6dl-plybas.dts

   1 // SPDX-License-Identifier: GPL-2.0-or-later OR MIT
   2 /*
   3  * Copyright (c) 2014 Protonic Holland
   4  * Copyright (c) 2020 Oleksij Rempel <kernel@pengutronix.de>, Pengutronix
   5  */
   6
   7 /dts-v1/;
   8 #include <dt-bindings/gpio/gpio.h>
   9 #include <dt-bindings/leds/common.h>
  10 #include "imx6dl.dtsi"
  11
  12 / {
  13         model = "Plymovent BAS board";
  14         compatible = "ply,plybas", "fsl,imx6dl";
  15
  16         chosen {
  17                 stdout-path = &uart4;
  18         };
  19
  20         gpio_keys {
  21                 compatible = "gpio-keys";
  22                 #address-cells = <1>;
  23                 #size-cells = <0>;
  24                 autorepeat;
  25
  26                 button@20 {
  27                         label = "START";
  28                         linux,code = <31>;
  29                         gpios = <&gpio5 8 GPIO_ACTIVE_LOW>;
  30                 };
  31
  32                 button@21 {
  33                         label = "CLEAN";
  34                         linux,code = <46>;
  35                         gpios = <&gpio5 9 GPIO_ACTIVE_LOW>;
  36                 };
  37         };
  38
  39         leds {
  40                 compatible = "gpio-leds";
  41                 pinctrl-names = "default";
  42                 pinctrl-0 = <&pinctrl_leds>;
  43
  44                 led-0 {
  45                         label = "debug0";
  46                         gpios = <&gpio1 8 GPIO_ACTIVE_HIGH>;
  47                 };
  48
  49                 led-1 {
  50                         label = "debug1";
  51                         gpios = <&gpio1 9 GPIO_ACTIVE_HIGH>;
  52                 };
  53
  54                 led-2 {
  55                         label = "light_tower1";
  56                         gpios = <&gpio4 22 GPIO_ACTIVE_HIGH>;
  57                         linux,default-trigger = "heartbeat";
  58                 };
  59
  60                 led-3 {
  61                         label = "light_tower2";
  62                         gpios = <&gpio4 23 GPIO_ACTIVE_HIGH>;
  63                 };
  64
  65                 led-4 {
  66                         label = "light_tower3";
  67                         gpios = <&gpio4 24 GPIO_ACTIVE_HIGH>;
  68                 };
  69
  70                 led-5 {
  71                         label = "light_tower4";
  72                         gpios = <&gpio4 25 GPIO_ACTIVE_HIGH>;
  73                 };
  74         };
  75
  76         clk50m_phy: phy-clock {
  77                 compatible = "fixed-clock";
  78                 #clock-cells = <0>;
  79                 clock-frequency = <50000000>;
  80         };
  81
  82         reg_5v0: regulator-5v0 {
  83                 compatible = "regulator-fixed";
  84                 regulator-name = "5v0";
  85                 regulator-min-microvolt = <5000000>;
  86                 regulator-max-microvolt = <5000000>;
  87         };
  88 };
  89
  90 &can1 {
  91         pinctrl-names = "default";
  92         pinctrl-0 = <&pinctrl_can1>;
  93         xceiver-supply = <&reg_5v0>;
  94         status = "okay";
  95 };
  96
  97 &can2 {
  98         pinctrl-names = "default";
  99         pinctrl-0 = <&pinctrl_can2>;
 100         xceiver-supply = <&reg_5v0>;
 101         status = "okay";
 102 };
 103
 104 &ecspi1 {
 105         cs-gpios = <&gpio3 19 GPIO_ACTIVE_LOW>;
 106         pinctrl-names = "default";
 107         pinctrl-0 = <&pinctrl_ecspi1>;
 108         status = "okay";
 109
 110         flash@0 {
 111                 compatible = "jedec,spi-nor";
 112                 reg = <0>;
 113                 spi-max-frequency = <20000000>;
 114         };
 115 };
 116
 117 &fec {
 118         pinctrl-names = "default";
 119         pinctrl-0 = <&pinctrl_enet>;
 120         phy-mode = "rmii";
 121         clocks = <&clks IMX6QDL_CLK_ENET>,
 122                  <&clks IMX6QDL_CLK_ENET>,
 123                  <&clk50m_phy>;
 124         clock-names = "ipg", "ahb", "ptp";
 125         phy-handle = <&rgmii_phy>;
 126         status = "okay";
 127
 128         mdio {
 129                 #address-cells = <1>;
 130                 #size-cells = <0>;
 131
 132                 /* Microchip KSZ8081RNA PHY */
 133                 rgmii_phy: ethernet-phy@0 {
 134                         reg = <0>;
 135                         interrupts-extended = <&gpio4 30 IRQ_TYPE_LEVEL_LOW>;
 136                         reset-gpios = <&gpio4 26 GPIO_ACTIVE_LOW>;
 137                         reset-assert-us = <10000>;
 138                         reset-deassert-us = <300>;
 139                 };
 140         };
 141 };
 142
 143 &gpio1 {
 144         gpio-line-names =
 145                 "", "SD1_CD", "", "", "", "", "", "",
 146                 "DEBUG_0", "DEBUG_1", "", "", "", "", "", "",
 147                 "", "", "", "", "", "", "", "",
 148                 "", "", "", "", "", "", "", "";
 149 };
 150
 151 &gpio3 {
 152         gpio-line-names =
 153                 "", "", "", "", "", "", "", "",
 154                 "", "", "", "", "", "", "", "",
 155                 "", "", "", "ECSPI1_SS1", "", "USB_EXT_PWR", "", "",
 156                 "", "", "", "", "", "", "", "";
 157 };
 158
 159 &gpio4 {
 160         gpio-line-names =
 161                 "", "", "", "", "", "", "", "",
 162                 "", "", "", "", "CAN1_SR", "CAN2_SR", "", "",
 163                 "LED_DI0_DEBUG_0", "LED_DI0_DEBUG_1", "IMX6_IN12", "IMX6_HMI",
 164                         "IMX6_IN11", "IMX6_BUZZER", "IMX6_LED1", "IMX6_LED2",
 165                 "IMX6_LED3", "IMX6_LED4", "ETH_RESET", "IMX6_ANA_OUT_SD",
 166                         "IMX6_ANA_OUT_ERR", "IMX6_ANA_OUT", "ETH_INTRP", "";
 167 };
 168
 169 &gpio5 {
 170         gpio-line-names =
 171                 "", "", "", "", "", "IMX6_RELAY1", "IMX6_RELAY2", "",
 172                 "IMX6_IN1", "IMX6_IN2", "IMX6_IN3", "IMX6_IN4", "IMX6_IN5",
 173                         "IMX6_IN6", "IMX6_IN7", "IMX6_IN8",
 174                 "IMX6_IN9", "IMX6_IN10", "", "", "", "", "", "",
 175                 "", "", "", "", "", "", "", "";
 176 };
 177
 178 &i2c1 {
 179         clock-frequency = <100000>;
 180         pinctrl-names = "default";
 181         pinctrl-0 = <&pinctrl_i2c1>;
 182         status = "okay";
 183
 184         /* additional i2c devices are added automatically by the boot loader */
 185 };
 186
 187 &i2c3 {
 188         clock-frequency = <100000>;
 189         pinctrl-names = "default";
 190         pinctrl-0 = <&pinctrl_i2c3>;
 191         status = "okay";
 192
 193         temperature-sensor@70 {
 194                 compatible = "ti,tmp103";
 195                 reg = <0x70>;
 196         };
 197
 198         rtc@51 {
 199                 compatible = "nxp,pcf8563";
 200                 reg = <0x51>;
 201         };
 202 };
 203
 204 &pwm1 {
 205         pinctrl-names = "default";
 206         pinctrl-0 = <&pinctrl_pwm1>;
 207         status = "okay";
 208 };
 209
 210 &uart1 {
 211         pinctrl-names = "default";
 212         pinctrl-0 = <&pinctrl_uart1>;
 213         status = "okay";
 214 };
 215
 216 &uart2 {
 217         pinctrl-names = "default";
 218         pinctrl-0 = <&pinctrl_uart2>;
 219         fsl,uart-has-rtscts;
 220         linux,rs485-enabled-at-boot-time;
 221         rs485-rts-delay = <0 20>;
 222         status = "okay";
 223 };
 224
 225 &uart4 {
 226         pinctrl-names = "default";
 227         pinctrl-0 = <&pinctrl_uart4>;
 228         status = "okay";
 229 };
 230
 231 &usbotg {
 232         pinctrl-names = "default";
 233         pinctrl-0 = <&pinctrl_usbotg>;
 234         phy_type = "utmi";
 235         dr_mode = "host";
 236         disable-over-current;
 237         status = "okay";
 238 };
 239
 240 &usbphynop1 {
 241         status = "disabled";
 242 };
 243
 244 &usbphynop2 {
 245         status = "disabled";
 246 };
 247
 248 &iomuxc {
 249         pinctrl_can1: can1grp {
 250                 fsl,pins = <
 251                         MX6QDL_PAD_KEY_ROW2__FLEXCAN1_RX                0x1b000
 252                         MX6QDL_PAD_KEY_COL2__FLEXCAN1_TX                0x3008
 253                         /* CAN1_SR */
 254                         MX6QDL_PAD_KEY_COL3__GPIO4_IO12                 0x13008
 255                 >;
 256         };
 257
 258         pinctrl_can2: can2grp {
 259                 fsl,pins = <
 260                         MX6QDL_PAD_KEY_ROW4__FLEXCAN2_RX                0x1b000
 261                         MX6QDL_PAD_KEY_COL4__FLEXCAN2_TX                0x3008
 262                         /* CAN2_SR */
 263                         MX6QDL_PAD_KEY_ROW3__GPIO4_IO13                 0x13008
 264                 >;
 265         };
 266
 267         pinctrl_ecspi1: ecspi1grp {
 268                 fsl,pins = <
 269                         MX6QDL_PAD_EIM_D17__ECSPI1_MISO                 0x1b000
 270                         MX6QDL_PAD_EIM_D18__ECSPI1_MOSI                 0x3008
 271                         MX6QDL_PAD_EIM_D16__ECSPI1_SCLK                 0x3008
 272                         /* CS */
 273                         MX6QDL_PAD_EIM_D19__GPIO3_IO19                  0x3008
 274                 >;
 275         };
 276
 277         pinctrl_enet: enetgrp {
 278                 fsl,pins = <
 279                         /* MX6QDL_ENET_PINGRP4 */
 280                         MX6QDL_PAD_ENET_MDC__ENET_MDC                   0x1b0b0
 281                         MX6QDL_PAD_ENET_MDIO__ENET_MDIO                 0x1b0b0
 282                         MX6QDL_PAD_ENET_RXD0__ENET_RX_DATA0             0x1b0b0
 283                         MX6QDL_PAD_ENET_RXD1__ENET_RX_DATA1             0x1b0b0
 284                         MX6QDL_PAD_ENET_RX_ER__ENET_RX_ER               0x1b0b0
 285                         MX6QDL_PAD_ENET_TX_EN__ENET_TX_EN               0x1b0b0
 286                         MX6QDL_PAD_ENET_TXD0__ENET_TX_DATA0             0x1b0b0
 287                         MX6QDL_PAD_ENET_TXD1__ENET_TX_DATA1             0x1b0b0
 288                         MX6QDL_PAD_ENET_CRS_DV__ENET_RX_EN              0x1b0b0
 289
 290                         MX6QDL_PAD_GPIO_16__ENET_REF_CLK                0x1b0b0
 291                         /* Phy reset */
 292                         MX6QDL_PAD_DISP0_DAT5__GPIO4_IO26               0x1b0b0
 293                         /* nINTRP */
 294                         MX6QDL_PAD_DISP0_DAT9__GPIO4_IO30               0x1b0b0
 295                 >;
 296         };
 297
 298         pinctrl_i2c1: i2c1grp {
 299                 fsl,pins = <
 300                         MX6QDL_PAD_CSI0_DAT8__I2C1_SDA                  0x4001f8b1
 301                         MX6QDL_PAD_CSI0_DAT9__I2C1_SCL                  0x4001f8b1
 302                 >;
 303         };
 304
 305         pinctrl_i2c3: i2c3grp {
 306                 fsl,pins = <
 307                         MX6QDL_PAD_GPIO_5__I2C3_SCL                     0x4001b8b1
 308                         MX6QDL_PAD_GPIO_6__I2C3_SDA                     0x4001b8b1
 309                 >;
 310         };
 311
 312         pinctrl_leds: ledsgrp {
 313                 fsl,pins = <
 314                         /* DEBUG_0 */
 315                         MX6QDL_PAD_GPIO_8__GPIO1_IO08                   0x1b0b0
 316                         /* DEBUG_1 */
 317                         MX6QDL_PAD_GPIO_9__GPIO1_IO09                   0x1b0b0
 318
 319                         /* LED1 (lighttower) */
 320                         MX6QDL_PAD_DISP0_DAT1__GPIO4_IO22               0x13070
 321                         /* LED2 (lighttower) */
 322                         MX6QDL_PAD_DISP0_DAT2__GPIO4_IO23               0x13070
 323                         /* LED3 (lighttower) */
 324                         MX6QDL_PAD_DISP0_DAT3__GPIO4_IO24               0x13070
 325                         /* LED4 (lighttower) */
 326                         MX6QDL_PAD_DISP0_DAT4__GPIO4_IO25               0x13070
 327                 >;
 328         };
 329
 330         pinctrl_pwm1: pwm1grp {
 331                 fsl,pins = <
 332                         MX6QDL_PAD_DISP0_DAT8__PWM1_OUT                 0x1b0b0
 333                 >;
 334         };
 335
 336         /* YaCO AUX Uart */
 337         pinctrl_uart1: uart1grp {
 338                 fsl,pins = <
 339                         MX6QDL_PAD_CSI0_DAT10__UART1_TX_DATA            0x1b0b1
 340                         MX6QDL_PAD_CSI0_DAT11__UART1_RX_DATA            0x1b0b1
 341                 >;
 342         };
 343
 344         pinctrl_uart2: uart2grp {
 345                 fsl,pins = <
 346                         MX6QDL_PAD_EIM_D26__UART2_TX_DATA               0x1b0b1
 347                         MX6QDL_PAD_EIM_D27__UART2_RX_DATA               0x1b0b1
 348                         MX6QDL_PAD_EIM_D28__UART2_DTE_CTS_B             0x130b1
 349                 >;
 350         };
 351
 352         pinctrl_uart4: uart4grp {
 353                 fsl,pins = <
 354                         MX6QDL_PAD_KEY_COL0__UART4_TX_DATA              0x1b0b1
 355                         MX6QDL_PAD_KEY_ROW0__UART4_RX_DATA              0x1b0b1
 356                 >;
 357         };
 358
 359         pinctrl_usbotg: usbotggrp {
 360                 fsl,pins = <
 361                         MX6QDL_PAD_EIM_D21__USB_OTG_OC                  0x1b0b0
 362                         /* power enable, high active */
 363                         MX6QDL_PAD_EIM_D22__GPIO3_IO22                  0x1b0b0
 364                 >;
 365         };
 366
 367         pinctrl_usdhc1: usdhc1grp {
 368                 fsl,pins = <
 369                         MX6QDL_PAD_SD1_CMD__SD1_CMD                     0x170f9
 370                         MX6QDL_PAD_SD1_CLK__SD1_CLK                     0x100f9
 371                         MX6QDL_PAD_SD1_DAT0__SD1_DATA0                  0x170f9
 372                         MX6QDL_PAD_SD1_DAT1__SD1_DATA1                  0x170f9
 373                         MX6QDL_PAD_SD1_DAT2__SD1_DATA2                  0x170f9
 374                         MX6QDL_PAD_SD1_DAT3__SD1_DATA3                  0x170f9
 375                         MX6QDL_PAD_GPIO_1__GPIO1_IO01                   0x1b0b0
 376                 >;
 377         };
 378
 379         pinctrl_usdhc3: usdhc3grp {
 380                 fsl,pins = <
 381                         MX6QDL_PAD_SD3_CMD__SD3_CMD                     0x17099
 382                         MX6QDL_PAD_SD3_CLK__SD3_CLK                     0x10099
 383                         MX6QDL_PAD_SD3_DAT0__SD3_DATA0                  0x17099
 384                         MX6QDL_PAD_SD3_DAT1__SD3_DATA1                  0x17099
 385                         MX6QDL_PAD_SD3_DAT2__SD3_DATA2                  0x17099
 386                         MX6QDL_PAD_SD3_DAT3__SD3_DATA3                  0x17099
 387                         MX6QDL_PAD_SD3_DAT4__SD3_DATA4                  0x17099
 388                         MX6QDL_PAD_SD3_DAT5__SD3_DATA5                  0x17099
 389                         MX6QDL_PAD_SD3_DAT6__SD3_DATA6                  0x17099
 390                         MX6QDL_PAD_SD3_DAT7__SD3_DATA7                  0x17099
 391                         MX6QDL_PAD_SD3_RST__SD3_RESET                   0x1b0b1
 392                 >;
 393         };
 394 };