2 * Copyright 2011 Freescale Semiconductor, Inc.
3 * Copyright 2011 Linaro Ltd.
5 * The code contained herein is licensed under the GNU General Public
6 * License. You may obtain a copy of the GNU General Public License
7 * Version 2 or later at the following locations:
9 * http://www.opensource.org/licenses/gpl-license.html
10 * http://www.gnu.org/copyleft/gpl.html
17 model = "Freescale i.MX51 Babbage Board";
18 compatible = "fsl,imx51-babbage", "fsl,imx51";
25 reg = <0x90000000 0x20000000>;
29 clock-frequency = <22579200>;
33 compatible = "fixed-clock";
35 clock-frequency = <26000000>;
38 clk_osc_gate: clk-osc-gate {
39 compatible = "gpio-gate-clock";
40 pinctrl-names = "default";
41 pinctrl-0 = <&pinctrl_clk26mhz_osc>;
44 enable-gpios = <&gpio3 1 GPIO_ACTIVE_HIGH>;
47 clk_audio: clk-audio {
48 compatible = "gpio-gate-clock";
49 pinctrl-names = "default";
50 pinctrl-0 = <&pinctrl_clk26mhz_audio>;
51 clocks = <&clk_osc_gate>;
53 enable-gpios = <&gpio4 26 GPIO_ACTIVE_LOW>;
57 compatible = "gpio-gate-clock";
58 pinctrl-names = "default";
59 pinctrl-0 = <&pinctrl_clk26mhz_usb>;
60 clocks = <&clk_osc_gate>;
62 enable-gpios = <&gpio2 1 GPIO_ACTIVE_LOW>;
66 compatible = "fsl,imx-parallel-display";
67 interface-pix-fmt = "rgb24";
68 pinctrl-names = "default";
69 pinctrl-0 = <&pinctrl_ipu_disp1>;
71 native-mode = <&timing0>;
73 clock-frequency = <65000000>;
86 display0_in: endpoint {
87 remote-endpoint = <&ipu_di0_disp1>;
93 compatible = "fsl,imx-parallel-display";
94 interface-pix-fmt = "rgb565";
95 pinctrl-names = "default";
96 pinctrl-0 = <&pinctrl_ipu_disp2>;
99 native-mode = <&timing1>;
101 clock-frequency = <27000000>;
113 pixelclk-active = <0>;
118 display1_in: endpoint {
119 remote-endpoint = <&ipu_di1_disp2>;
125 compatible = "gpio-keys";
126 pinctrl-names = "default";
127 pinctrl-0 = <&pinctrl_gpio_keys>;
130 label = "Power Button";
131 gpios = <&gpio2 21 GPIO_ACTIVE_HIGH>;
132 linux,code = <KEY_POWER>;
138 compatible = "gpio-leds";
139 pinctrl-names = "default";
140 pinctrl-0 = <&pinctrl_gpio_leds>;
143 label = "diagnostic";
144 gpios = <&gpio2 6 GPIO_ACTIVE_HIGH>;
149 compatible = "simple-bus";
150 #address-cells = <1>;
153 reg_hub_reset: regulator@0 {
154 compatible = "regulator-fixed";
155 pinctrl-names = "default";
156 pinctrl-0 = <&pinctrl_usbotgreg>;
158 regulator-name = "hub_reset";
159 regulator-min-microvolt = <5000000>;
160 regulator-max-microvolt = <5000000>;
161 gpio = <&gpio1 7 GPIO_ACTIVE_HIGH>;
167 compatible = "fsl,imx51-babbage-sgtl5000",
168 "fsl,imx-audio-sgtl5000";
169 model = "imx51-babbage-sgtl5000";
170 ssi-controller = <&ssi2>;
171 audio-codec = <&sgtl5000>;
173 "MIC_IN", "Mic Jack",
174 "Mic Jack", "Mic Bias",
175 "Headphone Jack", "HP_OUT";
181 #address-cells = <1>;
183 compatible = "simple-bus";
185 usbh1phy: usbh1phy@0 {
186 compatible = "usb-nop-xceiv";
189 clock-names = "main_clk";
190 reset-gpios = <&gpio2 5 GPIO_ACTIVE_LOW>;
191 vcc-supply = <&vusb_reg>;
198 pinctrl-names = "default";
199 pinctrl-0 = <&pinctrl_audmux>;
204 pinctrl-names = "default";
205 pinctrl-0 = <&pinctrl_ecspi1>;
206 cs-gpios = <&gpio4 24 GPIO_ACTIVE_HIGH>,
207 <&gpio4 25 GPIO_ACTIVE_LOW>;
211 compatible = "fsl,mc13892";
212 pinctrl-names = "default";
213 pinctrl-0 = <&pinctrl_pmic>;
214 spi-max-frequency = <6000000>;
217 interrupt-parent = <&gpio1>;
218 interrupts = <8 IRQ_TYPE_LEVEL_HIGH>;
219 fsl,mc13xxx-uses-rtc;
223 regulator-min-microvolt = <600000>;
224 regulator-max-microvolt = <1375000>;
230 regulator-min-microvolt = <900000>;
231 regulator-max-microvolt = <1850000>;
237 regulator-min-microvolt = <1100000>;
238 regulator-max-microvolt = <1850000>;
244 regulator-min-microvolt = <1100000>;
245 regulator-max-microvolt = <1850000>;
251 regulator-min-microvolt = <1050000>;
252 regulator-max-microvolt = <1800000>;
258 regulator-min-microvolt = <1650000>;
259 regulator-max-microvolt = <1650000>;
264 regulator-min-microvolt = <1800000>;
265 regulator-max-microvolt = <3150000>;
273 regulator-min-microvolt = <2400000>;
274 regulator-max-microvolt = <2775000>;
280 regulator-min-microvolt = <2775000>;
281 regulator-max-microvolt = <2775000>;
285 regulator-min-microvolt = <2300000>;
286 regulator-max-microvolt = <3000000>;
290 regulator-min-microvolt = <2500000>;
291 regulator-max-microvolt = <3000000>;
295 regulator-min-microvolt = <1200000>;
296 regulator-max-microvolt = <1200000>;
300 regulator-min-microvolt = <1200000>;
301 regulator-max-microvolt = <3150000>;
306 regulator-min-microvolt = <1800000>;
307 regulator-max-microvolt = <2900000>;
313 flash: at45db321d@1 {
314 #address-cells = <1>;
316 compatible = "atmel,at45db321d", "atmel,at45", "atmel,dataflash";
317 spi-max-frequency = <25000000>;
328 reg = <0x40000 0x3c0000>;
334 pinctrl-names = "default";
335 pinctrl-0 = <&pinctrl_esdhc1>;
336 cd-gpios = <&gpio1 0 GPIO_ACTIVE_LOW>;
337 wp-gpios = <&gpio1 1 GPIO_ACTIVE_HIGH>;
342 pinctrl-names = "default";
343 pinctrl-0 = <&pinctrl_esdhc2>;
344 cd-gpios = <&gpio1 6 GPIO_ACTIVE_LOW>;
345 wp-gpios = <&gpio1 5 GPIO_ACTIVE_HIGH>;
350 pinctrl-names = "default";
351 pinctrl-0 = <&pinctrl_fec>;
353 phy-reset-gpios = <&gpio2 14 GPIO_ACTIVE_LOW>;
354 phy-reset-duration = <1>;
359 pinctrl-names = "default";
360 pinctrl-0 = <&pinctrl_i2c1>;
365 pinctrl-names = "default";
366 pinctrl-0 = <&pinctrl_i2c2>;
370 compatible = "fsl,sgtl5000";
372 #sound-dai-cells = <0>;
373 clocks = <&clk_audio>;
374 VDDA-supply = <&vdig_reg>;
375 VDDIO-supply = <&vvideo_reg>;
380 remote-endpoint = <&display0_in>;
384 remote-endpoint = <&display1_in>;
388 pinctrl-names = "default";
389 pinctrl-0 = <&pinctrl_kpp>;
391 MATRIX_KEY(0, 0, KEY_UP)
392 MATRIX_KEY(0, 1, KEY_DOWN)
393 MATRIX_KEY(0, 2, KEY_VOLUMEDOWN)
394 MATRIX_KEY(0, 3, KEY_HOME)
395 MATRIX_KEY(1, 0, KEY_RIGHT)
396 MATRIX_KEY(1, 1, KEY_LEFT)
397 MATRIX_KEY(1, 2, KEY_ENTER)
398 MATRIX_KEY(1, 3, KEY_VOLUMEUP)
399 MATRIX_KEY(2, 0, KEY_F6)
400 MATRIX_KEY(2, 1, KEY_F8)
401 MATRIX_KEY(2, 2, KEY_F9)
402 MATRIX_KEY(2, 3, KEY_F10)
403 MATRIX_KEY(3, 0, KEY_F1)
404 MATRIX_KEY(3, 1, KEY_F2)
405 MATRIX_KEY(3, 2, KEY_F3)
406 MATRIX_KEY(3, 3, KEY_POWER)
416 pinctrl-names = "default";
417 pinctrl-0 = <&pinctrl_uart1>;
423 pinctrl-names = "default";
424 pinctrl-0 = <&pinctrl_uart2>;
429 pinctrl-names = "default";
430 pinctrl-0 = <&pinctrl_uart3>;
436 pinctrl-names = "default";
437 pinctrl-0 = <&pinctrl_usbh1>;
438 vbus-supply = <®_hub_reset>;
439 fsl,usbphy = <&usbh1phy>;
445 vcc-supply = <&vusb_reg>;
450 disable-over-current;
451 phy_type = "utmi_wide";
457 pinctrl_audmux: audmuxgrp {
459 MX51_PAD_AUD3_BB_TXD__AUD3_TXD 0x80000000
460 MX51_PAD_AUD3_BB_RXD__AUD3_RXD 0x80000000
461 MX51_PAD_AUD3_BB_CK__AUD3_TXC 0x80000000
462 MX51_PAD_AUD3_BB_FS__AUD3_TXFS 0x80000000
466 pinctrl_clk26mhz_audio: clk26mhzaudiocgrp {
468 MX51_PAD_CSPI1_RDY__GPIO4_26 0x85
472 pinctrl_clk26mhz_osc: clk26mhzoscgrp {
474 MX51_PAD_DI1_PIN12__GPIO3_1 0x85
478 pinctrl_clk26mhz_usb: clk26mhzusbgrp {
480 MX51_PAD_EIM_D17__GPIO2_1 0x85
484 pinctrl_ecspi1: ecspi1grp {
486 MX51_PAD_CSPI1_MISO__ECSPI1_MISO 0x185
487 MX51_PAD_CSPI1_MOSI__ECSPI1_MOSI 0x185
488 MX51_PAD_CSPI1_SCLK__ECSPI1_SCLK 0x185
489 MX51_PAD_CSPI1_SS0__GPIO4_24 0x85 /* CS0 */
490 MX51_PAD_CSPI1_SS1__GPIO4_25 0x85 /* CS1 */
494 pinctrl_esdhc1: esdhc1grp {
496 MX51_PAD_SD1_CMD__SD1_CMD 0x400020d5
497 MX51_PAD_SD1_CLK__SD1_CLK 0x20d5
498 MX51_PAD_SD1_DATA0__SD1_DATA0 0x20d5
499 MX51_PAD_SD1_DATA1__SD1_DATA1 0x20d5
500 MX51_PAD_SD1_DATA2__SD1_DATA2 0x20d5
501 MX51_PAD_SD1_DATA3__SD1_DATA3 0x20d5
502 MX51_PAD_GPIO1_0__GPIO1_0 0x100
503 MX51_PAD_GPIO1_1__GPIO1_1 0x100
507 pinctrl_esdhc2: esdhc2grp {
509 MX51_PAD_SD2_CMD__SD2_CMD 0x400020d5
510 MX51_PAD_SD2_CLK__SD2_CLK 0x20d5
511 MX51_PAD_SD2_DATA0__SD2_DATA0 0x20d5
512 MX51_PAD_SD2_DATA1__SD2_DATA1 0x20d5
513 MX51_PAD_SD2_DATA2__SD2_DATA2 0x20d5
514 MX51_PAD_SD2_DATA3__SD2_DATA3 0x20d5
515 MX51_PAD_GPIO1_5__GPIO1_5 0x100 /* WP */
516 MX51_PAD_GPIO1_6__GPIO1_6 0x100 /* CD */
520 pinctrl_fec: fecgrp {
522 MX51_PAD_EIM_EB2__FEC_MDIO 0x000001f5
523 MX51_PAD_EIM_EB3__FEC_RDATA1 0x00000085
524 MX51_PAD_EIM_CS2__FEC_RDATA2 0x00000085
525 MX51_PAD_EIM_CS3__FEC_RDATA3 0x00000085
526 MX51_PAD_EIM_CS4__FEC_RX_ER 0x00000180
527 MX51_PAD_EIM_CS5__FEC_CRS 0x00000180
528 MX51_PAD_NANDF_RB2__FEC_COL 0x00000180
529 MX51_PAD_NANDF_RB3__FEC_RX_CLK 0x00000180
530 MX51_PAD_NANDF_D9__FEC_RDATA0 0x00002180
531 MX51_PAD_NANDF_D8__FEC_TDATA0 0x00002004
532 MX51_PAD_NANDF_CS2__FEC_TX_ER 0x00002004
533 MX51_PAD_NANDF_CS3__FEC_MDC 0x00002004
534 MX51_PAD_NANDF_CS4__FEC_TDATA1 0x00002004
535 MX51_PAD_NANDF_CS5__FEC_TDATA2 0x00002004
536 MX51_PAD_NANDF_CS6__FEC_TDATA3 0x00002004
537 MX51_PAD_NANDF_CS7__FEC_TX_EN 0x00002004
538 MX51_PAD_NANDF_RDY_INT__FEC_TX_CLK 0x00002180
539 MX51_PAD_NANDF_D11__FEC_RX_DV 0x000020a4
540 MX51_PAD_EIM_A20__GPIO2_14 0x00000085 /* Phy Reset */
544 pinctrl_gpio_keys: gpiokeysgrp {
546 MX51_PAD_EIM_A27__GPIO2_21 0x5
550 pinctrl_gpio_leds: gpioledsgrp {
552 MX51_PAD_EIM_D22__GPIO2_6 0x80000000
556 pinctrl_i2c1: i2c1grp {
558 MX51_PAD_EIM_D19__I2C1_SCL 0x400001ed
559 MX51_PAD_EIM_D16__I2C1_SDA 0x400001ed
563 pinctrl_i2c2: i2c2grp {
565 MX51_PAD_KEY_COL4__I2C2_SCL 0x400001ed
566 MX51_PAD_KEY_COL5__I2C2_SDA 0x400001ed
570 pinctrl_ipu_disp1: ipudisp1grp {
572 MX51_PAD_DISP1_DAT0__DISP1_DAT0 0x5
573 MX51_PAD_DISP1_DAT1__DISP1_DAT1 0x5
574 MX51_PAD_DISP1_DAT2__DISP1_DAT2 0x5
575 MX51_PAD_DISP1_DAT3__DISP1_DAT3 0x5
576 MX51_PAD_DISP1_DAT4__DISP1_DAT4 0x5
577 MX51_PAD_DISP1_DAT5__DISP1_DAT5 0x5
578 MX51_PAD_DISP1_DAT6__DISP1_DAT6 0x5
579 MX51_PAD_DISP1_DAT7__DISP1_DAT7 0x5
580 MX51_PAD_DISP1_DAT8__DISP1_DAT8 0x5
581 MX51_PAD_DISP1_DAT9__DISP1_DAT9 0x5
582 MX51_PAD_DISP1_DAT10__DISP1_DAT10 0x5
583 MX51_PAD_DISP1_DAT11__DISP1_DAT11 0x5
584 MX51_PAD_DISP1_DAT12__DISP1_DAT12 0x5
585 MX51_PAD_DISP1_DAT13__DISP1_DAT13 0x5
586 MX51_PAD_DISP1_DAT14__DISP1_DAT14 0x5
587 MX51_PAD_DISP1_DAT15__DISP1_DAT15 0x5
588 MX51_PAD_DISP1_DAT16__DISP1_DAT16 0x5
589 MX51_PAD_DISP1_DAT17__DISP1_DAT17 0x5
590 MX51_PAD_DISP1_DAT18__DISP1_DAT18 0x5
591 MX51_PAD_DISP1_DAT19__DISP1_DAT19 0x5
592 MX51_PAD_DISP1_DAT20__DISP1_DAT20 0x5
593 MX51_PAD_DISP1_DAT21__DISP1_DAT21 0x5
594 MX51_PAD_DISP1_DAT22__DISP1_DAT22 0x5
595 MX51_PAD_DISP1_DAT23__DISP1_DAT23 0x5
596 MX51_PAD_DI1_PIN2__DI1_PIN2 0x5
597 MX51_PAD_DI1_PIN3__DI1_PIN3 0x5
601 pinctrl_ipu_disp2: ipudisp2grp {
603 MX51_PAD_DISP2_DAT0__DISP2_DAT0 0x5
604 MX51_PAD_DISP2_DAT1__DISP2_DAT1 0x5
605 MX51_PAD_DISP2_DAT2__DISP2_DAT2 0x5
606 MX51_PAD_DISP2_DAT3__DISP2_DAT3 0x5
607 MX51_PAD_DISP2_DAT4__DISP2_DAT4 0x5
608 MX51_PAD_DISP2_DAT5__DISP2_DAT5 0x5
609 MX51_PAD_DISP2_DAT6__DISP2_DAT6 0x5
610 MX51_PAD_DISP2_DAT7__DISP2_DAT7 0x5
611 MX51_PAD_DISP2_DAT8__DISP2_DAT8 0x5
612 MX51_PAD_DISP2_DAT9__DISP2_DAT9 0x5
613 MX51_PAD_DISP2_DAT10__DISP2_DAT10 0x5
614 MX51_PAD_DISP2_DAT11__DISP2_DAT11 0x5
615 MX51_PAD_DISP2_DAT12__DISP2_DAT12 0x5
616 MX51_PAD_DISP2_DAT13__DISP2_DAT13 0x5
617 MX51_PAD_DISP2_DAT14__DISP2_DAT14 0x5
618 MX51_PAD_DISP2_DAT15__DISP2_DAT15 0x5
619 MX51_PAD_DI2_PIN2__DI2_PIN2 0x5
620 MX51_PAD_DI2_PIN3__DI2_PIN3 0x5
621 MX51_PAD_DI2_DISP_CLK__DI2_DISP_CLK 0x5
622 MX51_PAD_DI_GP4__DI2_PIN15 0x5
626 pinctrl_kpp: kppgrp {
628 MX51_PAD_KEY_ROW0__KEY_ROW0 0xe0
629 MX51_PAD_KEY_ROW1__KEY_ROW1 0xe0
630 MX51_PAD_KEY_ROW2__KEY_ROW2 0xe0
631 MX51_PAD_KEY_ROW3__KEY_ROW3 0xe0
632 MX51_PAD_KEY_COL0__KEY_COL0 0xe8
633 MX51_PAD_KEY_COL1__KEY_COL1 0xe8
634 MX51_PAD_KEY_COL2__KEY_COL2 0xe8
635 MX51_PAD_KEY_COL3__KEY_COL3 0xe8
639 pinctrl_pmic: pmicgrp {
641 MX51_PAD_GPIO1_8__GPIO1_8 0xe5 /* IRQ */
645 pinctrl_uart1: uart1grp {
647 MX51_PAD_UART1_RXD__UART1_RXD 0x1c5
648 MX51_PAD_UART1_TXD__UART1_TXD 0x1c5
649 MX51_PAD_UART1_RTS__UART1_RTS 0x1c5
650 MX51_PAD_UART1_CTS__UART1_CTS 0x1c5
654 pinctrl_uart2: uart2grp {
656 MX51_PAD_UART2_RXD__UART2_RXD 0x1c5
657 MX51_PAD_UART2_TXD__UART2_TXD 0x1c5
661 pinctrl_uart3: uart3grp {
663 MX51_PAD_EIM_D25__UART3_RXD 0x1c5
664 MX51_PAD_EIM_D26__UART3_TXD 0x1c5
665 MX51_PAD_EIM_D27__UART3_RTS 0x1c5
666 MX51_PAD_EIM_D24__UART3_CTS 0x1c5
670 pinctrl_usbh1: usbh1grp {
672 MX51_PAD_USBH1_CLK__USBH1_CLK 0x80000000
673 MX51_PAD_USBH1_DIR__USBH1_DIR 0x80000000
674 MX51_PAD_USBH1_NXT__USBH1_NXT 0x80000000
675 MX51_PAD_USBH1_DATA0__USBH1_DATA0 0x80000000
676 MX51_PAD_USBH1_DATA1__USBH1_DATA1 0x80000000
677 MX51_PAD_USBH1_DATA2__USBH1_DATA2 0x80000000
678 MX51_PAD_USBH1_DATA3__USBH1_DATA3 0x80000000
679 MX51_PAD_USBH1_DATA4__USBH1_DATA4 0x80000000
680 MX51_PAD_USBH1_DATA5__USBH1_DATA5 0x80000000
681 MX51_PAD_USBH1_DATA6__USBH1_DATA6 0x80000000
682 MX51_PAD_USBH1_DATA7__USBH1_DATA7 0x80000000
686 pinctrl_usbh1reg: usbh1reggrp {
688 MX51_PAD_EIM_D21__GPIO2_5 0x85
692 pinctrl_usbotgreg: usbotgreggrp {
694 MX51_PAD_GPIO1_7__GPIO1_7 0x85