2 * Copyright 2012 Freescale Semiconductor, Inc.
4 * The code contained herein is licensed under the GNU General Public
5 * License. You may obtain a copy of the GNU General Public License
6 * Version 2 or later at the following locations:
8 * http://www.opensource.org/licenses/gpl-license.html
9 * http://www.gnu.org/copyleft/gpl.html
12 #include <dt-bindings/gpio/gpio.h>
13 #include "imx28-pinfunc.h"
19 interrupt-parent = <&icoll>;
21 * The decompressor and also some bootloaders rely on a
22 * pre-existing /chosen node to be available to insert the
23 * command line and merge other ATAGS info.
24 * Also for U-Boot there must be a pre-existing /memory node.
27 memory { device_type = "memory"; };
55 compatible = "arm,arm926ej-s";
62 compatible = "simple-bus";
65 reg = <0x80000000 0x80000>;
69 compatible = "simple-bus";
72 reg = <0x80000000 0x3c900>;
75 icoll: interrupt-controller@80000000 {
76 compatible = "fsl,imx28-icoll", "fsl,icoll";
78 #interrupt-cells = <1>;
79 reg = <0x80000000 0x2000>;
82 hsadc: hsadc@80002000 {
83 reg = <0x80002000 0x2000>;
85 dmas = <&dma_apbh 12>;
90 dma_apbh: dma-apbh@80004000 {
91 compatible = "fsl,imx28-dma-apbh";
92 reg = <0x80004000 0x2000>;
93 interrupts = <82 83 84 85
97 interrupt-names = "ssp0", "ssp1", "ssp2", "ssp3",
98 "gpmi0", "gmpi1", "gpmi2", "gmpi3",
99 "gpmi4", "gmpi5", "gpmi6", "gmpi7",
100 "hsadc", "lcdif", "empty", "empty";
106 perfmon: perfmon@80006000 {
107 reg = <0x80006000 0x800>;
112 gpmi: gpmi-nand@8000c000 {
113 compatible = "fsl,imx28-gpmi-nand";
114 #address-cells = <1>;
116 reg = <0x8000c000 0x2000>, <0x8000a000 0x2000>;
117 reg-names = "gpmi-nand", "bch";
119 interrupt-names = "bch";
121 clock-names = "gpmi_io";
122 dmas = <&dma_apbh 4>;
128 #address-cells = <1>;
130 reg = <0x80010000 0x2000>;
133 dmas = <&dma_apbh 0>;
139 #address-cells = <1>;
141 reg = <0x80012000 0x2000>;
144 dmas = <&dma_apbh 1>;
150 #address-cells = <1>;
152 reg = <0x80014000 0x2000>;
155 dmas = <&dma_apbh 2>;
161 #address-cells = <1>;
163 reg = <0x80016000 0x2000>;
166 dmas = <&dma_apbh 3>;
171 pinctrl: pinctrl@80018000 {
172 #address-cells = <1>;
174 compatible = "fsl,imx28-pinctrl", "simple-bus";
175 reg = <0x80018000 0x2000>;
178 compatible = "fsl,imx28-gpio", "fsl,mxs-gpio";
183 interrupt-controller;
184 #interrupt-cells = <2>;
188 compatible = "fsl,imx28-gpio", "fsl,mxs-gpio";
193 interrupt-controller;
194 #interrupt-cells = <2>;
198 compatible = "fsl,imx28-gpio", "fsl,mxs-gpio";
203 interrupt-controller;
204 #interrupt-cells = <2>;
208 compatible = "fsl,imx28-gpio", "fsl,mxs-gpio";
213 interrupt-controller;
214 #interrupt-cells = <2>;
218 compatible = "fsl,imx28-gpio", "fsl,mxs-gpio";
223 interrupt-controller;
224 #interrupt-cells = <2>;
227 duart_pins_a: duart@0 {
230 MX28_PAD_PWM0__DUART_RX
231 MX28_PAD_PWM1__DUART_TX
233 fsl,drive-strength = <MXS_DRIVE_4mA>;
234 fsl,voltage = <MXS_VOLTAGE_HIGH>;
235 fsl,pull-up = <MXS_PULL_DISABLE>;
238 duart_pins_b: duart@1 {
241 MX28_PAD_AUART0_CTS__DUART_RX
242 MX28_PAD_AUART0_RTS__DUART_TX
244 fsl,drive-strength = <MXS_DRIVE_4mA>;
245 fsl,voltage = <MXS_VOLTAGE_HIGH>;
246 fsl,pull-up = <MXS_PULL_DISABLE>;
249 duart_4pins_a: duart-4pins@0 {
252 MX28_PAD_AUART0_CTS__DUART_RX
253 MX28_PAD_AUART0_RTS__DUART_TX
254 MX28_PAD_AUART0_RX__DUART_CTS
255 MX28_PAD_AUART0_TX__DUART_RTS
257 fsl,drive-strength = <MXS_DRIVE_4mA>;
258 fsl,voltage = <MXS_VOLTAGE_HIGH>;
259 fsl,pull-up = <MXS_PULL_DISABLE>;
262 gpmi_pins_a: gpmi-nand@0 {
265 MX28_PAD_GPMI_D00__GPMI_D0
266 MX28_PAD_GPMI_D01__GPMI_D1
267 MX28_PAD_GPMI_D02__GPMI_D2
268 MX28_PAD_GPMI_D03__GPMI_D3
269 MX28_PAD_GPMI_D04__GPMI_D4
270 MX28_PAD_GPMI_D05__GPMI_D5
271 MX28_PAD_GPMI_D06__GPMI_D6
272 MX28_PAD_GPMI_D07__GPMI_D7
273 MX28_PAD_GPMI_CE0N__GPMI_CE0N
274 MX28_PAD_GPMI_RDY0__GPMI_READY0
275 MX28_PAD_GPMI_RDN__GPMI_RDN
276 MX28_PAD_GPMI_WRN__GPMI_WRN
277 MX28_PAD_GPMI_ALE__GPMI_ALE
278 MX28_PAD_GPMI_CLE__GPMI_CLE
279 MX28_PAD_GPMI_RESETN__GPMI_RESETN
281 fsl,drive-strength = <MXS_DRIVE_4mA>;
282 fsl,voltage = <MXS_VOLTAGE_HIGH>;
283 fsl,pull-up = <MXS_PULL_DISABLE>;
286 gpmi_status_cfg: gpmi-status-cfg@0 {
289 MX28_PAD_GPMI_RDN__GPMI_RDN
290 MX28_PAD_GPMI_WRN__GPMI_WRN
291 MX28_PAD_GPMI_RESETN__GPMI_RESETN
293 fsl,drive-strength = <MXS_DRIVE_12mA>;
296 auart0_pins_a: auart0@0 {
299 MX28_PAD_AUART0_RX__AUART0_RX
300 MX28_PAD_AUART0_TX__AUART0_TX
301 MX28_PAD_AUART0_CTS__AUART0_CTS
302 MX28_PAD_AUART0_RTS__AUART0_RTS
304 fsl,drive-strength = <MXS_DRIVE_4mA>;
305 fsl,voltage = <MXS_VOLTAGE_HIGH>;
306 fsl,pull-up = <MXS_PULL_DISABLE>;
309 auart0_2pins_a: auart0-2pins@0 {
312 MX28_PAD_AUART0_RX__AUART0_RX
313 MX28_PAD_AUART0_TX__AUART0_TX
315 fsl,drive-strength = <MXS_DRIVE_4mA>;
316 fsl,voltage = <MXS_VOLTAGE_HIGH>;
317 fsl,pull-up = <MXS_PULL_DISABLE>;
320 auart1_pins_a: auart1@0 {
323 MX28_PAD_AUART1_RX__AUART1_RX
324 MX28_PAD_AUART1_TX__AUART1_TX
325 MX28_PAD_AUART1_CTS__AUART1_CTS
326 MX28_PAD_AUART1_RTS__AUART1_RTS
328 fsl,drive-strength = <MXS_DRIVE_4mA>;
329 fsl,voltage = <MXS_VOLTAGE_HIGH>;
330 fsl,pull-up = <MXS_PULL_DISABLE>;
333 auart1_2pins_a: auart1-2pins@0 {
336 MX28_PAD_AUART1_RX__AUART1_RX
337 MX28_PAD_AUART1_TX__AUART1_TX
339 fsl,drive-strength = <MXS_DRIVE_4mA>;
340 fsl,voltage = <MXS_VOLTAGE_HIGH>;
341 fsl,pull-up = <MXS_PULL_DISABLE>;
344 auart2_2pins_a: auart2-2pins@0 {
347 MX28_PAD_SSP2_SCK__AUART2_RX
348 MX28_PAD_SSP2_MOSI__AUART2_TX
350 fsl,drive-strength = <MXS_DRIVE_4mA>;
351 fsl,voltage = <MXS_VOLTAGE_HIGH>;
352 fsl,pull-up = <MXS_PULL_DISABLE>;
355 auart2_2pins_b: auart2-2pins@1 {
358 MX28_PAD_AUART2_RX__AUART2_RX
359 MX28_PAD_AUART2_TX__AUART2_TX
361 fsl,drive-strength = <MXS_DRIVE_4mA>;
362 fsl,voltage = <MXS_VOLTAGE_HIGH>;
363 fsl,pull-up = <MXS_PULL_DISABLE>;
366 auart2_pins_a: auart2-pins@0 {
369 MX28_PAD_AUART2_RX__AUART2_RX
370 MX28_PAD_AUART2_TX__AUART2_TX
371 MX28_PAD_AUART2_CTS__AUART2_CTS
372 MX28_PAD_AUART2_RTS__AUART2_RTS
374 fsl,drive-strength = <MXS_DRIVE_4mA>;
375 fsl,voltage = <MXS_VOLTAGE_HIGH>;
376 fsl,pull-up = <MXS_PULL_DISABLE>;
379 auart3_pins_a: auart3@0 {
382 MX28_PAD_AUART3_RX__AUART3_RX
383 MX28_PAD_AUART3_TX__AUART3_TX
384 MX28_PAD_AUART3_CTS__AUART3_CTS
385 MX28_PAD_AUART3_RTS__AUART3_RTS
387 fsl,drive-strength = <MXS_DRIVE_4mA>;
388 fsl,voltage = <MXS_VOLTAGE_HIGH>;
389 fsl,pull-up = <MXS_PULL_DISABLE>;
392 auart3_2pins_a: auart3-2pins@0 {
395 MX28_PAD_SSP2_MISO__AUART3_RX
396 MX28_PAD_SSP2_SS0__AUART3_TX
398 fsl,drive-strength = <MXS_DRIVE_4mA>;
399 fsl,voltage = <MXS_VOLTAGE_HIGH>;
400 fsl,pull-up = <MXS_PULL_DISABLE>;
403 auart3_2pins_b: auart3-2pins@1 {
406 MX28_PAD_AUART3_RX__AUART3_RX
407 MX28_PAD_AUART3_TX__AUART3_TX
409 fsl,drive-strength = <MXS_DRIVE_4mA>;
410 fsl,voltage = <MXS_VOLTAGE_HIGH>;
411 fsl,pull-up = <MXS_PULL_DISABLE>;
414 auart4_2pins_a: auart4@0 {
417 MX28_PAD_SSP3_SCK__AUART4_TX
418 MX28_PAD_SSP3_MOSI__AUART4_RX
420 fsl,drive-strength = <MXS_DRIVE_4mA>;
421 fsl,voltage = <MXS_VOLTAGE_HIGH>;
422 fsl,pull-up = <MXS_PULL_DISABLE>;
425 auart4_2pins_b: auart4@1 {
428 MX28_PAD_AUART0_CTS__AUART4_RX
429 MX28_PAD_AUART0_RTS__AUART4_TX
431 fsl,drive-strength = <MXS_DRIVE_4mA>;
432 fsl,voltage = <MXS_VOLTAGE_HIGH>;
433 fsl,pull-up = <MXS_PULL_DISABLE>;
436 mac0_pins_a: mac0@0 {
439 MX28_PAD_ENET0_MDC__ENET0_MDC
440 MX28_PAD_ENET0_MDIO__ENET0_MDIO
441 MX28_PAD_ENET0_RX_EN__ENET0_RX_EN
442 MX28_PAD_ENET0_RXD0__ENET0_RXD0
443 MX28_PAD_ENET0_RXD1__ENET0_RXD1
444 MX28_PAD_ENET0_TX_EN__ENET0_TX_EN
445 MX28_PAD_ENET0_TXD0__ENET0_TXD0
446 MX28_PAD_ENET0_TXD1__ENET0_TXD1
447 MX28_PAD_ENET_CLK__CLKCTRL_ENET
449 fsl,drive-strength = <MXS_DRIVE_8mA>;
450 fsl,voltage = <MXS_VOLTAGE_HIGH>;
451 fsl,pull-up = <MXS_PULL_ENABLE>;
454 mac0_pins_b: mac0@1 {
457 MX28_PAD_ENET0_MDC__ENET0_MDC
458 MX28_PAD_ENET0_MDIO__ENET0_MDIO
459 MX28_PAD_ENET0_RX_EN__ENET0_RX_EN
460 MX28_PAD_ENET0_RXD0__ENET0_RXD0
461 MX28_PAD_ENET0_RXD1__ENET0_RXD1
462 MX28_PAD_ENET0_RXD2__ENET0_RXD2
463 MX28_PAD_ENET0_RXD3__ENET0_RXD3
464 MX28_PAD_ENET0_TX_EN__ENET0_TX_EN
465 MX28_PAD_ENET0_TXD0__ENET0_TXD0
466 MX28_PAD_ENET0_TXD1__ENET0_TXD1
467 MX28_PAD_ENET0_TXD2__ENET0_TXD2
468 MX28_PAD_ENET0_TXD3__ENET0_TXD3
469 MX28_PAD_ENET_CLK__CLKCTRL_ENET
470 MX28_PAD_ENET0_COL__ENET0_COL
471 MX28_PAD_ENET0_CRS__ENET0_CRS
472 MX28_PAD_ENET0_TX_CLK__ENET0_TX_CLK
473 MX28_PAD_ENET0_RX_CLK__ENET0_RX_CLK
475 fsl,drive-strength = <MXS_DRIVE_8mA>;
476 fsl,voltage = <MXS_VOLTAGE_HIGH>;
477 fsl,pull-up = <MXS_PULL_ENABLE>;
480 mac1_pins_a: mac1@0 {
483 MX28_PAD_ENET0_CRS__ENET1_RX_EN
484 MX28_PAD_ENET0_RXD2__ENET1_RXD0
485 MX28_PAD_ENET0_RXD3__ENET1_RXD1
486 MX28_PAD_ENET0_COL__ENET1_TX_EN
487 MX28_PAD_ENET0_TXD2__ENET1_TXD0
488 MX28_PAD_ENET0_TXD3__ENET1_TXD1
490 fsl,drive-strength = <MXS_DRIVE_8mA>;
491 fsl,voltage = <MXS_VOLTAGE_HIGH>;
492 fsl,pull-up = <MXS_PULL_ENABLE>;
495 mmc0_8bit_pins_a: mmc0-8bit@0 {
498 MX28_PAD_SSP0_DATA0__SSP0_D0
499 MX28_PAD_SSP0_DATA1__SSP0_D1
500 MX28_PAD_SSP0_DATA2__SSP0_D2
501 MX28_PAD_SSP0_DATA3__SSP0_D3
502 MX28_PAD_SSP0_DATA4__SSP0_D4
503 MX28_PAD_SSP0_DATA5__SSP0_D5
504 MX28_PAD_SSP0_DATA6__SSP0_D6
505 MX28_PAD_SSP0_DATA7__SSP0_D7
506 MX28_PAD_SSP0_CMD__SSP0_CMD
507 MX28_PAD_SSP0_DETECT__SSP0_CARD_DETECT
508 MX28_PAD_SSP0_SCK__SSP0_SCK
510 fsl,drive-strength = <MXS_DRIVE_8mA>;
511 fsl,voltage = <MXS_VOLTAGE_HIGH>;
512 fsl,pull-up = <MXS_PULL_ENABLE>;
515 mmc0_4bit_pins_a: mmc0-4bit@0 {
518 MX28_PAD_SSP0_DATA0__SSP0_D0
519 MX28_PAD_SSP0_DATA1__SSP0_D1
520 MX28_PAD_SSP0_DATA2__SSP0_D2
521 MX28_PAD_SSP0_DATA3__SSP0_D3
522 MX28_PAD_SSP0_CMD__SSP0_CMD
523 MX28_PAD_SSP0_DETECT__SSP0_CARD_DETECT
524 MX28_PAD_SSP0_SCK__SSP0_SCK
526 fsl,drive-strength = <MXS_DRIVE_8mA>;
527 fsl,voltage = <MXS_VOLTAGE_HIGH>;
528 fsl,pull-up = <MXS_PULL_ENABLE>;
531 mmc0_cd_cfg: mmc0-cd-cfg@0 {
534 MX28_PAD_SSP0_DETECT__SSP0_CARD_DETECT
536 fsl,pull-up = <MXS_PULL_DISABLE>;
539 mmc0_sck_cfg: mmc0-sck-cfg@0 {
542 MX28_PAD_SSP0_SCK__SSP0_SCK
544 fsl,drive-strength = <MXS_DRIVE_12mA>;
545 fsl,pull-up = <MXS_PULL_DISABLE>;
548 mmc1_4bit_pins_a: mmc1-4bit@0 {
551 MX28_PAD_GPMI_D00__SSP1_D0
552 MX28_PAD_GPMI_D01__SSP1_D1
553 MX28_PAD_GPMI_D02__SSP1_D2
554 MX28_PAD_GPMI_D03__SSP1_D3
555 MX28_PAD_GPMI_RDY1__SSP1_CMD
556 MX28_PAD_GPMI_RDY0__SSP1_CARD_DETECT
557 MX28_PAD_GPMI_WRN__SSP1_SCK
559 fsl,drive-strength = <MXS_DRIVE_8mA>;
560 fsl,voltage = <MXS_VOLTAGE_HIGH>;
561 fsl,pull-up = <MXS_PULL_ENABLE>;
564 mmc1_cd_cfg: mmc1-cd-cfg@0 {
567 MX28_PAD_GPMI_RDY0__SSP1_CARD_DETECT
569 fsl,pull-up = <MXS_PULL_DISABLE>;
572 mmc1_sck_cfg: mmc1-sck-cfg@0 {
575 MX28_PAD_GPMI_WRN__SSP1_SCK
577 fsl,drive-strength = <MXS_DRIVE_12mA>;
578 fsl,pull-up = <MXS_PULL_DISABLE>;
582 mmc2_4bit_pins_a: mmc2-4bit@0 {
585 MX28_PAD_SSP0_DATA4__SSP2_D0
586 MX28_PAD_SSP1_SCK__SSP2_D1
587 MX28_PAD_SSP1_CMD__SSP2_D2
588 MX28_PAD_SSP0_DATA5__SSP2_D3
589 MX28_PAD_SSP0_DATA6__SSP2_CMD
590 MX28_PAD_AUART1_RX__SSP2_CARD_DETECT
591 MX28_PAD_SSP0_DATA7__SSP2_SCK
593 fsl,drive-strength = <MXS_DRIVE_8mA>;
594 fsl,voltage = <MXS_VOLTAGE_HIGH>;
595 fsl,pull-up = <MXS_PULL_ENABLE>;
598 mmc2_4bit_pins_b: mmc2-4bit@1 {
601 MX28_PAD_SSP2_SCK__SSP2_SCK
602 MX28_PAD_SSP2_MOSI__SSP2_CMD
603 MX28_PAD_SSP2_MISO__SSP2_D0
604 MX28_PAD_SSP2_SS0__SSP2_D3
605 MX28_PAD_SSP2_SS1__SSP2_D1
606 MX28_PAD_SSP2_SS2__SSP2_D2
607 MX28_PAD_AUART1_RX__SSP2_CARD_DETECT
609 fsl,drive-strength = <MXS_DRIVE_8mA>;
610 fsl,voltage = <MXS_VOLTAGE_HIGH>;
611 fsl,pull-up = <MXS_PULL_ENABLE>;
614 mmc2_cd_cfg: mmc2-cd-cfg@0 {
617 MX28_PAD_AUART1_RX__SSP2_CARD_DETECT
619 fsl,pull-up = <MXS_PULL_DISABLE>;
622 mmc2_sck_cfg_a: mmc2-sck-cfg@0 {
625 MX28_PAD_SSP0_DATA7__SSP2_SCK
627 fsl,drive-strength = <MXS_DRIVE_12mA>;
628 fsl,pull-up = <MXS_PULL_DISABLE>;
631 mmc2_sck_cfg_b: mmc2-sck-cfg@1 {
634 MX28_PAD_SSP2_SCK__SSP2_SCK
636 fsl,drive-strength = <MXS_DRIVE_12mA>;
637 fsl,pull-up = <MXS_PULL_DISABLE>;
640 i2c0_pins_a: i2c0@0 {
643 MX28_PAD_I2C0_SCL__I2C0_SCL
644 MX28_PAD_I2C0_SDA__I2C0_SDA
646 fsl,drive-strength = <MXS_DRIVE_8mA>;
647 fsl,voltage = <MXS_VOLTAGE_HIGH>;
648 fsl,pull-up = <MXS_PULL_ENABLE>;
651 i2c0_pins_b: i2c0@1 {
654 MX28_PAD_AUART0_RX__I2C0_SCL
655 MX28_PAD_AUART0_TX__I2C0_SDA
657 fsl,drive-strength = <MXS_DRIVE_8mA>;
658 fsl,voltage = <MXS_VOLTAGE_HIGH>;
659 fsl,pull-up = <MXS_PULL_ENABLE>;
662 i2c1_pins_a: i2c1@0 {
665 MX28_PAD_PWM0__I2C1_SCL
666 MX28_PAD_PWM1__I2C1_SDA
668 fsl,drive-strength = <MXS_DRIVE_8mA>;
669 fsl,voltage = <MXS_VOLTAGE_HIGH>;
670 fsl,pull-up = <MXS_PULL_ENABLE>;
673 i2c1_pins_b: i2c1@1 {
676 MX28_PAD_AUART2_CTS__I2C1_SCL
677 MX28_PAD_AUART2_RTS__I2C1_SDA
679 fsl,drive-strength = <MXS_DRIVE_8mA>;
680 fsl,voltage = <MXS_VOLTAGE_HIGH>;
681 fsl,pull-up = <MXS_PULL_ENABLE>;
684 saif0_pins_a: saif0@0 {
687 MX28_PAD_SAIF0_MCLK__SAIF0_MCLK
688 MX28_PAD_SAIF0_LRCLK__SAIF0_LRCLK
689 MX28_PAD_SAIF0_BITCLK__SAIF0_BITCLK
690 MX28_PAD_SAIF0_SDATA0__SAIF0_SDATA0
692 fsl,drive-strength = <MXS_DRIVE_12mA>;
693 fsl,voltage = <MXS_VOLTAGE_HIGH>;
694 fsl,pull-up = <MXS_PULL_ENABLE>;
697 saif0_pins_b: saif0@1 {
700 MX28_PAD_SAIF0_LRCLK__SAIF0_LRCLK
701 MX28_PAD_SAIF0_BITCLK__SAIF0_BITCLK
702 MX28_PAD_SAIF0_SDATA0__SAIF0_SDATA0
704 fsl,drive-strength = <MXS_DRIVE_12mA>;
705 fsl,voltage = <MXS_VOLTAGE_HIGH>;
706 fsl,pull-up = <MXS_PULL_ENABLE>;
709 saif1_pins_a: saif1@0 {
712 MX28_PAD_SAIF1_SDATA0__SAIF1_SDATA0
714 fsl,drive-strength = <MXS_DRIVE_12mA>;
715 fsl,voltage = <MXS_VOLTAGE_HIGH>;
716 fsl,pull-up = <MXS_PULL_ENABLE>;
719 pwm0_pins_a: pwm0@0 {
724 fsl,drive-strength = <MXS_DRIVE_4mA>;
725 fsl,voltage = <MXS_VOLTAGE_HIGH>;
726 fsl,pull-up = <MXS_PULL_DISABLE>;
729 pwm2_pins_a: pwm2@0 {
734 fsl,drive-strength = <MXS_DRIVE_4mA>;
735 fsl,voltage = <MXS_VOLTAGE_HIGH>;
736 fsl,pull-up = <MXS_PULL_DISABLE>;
739 pwm3_pins_a: pwm3@0 {
744 fsl,drive-strength = <MXS_DRIVE_4mA>;
745 fsl,voltage = <MXS_VOLTAGE_HIGH>;
746 fsl,pull-up = <MXS_PULL_DISABLE>;
749 pwm3_pins_b: pwm3@1 {
752 MX28_PAD_SAIF0_MCLK__PWM_3
754 fsl,drive-strength = <MXS_DRIVE_4mA>;
755 fsl,voltage = <MXS_VOLTAGE_HIGH>;
756 fsl,pull-up = <MXS_PULL_DISABLE>;
759 pwm4_pins_a: pwm4@0 {
764 fsl,drive-strength = <MXS_DRIVE_4mA>;
765 fsl,voltage = <MXS_VOLTAGE_HIGH>;
766 fsl,pull-up = <MXS_PULL_DISABLE>;
769 lcdif_24bit_pins_a: lcdif-24bit@0 {
772 MX28_PAD_LCD_D00__LCD_D0
773 MX28_PAD_LCD_D01__LCD_D1
774 MX28_PAD_LCD_D02__LCD_D2
775 MX28_PAD_LCD_D03__LCD_D3
776 MX28_PAD_LCD_D04__LCD_D4
777 MX28_PAD_LCD_D05__LCD_D5
778 MX28_PAD_LCD_D06__LCD_D6
779 MX28_PAD_LCD_D07__LCD_D7
780 MX28_PAD_LCD_D08__LCD_D8
781 MX28_PAD_LCD_D09__LCD_D9
782 MX28_PAD_LCD_D10__LCD_D10
783 MX28_PAD_LCD_D11__LCD_D11
784 MX28_PAD_LCD_D12__LCD_D12
785 MX28_PAD_LCD_D13__LCD_D13
786 MX28_PAD_LCD_D14__LCD_D14
787 MX28_PAD_LCD_D15__LCD_D15
788 MX28_PAD_LCD_D16__LCD_D16
789 MX28_PAD_LCD_D17__LCD_D17
790 MX28_PAD_LCD_D18__LCD_D18
791 MX28_PAD_LCD_D19__LCD_D19
792 MX28_PAD_LCD_D20__LCD_D20
793 MX28_PAD_LCD_D21__LCD_D21
794 MX28_PAD_LCD_D22__LCD_D22
795 MX28_PAD_LCD_D23__LCD_D23
797 fsl,drive-strength = <MXS_DRIVE_4mA>;
798 fsl,voltage = <MXS_VOLTAGE_HIGH>;
799 fsl,pull-up = <MXS_PULL_DISABLE>;
802 lcdif_18bit_pins_a: lcdif-18bit@0 {
805 MX28_PAD_LCD_D00__LCD_D0
806 MX28_PAD_LCD_D01__LCD_D1
807 MX28_PAD_LCD_D02__LCD_D2
808 MX28_PAD_LCD_D03__LCD_D3
809 MX28_PAD_LCD_D04__LCD_D4
810 MX28_PAD_LCD_D05__LCD_D5
811 MX28_PAD_LCD_D06__LCD_D6
812 MX28_PAD_LCD_D07__LCD_D7
813 MX28_PAD_LCD_D08__LCD_D8
814 MX28_PAD_LCD_D09__LCD_D9
815 MX28_PAD_LCD_D10__LCD_D10
816 MX28_PAD_LCD_D11__LCD_D11
817 MX28_PAD_LCD_D12__LCD_D12
818 MX28_PAD_LCD_D13__LCD_D13
819 MX28_PAD_LCD_D14__LCD_D14
820 MX28_PAD_LCD_D15__LCD_D15
821 MX28_PAD_LCD_D16__LCD_D16
822 MX28_PAD_LCD_D17__LCD_D17
824 fsl,drive-strength = <MXS_DRIVE_4mA>;
825 fsl,voltage = <MXS_VOLTAGE_HIGH>;
826 fsl,pull-up = <MXS_PULL_DISABLE>;
829 lcdif_16bit_pins_a: lcdif-16bit@0 {
832 MX28_PAD_LCD_D00__LCD_D0
833 MX28_PAD_LCD_D01__LCD_D1
834 MX28_PAD_LCD_D02__LCD_D2
835 MX28_PAD_LCD_D03__LCD_D3
836 MX28_PAD_LCD_D04__LCD_D4
837 MX28_PAD_LCD_D05__LCD_D5
838 MX28_PAD_LCD_D06__LCD_D6
839 MX28_PAD_LCD_D07__LCD_D7
840 MX28_PAD_LCD_D08__LCD_D8
841 MX28_PAD_LCD_D09__LCD_D9
842 MX28_PAD_LCD_D10__LCD_D10
843 MX28_PAD_LCD_D11__LCD_D11
844 MX28_PAD_LCD_D12__LCD_D12
845 MX28_PAD_LCD_D13__LCD_D13
846 MX28_PAD_LCD_D14__LCD_D14
847 MX28_PAD_LCD_D15__LCD_D15
849 fsl,drive-strength = <MXS_DRIVE_4mA>;
850 fsl,voltage = <MXS_VOLTAGE_HIGH>;
851 fsl,pull-up = <MXS_PULL_DISABLE>;
854 lcdif_sync_pins_a: lcdif-sync@0 {
857 MX28_PAD_LCD_RS__LCD_DOTCLK
858 MX28_PAD_LCD_CS__LCD_ENABLE
859 MX28_PAD_LCD_RD_E__LCD_VSYNC
860 MX28_PAD_LCD_WR_RWN__LCD_HSYNC
862 fsl,drive-strength = <MXS_DRIVE_4mA>;
863 fsl,voltage = <MXS_VOLTAGE_HIGH>;
864 fsl,pull-up = <MXS_PULL_DISABLE>;
867 can0_pins_a: can0@0 {
870 MX28_PAD_GPMI_RDY2__CAN0_TX
871 MX28_PAD_GPMI_RDY3__CAN0_RX
873 fsl,drive-strength = <MXS_DRIVE_4mA>;
874 fsl,voltage = <MXS_VOLTAGE_HIGH>;
875 fsl,pull-up = <MXS_PULL_DISABLE>;
878 can1_pins_a: can1@0 {
881 MX28_PAD_GPMI_CE2N__CAN1_TX
882 MX28_PAD_GPMI_CE3N__CAN1_RX
884 fsl,drive-strength = <MXS_DRIVE_4mA>;
885 fsl,voltage = <MXS_VOLTAGE_HIGH>;
886 fsl,pull-up = <MXS_PULL_DISABLE>;
889 spi2_pins_a: spi2@0 {
892 MX28_PAD_SSP2_SCK__SSP2_SCK
893 MX28_PAD_SSP2_MOSI__SSP2_CMD
894 MX28_PAD_SSP2_MISO__SSP2_D0
895 MX28_PAD_SSP2_SS0__SSP2_D3
897 fsl,drive-strength = <MXS_DRIVE_8mA>;
898 fsl,voltage = <MXS_VOLTAGE_HIGH>;
899 fsl,pull-up = <MXS_PULL_ENABLE>;
902 spi3_pins_a: spi3@0 {
905 MX28_PAD_AUART2_RX__SSP3_D4
906 MX28_PAD_AUART2_TX__SSP3_D5
907 MX28_PAD_SSP3_SCK__SSP3_SCK
908 MX28_PAD_SSP3_MOSI__SSP3_CMD
909 MX28_PAD_SSP3_MISO__SSP3_D0
910 MX28_PAD_SSP3_SS0__SSP3_D3
912 fsl,drive-strength = <MXS_DRIVE_8mA>;
913 fsl,voltage = <MXS_VOLTAGE_HIGH>;
914 fsl,pull-up = <MXS_PULL_DISABLE>;
917 spi3_pins_b: spi3@1 {
920 MX28_PAD_SSP3_SCK__SSP3_SCK
921 MX28_PAD_SSP3_MOSI__SSP3_CMD
922 MX28_PAD_SSP3_MISO__SSP3_D0
923 MX28_PAD_SSP3_SS0__SSP3_D3
925 fsl,drive-strength = <MXS_DRIVE_8mA>;
926 fsl,voltage = <MXS_VOLTAGE_HIGH>;
927 fsl,pull-up = <MXS_PULL_ENABLE>;
930 usb0_pins_a: usb0@0 {
933 MX28_PAD_SSP2_SS2__USB0_OVERCURRENT
935 fsl,drive-strength = <MXS_DRIVE_12mA>;
936 fsl,voltage = <MXS_VOLTAGE_HIGH>;
937 fsl,pull-up = <MXS_PULL_DISABLE>;
940 usb0_pins_b: usb0@1 {
943 MX28_PAD_AUART1_CTS__USB0_OVERCURRENT
945 fsl,drive-strength = <MXS_DRIVE_12mA>;
946 fsl,voltage = <MXS_VOLTAGE_HIGH>;
947 fsl,pull-up = <MXS_PULL_DISABLE>;
950 usb1_pins_a: usb1@0 {
953 MX28_PAD_SSP2_SS1__USB1_OVERCURRENT
955 fsl,drive-strength = <MXS_DRIVE_12mA>;
956 fsl,voltage = <MXS_VOLTAGE_HIGH>;
957 fsl,pull-up = <MXS_PULL_DISABLE>;
960 usb0_id_pins_a: usb0id@0 {
963 MX28_PAD_AUART1_RTS__USB0_ID
965 fsl,drive-strength = <MXS_DRIVE_12mA>;
966 fsl,voltage = <MXS_VOLTAGE_HIGH>;
967 fsl,pull-up = <MXS_PULL_ENABLE>;
970 usb0_id_pins_b: usb0id1@0 {
973 MX28_PAD_PWM2__USB0_ID
975 fsl,drive-strength = <MXS_DRIVE_12mA>;
976 fsl,voltage = <MXS_VOLTAGE_HIGH>;
977 fsl,pull-up = <MXS_PULL_ENABLE>;
982 digctl: digctl@8001c000 {
983 compatible = "fsl,imx28-digctl", "fsl,imx23-digctl";
984 reg = <0x8001c000 0x2000>;
990 reg = <0x80022000 0x2000>;
994 dma_apbx: dma-apbx@80024000 {
995 compatible = "fsl,imx28-dma-apbx";
996 reg = <0x80024000 0x2000>;
997 interrupts = <78 79 66 0
1001 interrupt-names = "auart4-rx", "auart4-tx", "spdif-tx", "empty",
1002 "saif0", "saif1", "i2c0", "i2c1",
1003 "auart0-rx", "auart0-tx", "auart1-rx", "auart1-tx",
1004 "auart2-rx", "auart2-tx", "auart3-rx", "auart3-tx";
1006 dma-channels = <16>;
1007 clocks = <&clks 26>;
1011 compatible = "fsl,imx28-dcp", "fsl,imx23-dcp";
1012 reg = <0x80028000 0x2000>;
1013 interrupts = <52 53 54>;
1018 reg = <0x8002a000 0x2000>;
1020 status = "disabled";
1023 ocotp: ocotp@8002c000 {
1024 compatible = "fsl,imx28-ocotp", "fsl,ocotp";
1025 #address-cells = <1>;
1027 reg = <0x8002c000 0x2000>;
1028 clocks = <&clks 25>;
1032 reg = <0x8002e000 0x2000>;
1033 status = "disabled";
1036 lcdif: lcdif@80030000 {
1037 compatible = "fsl,imx28-lcdif";
1038 reg = <0x80030000 0x2000>;
1040 clocks = <&clks 55>;
1041 dmas = <&dma_apbh 13>;
1043 status = "disabled";
1046 can0: can@80032000 {
1047 compatible = "fsl,imx28-flexcan";
1048 reg = <0x80032000 0x2000>;
1050 clocks = <&clks 58>, <&clks 58>;
1051 clock-names = "ipg", "per";
1052 status = "disabled";
1055 can1: can@80034000 {
1056 compatible = "fsl,imx28-flexcan";
1057 reg = <0x80034000 0x2000>;
1059 clocks = <&clks 59>, <&clks 59>;
1060 clock-names = "ipg", "per";
1061 status = "disabled";
1064 simdbg: simdbg@8003c000 {
1065 reg = <0x8003c000 0x200>;
1066 status = "disabled";
1069 simgpmisel: simgpmisel@8003c200 {
1070 reg = <0x8003c200 0x100>;
1071 status = "disabled";
1074 simsspsel: simsspsel@8003c300 {
1075 reg = <0x8003c300 0x100>;
1076 status = "disabled";
1079 simmemsel: simmemsel@8003c400 {
1080 reg = <0x8003c400 0x100>;
1081 status = "disabled";
1084 gpiomon: gpiomon@8003c500 {
1085 reg = <0x8003c500 0x100>;
1086 status = "disabled";
1089 simenet: simenet@8003c700 {
1090 reg = <0x8003c700 0x100>;
1091 status = "disabled";
1094 armjtag: armjtag@8003c800 {
1095 reg = <0x8003c800 0x100>;
1096 status = "disabled";
1101 compatible = "simple-bus";
1102 #address-cells = <1>;
1104 reg = <0x80040000 0x40000>;
1107 clks: clkctrl@80040000 {
1108 compatible = "fsl,imx28-clkctrl", "fsl,clkctrl";
1109 reg = <0x80040000 0x2000>;
1113 saif0: saif@80042000 {
1114 #sound-dai-cells = <0>;
1115 compatible = "fsl,imx28-saif";
1116 reg = <0x80042000 0x2000>;
1119 clocks = <&clks 53>;
1120 dmas = <&dma_apbx 4>;
1121 dma-names = "rx-tx";
1122 status = "disabled";
1125 power: power@80044000 {
1126 reg = <0x80044000 0x2000>;
1127 status = "disabled";
1130 saif1: saif@80046000 {
1131 #sound-dai-cells = <0>;
1132 compatible = "fsl,imx28-saif";
1133 reg = <0x80046000 0x2000>;
1135 clocks = <&clks 54>;
1136 dmas = <&dma_apbx 5>;
1137 dma-names = "rx-tx";
1138 status = "disabled";
1141 lradc: lradc@80050000 {
1142 compatible = "fsl,imx28-lradc";
1143 reg = <0x80050000 0x2000>;
1144 interrupts = <10 14 15 16 17 18 19
1146 status = "disabled";
1147 clocks = <&clks 41>;
1148 #io-channel-cells = <1>;
1151 spdif: spdif@80054000 {
1152 reg = <0x80054000 0x2000>;
1154 dmas = <&dma_apbx 2>;
1156 status = "disabled";
1159 mxs_rtc: rtc@80056000 {
1160 compatible = "fsl,imx28-rtc", "fsl,stmp3xxx-rtc";
1161 reg = <0x80056000 0x2000>;
1165 i2c0: i2c@80058000 {
1166 #address-cells = <1>;
1168 compatible = "fsl,imx28-i2c";
1169 reg = <0x80058000 0x2000>;
1171 clock-frequency = <100000>;
1172 dmas = <&dma_apbx 6>;
1173 dma-names = "rx-tx";
1174 status = "disabled";
1177 i2c1: i2c@8005a000 {
1178 #address-cells = <1>;
1180 compatible = "fsl,imx28-i2c";
1181 reg = <0x8005a000 0x2000>;
1183 clock-frequency = <100000>;
1184 dmas = <&dma_apbx 7>;
1185 dma-names = "rx-tx";
1186 status = "disabled";
1190 compatible = "fsl,imx28-pwm", "fsl,imx23-pwm";
1191 reg = <0x80064000 0x2000>;
1192 clocks = <&clks 44>;
1194 fsl,pwm-number = <8>;
1195 status = "disabled";
1198 timer: timrot@80068000 {
1199 compatible = "fsl,imx28-timrot", "fsl,timrot";
1200 reg = <0x80068000 0x2000>;
1201 interrupts = <48 49 50 51>;
1202 clocks = <&clks 26>;
1205 auart0: serial@8006a000 {
1206 compatible = "fsl,imx28-auart", "fsl,imx23-auart";
1207 reg = <0x8006a000 0x2000>;
1209 dmas = <&dma_apbx 8>, <&dma_apbx 9>;
1210 dma-names = "rx", "tx";
1211 clocks = <&clks 45>;
1212 status = "disabled";
1215 auart1: serial@8006c000 {
1216 compatible = "fsl,imx28-auart", "fsl,imx23-auart";
1217 reg = <0x8006c000 0x2000>;
1219 dmas = <&dma_apbx 10>, <&dma_apbx 11>;
1220 dma-names = "rx", "tx";
1221 clocks = <&clks 45>;
1222 status = "disabled";
1225 auart2: serial@8006e000 {
1226 compatible = "fsl,imx28-auart", "fsl,imx23-auart";
1227 reg = <0x8006e000 0x2000>;
1229 dmas = <&dma_apbx 12>, <&dma_apbx 13>;
1230 dma-names = "rx", "tx";
1231 clocks = <&clks 45>;
1232 status = "disabled";
1235 auart3: serial@80070000 {
1236 compatible = "fsl,imx28-auart", "fsl,imx23-auart";
1237 reg = <0x80070000 0x2000>;
1239 dmas = <&dma_apbx 14>, <&dma_apbx 15>;
1240 dma-names = "rx", "tx";
1241 clocks = <&clks 45>;
1242 status = "disabled";
1245 auart4: serial@80072000 {
1246 compatible = "fsl,imx28-auart", "fsl,imx23-auart";
1247 reg = <0x80072000 0x2000>;
1249 dmas = <&dma_apbx 0>, <&dma_apbx 1>;
1250 dma-names = "rx", "tx";
1251 clocks = <&clks 45>;
1252 status = "disabled";
1255 duart: serial@80074000 {
1256 compatible = "arm,pl011", "arm,primecell";
1257 reg = <0x80074000 0x1000>;
1259 clocks = <&clks 45>, <&clks 26>;
1260 clock-names = "uart", "apb_pclk";
1261 status = "disabled";
1264 usbphy0: usbphy@8007c000 {
1265 compatible = "fsl,imx28-usbphy", "fsl,imx23-usbphy";
1266 reg = <0x8007c000 0x2000>;
1267 clocks = <&clks 62>;
1268 status = "disabled";
1271 usbphy1: usbphy@8007e000 {
1272 compatible = "fsl,imx28-usbphy", "fsl,imx23-usbphy";
1273 reg = <0x8007e000 0x2000>;
1274 clocks = <&clks 63>;
1275 status = "disabled";
1281 compatible = "simple-bus";
1282 #address-cells = <1>;
1284 reg = <0x80080000 0x80000>;
1287 usb0: usb@80080000 {
1288 compatible = "fsl,imx28-usb", "fsl,imx27-usb";
1289 reg = <0x80080000 0x10000>;
1291 clocks = <&clks 60>;
1292 fsl,usbphy = <&usbphy0>;
1293 status = "disabled";
1296 usb1: usb@80090000 {
1297 compatible = "fsl,imx28-usb", "fsl,imx27-usb";
1298 reg = <0x80090000 0x10000>;
1300 clocks = <&clks 61>;
1301 fsl,usbphy = <&usbphy1>;
1303 status = "disabled";
1306 dflpt: dflpt@800c0000 {
1307 reg = <0x800c0000 0x10000>;
1308 status = "disabled";
1311 mac0: ethernet@800f0000 {
1312 compatible = "fsl,imx28-fec";
1313 reg = <0x800f0000 0x4000>;
1315 clocks = <&clks 57>, <&clks 57>, <&clks 64>;
1316 clock-names = "ipg", "ahb", "enet_out";
1317 status = "disabled";
1320 mac1: ethernet@800f4000 {
1321 compatible = "fsl,imx28-fec";
1322 reg = <0x800f4000 0x4000>;
1324 clocks = <&clks 57>, <&clks 57>;
1325 clock-names = "ipg", "ahb";
1326 status = "disabled";
1329 etn_switch: switch@800f8000 {
1330 reg = <0x800f8000 0x8000>;
1331 status = "disabled";
1336 compatible = "iio-hwmon";
1337 io-channels = <&lradc 8>;