1 // SPDX-License-Identifier: GPL-2.0+
3 // Copyright 2012 Freescale Semiconductor, Inc.
5 #include <dt-bindings/gpio/gpio.h>
6 #include "imx28-pinfunc.h"
12 interrupt-parent = <&icoll>;
14 * The decompressor and also some bootloaders rely on a
15 * pre-existing /chosen node to be available to insert the
16 * command line and merge other ATAGS info.
46 compatible = "arm,arm926ej-s";
53 compatible = "simple-bus";
56 reg = <0x80000000 0x80000>;
60 compatible = "simple-bus";
63 reg = <0x80000000 0x3c900>;
66 icoll: interrupt-controller@80000000 {
67 compatible = "fsl,imx28-icoll", "fsl,icoll";
69 #interrupt-cells = <1>;
70 reg = <0x80000000 0x2000>;
73 hsadc: hsadc@80002000 {
74 reg = <0x80002000 0x2000>;
76 dmas = <&dma_apbh 12>;
81 dma_apbh: dma-apbh@80004000 {
82 compatible = "fsl,imx28-dma-apbh";
83 reg = <0x80004000 0x2000>;
84 interrupts = <82 83 84 85
88 interrupt-names = "ssp0", "ssp1", "ssp2", "ssp3",
89 "gpmi0", "gmpi1", "gpmi2", "gmpi3",
90 "gpmi4", "gmpi5", "gpmi6", "gmpi7",
91 "hsadc", "lcdif", "empty", "empty";
97 perfmon: perfmon@80006000 {
98 reg = <0x80006000 0x800>;
103 gpmi: nand-controller@8000c000 {
104 compatible = "fsl,imx28-gpmi-nand";
105 #address-cells = <1>;
107 reg = <0x8000c000 0x2000>, <0x8000a000 0x2000>;
108 reg-names = "gpmi-nand", "bch";
110 interrupt-names = "bch";
112 clock-names = "gpmi_io";
113 dmas = <&dma_apbh 4>;
119 #address-cells = <1>;
121 reg = <0x80010000 0x2000>;
124 dmas = <&dma_apbh 0>;
130 #address-cells = <1>;
132 reg = <0x80012000 0x2000>;
135 dmas = <&dma_apbh 1>;
141 #address-cells = <1>;
143 reg = <0x80014000 0x2000>;
146 dmas = <&dma_apbh 2>;
152 #address-cells = <1>;
154 reg = <0x80016000 0x2000>;
157 dmas = <&dma_apbh 3>;
162 pinctrl: pinctrl@80018000 {
163 #address-cells = <1>;
165 compatible = "fsl,imx28-pinctrl", "simple-bus";
166 reg = <0x80018000 0x2000>;
169 compatible = "fsl,imx28-gpio", "fsl,mxs-gpio";
174 interrupt-controller;
175 #interrupt-cells = <2>;
179 compatible = "fsl,imx28-gpio", "fsl,mxs-gpio";
184 interrupt-controller;
185 #interrupt-cells = <2>;
189 compatible = "fsl,imx28-gpio", "fsl,mxs-gpio";
194 interrupt-controller;
195 #interrupt-cells = <2>;
199 compatible = "fsl,imx28-gpio", "fsl,mxs-gpio";
204 interrupt-controller;
205 #interrupt-cells = <2>;
209 compatible = "fsl,imx28-gpio", "fsl,mxs-gpio";
214 interrupt-controller;
215 #interrupt-cells = <2>;
218 duart_pins_a: duart@0 {
221 MX28_PAD_PWM0__DUART_RX
222 MX28_PAD_PWM1__DUART_TX
224 fsl,drive-strength = <MXS_DRIVE_4mA>;
225 fsl,voltage = <MXS_VOLTAGE_HIGH>;
226 fsl,pull-up = <MXS_PULL_DISABLE>;
229 duart_pins_b: duart@1 {
232 MX28_PAD_AUART0_CTS__DUART_RX
233 MX28_PAD_AUART0_RTS__DUART_TX
235 fsl,drive-strength = <MXS_DRIVE_4mA>;
236 fsl,voltage = <MXS_VOLTAGE_HIGH>;
237 fsl,pull-up = <MXS_PULL_DISABLE>;
240 duart_4pins_a: duart-4pins@0 {
243 MX28_PAD_AUART0_CTS__DUART_RX
244 MX28_PAD_AUART0_RTS__DUART_TX
245 MX28_PAD_AUART0_RX__DUART_CTS
246 MX28_PAD_AUART0_TX__DUART_RTS
248 fsl,drive-strength = <MXS_DRIVE_4mA>;
249 fsl,voltage = <MXS_VOLTAGE_HIGH>;
250 fsl,pull-up = <MXS_PULL_DISABLE>;
253 gpmi_pins_a: gpmi-nand@0 {
256 MX28_PAD_GPMI_D00__GPMI_D0
257 MX28_PAD_GPMI_D01__GPMI_D1
258 MX28_PAD_GPMI_D02__GPMI_D2
259 MX28_PAD_GPMI_D03__GPMI_D3
260 MX28_PAD_GPMI_D04__GPMI_D4
261 MX28_PAD_GPMI_D05__GPMI_D5
262 MX28_PAD_GPMI_D06__GPMI_D6
263 MX28_PAD_GPMI_D07__GPMI_D7
264 MX28_PAD_GPMI_CE0N__GPMI_CE0N
265 MX28_PAD_GPMI_RDY0__GPMI_READY0
266 MX28_PAD_GPMI_RDN__GPMI_RDN
267 MX28_PAD_GPMI_WRN__GPMI_WRN
268 MX28_PAD_GPMI_ALE__GPMI_ALE
269 MX28_PAD_GPMI_CLE__GPMI_CLE
270 MX28_PAD_GPMI_RESETN__GPMI_RESETN
272 fsl,drive-strength = <MXS_DRIVE_4mA>;
273 fsl,voltage = <MXS_VOLTAGE_HIGH>;
274 fsl,pull-up = <MXS_PULL_DISABLE>;
277 gpmi_status_cfg: gpmi-status-cfg@0 {
280 MX28_PAD_GPMI_RDN__GPMI_RDN
281 MX28_PAD_GPMI_WRN__GPMI_WRN
282 MX28_PAD_GPMI_RESETN__GPMI_RESETN
284 fsl,drive-strength = <MXS_DRIVE_12mA>;
287 auart0_pins_a: auart0@0 {
290 MX28_PAD_AUART0_RX__AUART0_RX
291 MX28_PAD_AUART0_TX__AUART0_TX
292 MX28_PAD_AUART0_CTS__AUART0_CTS
293 MX28_PAD_AUART0_RTS__AUART0_RTS
295 fsl,drive-strength = <MXS_DRIVE_4mA>;
296 fsl,voltage = <MXS_VOLTAGE_HIGH>;
297 fsl,pull-up = <MXS_PULL_DISABLE>;
300 auart0_2pins_a: auart0-2pins@0 {
303 MX28_PAD_AUART0_RX__AUART0_RX
304 MX28_PAD_AUART0_TX__AUART0_TX
306 fsl,drive-strength = <MXS_DRIVE_4mA>;
307 fsl,voltage = <MXS_VOLTAGE_HIGH>;
308 fsl,pull-up = <MXS_PULL_DISABLE>;
311 auart1_pins_a: auart1@0 {
314 MX28_PAD_AUART1_RX__AUART1_RX
315 MX28_PAD_AUART1_TX__AUART1_TX
316 MX28_PAD_AUART1_CTS__AUART1_CTS
317 MX28_PAD_AUART1_RTS__AUART1_RTS
319 fsl,drive-strength = <MXS_DRIVE_4mA>;
320 fsl,voltage = <MXS_VOLTAGE_HIGH>;
321 fsl,pull-up = <MXS_PULL_DISABLE>;
324 auart1_2pins_a: auart1-2pins@0 {
327 MX28_PAD_AUART1_RX__AUART1_RX
328 MX28_PAD_AUART1_TX__AUART1_TX
330 fsl,drive-strength = <MXS_DRIVE_4mA>;
331 fsl,voltage = <MXS_VOLTAGE_HIGH>;
332 fsl,pull-up = <MXS_PULL_DISABLE>;
335 auart2_2pins_a: auart2-2pins@0 {
338 MX28_PAD_SSP2_SCK__AUART2_RX
339 MX28_PAD_SSP2_MOSI__AUART2_TX
341 fsl,drive-strength = <MXS_DRIVE_4mA>;
342 fsl,voltage = <MXS_VOLTAGE_HIGH>;
343 fsl,pull-up = <MXS_PULL_DISABLE>;
346 auart2_2pins_b: auart2-2pins@1 {
349 MX28_PAD_AUART2_RX__AUART2_RX
350 MX28_PAD_AUART2_TX__AUART2_TX
352 fsl,drive-strength = <MXS_DRIVE_4mA>;
353 fsl,voltage = <MXS_VOLTAGE_HIGH>;
354 fsl,pull-up = <MXS_PULL_DISABLE>;
357 auart2_pins_a: auart2-pins@0 {
360 MX28_PAD_AUART2_RX__AUART2_RX
361 MX28_PAD_AUART2_TX__AUART2_TX
362 MX28_PAD_AUART2_CTS__AUART2_CTS
363 MX28_PAD_AUART2_RTS__AUART2_RTS
365 fsl,drive-strength = <MXS_DRIVE_4mA>;
366 fsl,voltage = <MXS_VOLTAGE_HIGH>;
367 fsl,pull-up = <MXS_PULL_DISABLE>;
370 auart3_pins_a: auart3@0 {
373 MX28_PAD_AUART3_RX__AUART3_RX
374 MX28_PAD_AUART3_TX__AUART3_TX
375 MX28_PAD_AUART3_CTS__AUART3_CTS
376 MX28_PAD_AUART3_RTS__AUART3_RTS
378 fsl,drive-strength = <MXS_DRIVE_4mA>;
379 fsl,voltage = <MXS_VOLTAGE_HIGH>;
380 fsl,pull-up = <MXS_PULL_DISABLE>;
383 auart3_2pins_a: auart3-2pins@0 {
386 MX28_PAD_SSP2_MISO__AUART3_RX
387 MX28_PAD_SSP2_SS0__AUART3_TX
389 fsl,drive-strength = <MXS_DRIVE_4mA>;
390 fsl,voltage = <MXS_VOLTAGE_HIGH>;
391 fsl,pull-up = <MXS_PULL_DISABLE>;
394 auart3_2pins_b: auart3-2pins@1 {
397 MX28_PAD_AUART3_RX__AUART3_RX
398 MX28_PAD_AUART3_TX__AUART3_TX
400 fsl,drive-strength = <MXS_DRIVE_4mA>;
401 fsl,voltage = <MXS_VOLTAGE_HIGH>;
402 fsl,pull-up = <MXS_PULL_DISABLE>;
405 auart4_2pins_a: auart4@0 {
408 MX28_PAD_SSP3_SCK__AUART4_TX
409 MX28_PAD_SSP3_MOSI__AUART4_RX
411 fsl,drive-strength = <MXS_DRIVE_4mA>;
412 fsl,voltage = <MXS_VOLTAGE_HIGH>;
413 fsl,pull-up = <MXS_PULL_DISABLE>;
416 auart4_2pins_b: auart4@1 {
419 MX28_PAD_AUART0_CTS__AUART4_RX
420 MX28_PAD_AUART0_RTS__AUART4_TX
422 fsl,drive-strength = <MXS_DRIVE_4mA>;
423 fsl,voltage = <MXS_VOLTAGE_HIGH>;
424 fsl,pull-up = <MXS_PULL_DISABLE>;
427 mac0_pins_a: mac0@0 {
430 MX28_PAD_ENET0_MDC__ENET0_MDC
431 MX28_PAD_ENET0_MDIO__ENET0_MDIO
432 MX28_PAD_ENET0_RX_EN__ENET0_RX_EN
433 MX28_PAD_ENET0_RXD0__ENET0_RXD0
434 MX28_PAD_ENET0_RXD1__ENET0_RXD1
435 MX28_PAD_ENET0_TX_EN__ENET0_TX_EN
436 MX28_PAD_ENET0_TXD0__ENET0_TXD0
437 MX28_PAD_ENET0_TXD1__ENET0_TXD1
438 MX28_PAD_ENET_CLK__CLKCTRL_ENET
440 fsl,drive-strength = <MXS_DRIVE_8mA>;
441 fsl,voltage = <MXS_VOLTAGE_HIGH>;
442 fsl,pull-up = <MXS_PULL_ENABLE>;
445 mac0_pins_b: mac0@1 {
448 MX28_PAD_ENET0_MDC__ENET0_MDC
449 MX28_PAD_ENET0_MDIO__ENET0_MDIO
450 MX28_PAD_ENET0_RX_EN__ENET0_RX_EN
451 MX28_PAD_ENET0_RXD0__ENET0_RXD0
452 MX28_PAD_ENET0_RXD1__ENET0_RXD1
453 MX28_PAD_ENET0_RXD2__ENET0_RXD2
454 MX28_PAD_ENET0_RXD3__ENET0_RXD3
455 MX28_PAD_ENET0_TX_EN__ENET0_TX_EN
456 MX28_PAD_ENET0_TXD0__ENET0_TXD0
457 MX28_PAD_ENET0_TXD1__ENET0_TXD1
458 MX28_PAD_ENET0_TXD2__ENET0_TXD2
459 MX28_PAD_ENET0_TXD3__ENET0_TXD3
460 MX28_PAD_ENET_CLK__CLKCTRL_ENET
461 MX28_PAD_ENET0_COL__ENET0_COL
462 MX28_PAD_ENET0_CRS__ENET0_CRS
463 MX28_PAD_ENET0_TX_CLK__ENET0_TX_CLK
464 MX28_PAD_ENET0_RX_CLK__ENET0_RX_CLK
466 fsl,drive-strength = <MXS_DRIVE_8mA>;
467 fsl,voltage = <MXS_VOLTAGE_HIGH>;
468 fsl,pull-up = <MXS_PULL_ENABLE>;
471 mac1_pins_a: mac1@0 {
474 MX28_PAD_ENET0_CRS__ENET1_RX_EN
475 MX28_PAD_ENET0_RXD2__ENET1_RXD0
476 MX28_PAD_ENET0_RXD3__ENET1_RXD1
477 MX28_PAD_ENET0_COL__ENET1_TX_EN
478 MX28_PAD_ENET0_TXD2__ENET1_TXD0
479 MX28_PAD_ENET0_TXD3__ENET1_TXD1
481 fsl,drive-strength = <MXS_DRIVE_8mA>;
482 fsl,voltage = <MXS_VOLTAGE_HIGH>;
483 fsl,pull-up = <MXS_PULL_ENABLE>;
486 mmc0_8bit_pins_a: mmc0-8bit@0 {
489 MX28_PAD_SSP0_DATA0__SSP0_D0
490 MX28_PAD_SSP0_DATA1__SSP0_D1
491 MX28_PAD_SSP0_DATA2__SSP0_D2
492 MX28_PAD_SSP0_DATA3__SSP0_D3
493 MX28_PAD_SSP0_DATA4__SSP0_D4
494 MX28_PAD_SSP0_DATA5__SSP0_D5
495 MX28_PAD_SSP0_DATA6__SSP0_D6
496 MX28_PAD_SSP0_DATA7__SSP0_D7
497 MX28_PAD_SSP0_CMD__SSP0_CMD
498 MX28_PAD_SSP0_DETECT__SSP0_CARD_DETECT
499 MX28_PAD_SSP0_SCK__SSP0_SCK
501 fsl,drive-strength = <MXS_DRIVE_8mA>;
502 fsl,voltage = <MXS_VOLTAGE_HIGH>;
503 fsl,pull-up = <MXS_PULL_ENABLE>;
506 mmc0_4bit_pins_a: mmc0-4bit@0 {
509 MX28_PAD_SSP0_DATA0__SSP0_D0
510 MX28_PAD_SSP0_DATA1__SSP0_D1
511 MX28_PAD_SSP0_DATA2__SSP0_D2
512 MX28_PAD_SSP0_DATA3__SSP0_D3
513 MX28_PAD_SSP0_CMD__SSP0_CMD
514 MX28_PAD_SSP0_DETECT__SSP0_CARD_DETECT
515 MX28_PAD_SSP0_SCK__SSP0_SCK
517 fsl,drive-strength = <MXS_DRIVE_8mA>;
518 fsl,voltage = <MXS_VOLTAGE_HIGH>;
519 fsl,pull-up = <MXS_PULL_ENABLE>;
522 mmc0_cd_cfg: mmc0-cd-cfg@0 {
525 MX28_PAD_SSP0_DETECT__SSP0_CARD_DETECT
527 fsl,pull-up = <MXS_PULL_DISABLE>;
530 mmc0_sck_cfg: mmc0-sck-cfg@0 {
533 MX28_PAD_SSP0_SCK__SSP0_SCK
535 fsl,drive-strength = <MXS_DRIVE_12mA>;
536 fsl,pull-up = <MXS_PULL_DISABLE>;
539 mmc1_4bit_pins_a: mmc1-4bit@0 {
542 MX28_PAD_GPMI_D00__SSP1_D0
543 MX28_PAD_GPMI_D01__SSP1_D1
544 MX28_PAD_GPMI_D02__SSP1_D2
545 MX28_PAD_GPMI_D03__SSP1_D3
546 MX28_PAD_GPMI_RDY1__SSP1_CMD
547 MX28_PAD_GPMI_RDY0__SSP1_CARD_DETECT
548 MX28_PAD_GPMI_WRN__SSP1_SCK
550 fsl,drive-strength = <MXS_DRIVE_8mA>;
551 fsl,voltage = <MXS_VOLTAGE_HIGH>;
552 fsl,pull-up = <MXS_PULL_ENABLE>;
555 mmc1_cd_cfg: mmc1-cd-cfg@0 {
558 MX28_PAD_GPMI_RDY0__SSP1_CARD_DETECT
560 fsl,pull-up = <MXS_PULL_DISABLE>;
563 mmc1_sck_cfg: mmc1-sck-cfg@0 {
566 MX28_PAD_GPMI_WRN__SSP1_SCK
568 fsl,drive-strength = <MXS_DRIVE_12mA>;
569 fsl,pull-up = <MXS_PULL_DISABLE>;
573 mmc2_4bit_pins_a: mmc2-4bit@0 {
576 MX28_PAD_SSP0_DATA4__SSP2_D0
577 MX28_PAD_SSP1_SCK__SSP2_D1
578 MX28_PAD_SSP1_CMD__SSP2_D2
579 MX28_PAD_SSP0_DATA5__SSP2_D3
580 MX28_PAD_SSP0_DATA6__SSP2_CMD
581 MX28_PAD_AUART1_RX__SSP2_CARD_DETECT
582 MX28_PAD_SSP0_DATA7__SSP2_SCK
584 fsl,drive-strength = <MXS_DRIVE_8mA>;
585 fsl,voltage = <MXS_VOLTAGE_HIGH>;
586 fsl,pull-up = <MXS_PULL_ENABLE>;
589 mmc2_4bit_pins_b: mmc2-4bit@1 {
592 MX28_PAD_SSP2_SCK__SSP2_SCK
593 MX28_PAD_SSP2_MOSI__SSP2_CMD
594 MX28_PAD_SSP2_MISO__SSP2_D0
595 MX28_PAD_SSP2_SS0__SSP2_D3
596 MX28_PAD_SSP2_SS1__SSP2_D1
597 MX28_PAD_SSP2_SS2__SSP2_D2
598 MX28_PAD_AUART1_RX__SSP2_CARD_DETECT
600 fsl,drive-strength = <MXS_DRIVE_8mA>;
601 fsl,voltage = <MXS_VOLTAGE_HIGH>;
602 fsl,pull-up = <MXS_PULL_ENABLE>;
605 mmc2_cd_cfg: mmc2-cd-cfg@0 {
608 MX28_PAD_AUART1_RX__SSP2_CARD_DETECT
610 fsl,pull-up = <MXS_PULL_DISABLE>;
613 mmc2_sck_cfg_a: mmc2-sck-cfg@0 {
616 MX28_PAD_SSP0_DATA7__SSP2_SCK
618 fsl,drive-strength = <MXS_DRIVE_12mA>;
619 fsl,pull-up = <MXS_PULL_DISABLE>;
622 mmc2_sck_cfg_b: mmc2-sck-cfg@1 {
625 MX28_PAD_SSP2_SCK__SSP2_SCK
627 fsl,drive-strength = <MXS_DRIVE_12mA>;
628 fsl,pull-up = <MXS_PULL_DISABLE>;
631 i2c0_pins_a: i2c0@0 {
634 MX28_PAD_I2C0_SCL__I2C0_SCL
635 MX28_PAD_I2C0_SDA__I2C0_SDA
637 fsl,drive-strength = <MXS_DRIVE_8mA>;
638 fsl,voltage = <MXS_VOLTAGE_HIGH>;
639 fsl,pull-up = <MXS_PULL_ENABLE>;
642 i2c0_pins_b: i2c0@1 {
645 MX28_PAD_AUART0_RX__I2C0_SCL
646 MX28_PAD_AUART0_TX__I2C0_SDA
648 fsl,drive-strength = <MXS_DRIVE_8mA>;
649 fsl,voltage = <MXS_VOLTAGE_HIGH>;
650 fsl,pull-up = <MXS_PULL_ENABLE>;
653 i2c1_pins_a: i2c1@0 {
656 MX28_PAD_PWM0__I2C1_SCL
657 MX28_PAD_PWM1__I2C1_SDA
659 fsl,drive-strength = <MXS_DRIVE_8mA>;
660 fsl,voltage = <MXS_VOLTAGE_HIGH>;
661 fsl,pull-up = <MXS_PULL_ENABLE>;
664 i2c1_pins_b: i2c1@1 {
667 MX28_PAD_AUART2_CTS__I2C1_SCL
668 MX28_PAD_AUART2_RTS__I2C1_SDA
670 fsl,drive-strength = <MXS_DRIVE_8mA>;
671 fsl,voltage = <MXS_VOLTAGE_HIGH>;
672 fsl,pull-up = <MXS_PULL_ENABLE>;
675 saif0_pins_a: saif0@0 {
678 MX28_PAD_SAIF0_MCLK__SAIF0_MCLK
679 MX28_PAD_SAIF0_LRCLK__SAIF0_LRCLK
680 MX28_PAD_SAIF0_BITCLK__SAIF0_BITCLK
681 MX28_PAD_SAIF0_SDATA0__SAIF0_SDATA0
683 fsl,drive-strength = <MXS_DRIVE_12mA>;
684 fsl,voltage = <MXS_VOLTAGE_HIGH>;
685 fsl,pull-up = <MXS_PULL_ENABLE>;
688 saif0_pins_b: saif0@1 {
691 MX28_PAD_SAIF0_LRCLK__SAIF0_LRCLK
692 MX28_PAD_SAIF0_BITCLK__SAIF0_BITCLK
693 MX28_PAD_SAIF0_SDATA0__SAIF0_SDATA0
695 fsl,drive-strength = <MXS_DRIVE_12mA>;
696 fsl,voltage = <MXS_VOLTAGE_HIGH>;
697 fsl,pull-up = <MXS_PULL_ENABLE>;
700 saif1_pins_a: saif1@0 {
703 MX28_PAD_SAIF1_SDATA0__SAIF1_SDATA0
705 fsl,drive-strength = <MXS_DRIVE_12mA>;
706 fsl,voltage = <MXS_VOLTAGE_HIGH>;
707 fsl,pull-up = <MXS_PULL_ENABLE>;
710 pwm0_pins_a: pwm0@0 {
715 fsl,drive-strength = <MXS_DRIVE_4mA>;
716 fsl,voltage = <MXS_VOLTAGE_HIGH>;
717 fsl,pull-up = <MXS_PULL_DISABLE>;
720 pwm2_pins_a: pwm2@0 {
725 fsl,drive-strength = <MXS_DRIVE_4mA>;
726 fsl,voltage = <MXS_VOLTAGE_HIGH>;
727 fsl,pull-up = <MXS_PULL_DISABLE>;
730 pwm3_pins_a: pwm3@0 {
735 fsl,drive-strength = <MXS_DRIVE_4mA>;
736 fsl,voltage = <MXS_VOLTAGE_HIGH>;
737 fsl,pull-up = <MXS_PULL_DISABLE>;
740 pwm3_pins_b: pwm3@1 {
743 MX28_PAD_SAIF0_MCLK__PWM_3
745 fsl,drive-strength = <MXS_DRIVE_4mA>;
746 fsl,voltage = <MXS_VOLTAGE_HIGH>;
747 fsl,pull-up = <MXS_PULL_DISABLE>;
750 pwm4_pins_a: pwm4@0 {
755 fsl,drive-strength = <MXS_DRIVE_4mA>;
756 fsl,voltage = <MXS_VOLTAGE_HIGH>;
757 fsl,pull-up = <MXS_PULL_DISABLE>;
760 lcdif_24bit_pins_a: lcdif-24bit@0 {
763 MX28_PAD_LCD_D00__LCD_D0
764 MX28_PAD_LCD_D01__LCD_D1
765 MX28_PAD_LCD_D02__LCD_D2
766 MX28_PAD_LCD_D03__LCD_D3
767 MX28_PAD_LCD_D04__LCD_D4
768 MX28_PAD_LCD_D05__LCD_D5
769 MX28_PAD_LCD_D06__LCD_D6
770 MX28_PAD_LCD_D07__LCD_D7
771 MX28_PAD_LCD_D08__LCD_D8
772 MX28_PAD_LCD_D09__LCD_D9
773 MX28_PAD_LCD_D10__LCD_D10
774 MX28_PAD_LCD_D11__LCD_D11
775 MX28_PAD_LCD_D12__LCD_D12
776 MX28_PAD_LCD_D13__LCD_D13
777 MX28_PAD_LCD_D14__LCD_D14
778 MX28_PAD_LCD_D15__LCD_D15
779 MX28_PAD_LCD_D16__LCD_D16
780 MX28_PAD_LCD_D17__LCD_D17
781 MX28_PAD_LCD_D18__LCD_D18
782 MX28_PAD_LCD_D19__LCD_D19
783 MX28_PAD_LCD_D20__LCD_D20
784 MX28_PAD_LCD_D21__LCD_D21
785 MX28_PAD_LCD_D22__LCD_D22
786 MX28_PAD_LCD_D23__LCD_D23
788 fsl,drive-strength = <MXS_DRIVE_4mA>;
789 fsl,voltage = <MXS_VOLTAGE_HIGH>;
790 fsl,pull-up = <MXS_PULL_DISABLE>;
793 lcdif_18bit_pins_a: lcdif-18bit@0 {
796 MX28_PAD_LCD_D00__LCD_D0
797 MX28_PAD_LCD_D01__LCD_D1
798 MX28_PAD_LCD_D02__LCD_D2
799 MX28_PAD_LCD_D03__LCD_D3
800 MX28_PAD_LCD_D04__LCD_D4
801 MX28_PAD_LCD_D05__LCD_D5
802 MX28_PAD_LCD_D06__LCD_D6
803 MX28_PAD_LCD_D07__LCD_D7
804 MX28_PAD_LCD_D08__LCD_D8
805 MX28_PAD_LCD_D09__LCD_D9
806 MX28_PAD_LCD_D10__LCD_D10
807 MX28_PAD_LCD_D11__LCD_D11
808 MX28_PAD_LCD_D12__LCD_D12
809 MX28_PAD_LCD_D13__LCD_D13
810 MX28_PAD_LCD_D14__LCD_D14
811 MX28_PAD_LCD_D15__LCD_D15
812 MX28_PAD_LCD_D16__LCD_D16
813 MX28_PAD_LCD_D17__LCD_D17
815 fsl,drive-strength = <MXS_DRIVE_4mA>;
816 fsl,voltage = <MXS_VOLTAGE_HIGH>;
817 fsl,pull-up = <MXS_PULL_DISABLE>;
820 lcdif_16bit_pins_a: lcdif-16bit@0 {
823 MX28_PAD_LCD_D00__LCD_D0
824 MX28_PAD_LCD_D01__LCD_D1
825 MX28_PAD_LCD_D02__LCD_D2
826 MX28_PAD_LCD_D03__LCD_D3
827 MX28_PAD_LCD_D04__LCD_D4
828 MX28_PAD_LCD_D05__LCD_D5
829 MX28_PAD_LCD_D06__LCD_D6
830 MX28_PAD_LCD_D07__LCD_D7
831 MX28_PAD_LCD_D08__LCD_D8
832 MX28_PAD_LCD_D09__LCD_D9
833 MX28_PAD_LCD_D10__LCD_D10
834 MX28_PAD_LCD_D11__LCD_D11
835 MX28_PAD_LCD_D12__LCD_D12
836 MX28_PAD_LCD_D13__LCD_D13
837 MX28_PAD_LCD_D14__LCD_D14
838 MX28_PAD_LCD_D15__LCD_D15
840 fsl,drive-strength = <MXS_DRIVE_4mA>;
841 fsl,voltage = <MXS_VOLTAGE_HIGH>;
842 fsl,pull-up = <MXS_PULL_DISABLE>;
845 lcdif_sync_pins_a: lcdif-sync@0 {
848 MX28_PAD_LCD_RS__LCD_DOTCLK
849 MX28_PAD_LCD_CS__LCD_ENABLE
850 MX28_PAD_LCD_RD_E__LCD_VSYNC
851 MX28_PAD_LCD_WR_RWN__LCD_HSYNC
853 fsl,drive-strength = <MXS_DRIVE_4mA>;
854 fsl,voltage = <MXS_VOLTAGE_HIGH>;
855 fsl,pull-up = <MXS_PULL_DISABLE>;
858 can0_pins_a: can0@0 {
861 MX28_PAD_GPMI_RDY2__CAN0_TX
862 MX28_PAD_GPMI_RDY3__CAN0_RX
864 fsl,drive-strength = <MXS_DRIVE_4mA>;
865 fsl,voltage = <MXS_VOLTAGE_HIGH>;
866 fsl,pull-up = <MXS_PULL_DISABLE>;
869 can1_pins_a: can1@0 {
872 MX28_PAD_GPMI_CE2N__CAN1_TX
873 MX28_PAD_GPMI_CE3N__CAN1_RX
875 fsl,drive-strength = <MXS_DRIVE_4mA>;
876 fsl,voltage = <MXS_VOLTAGE_HIGH>;
877 fsl,pull-up = <MXS_PULL_DISABLE>;
880 spi2_pins_a: spi2@0 {
883 MX28_PAD_SSP2_SCK__SSP2_SCK
884 MX28_PAD_SSP2_MOSI__SSP2_CMD
885 MX28_PAD_SSP2_MISO__SSP2_D0
886 MX28_PAD_SSP2_SS0__SSP2_D3
888 fsl,drive-strength = <MXS_DRIVE_8mA>;
889 fsl,voltage = <MXS_VOLTAGE_HIGH>;
890 fsl,pull-up = <MXS_PULL_ENABLE>;
893 spi3_pins_a: spi3@0 {
896 MX28_PAD_AUART2_RX__SSP3_D4
897 MX28_PAD_AUART2_TX__SSP3_D5
898 MX28_PAD_SSP3_SCK__SSP3_SCK
899 MX28_PAD_SSP3_MOSI__SSP3_CMD
900 MX28_PAD_SSP3_MISO__SSP3_D0
901 MX28_PAD_SSP3_SS0__SSP3_D3
903 fsl,drive-strength = <MXS_DRIVE_8mA>;
904 fsl,voltage = <MXS_VOLTAGE_HIGH>;
905 fsl,pull-up = <MXS_PULL_DISABLE>;
908 spi3_pins_b: spi3@1 {
911 MX28_PAD_SSP3_SCK__SSP3_SCK
912 MX28_PAD_SSP3_MOSI__SSP3_CMD
913 MX28_PAD_SSP3_MISO__SSP3_D0
914 MX28_PAD_SSP3_SS0__SSP3_D3
916 fsl,drive-strength = <MXS_DRIVE_8mA>;
917 fsl,voltage = <MXS_VOLTAGE_HIGH>;
918 fsl,pull-up = <MXS_PULL_ENABLE>;
921 usb0_pins_a: usb0@0 {
924 MX28_PAD_SSP2_SS2__USB0_OVERCURRENT
926 fsl,drive-strength = <MXS_DRIVE_12mA>;
927 fsl,voltage = <MXS_VOLTAGE_HIGH>;
928 fsl,pull-up = <MXS_PULL_DISABLE>;
931 usb0_pins_b: usb0@1 {
934 MX28_PAD_AUART1_CTS__USB0_OVERCURRENT
936 fsl,drive-strength = <MXS_DRIVE_12mA>;
937 fsl,voltage = <MXS_VOLTAGE_HIGH>;
938 fsl,pull-up = <MXS_PULL_DISABLE>;
941 usb1_pins_a: usb1@0 {
944 MX28_PAD_SSP2_SS1__USB1_OVERCURRENT
946 fsl,drive-strength = <MXS_DRIVE_12mA>;
947 fsl,voltage = <MXS_VOLTAGE_HIGH>;
948 fsl,pull-up = <MXS_PULL_DISABLE>;
951 usb0_id_pins_a: usb0id@0 {
954 MX28_PAD_AUART1_RTS__USB0_ID
956 fsl,drive-strength = <MXS_DRIVE_12mA>;
957 fsl,voltage = <MXS_VOLTAGE_HIGH>;
958 fsl,pull-up = <MXS_PULL_ENABLE>;
961 usb0_id_pins_b: usb0id1@0 {
964 MX28_PAD_PWM2__USB0_ID
966 fsl,drive-strength = <MXS_DRIVE_12mA>;
967 fsl,voltage = <MXS_VOLTAGE_HIGH>;
968 fsl,pull-up = <MXS_PULL_ENABLE>;
973 digctl: digctl@8001c000 {
974 compatible = "fsl,imx28-digctl", "fsl,imx23-digctl";
975 reg = <0x8001c000 0x2000>;
981 reg = <0x80022000 0x2000>;
985 dma_apbx: dma-apbx@80024000 {
986 compatible = "fsl,imx28-dma-apbx";
987 reg = <0x80024000 0x2000>;
988 interrupts = <78 79 66 0
992 interrupt-names = "auart4-rx", "auart4-tx", "spdif-tx", "empty",
993 "saif0", "saif1", "i2c0", "i2c1",
994 "auart0-rx", "auart0-tx", "auart1-rx", "auart1-tx",
995 "auart2-rx", "auart2-tx", "auart3-rx", "auart3-tx";
1001 dcp: crypto@80028000 {
1002 compatible = "fsl,imx28-dcp", "fsl,imx23-dcp";
1003 reg = <0x80028000 0x2000>;
1004 interrupts = <52 53 54>;
1009 reg = <0x8002a000 0x2000>;
1011 status = "disabled";
1014 ocotp: efuse@8002c000 {
1015 compatible = "fsl,imx28-ocotp", "fsl,ocotp";
1016 #address-cells = <1>;
1018 reg = <0x8002c000 0x2000>;
1019 clocks = <&clks 25>;
1023 reg = <0x8002e000 0x2000>;
1024 status = "disabled";
1027 lcdif: lcdif@80030000 {
1028 compatible = "fsl,imx28-lcdif";
1029 reg = <0x80030000 0x2000>;
1031 clocks = <&clks 55>;
1032 dmas = <&dma_apbh 13>;
1034 status = "disabled";
1037 can0: can@80032000 {
1038 compatible = "fsl,imx28-flexcan";
1039 reg = <0x80032000 0x2000>;
1041 clocks = <&clks 58>, <&clks 58>;
1042 clock-names = "ipg", "per";
1043 status = "disabled";
1046 can1: can@80034000 {
1047 compatible = "fsl,imx28-flexcan";
1048 reg = <0x80034000 0x2000>;
1050 clocks = <&clks 59>, <&clks 59>;
1051 clock-names = "ipg", "per";
1052 status = "disabled";
1055 simdbg: simdbg@8003c000 {
1056 reg = <0x8003c000 0x200>;
1057 status = "disabled";
1060 simgpmisel: simgpmisel@8003c200 {
1061 reg = <0x8003c200 0x100>;
1062 status = "disabled";
1065 simsspsel: simsspsel@8003c300 {
1066 reg = <0x8003c300 0x100>;
1067 status = "disabled";
1070 simmemsel: simmemsel@8003c400 {
1071 reg = <0x8003c400 0x100>;
1072 status = "disabled";
1075 gpiomon: gpiomon@8003c500 {
1076 reg = <0x8003c500 0x100>;
1077 status = "disabled";
1080 simenet: simenet@8003c700 {
1081 reg = <0x8003c700 0x100>;
1082 status = "disabled";
1085 armjtag: armjtag@8003c800 {
1086 reg = <0x8003c800 0x100>;
1087 status = "disabled";
1092 compatible = "simple-bus";
1093 #address-cells = <1>;
1095 reg = <0x80040000 0x40000>;
1098 clks: clkctrl@80040000 {
1099 compatible = "fsl,imx28-clkctrl", "fsl,clkctrl";
1100 reg = <0x80040000 0x2000>;
1104 saif0: saif@80042000 {
1105 #sound-dai-cells = <0>;
1106 compatible = "fsl,imx28-saif";
1107 reg = <0x80042000 0x2000>;
1110 clocks = <&clks 53>;
1111 dmas = <&dma_apbx 4>;
1112 dma-names = "rx-tx";
1113 status = "disabled";
1116 power: power@80044000 {
1117 reg = <0x80044000 0x2000>;
1118 status = "disabled";
1121 saif1: saif@80046000 {
1122 #sound-dai-cells = <0>;
1123 compatible = "fsl,imx28-saif";
1124 reg = <0x80046000 0x2000>;
1126 clocks = <&clks 54>;
1127 dmas = <&dma_apbx 5>;
1128 dma-names = "rx-tx";
1129 status = "disabled";
1132 lradc: lradc@80050000 {
1133 compatible = "fsl,imx28-lradc";
1134 reg = <0x80050000 0x2000>;
1135 interrupts = <10 14 15 16 17 18 19
1137 status = "disabled";
1138 clocks = <&clks 41>;
1139 #io-channel-cells = <1>;
1142 spdif: spdif@80054000 {
1143 reg = <0x80054000 0x2000>;
1145 dmas = <&dma_apbx 2>;
1147 status = "disabled";
1150 mxs_rtc: rtc@80056000 {
1151 compatible = "fsl,imx28-rtc", "fsl,stmp3xxx-rtc";
1152 reg = <0x80056000 0x2000>;
1156 i2c0: i2c@80058000 {
1157 #address-cells = <1>;
1159 compatible = "fsl,imx28-i2c";
1160 reg = <0x80058000 0x2000>;
1162 clock-frequency = <100000>;
1163 dmas = <&dma_apbx 6>;
1164 dma-names = "rx-tx";
1165 status = "disabled";
1168 i2c1: i2c@8005a000 {
1169 #address-cells = <1>;
1171 compatible = "fsl,imx28-i2c";
1172 reg = <0x8005a000 0x2000>;
1174 clock-frequency = <100000>;
1175 dmas = <&dma_apbx 7>;
1176 dma-names = "rx-tx";
1177 status = "disabled";
1181 compatible = "fsl,imx28-pwm", "fsl,imx23-pwm";
1182 reg = <0x80064000 0x2000>;
1183 clocks = <&clks 44>;
1185 fsl,pwm-number = <8>;
1186 status = "disabled";
1189 timer: timrot@80068000 {
1190 compatible = "fsl,imx28-timrot", "fsl,timrot";
1191 reg = <0x80068000 0x2000>;
1192 interrupts = <48 49 50 51>;
1193 clocks = <&clks 26>;
1196 auart0: serial@8006a000 {
1197 compatible = "fsl,imx28-auart", "fsl,imx23-auart";
1198 reg = <0x8006a000 0x2000>;
1200 dmas = <&dma_apbx 8>, <&dma_apbx 9>;
1201 dma-names = "rx", "tx";
1202 clocks = <&clks 45>;
1203 status = "disabled";
1206 auart1: serial@8006c000 {
1207 compatible = "fsl,imx28-auart", "fsl,imx23-auart";
1208 reg = <0x8006c000 0x2000>;
1210 dmas = <&dma_apbx 10>, <&dma_apbx 11>;
1211 dma-names = "rx", "tx";
1212 clocks = <&clks 45>;
1213 status = "disabled";
1216 auart2: serial@8006e000 {
1217 compatible = "fsl,imx28-auart", "fsl,imx23-auart";
1218 reg = <0x8006e000 0x2000>;
1220 dmas = <&dma_apbx 12>, <&dma_apbx 13>;
1221 dma-names = "rx", "tx";
1222 clocks = <&clks 45>;
1223 status = "disabled";
1226 auart3: serial@80070000 {
1227 compatible = "fsl,imx28-auart", "fsl,imx23-auart";
1228 reg = <0x80070000 0x2000>;
1230 dmas = <&dma_apbx 14>, <&dma_apbx 15>;
1231 dma-names = "rx", "tx";
1232 clocks = <&clks 45>;
1233 status = "disabled";
1236 auart4: serial@80072000 {
1237 compatible = "fsl,imx28-auart", "fsl,imx23-auart";
1238 reg = <0x80072000 0x2000>;
1240 dmas = <&dma_apbx 0>, <&dma_apbx 1>;
1241 dma-names = "rx", "tx";
1242 clocks = <&clks 45>;
1243 status = "disabled";
1246 duart: serial@80074000 {
1247 compatible = "arm,pl011", "arm,primecell";
1248 reg = <0x80074000 0x1000>;
1250 clocks = <&clks 45>, <&clks 26>;
1251 clock-names = "uart", "apb_pclk";
1252 status = "disabled";
1255 usbphy0: usbphy@8007c000 {
1256 compatible = "fsl,imx28-usbphy", "fsl,imx23-usbphy";
1257 reg = <0x8007c000 0x2000>;
1258 clocks = <&clks 62>;
1259 status = "disabled";
1262 usbphy1: usbphy@8007e000 {
1263 compatible = "fsl,imx28-usbphy", "fsl,imx23-usbphy";
1264 reg = <0x8007e000 0x2000>;
1265 clocks = <&clks 63>;
1266 status = "disabled";
1272 compatible = "simple-bus";
1273 #address-cells = <1>;
1275 reg = <0x80080000 0x80000>;
1278 usb0: usb@80080000 {
1279 compatible = "fsl,imx28-usb", "fsl,imx27-usb";
1280 reg = <0x80080000 0x10000>;
1282 clocks = <&clks 60>;
1283 fsl,usbphy = <&usbphy0>;
1284 status = "disabled";
1287 usb1: usb@80090000 {
1288 compatible = "fsl,imx28-usb", "fsl,imx27-usb";
1289 reg = <0x80090000 0x10000>;
1291 clocks = <&clks 61>;
1292 fsl,usbphy = <&usbphy1>;
1294 status = "disabled";
1297 dflpt: dflpt@800c0000 {
1298 reg = <0x800c0000 0x10000>;
1299 status = "disabled";
1302 mac0: ethernet@800f0000 {
1303 compatible = "fsl,imx28-fec";
1304 reg = <0x800f0000 0x4000>;
1306 clocks = <&clks 57>, <&clks 57>, <&clks 64>;
1307 clock-names = "ipg", "ahb", "enet_out";
1308 status = "disabled";
1311 mac1: ethernet@800f4000 {
1312 compatible = "fsl,imx28-fec";
1313 reg = <0x800f4000 0x4000>;
1315 clocks = <&clks 57>, <&clks 57>;
1316 clock-names = "ipg", "ahb";
1317 status = "disabled";
1320 eth_switch: switch@800f8000 {
1321 reg = <0x800f8000 0x8000>;
1322 status = "disabled";
1327 compatible = "iio-hwmon";
1328 io-channels = <&lradc 8>;