1 // SPDX-License-Identifier: GPL-2.0+
3 // Copyright (C) 2014 Alexander Shiyan <shc_work@mail.ru>
5 #include "imx1-pinfunc.h"
7 #include <dt-bindings/clock/imx1-clock.h>
8 #include <dt-bindings/gpio/gpio.h>
9 #include <dt-bindings/interrupt-controller/irq.h>
15 * The decompressor and also some bootloaders rely on a
16 * pre-existing /chosen node to be available to insert the
17 * command line and merge other ATAGS info.
18 * Also for U-Boot there must be a pre-existing /memory node.
21 memory { device_type = "memory"; };
36 aitc: aitc-interrupt-controller@223000 {
37 compatible = "fsl,imx1-aitc", "fsl,avic";
39 #interrupt-cells = <1>;
40 reg = <0x00223000 0x1000>;
50 compatible = "arm,arm920t";
51 operating-points = <200000 1900000>;
52 clock-latency = <62500>;
53 clocks = <&clks IMX1_CLK_MCU>;
54 voltage-tolerance = <5>;
60 compatible = "fsl,imx-clk32", "fixed-clock";
62 clock-frequency = <32000>;
69 compatible = "simple-bus";
70 interrupt-parent = <&aitc>;
74 compatible = "fsl,aipi-bus", "simple-bus";
77 reg = <0x00200000 0x10000>;
81 compatible = "fsl,imx1-gpt";
82 reg = <0x00202000 0x1000>;
84 clocks = <&clks IMX1_CLK_HCLK>,
85 <&clks IMX1_CLK_PER1>;
86 clock-names = "ipg", "per";
90 compatible = "fsl,imx1-gpt";
91 reg = <0x00203000 0x1000>;
93 clocks = <&clks IMX1_CLK_HCLK>,
94 <&clks IMX1_CLK_PER1>;
95 clock-names = "ipg", "per";
99 compatible = "fsl,imx1-fb";
100 reg = <0x00205000 0x1000>;
102 clocks = <&clks IMX1_CLK_DUMMY>,
103 <&clks IMX1_CLK_DUMMY>,
104 <&clks IMX1_CLK_PER2>;
105 clock-names = "ipg", "ahb", "per";
109 uart1: serial@206000 {
110 compatible = "fsl,imx1-uart";
111 reg = <0x00206000 0x1000>;
112 interrupts = <30 29 26>;
113 clocks = <&clks IMX1_CLK_HCLK>,
114 <&clks IMX1_CLK_PER1>;
115 clock-names = "ipg", "per";
119 uart2: serial@207000 {
120 compatible = "fsl,imx1-uart";
121 reg = <0x00207000 0x1000>;
122 interrupts = <24 23 20>;
123 clocks = <&clks IMX1_CLK_HCLK>,
124 <&clks IMX1_CLK_PER1>;
125 clock-names = "ipg", "per";
131 compatible = "fsl,imx1-pwm";
132 reg = <0x00208000 0x1000>;
134 clocks = <&clks IMX1_CLK_DUMMY>,
135 <&clks IMX1_CLK_PER1>;
136 clock-names = "ipg", "per";
140 compatible = "fsl,imx1-dma";
141 reg = <0x00209000 0x1000>;
142 interrupts = <61 60>;
143 clocks = <&clks IMX1_CLK_HCLK>,
144 <&clks IMX1_CLK_DMA_GATE>;
145 clock-names = "ipg", "ahb";
149 uart3: serial@20a000 {
150 compatible = "fsl,imx1-uart";
151 reg = <0x0020a000 0x1000>;
152 interrupts = <54 4 1>;
153 clocks = <&clks IMX1_CLK_UART3_GATE>,
154 <&clks IMX1_CLK_PER1>;
155 clock-names = "ipg", "per";
161 compatible = "fsl,aipi-bus", "simple-bus";
162 #address-cells = <1>;
164 reg = <0x00210000 0x10000>;
168 #address-cells = <1>;
170 compatible = "fsl,imx1-cspi";
171 reg = <0x00213000 0x1000>;
173 clocks = <&clks IMX1_CLK_DUMMY>,
174 <&clks IMX1_CLK_PER1>;
175 clock-names = "ipg", "per";
180 #address-cells = <1>;
182 compatible = "fsl,imx1-i2c";
183 reg = <0x00217000 0x1000>;
185 clocks = <&clks IMX1_CLK_HCLK>;
190 #address-cells = <1>;
192 compatible = "fsl,imx1-cspi";
193 reg = <0x00219000 0x1000>;
195 clocks = <&clks IMX1_CLK_DUMMY>,
196 <&clks IMX1_CLK_PER1>;
197 clock-names = "ipg", "per";
202 compatible = "fsl,imx1-ccm";
203 reg = <0x0021b000 0x1000>;
207 iomuxc: iomuxc@21c000 {
208 compatible = "fsl,imx1-iomuxc";
209 reg = <0x0021c000 0x1000>;
210 #address-cells = <1>;
215 compatible = "fsl,imx1-gpio";
216 reg = <0x0021c000 0x100>;
220 interrupt-controller;
221 #interrupt-cells = <2>;
225 compatible = "fsl,imx1-gpio";
226 reg = <0x0021c100 0x100>;
230 interrupt-controller;
231 #interrupt-cells = <2>;
235 compatible = "fsl,imx1-gpio";
236 reg = <0x0021c200 0x100>;
240 interrupt-controller;
241 #interrupt-cells = <2>;
245 compatible = "fsl,imx1-gpio";
246 reg = <0x0021c300 0x100>;
250 interrupt-controller;
251 #interrupt-cells = <2>;
257 #address-cells = <2>;
259 compatible = "fsl,imx1-weim";
260 reg = <0x00220000 0x1000>;
261 clocks = <&clks IMX1_CLK_DUMMY>;
263 0 0 0x10000000 0x02000000
264 1 0 0x12000000 0x01000000
265 2 0 0x13000000 0x01000000
266 3 0 0x14000000 0x01000000
267 4 0 0x15000000 0x01000000
268 5 0 0x16000000 0x01000000
273 esram: esram@300000 {
274 compatible = "mmio-sram";
275 reg = <0x00300000 0x20000>;