Merge tag 'mips_fixes_4.21_1' of git://git.kernel.org/pub/scm/linux/kernel/git/mips...
[linux-2.6-microblaze.git] / arch / arm / boot / dts / gemini-sq201.dts
1 // SPDX-License-Identifier: GPL-2.0
2 /*
3  * Device Tree file for ITian Square One SQ201 NAS
4  */
5
6 /dts-v1/;
7
8 #include "gemini.dtsi"
9 #include <dt-bindings/input/input.h>
10
11 / {
12         model = "ITian Square One SQ201";
13         compatible = "itian,sq201", "cortina,gemini";
14         #address-cells = <1>;
15         #size-cells = <1>;
16
17         memory@0 { /* 128 MB */
18                 device_type = "memory";
19                 reg = <0x00000000 0x8000000>;
20         };
21
22         chosen {
23                 bootargs = "console=ttyS0,115200n8 root=/dev/mtdblock2 rw rootfstype=squashfs,jffs2 rootwait";
24                 stdout-path = &uart0;
25         };
26
27         gpio_keys {
28                 compatible = "gpio-keys";
29
30                 button-setup {
31                         debounce-interval = <100>;
32                         wakeup-source;
33                         linux,code = <KEY_SETUP>;
34                         label = "factory reset";
35                         /* Conflict with NAND flash */
36                         gpios = <&gpio0 18 GPIO_ACTIVE_LOW>;
37                 };
38         };
39
40         leds {
41                 compatible = "gpio-leds";
42                 led-green-info {
43                         label = "sq201:green:info";
44                         gpios = <&gpio0 20 GPIO_ACTIVE_HIGH>;
45                         default-state = "on";
46                         linux,default-trigger = "heartbeat";
47                 };
48                 led-green-usb {
49                         label = "sq201:green:usb";
50                         gpios = <&gpio0 31 GPIO_ACTIVE_HIGH>;
51                         default-state = "off";
52                         linux,default-trigger = "usb-host";
53                 };
54         };
55
56         mdio0: mdio {
57                 compatible = "virtual,mdio-gpio";
58                 /* Uses MDC and MDIO */
59                 gpios = <&gpio0 22 GPIO_ACTIVE_HIGH>, /* MDC */
60                         <&gpio0 21 GPIO_ACTIVE_HIGH>; /* MDIO */
61                 #address-cells = <1>;
62                 #size-cells = <0>;
63
64                 /* This is a Marvell 88E1111 ethernet transciever */
65                 phy0: ethernet-phy@1 {
66                         reg = <1>;
67                 };
68         };
69
70         spi {
71                 compatible = "spi-gpio";
72                 #address-cells = <1>;
73                 #size-cells = <0>;
74                 /* Check pin collisions */
75                 gpio-sck = <&gpio1 28 GPIO_ACTIVE_HIGH>;
76                 gpio-miso = <&gpio1 30 GPIO_ACTIVE_HIGH>;
77                 gpio-mosi = <&gpio1 29 GPIO_ACTIVE_HIGH>;
78                 cs-gpios = <&gpio1 31 GPIO_ACTIVE_HIGH>;
79                 num-chipselects = <1>;
80
81                 switch@0 {
82                         compatible = "vitesse,vsc7395";
83                         reg = <0>;
84                         /* Specified for 2.5 MHz or below */
85                         spi-max-frequency = <2500000>;
86                         gpio-controller;
87                         #gpio-cells = <2>;
88
89                         ports {
90                                 #address-cells = <1>;
91                                 #size-cells = <0>;
92
93                                 port@0 {
94                                         reg = <0>;
95                                         label = "lan1";
96                                 };
97                                 port@1 {
98                                         reg = <1>;
99                                         label = "lan2";
100                                 };
101                                 port@2 {
102                                         reg = <2>;
103                                         label = "lan3";
104                                 };
105                                 port@3 {
106                                         reg = <3>;
107                                         label = "lan4";
108                                 };
109                                 vsc: port@6 {
110                                         reg = <6>;
111                                         label = "cpu";
112                                         ethernet = <&gmac1>;
113                                         phy-mode = "rgmii";
114                                         fixed-link {
115                                                 speed = <1000>;
116                                                 full-duplex;
117                                                 pause;
118                                         };
119                                 };
120                         };
121                 };
122         };
123
124
125         soc {
126                 flash@30000000 {
127                         status = "okay";
128                         pinctrl-names = "enabled", "disabled";
129                         pinctrl-0 = <&pflash_default_pins>;
130                         pinctrl-1 = <&pflash_disabled_pins>;
131                         /* 16MB of flash */
132                         reg = <0x30000000 0x01000000>;
133
134                         partitions {
135                                 compatible = "redboot-fis";
136                                 /* Eraseblock at 0xfe0000 */
137                                 fis-index-block = <0x1fc>;
138                         };
139                 };
140
141                 syscon: syscon@40000000 {
142                         pinctrl {
143                                 /*
144                                  * gpio0fgrp cover line 18 used by reset button
145                                  * gpio0ggrp cover line 20 used by info LED
146                                  * gpio0hgrp cover line 21, 22 used by MDIO for Marvell PHY
147                                  * gpio0kgrp cover line 31 used by USB LED
148                                  */
149                                 gpio0_default_pins: pinctrl-gpio0 {
150                                         mux {
151                                                 function = "gpio0";
152                                                 groups = "gpio0fgrp",
153                                                 "gpio0hgrp";
154                                         };
155                                 };
156                                 /*
157                                  * gpio0dgrp cover lines used by the SPI
158                                  * to the Vitesse G5x chip.
159                                  */
160                                 gpio1_default_pins: pinctrl-gpio1 {
161                                         mux {
162                                                 function = "gpio1";
163                                                 groups = "gpio1dgrp";
164                                         };
165                                 };
166                                 /*
167                                  * These GPIO groups will be mapped in over some
168                                  * of the flash pins when the flash is not in
169                                  * active use.
170                                  */
171                                 pflash_disabled_pins: pinctrl-pflash-disabled {
172                                         mux {
173                                                 function = "gpio0";
174                                                 groups = "gpio0ggrp", "gpio0igrp", "gpio0jgrp",
175                                                          "gpio0kgrp";
176                                         };
177                                 };
178                                 pinctrl-gmii {
179                                         mux {
180                                                 function = "gmii";
181                                                 groups = "gmii_gmac0_grp", "gmii_gmac1_grp";
182                                         };
183                                         /* Settings come from memory dump in PLATO */
184                                         conf0 {
185                                                 pins = "V8 GMAC0 RXDV";
186                                                 skew-delay = <0>;
187                                         };
188                                         conf1 {
189                                                 pins = "Y7 GMAC0 RXC";
190                                                 skew-delay = <15>;
191                                         };
192                                         conf2 {
193                                                 pins = "T8 GMAC0 TXEN";
194                                                 skew-delay = <7>;
195                                         };
196                                         conf3 {
197                                                 pins = "U8 GMAC0 TXC";
198                                                 skew-delay = <10>;
199                                         };
200                                         conf4 {
201                                                 pins = "T10 GMAC1 RXDV";
202                                                 skew-delay = <7>;
203                                         };
204                                         conf5 {
205                                                 pins = "Y11 GMAC1 RXC";
206                                                 skew-delay = <8>;
207                                         };
208                                         conf6 {
209                                                 pins = "W11 GMAC1 TXEN";
210                                                 skew-delay = <7>;
211                                         };
212                                         conf7 {
213                                                 pins = "V11 GMAC1 TXC";
214                                                 skew-delay = <5>;
215                                         };
216                                         conf8 {
217                                                 /* The data lines all have default skew */
218                                                 pins = "W8 GMAC0 RXD0", "V9 GMAC0 RXD1",
219                                                        "Y8 GMAC0 RXD2", "U9 GMAC0 RXD3",
220                                                        "T7 GMAC0 TXD0", "U6 GMAC0 TXD1",
221                                                        "V7 GMAC0 TXD2", "U7 GMAC0 TXD3",
222                                                        "Y12 GMAC1 RXD0", "V12 GMAC1 RXD1",
223                                                        "T11 GMAC1 RXD2", "W12 GMAC1 RXD3",
224                                                        "U10 GMAC1 TXD0", "Y10 GMAC1 TXD1",
225                                                        "W10 GMAC1 TXD2", "T9 GMAC1 TXD3";
226                                                 skew-delay = <7>;
227                                         };
228                                         /* Set up drive strength on GMAC0 and GMAC1 to 16 mA */
229                                         conf9 {
230                                                 groups = "gmii_gmac0_grp", "gmii_gmac1_grp";
231                                                 drive-strength = <16>;
232                                         };
233                                 };
234                         };
235                 };
236
237                 sata: sata@46000000 {
238                         cortina,gemini-ata-muxmode = <0>;
239                         cortina,gemini-enable-sata-bridge;
240                         status = "okay";
241                 };
242
243                 gpio0: gpio@4d000000 {
244                         pinctrl-names = "default";
245                         pinctrl-0 = <&gpio0_default_pins>;
246                 };
247
248                 gpio1: gpio@4e000000 {
249                         pinctrl-names = "default";
250                         pinctrl-0 = <&gpio1_default_pins>;
251                 };
252
253                 pci@50000000 {
254                         status = "okay";
255                         interrupt-map-mask = <0xf800 0 0 7>;
256                         interrupt-map =
257                                 <0x4800 0 0 1 &pci_intc 0>, /* Slot 9 */
258                                 <0x4800 0 0 2 &pci_intc 1>,
259                                 <0x4800 0 0 3 &pci_intc 2>,
260                                 <0x4800 0 0 4 &pci_intc 3>,
261                                 <0x5000 0 0 1 &pci_intc 1>, /* Slot 10 */
262                                 <0x5000 0 0 2 &pci_intc 2>,
263                                 <0x5000 0 0 3 &pci_intc 3>,
264                                 <0x5000 0 0 4 &pci_intc 0>,
265                                 <0x5800 0 0 1 &pci_intc 2>, /* Slot 11 */
266                                 <0x5800 0 0 2 &pci_intc 3>,
267                                 <0x5800 0 0 3 &pci_intc 0>,
268                                 <0x5800 0 0 4 &pci_intc 1>,
269                                 <0x6000 0 0 1 &pci_intc 3>, /* Slot 12 */
270                                 <0x6000 0 0 2 &pci_intc 0>,
271                                 <0x6000 0 0 3 &pci_intc 1>,
272                                 <0x6000 0 0 4 &pci_intc 2>;
273                 };
274
275                 ethernet@60000000 {
276                         status = "okay";
277
278                         ethernet-port@0 {
279                                 phy-mode = "rgmii";
280                                 phy-handle = <&phy0>;
281                         };
282                         ethernet-port@1 {
283                                 phy-mode = "rgmii";
284                                 fixed-link {
285                                         speed = <1000>;
286                                         full-duplex;
287                                         pause;
288                                 };
289                         };
290                 };
291
292                 ata@63000000 {
293                         status = "okay";
294                 };
295
296                 usb@68000000 {
297                         status = "okay";
298                 };
299
300                 usb@69000000 {
301                         status = "okay";
302                 };
303         };
304 };