Merge tag 'jfs-5.2' of git://github.com/kleikamp/linux-shaggy
[linux-2.6-microblaze.git] / arch / arm / boot / dts / exynos5422-odroidxu4.dts
1 // SPDX-License-Identifier: GPL-2.0
2 /*
3  * Hardkernel Odroid XU4 board device tree source
4  *
5  * Copyright (c) 2015 Krzysztof Kozlowski
6  * Copyright (c) 2014 Collabora Ltd.
7  * Copyright (c) 2013-2015 Samsung Electronics Co., Ltd.
8  *              http://www.samsung.com
9  */
10
11 /dts-v1/;
12 #include <dt-bindings/sound/samsung-i2s.h>
13 #include "exynos5422-odroidxu3-common.dtsi"
14
15 / {
16         model = "Hardkernel Odroid XU4";
17         compatible = "hardkernel,odroid-xu4", "samsung,exynos5800", \
18                      "samsung,exynos5";
19
20         pwmleds {
21                 compatible = "pwm-leds";
22
23                 blueled {
24                         label = "blue:heartbeat";
25                         pwms = <&pwm 2 2000000 0>;
26                         pwm-names = "pwm2";
27                         max_brightness = <255>;
28                         linux,default-trigger = "heartbeat";
29                 };
30         };
31
32         sound: sound {
33                 compatible = "samsung,odroid-xu3-audio";
34                 model = "Odroid-XU4";
35
36                 samsung,audio-routing = "I2S Playback", "Mixer DAI TX";
37
38                 assigned-clocks = <&clock CLK_MOUT_EPLL>,
39                                 <&clock CLK_MOUT_MAU_EPLL>,
40                                 <&clock CLK_MOUT_USER_MAU_EPLL>,
41                                 <&clock_audss EXYNOS_MOUT_AUDSS>,
42                                 <&clock_audss EXYNOS_MOUT_I2S>,
43                                 <&clock_audss EXYNOS_DOUT_SRP>,
44                                 <&clock_audss EXYNOS_DOUT_AUD_BUS>,
45                                 <&clock_audss EXYNOS_DOUT_I2S>;
46
47                 assigned-clock-parents = <&clock CLK_FOUT_EPLL>,
48                                 <&clock CLK_MOUT_EPLL>,
49                                 <&clock CLK_MOUT_MAU_EPLL>,
50                                 <&clock CLK_MAU_EPLL>,
51                                 <&clock_audss EXYNOS_MOUT_AUDSS>;
52
53                 assigned-clock-rates = <0>,
54                                 <0>,
55                                 <0>,
56                                 <0>,
57                                 <0>,
58                                 <196608001>,
59                                 <(196608002 / 2)>,
60                                 <196608000>;
61
62                 cpu {
63                         sound-dai = <&i2s0 0>, <&i2s0 1>;
64                 };
65
66                 codec {
67                         sound-dai = <&hdmi>;
68                 };
69         };
70 };
71
72 &clock_audss {
73         assigned-clocks = <&clock_audss EXYNOS_DOUT_SRP>,
74                           <&clock CLK_FOUT_EPLL>;
75         assigned-clock-rates = <(196608000 / 256)>,
76                                <196608000>;
77 };
78
79 &i2s0 {
80         status = "okay";
81         assigned-clocks = <&i2s0 CLK_I2S_RCLK_SRC>;
82         assigned-clock-parents = <&clock_audss EXYNOS_SCLK_I2S>;
83 };
84
85 &pwm {
86         /*
87          * PWM 0 -- fan
88          * PWM 2 -- Blue LED
89          */
90         pinctrl-0 = <&pwm0_out &pwm2_out>;
91         pinctrl-names = "default";
92         samsung,pwm-outputs = <0>, <2>;
93         status = "okay";
94 };
95
96 &usbdrd_dwc3_1 {
97         dr_mode = "host";
98 };