2 * SAMSUNG EXYNOS5410 SoC device tree source
4 * Copyright (c) 2013 Samsung Electronics Co., Ltd.
5 * http://www.samsung.com
7 * SAMSUNG EXYNOS5410 SoC device nodes are listed in this file.
8 * EXYNOS5410 based board files can include this file and provide
9 * values for board specfic bindings.
11 * This program is free software; you can redistribute it and/or modify
12 * it under the terms of the GNU General Public License version 2 as
13 * published by the Free Software Foundation.
16 #include "exynos54xx.dtsi"
17 #include "exynos-syscon-restart.dtsi"
18 #include <dt-bindings/clock/exynos5410.h>
19 #include <dt-bindings/interrupt-controller/arm-gic.h>
22 compatible = "samsung,exynos5410", "samsung,exynos5";
23 interrupt-parent = <&gic>;
26 pinctrl0 = &pinctrl_0;
27 pinctrl1 = &pinctrl_1;
28 pinctrl2 = &pinctrl_2;
29 pinctrl3 = &pinctrl_3;
38 compatible = "arm,cortex-a15";
40 clock-frequency = <1600000000>;
45 compatible = "arm,cortex-a15";
47 clock-frequency = <1600000000>;
52 compatible = "arm,cortex-a15";
54 clock-frequency = <1600000000>;
59 compatible = "arm,cortex-a15";
61 clock-frequency = <1600000000>;
66 compatible = "simple-bus";
71 pmu_system_controller: system-controller@10040000 {
72 compatible = "samsung,exynos5410-pmu", "syscon";
73 reg = <0x10040000 0x5000>;
74 clock-names = "clkout16";
79 clock: clock-controller@10010000 {
80 compatible = "samsung,exynos5410-clock";
81 reg = <0x10010000 0x30000>;
85 tmu_cpu0: tmu@10060000 {
86 compatible = "samsung,exynos5420-tmu";
87 reg = <0x10060000 0x100>;
88 interrupts = <GIC_SPI 65 0>;
89 clocks = <&clock CLK_TMU>;
90 clock-names = "tmu_apbif";
91 #include "exynos4412-tmu-sensor-conf.dtsi"
94 tmu_cpu1: tmu@10064000 {
95 compatible = "samsung,exynos5420-tmu";
96 reg = <0x10064000 0x100>;
97 interrupts = <GIC_SPI 183 0>;
98 clocks = <&clock CLK_TMU>;
99 clock-names = "tmu_apbif";
100 #include "exynos4412-tmu-sensor-conf.dtsi"
103 tmu_cpu2: tmu@10068000 {
104 compatible = "samsung,exynos5420-tmu";
105 reg = <0x10068000 0x100>;
106 interrupts = <GIC_SPI 184 0>;
107 clocks = <&clock CLK_TMU>;
108 clock-names = "tmu_apbif";
109 #include "exynos4412-tmu-sensor-conf.dtsi"
112 tmu_cpu3: tmu@1006c000 {
113 compatible = "samsung,exynos5420-tmu";
114 reg = <0x1006c000 0x100>;
115 interrupts = <GIC_SPI 185 0>;
116 clocks = <&clock CLK_TMU>;
117 clock-names = "tmu_apbif";
118 #include "exynos4412-tmu-sensor-conf.dtsi"
121 mmc_0: mmc@12200000 {
122 compatible = "samsung,exynos5250-dw-mshc";
123 reg = <0x12200000 0x1000>;
124 interrupts = <0 75 0>;
125 #address-cells = <1>;
127 clocks = <&clock CLK_MMC0>, <&clock CLK_SCLK_MMC0>;
128 clock-names = "biu", "ciu";
133 mmc_1: mmc@12210000 {
134 compatible = "samsung,exynos5250-dw-mshc";
135 reg = <0x12210000 0x1000>;
136 interrupts = <0 76 0>;
137 #address-cells = <1>;
139 clocks = <&clock CLK_MMC1>, <&clock CLK_SCLK_MMC1>;
140 clock-names = "biu", "ciu";
145 mmc_2: mmc@12220000 {
146 compatible = "samsung,exynos5250-dw-mshc";
147 reg = <0x12220000 0x1000>;
148 interrupts = <0 77 0>;
149 #address-cells = <1>;
151 clocks = <&clock CLK_MMC2>, <&clock CLK_SCLK_MMC2>;
152 clock-names = "biu", "ciu";
157 pinctrl_0: pinctrl@13400000 {
158 compatible = "samsung,exynos5410-pinctrl";
159 reg = <0x13400000 0x1000>;
160 interrupts = <0 45 0>;
162 wakeup-interrupt-controller {
163 compatible = "samsung,exynos4210-wakeup-eint";
164 interrupt-parent = <&gic>;
165 interrupts = <0 32 0>;
169 pinctrl_1: pinctrl@14000000 {
170 compatible = "samsung,exynos5410-pinctrl";
171 reg = <0x14000000 0x1000>;
172 interrupts = <0 46 0>;
175 pinctrl_2: pinctrl@10d10000 {
176 compatible = "samsung,exynos5410-pinctrl";
177 reg = <0x10d10000 0x1000>;
178 interrupts = <0 50 0>;
181 pinctrl_3: pinctrl@03860000 {
182 compatible = "samsung,exynos5410-pinctrl";
183 reg = <0x03860000 0x1000>;
184 interrupts = <0 47 0>;
189 cpu0_thermal: cpu0-thermal {
190 thermal-sensors = <&tmu_cpu0>;
191 #include "exynos5420-trip-points.dtsi"
193 cpu1_thermal: cpu1-thermal {
194 thermal-sensors = <&tmu_cpu1>;
195 #include "exynos5420-trip-points.dtsi"
197 cpu2_thermal: cpu2-thermal {
198 thermal-sensors = <&tmu_cpu2>;
199 #include "exynos5420-trip-points.dtsi"
201 cpu3_thermal: cpu3-thermal {
202 thermal-sensors = <&tmu_cpu3>;
203 #include "exynos5420-trip-points.dtsi"
209 clocks = <&clock CLK_I2C0>;
211 pinctrl-names = "default";
212 pinctrl-0 = <&i2c0_bus>;
216 clocks = <&clock CLK_I2C1>;
218 pinctrl-names = "default";
219 pinctrl-0 = <&i2c1_bus>;
223 clocks = <&clock CLK_I2C2>;
225 pinctrl-names = "default";
226 pinctrl-0 = <&i2c2_bus>;
230 clocks = <&clock CLK_I2C3>;
232 pinctrl-names = "default";
233 pinctrl-0 = <&i2c3_bus>;
237 clocks = <&clock CLK_USI0>;
238 clock-names = "hsi2c";
239 pinctrl-names = "default";
240 pinctrl-0 = <&i2c4_hs_bus>;
244 clocks = <&clock CLK_USI1>;
245 clock-names = "hsi2c";
246 pinctrl-names = "default";
247 pinctrl-0 = <&i2c5_hs_bus>;
251 clocks = <&clock CLK_USI2>;
252 clock-names = "hsi2c";
253 pinctrl-names = "default";
254 pinctrl-0 = <&i2c6_hs_bus>;
258 clocks = <&clock CLK_USI3>;
259 clock-names = "hsi2c";
260 pinctrl-names = "default";
261 pinctrl-0 = <&i2c7_hs_bus>;
265 clocks = <&fin_pll>, <&clock CLK_MCT>;
266 clock-names = "fin_pll", "mct";
270 clocks = <&clock CLK_PWM>;
271 clock-names = "timers";
275 clocks = <&clock CLK_RTC>;
277 interrupt-parent = <&pmu_system_controller>;
282 clocks = <&clock CLK_UART0>, <&clock CLK_SCLK_UART0>;
283 clock-names = "uart", "clk_uart_baud0";
287 clocks = <&clock CLK_UART1>, <&clock CLK_SCLK_UART1>;
288 clock-names = "uart", "clk_uart_baud0";
292 clocks = <&clock CLK_UART2>, <&clock CLK_SCLK_UART2>;
293 clock-names = "uart", "clk_uart_baud0";
297 clocks = <&clock CLK_UART3>, <&clock CLK_SCLK_UART3>;
298 clock-names = "uart", "clk_uart_baud0";
302 clocks = <&clock CLK_SSS>;
303 clock-names = "secss";
307 #address-cells = <2>;
309 ranges = <0 0 0x04000000 0x20000
310 1 0 0x05000000 0x20000
311 2 0 0x06000000 0x20000
312 3 0 0x07000000 0x20000>;
316 clocks = <&clock CLK_USBD300>;
317 clock-names = "usbdrd30";
321 clocks = <&clock CLK_USBD300>, <&clock CLK_SCLK_USBPHY300>;
322 clock-names = "phy", "ref";
323 samsung,pmu-syscon = <&pmu_system_controller>;
327 clocks = <&clock CLK_USBD301>;
328 clock-names = "usbdrd30";
332 interrupts = <GIC_SPI 200 0>;
336 clocks = <&clock CLK_USBD301>, <&clock CLK_SCLK_USBPHY301>;
337 clock-names = "phy", "ref";
338 samsung,pmu-syscon = <&pmu_system_controller>;
342 clocks = <&clock CLK_USBH20>;
343 clock-names = "usbhost";
347 clocks = <&clock CLK_USBH20>;
348 clock-names = "usbhost";
352 clocks = <&clock CLK_USBH20>, <&clock CLK_SCLK_USBPHY300>;
353 clock-names = "phy", "ref";
354 samsung,sysreg-phandle = <&sysreg_system_controller>;
355 samsung,pmureg-phandle = <&pmu_system_controller>;
359 clocks = <&clock CLK_WDT>;
360 clock-names = "watchdog";
361 samsung,syscon-phandle = <&pmu_system_controller>;
364 #include "exynos5410-pinctrl.dtsi"