1 // SPDX-License-Identifier: GPL-2.0-only
3 * Copyright (C) 2017 Texas Instruments Incorporated - https://www.ti.com/
9 compatible = "ti,dra762", "ti,dra7";
12 target-module@42c01900 {
13 compatible = "ti,sysc-dra7-mcan", "ti,sysc";
14 ranges = <0x0 0x42c00000 0x2000>;
17 reg = <0x42c01900 0x4>,
20 reg-names = "rev", "sysc", "syss";
21 ti,sysc-mask = <(SYSC_OMAP4_SOFTRESET |
22 SYSC_DRA7_MCAN_ENAWAKEUP)>;
24 clocks = <&wkupaon_clkctrl DRA7_WKUPAON_ADC_CLKCTRL 0>;
28 compatible = "bosch,m_can";
29 reg = <0x1a00 0x4000>, <0x0 0x18FC>;
30 reg-names = "m_can", "message_ram";
31 interrupt-parent = <&gic>;
32 interrupts = <GIC_SPI 67 IRQ_TYPE_LEVEL_HIGH>,
33 <GIC_SPI 68 IRQ_TYPE_LEVEL_HIGH>;
34 interrupt-names = "int0", "int1";
35 clocks = <&l3_iclk_div>, <&mcan_clk>;
36 clock-names = "hclk", "cclk";
37 bosch,mram-cfg = <0x0 0 0 32 0 0 1 1>;
45 target-module@1b0000 { /* 0x489b0000, ap 25 34.0 */
46 compatible = "ti,sysc-omap4", "ti,sysc";
49 reg-names = "rev", "sysc";
50 ti,sysc-midle = <SYSC_IDLE_FORCE>,
52 ti,sysc-sidle = <SYSC_IDLE_FORCE>,
54 clocks = <&cam_clkctrl DRA7_CAM_VIP3_CLKCTRL 0>;
58 ranges = <0x0 0x1b0000 0x10000>;
61 compatible = "ti,dra76-cal";
65 reg-names = "cal_top",
68 interrupts = <GIC_SPI 353 IRQ_TYPE_LEVEL_HIGH>;
69 ti,camerrx-control = <&scm_conf 0x6dc>;
87 dpll_gmac_h14x2_ctrl_ck: dpll_gmac_h14x2_ctrl_ck@3fc {
89 compatible = "ti,divider-clock";
90 clocks = <&dpll_gmac_x2_ck>;
95 assigned-clocks = <&dpll_gmac_h14x2_ctrl_ck>;
96 assigned-clock-rates = <80000000>;
99 dpll_gmac_h14x2_ctrl_mux_ck: dpll_gmac_h14x2_ctrl_mux_ck@3fc {
101 compatible = "ti,mux-clock";
102 clocks = <&dpll_gmac_ck>, <&dpll_gmac_h14x2_ctrl_ck>;
106 assigned-clocks = <&dpll_gmac_h14x2_ctrl_mux_ck>;
107 assigned-clock-parents = <&dpll_gmac_h14x2_ctrl_ck>;
110 mcan_clk: mcan_clk@3fc {
112 compatible = "ti,gate-clock";
113 clocks = <&dpll_gmac_h14x2_ctrl_mux_ck>;
128 /* dra76x is not affected by i887 */
129 max-frequency = <96000000>;
133 opp_plus@1800000000 {
134 opp-hz = /bits/ 64 <1800000000>;
135 opp-microvolt = <1250000 950000 1250000>,
136 <1250000 950000 1250000>;
137 opp-supported-hw = <0xFF 0x08>;
142 ti,efuse-settings = <
153 /*uV ABB efuse rbb_m fbb_m vset_m*/
154 1060000 0 0x0 0 0x02000000 0x01F00000
155 1160000 0 0x4 0 0x02000000 0x01F00000
156 1210000 0 0x8 0 0x02000000 0x01F00000
157 1250000 0 0xC 0 0x02000000 0x01F00000