Merge tag 'scsi-fixes' of git://git.kernel.org/pub/scm/linux/kernel/git/jejb/scsi
[linux-2.6-microblaze.git] / arch / arm / boot / dts / dra74x.dtsi
1 // SPDX-License-Identifier: GPL-2.0-only
2 /*
3  * Copyright (C) 2014 Texas Instruments Incorporated - http://www.ti.com/
4  *
5  * Based on "omap4.dtsi"
6  */
7
8 #include "dra7.dtsi"
9
10 / {
11         compatible = "ti,dra742", "ti,dra74", "ti,dra7";
12
13         cpus {
14                 cpu@1 {
15                         device_type = "cpu";
16                         compatible = "arm,cortex-a15";
17                         reg = <1>;
18                         operating-points-v2 = <&cpu0_opp_table>;
19
20                         clocks = <&dpll_mpu_ck>;
21                         clock-names = "cpu";
22
23                         clock-latency = <300000>; /* From omap-cpufreq driver */
24
25                         /* cooling options */
26                         #cooling-cells = <2>; /* min followed by max */
27
28                         vbb-supply = <&abb_mpu>;
29                 };
30         };
31
32         pmu {
33                 compatible = "arm,cortex-a15-pmu";
34                 interrupt-parent = <&wakeupgen>;
35                 interrupts = <GIC_SPI 131 IRQ_TYPE_LEVEL_HIGH>,
36                              <GIC_SPI 132 IRQ_TYPE_LEVEL_HIGH>;
37         };
38
39         ocp {
40                 dsp2_system: dsp_system@41500000 {
41                         compatible = "syscon";
42                         reg = <0x41500000 0x100>;
43                 };
44
45                 omap_dwc3_4: omap_dwc3_4@48940000 {
46                         compatible = "ti,dwc3";
47                         ti,hwmods = "usb_otg_ss4";
48                         reg = <0x48940000 0x10000>;
49                         interrupts = <GIC_SPI 346 IRQ_TYPE_LEVEL_HIGH>;
50                         #address-cells = <1>;
51                         #size-cells = <1>;
52                         utmi-mode = <2>;
53                         ranges;
54                         status = "disabled";
55                         usb4: usb@48950000 {
56                                 compatible = "snps,dwc3";
57                                 reg = <0x48950000 0x17000>;
58                                 interrupts = <GIC_SPI 345 IRQ_TYPE_LEVEL_HIGH>,
59                                              <GIC_SPI 345 IRQ_TYPE_LEVEL_HIGH>,
60                                              <GIC_SPI 346 IRQ_TYPE_LEVEL_HIGH>;
61                                 interrupt-names = "peripheral",
62                                                   "host",
63                                                   "otg";
64                                 maximum-speed = "high-speed";
65                                 dr_mode = "otg";
66                         };
67                 };
68
69                 mmu0_dsp2: mmu@41501000 {
70                         compatible = "ti,dra7-dsp-iommu";
71                         reg = <0x41501000 0x100>;
72                         interrupts = <GIC_SPI 146 IRQ_TYPE_LEVEL_HIGH>;
73                         ti,hwmods = "mmu0_dsp2";
74                         #iommu-cells = <0>;
75                         ti,syscon-mmuconfig = <&dsp2_system 0x0>;
76                         status = "disabled";
77                 };
78
79                 mmu1_dsp2: mmu@41502000 {
80                         compatible = "ti,dra7-dsp-iommu";
81                         reg = <0x41502000 0x100>;
82                         interrupts = <GIC_SPI 147 IRQ_TYPE_LEVEL_HIGH>;
83                         ti,hwmods = "mmu1_dsp2";
84                         #iommu-cells = <0>;
85                         ti,syscon-mmuconfig = <&dsp2_system 0x1>;
86                         status = "disabled";
87                 };
88         };
89 };
90
91 &cpu0_opp_table {
92         opp-shared;
93 };
94
95 &dss {
96         reg = <0x58000000 0x80>,
97               <0x58004054 0x4>,
98               <0x58004300 0x20>,
99               <0x58009054 0x4>,
100               <0x58009300 0x20>;
101         reg-names = "dss", "pll1_clkctrl", "pll1",
102                     "pll2_clkctrl", "pll2";
103
104         clocks = <&dss_clkctrl DRA7_DSS_DSS_CORE_CLKCTRL 8>,
105                  <&dss_clkctrl DRA7_DSS_DSS_CORE_CLKCTRL 12>,
106                  <&dss_clkctrl DRA7_DSS_DSS_CORE_CLKCTRL 13>;
107         clock-names = "fck", "video1_clk", "video2_clk";
108 };
109
110 &mailbox5 {
111         mbox_ipu1_ipc3x: mbox_ipu1_ipc3x {
112                 ti,mbox-tx = <6 2 2>;
113                 ti,mbox-rx = <4 2 2>;
114                 status = "disabled";
115         };
116         mbox_dsp1_ipc3x: mbox_dsp1_ipc3x {
117                 ti,mbox-tx = <5 2 2>;
118                 ti,mbox-rx = <1 2 2>;
119                 status = "disabled";
120         };
121 };
122
123 &mailbox6 {
124         mbox_ipu2_ipc3x: mbox_ipu2_ipc3x {
125                 ti,mbox-tx = <6 2 2>;
126                 ti,mbox-rx = <4 2 2>;
127                 status = "disabled";
128         };
129         mbox_dsp2_ipc3x: mbox_dsp2_ipc3x {
130                 ti,mbox-tx = <5 2 2>;
131                 ti,mbox-rx = <1 2 2>;
132                 status = "disabled";
133         };
134 };
135
136 &pcie1_rc {
137         compatible = "ti,dra746-pcie-rc", "ti,dra7-pcie";
138 };
139
140 &pcie1_ep {
141         compatible = "ti,dra746-pcie-ep", "ti,dra7-pcie-ep";
142 };
143
144 &pcie2_rc {
145         compatible = "ti,dra746-pcie-rc", "ti,dra7-pcie";
146 };